KR100737597B1 - Front panel of plasma display panel and plasma display panel having same - Google Patents

Abstract

The present invention relates to a front panel which prevents cracking due to stress of the protective layer provided on the front panel and a plasma display panel having the same. According to the present invention, a buffer layer may be provided in a region where the pair of sustain electrodes of the front plate are not positioned to prevent the protective layer from cracking due to stress generated by thermal deformation of the substrate. In addition, the buffer layer is made the same as the material of the sustain electrode pair to maximize the buffering effect, thereby more effectively preventing cracking of the protective layer.

Plasma Display Panel, Front Panel, Crack, Protective Layer

Description

Front plate of plasma display panel and plasma display panel having same {Front Plate And Plasma Display Panel Having The Same}

1 is a view for explaining the structure of a conventional plasma display panel;

2 is a view showing a crack of a protective film layer of a conventional plasma display panel;

3 is a diagram illustrating stress caused by thermal deformation of a conventional plasma display panel;

4A and 4B are cross-sectional views and a plan view of a front panel of a plasma display panel according to an embodiment of the present invention;

5A to 5D are plan views illustrating various shapes of a buffer layer formed on a front plate of a plasma display panel according to an embodiment of the present invention;

6 is a cross-sectional view of the plasma display panel with a buffer layer according to an embodiment of the present invention.

** Explanation of symbols for main parts of drawings **

10: front substrate 11: sustain electrode

12: bus electrode 13: front dielectric layer

14: protective layer 20: rear substrate

21: address electrode 22: rear dielectric layer

30: partition 31: phosphor

40: buffer layer

The present invention relates to a front plate of a plasma display panel and a plasma display panel having the same, and more particularly to a front plate and a plasma display panel having the same to prevent cracking due to the stress of the protective layer provided on the front plate. will be.

Plasma Display Panels (PDPs) are display devices that generate visible light from a phosphor when vacuum ultraviolet rays generated by gas discharge excite the phosphor. Plasma Display Panels (PDPs) are in the limelight in that they are thinner and lighter than conventional Cathode Ray Tubes (CRTs), which have been predominantly used as display devices, and can realize large screens with high definition. Easy to process, wide viewing angle, self-luminous type, high display quality, attracts attention in flat panel display field. wide.

The plasma display panel is composed of a plurality of discharge cells arranged in a matrix form, one discharge cell forms a pixel, the discharge cells gather to form the entire screen. In general, a plasma display panel is divided into a direct current type and an alternating current type, among which an AC plasma display panel is currently mainstream.

1 is a view showing an example of a conventional AC plasma display panel.

As illustrated, the plasma display device includes a back substrate 110, an address electrode 111 formed on the back substrate 110, a dielectric layer 112 formed on the back substrate 110 on which the address electrodes 111 are formed, And a barrier rib 113 formed on the dielectric layer 112 to maintain a discharge distance and to prevent electro-optical crosstalk between cells, and a rear substrate 110 on which the barrier rib 113 is formed. The sustain electrode pairs 114 and 115 of a predetermined pattern are provided with the front substrate 116 formed on the bottom surface so as to be orthogonal. A phosphor layer 117 is formed on at least one side of the discharge space partitioned by the partition wall 113, and a dielectric layer 118 and a protective film 119 are formed on the bottom surface of the front plate 116. Discharge gas mixed with Ne, Xe, etc. is injected into the discharge space, and the content of Xe occupies 4-5% of the gas injected into the discharge space.

In the plasma display panel having such a configuration, the electrode driving method is largely divided into driving for address discharge and driving for sustain discharge. The address discharge is caused by the potential difference between the address electrode 111 and one sustain electrode 114, and wall charges are formed at this time. The sustain discharge is caused by the potential difference between the pair of sustain electrodes 114 and 115 positioned in the discharge space in which the wall charges are formed. This sustain discharge is a discharge for displaying an actual image and becomes a discharging state.

2 is a view showing a crack of a protective film layer of a conventional plasma display panel. The protective film layer, which serves to protect the front dielectric layer and activate secondary electron emission to reduce the discharge voltage, has a different thermal expansion coefficient than that of the glass substrate. You will experience thermal stress. The thermal stress is a buffer of the sustain electrode made of a transparent electrode, as shown in the protective film layer of the region on the sustain electrode is relatively small cracks are generated in the region where the sustain electrode is not large.

That is, as shown in FIG. 3, the thermal deformation of the glass substrate 120 applied during heating and cooling occurs in the protective layer in the region above the sustain electrode 121, but relatively little thermal strain occurs. The passivation layer 124 in the non-located region is subjected to a great stress and cracks are generated.

As such, the protective film layer in which the crack is formed may cause contaminants to penetrate the protective film layer and the front dielectric interface, or the cracks may be sputtered by ions and electrons generated during panel discharge, causing irregular discharge and dielectric breakdown. It is urgent to solve this problem by acting as a factor causing a fatal problem in the reliability and lifespan of the plasma display panel.

The present invention is to solve the above problems,

It is an object of the present invention to provide a front plate provided with a buffer layer and a plasma display panel having the same in order to prevent the protective layer provided on the front plate from cracking due to stress caused by thermal deformation of the substrate.

In addition, it is an object of the present invention to provide a front panel and a plasma display panel having the same by maximizing the buffering effect by using the same buffer layer as the material of the sustain electrode pair.

In order to realize the above object, the present invention provides

A sustain electrode pair formed on a portion of the front substrate and spaced apart from each other in a predetermined pattern; A buffer layer formed on a predetermined region of the front substrate on which the sustain electrode pair is not formed; A bus electrode pair formed on the sustain electrode pair; A front dielectric layer covering the sustain electrode pair and the bus electrode pair; And a passivation layer formed on the dielectric layer.

In addition, the buffer layer is provided in the front plate of the plasma display panel, characterized in that formed in the separation region of the sustain electrode pair.

In addition, the buffer layer is characterized in that the same as the material of the sustain electrode pair, in particular the buffer layer is provided with a front plate of the plasma display panel, characterized in that made of indium tin oxide (ITO).

In addition, the buffer layer and the sustain electrode pair provide a front panel of the plasma display panel, characterized in that spaced apart from each other.

In addition, the front dielectric layer provides a front plate of the plasma display panel, characterized in that further covers the buffer layer.

The present invention also provides a plasma display panel comprising a front plate, a back plate and a partition wall.

The front plate may include a sustain electrode pair formed on a portion of the rear surface of the front substrate by a predetermined pattern, a buffer layer formed on an area where the sustain electrode pair on the rear surface of the front substrate is not located, and a bus electrode pair formed on the rear surface of the sustain electrode pair. And a front dielectric layer covering the sustain electrode pair and the bus electrode pair, and a protective film layer formed on a rear surface of the front dielectric layer.

The rear plate may include an address electrode formed on an upper surface of the rear substrate 20 in a manner perpendicular to the sustain electrode pair, and a rear dielectric layer covering the address electrode and opposing the front plate.

The partition wall is characterized in that formed on top of the back plate to partition the discharge space.

In addition, the front plate is characterized in that the front plate according to the present invention described above. That is, the buffer layer is provided in the plasma display panel, characterized in that formed in the separation region of the sustain electrode pair.

In addition, the buffer layer is characterized in that the same as the material of the sustain electrode pair, in particular the buffer layer is provided with a plasma display panel, characterized in that made of indium tin oxide (ITO).

In addition, the buffer layer and the sustain electrode pair provide a plasma display panel, characterized in that spaced apart from each other.

In addition, the front dielectric layer further provides a plasma display panel, wherein the buffer layer further covers the buffer layer.

In addition, the present invention provides a plasma display panel, wherein a phosphor is coated on the partition walls and the back plate.

Hereinafter, with reference to the accompanying drawings to describe the present invention in more detail.

4A and 4B are cross-sectional views and a plan view of a front plate of a plasma display panel according to an embodiment of the present invention. As shown, the storage electrode pair 11 formed spaced apart in a predetermined pattern on the upper portion of the front substrate 10 and the buffer layer formed in the region of the front substrate 10 where the storage electrode pair 11 is not located. 40, a bus electrode pair 12 formed on the sustain electrode pair 11, a front dielectric layer 13 covering the sustain electrode pair 11 and the bus electrode pair 12, and the dielectric layer 13. Characterized in that the front plate of the plasma display panel including a protective film layer 14 formed on the upper.

The structure, material, and manufacturing method of the front substrate 10, sustain electrode pair 11, bus electrode pair 12, and front dielectric layer 22 can be selected and used without limitation. Since it is well known, the detailed description is omitted.

The sustain electrode pairs 11 are spaced apart from each other in a region corresponding to the discharge space of the front plate of the plasma display panel. The sustain electrode pairs 11 may be formed to be patterned specifically in the pixel region of the discharge space, and the sustain electrode pairs 11 may be connected long along the pixel region as if the bus electrodes are connected along the pixel region.

The buffer layer 40 serves as a buffer to prevent cracking of the protective layer 14 as one of the features of the present invention. That is, the protective film layer 14 on the region where the sustain electrode pair 11 is not positioned is prevented from being stressed more than the protective layer 14 on the region where the sustain electrode pair 11 is located, thereby preventing the protective film layer ( 14) prevents cracking.

As shown in FIG. 4B, the buffer layer 40 is formed in the region of the front substrate 10 where the sustain electrode pair 11 is not located. The material of the buffer layer 40 is not particularly limited, but it is preferable to use the same material as that of the sustain electrode pair 11 to maximize the buffer effect. In the case of using the indium tin oxide (ITO) which is a transparent electrode as the material of the sustain electrode pair 11, it is preferable to use the same indium tin oxide (ITO) as the material of the buffer layer 40. In addition, for effective surface discharge, the sustain electrode pair 11 and the buffer layer 40 are preferably spaced apart from each other so that electricity does not flow in the buffer layer 40.

The front dielectric layer 13 may cover the buffer layer 40 as shown, and may be formed in a differential structure, although not shown, and a dielectric layer may not exist on the buffer layer 40.

The protective film layer 14 protects the front dielectric layer 13. In addition, it may serve to reduce the discharge voltage by activating secondary electron emission. The protective layer 14 may be made of magnesium oxide (MgO), zirconium oxide (ZrO), hafnium oxide (HfO), cesium oxide (CeO ₂ ), thorium oxide (ThO ₂ ), or lanthanum oxide (La ₂ O _3). The most preferred is magnesium oxide (MgO) having excellent secondary electron emission coefficient and plasma erosion resistance. Magnesium oxide (MgO) can be formed using a vacuum deposition method such as an electron beam deposition method or the like.

Hereinafter, various embodiments of the buffer layer 40 will be described with reference to the drawings.

5A through 5D are plan views illustrating various shapes of the buffer layer 40 formed on the front plate of the plasma display panel according to the exemplary embodiment of the present invention.

The buffer layer 40 may be selectively positioned on the entire surface of the sustain electrode pair 11 or only a part of the region, and all modifications thereof are included in the present invention.

When the storage electrode pairs 11 are specifically positioned in some regions of the pixel, the buffer layer 40 may be formed only on the side surfaces of the storage electrode pairs 11 facing each other (FIG. 5A). In addition, the buffer layer 40 may be formed only in a spaced area of the sustain electrode pair 11 facing each other (FIG. 5B). In addition, the buffer layer 40 may be formed in a spaced area of the sustain electrode pair 11 facing each other and a part of the side surface of the sustain electrode pair 11 (FIG. 5C). When the sustain electrode pairs 11 are connected to each other along the pixel area like the bus electrode pairs, the buffer layer 40 may be formed in the spaced area of the sustain electrode pairs 11 (FIG. 5D).

6 is a cross-sectional view of a plasma display panel having a front plate on which a buffer layer 40 is formed according to an embodiment of the present invention. As shown, the buffer layer 40 includes a front plate, a back plate, and a partition wall 30 formed thereon.

The front plate may include a storage electrode pair 11 formed spaced apart in a predetermined pattern on a portion of the rear surface of the front substrate 10 and a region where the storage electrode pair 11 on the rear surface of the front substrate 10 is not located. A buffer layer 40, a bus electrode pair 12 formed on the rear surface of the sustain electrode pair 11, a front dielectric layer 13 covering the sustain electrode pair 11 and the bus electrode pair 12, and the front dielectric layer (13) It is characterized by including the protective film layer 14 formed in the back surface.

The front panel may be selected without limitation the front panel described above. That is, the plasma display panel of the present invention may include a front plate having the above-described configuration of the buffer layer 40 and the protective layer 14. Since the front panel has been described in detail above, description thereof will be omitted.

The back plate may include an address electrode 21 formed on the top surface of the back substrate 20 perpendicular to the sustain electrode pair 11, and a back dielectric layer 22 covering the address electrode 21. It is characterized by facing the plate.

The partition wall 30 is characterized in that formed on the back plate to partition the discharge space. The structure of the barrier rib 30 of the back plate of the present invention is not limited and may be, for example, a stripe barrier rib, a closed barrier rib or a delta barrier rib.

Phosphors 31 may be applied to the partitions 30 and the rear plate to implement colors by fluorescing ultraviolet rays.

The plasma display panel according to the present invention includes a buffer layer 40, which is one of the features of the present invention, so that the passivation layer 14 on the region where the sustain electrode pair 11 is not located is the sustain electrode pair 11. It prevents the stress layer from being much stressed as compared to the passivation layer 14 on the region where it is located, thereby preventing cracking of the passivation layer 14 and improving the reliability and lifespan of the plasma display panel.

The above embodiments are intended to explain the present invention in detail so that the present invention can be more easily understood, and are not intended to limit the present invention. Therefore, modified substructures and plasma display panels that can be commonly applied are also included in the present invention.

In the front panel and the plasma display panel according to the present invention having the above constitutive features, the protective layer is different from the glass substrate and the thermal expansion coefficient of the prior art, and thus undergoes thermal stress during heat treatment. The protective layer has a relatively small crack, but the problem that the crack is largely generated in the region where the sustain electrode is not located.

That is, the buffer layer is provided on the front plate to provide the effect of preventing the crack in the area where the sustain electrode is not located due to the stress caused by the thermal deformation of the substrate.

In addition, the buffer layer is made the same as the material of the sustain electrode pair to maximize the buffering effect, thereby more effectively preventing cracking of the protective layer.

This prevents contaminants from penetrating into the protective film layer and the front dielectric interface, prevents the occurrence of cracks that can be sputtered by ions and electrons generated during panel discharge, and prevents dielectric breakdown and escape of dielectric components into the discharge space. Can be prevented, thereby providing an effect of improving the reliability and lifetime of the plasma display panel.

Claims (15)

A sustain electrode pair formed on a portion of the front substrate and spaced apart from each other in a predetermined pattern; A buffer layer formed on a region where the sustain electrode pair is not formed among the upper regions of the front substrate; A bus electrode pair formed on an upper portion of the sustain electrode pair; A front dielectric layer covering the sustain electrode pair and the bus electrode pair; And And a passivation layer formed on the dielectric layer. The front panel of claim 1, wherein the buffer layer is formed in an area in which the sustain electrode pairs are spaced apart from each other. The front panel of a plasma display panel of claim 1, wherein the buffer layer is made of the same material as that of the sustain electrode pairs. The front panel of claim 1, wherein the buffer layer is made of indium tin oxide (ITO). The front panel of claim 1, wherein the buffer layer and the sustain electrode pair are spaced apart from each other. The front panel of claim 1, wherein the front dielectric layer further covers the buffer layer. The front panel of claim 1, wherein the passivation layer comprises magnesium oxide (MgO). A sustain electrode pair formed spaced apart in a predetermined pattern on a portion of the rear surface of the front substrate, a bus electrode pair formed on a portion of the rear surface of the sustain electrode pair, a front dielectric layer and a protective layer layer covering the sustain electrode pair and the bus electrode pair. plate; A back plate having an address electrode formed perpendicularly to the sustain electrode pair; And a partition wall formed on the rear face plate to partition a discharge space. And the front panel further comprises a buffer layer formed on a region where the pair of sustain electrodes on the rear surface of the front substrate are not located. The plasma display panel of claim 8, wherein the buffer layer is formed in a spaced area of the sustain electrode pair. The plasma display panel of claim 8, wherein the buffer layer is made of the same material as that of the sustain electrode pairs. The plasma display panel of claim 8, wherein the buffer layer is made of indium tin oxide (ITO). The plasma display panel of claim 8, wherein the buffer layer and the sustain electrode pair are spaced apart from each other. The plasma display panel of claim 8, wherein the front dielectric layer further covers the buffer layer. The plasma display panel of claim 8, wherein phosphors are coated on the partition walls and the back plate. The plasma display panel of claim 8, wherein the passivation layer comprises magnesium oxide (MgO).

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