JPS6342179A - Semiconductor strain detector - Google Patents
Semiconductor strain detectorInfo
- Publication number
- JPS6342179A JPS6342179A JP18583886A JP18583886A JPS6342179A JP S6342179 A JPS6342179 A JP S6342179A JP 18583886 A JP18583886 A JP 18583886A JP 18583886 A JP18583886 A JP 18583886A JP S6342179 A JPS6342179 A JP S6342179A
- Authority
- JP
- Japan
- Prior art keywords
- semi
- polycrystalline silicon
- silicon substrate
- insulating polycrystalline
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 18
- 239000000758 substrate Substances 0.000 claims abstract description 33
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 22
- 239000013078 crystal Substances 0.000 claims description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 6
- 238000009792 diffusion process Methods 0.000 abstract description 6
- 239000003513 alkali Substances 0.000 abstract description 5
- 238000000034 method Methods 0.000 abstract description 5
- 229910052681 coesite Inorganic materials 0.000 abstract description 3
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 3
- 238000001259 photo etching Methods 0.000 abstract description 3
- 239000000377 silicon dioxide Substances 0.000 abstract description 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 3
- 229910052682 stishovite Inorganic materials 0.000 abstract description 3
- 229910052905 tridymite Inorganic materials 0.000 abstract description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052782 aluminium Inorganic materials 0.000 abstract description 2
- 229910052796 boron Inorganic materials 0.000 abstract description 2
- 238000000206 photolithography Methods 0.000 abstract description 2
- -1 boron ions Chemical class 0.000 abstract 1
- 238000002513 implantation Methods 0.000 abstract 1
- 238000005530 etching Methods 0.000 description 14
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 10
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 9
- 239000000243 solution Substances 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 239000010408 film Substances 0.000 description 4
- 230000001681 protective effect Effects 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 239000007864 aqueous solution Substances 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 229910005091 Si3N Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 229910020776 SixNy Inorganic materials 0.000 description 1
- 235000010724 Wisteria floribunda Nutrition 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000010791 quenching Methods 0.000 description 1
- 238000005096 rolling process Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
Landscapes
- Pressure Sensors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、例えば圧力センサを構成する圧力検出素子と
して使用される半導体歪検出器に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor strain detector used as a pressure detection element constituting a pressure sensor, for example.
従来より、薄肉部のダイヤフラムを持つN型単結晶シリ
コン基板中に、ブリッジを構成する複数のP型シリコン
ピエゾ抵抗歪ゲージを、不純物拡散によって形成した、
いわゆる拡散型半導体圧力センサが広く利用されている
。Conventionally, a plurality of P-type silicon piezoresistive strain gauges constituting a bridge have been formed by impurity diffusion in an N-type single crystal silicon substrate having a thin diaphragm.
So-called diffusion type semiconductor pressure sensors are widely used.
しかしながら、拡散型半導体圧力センサは、各歪ゲージ
の基板からの分離をPN接合によって行っているため、
およそ150℃以上の温度においては、PN接合部のも
れ電流が急激に増加し、ブリッジのバランスがくずれ、
もはや圧力センサとして作動しなくなるという問題点が
あった。However, in the diffusion type semiconductor pressure sensor, each strain gauge is separated from the substrate by a PN junction.
At temperatures above approximately 150°C, the leakage current at the PN junction increases rapidly, causing the bridge to become unbalanced.
There was a problem that it no longer worked as a pressure sensor.
この問題を解決するために、各歪ゲージの基板からの分
離をPN接合によって行うのではなく、大きな比抵抗の
差によって各ゲージを分離することが考えられるが、単
結晶シリコン基板の比抵抗は最も大きなものでもたかだ
か100Ω・(至)程度であり、比抵抗の差による各ゲ
ージの分離は不可能である。In order to solve this problem, instead of separating each strain gauge from the substrate by a PN junction, it is possible to separate each strain gauge by a large difference in resistivity, but the resistivity of a single crystal silicon substrate is The largest one is about 100 ohms (approximately), and it is impossible to separate each gauge based on the difference in resistivity.
また、前述の拡散型半導体圧力センサにおいて、ダイヤ
フラムの形成は、通常、水酸化カリウム水溶液などのア
ルカリを用いた異方性エツチングによって行っているが
、円形のダイヤフラムを形成しようとすると、完全な円
形にはならず、例えば面方位(110)のシリコン基板
を用いた時には第3図に示す様に、六角形に近い形状の
ダイヤフラムとなってしまう。この事が原因で、各ゲー
ジ部分の応力の対称性がくずれるため、完全な円形のダ
イヤフラムを持つ圧力センサと比較して出力が低下する
という問題点があった。ここで、完全な円形のダイヤフ
ラムが得られない理由は、異方性エツチングを利用して
いるためである。すなわち、エツチング速度の最も遅い
(1111面で規定される形状になるためである。In addition, in the aforementioned diffusion-type semiconductor pressure sensor, the diaphragm is usually formed by anisotropic etching using an alkali such as an aqueous potassium hydroxide solution. For example, if a silicon substrate with a (110) plane orientation is used, the diaphragm will have a shape close to a hexagon, as shown in FIG. As a result of this, the symmetry of the stress in each gauge part is lost, resulting in a problem that the output is lower than that of a pressure sensor with a completely circular diaphragm. Here, the reason why a perfectly circular diaphragm cannot be obtained is because anisotropic etching is used. That is, the etching rate is the slowest (because the shape is defined by the 1111 plane).
本発明は上記のような問題点に鑑みなされたもので、単
結晶シリコンに対しての異方性エツチング液を使用して
も円形を含む任意の形状のダイヤフラムが形成可能で、
高温においても基板と半導体歪ゲージ間の電気的絶縁が
保たれ、安定に作動する半導体歪検出器を提供する事を
目的としている。The present invention was made in view of the above-mentioned problems, and it is possible to form a diaphragm in any shape including a circle even by using an anisotropic etching solution for single crystal silicon.
The purpose of this invention is to provide a semiconductor strain detector that maintains electrical insulation between a substrate and a semiconductor strain gauge even at high temperatures and operates stably.
上記の目的を達成するために本発明の半導体歪検出器は
、薄肉部のダイヤフラムを有する半導体絶縁多結晶シリ
コン基板と、該基板の上に形成される半導体歪ゲージと
を備える事を特徴としている。In order to achieve the above object, the semiconductor strain detector of the present invention is characterized by comprising a semiconductor insulating polycrystalline silicon substrate having a thin-walled diaphragm, and a semiconductor strain gauge formed on the substrate. .
上記の手段によると、半絶縁性多結晶シリコン基板はそ
の比抵抗が充分に大きいので基板と半導体歪ゲージとを
電気的に分離でき、又、該基板は化学的に等方性である
ので、KOH水溶液等の単結晶シリコンに対する異方性
エツチング液を使用しても等方的にエツチングされ、円
形のダイヤフラムを形成可能となる。According to the above means, the semi-insulating polycrystalline silicon substrate has a sufficiently large resistivity so that the substrate and the semiconductor strain gauge can be electrically separated, and since the substrate is chemically isotropic, Even if an anisotropic etching solution for single-crystal silicon, such as a KOH aqueous solution, is used, etching is performed isotropically, making it possible to form a circular diaphragm.
以下、本発明を図面に示す実施例により説明する。第1
図は本発明の一実施例の半導体歪検出器であり、同図(
alにその上面図、同図(blにA−A線断面図を示す
。The present invention will be explained below with reference to embodiments shown in the drawings. 1st
The figure shows a semiconductor strain detector according to an embodiment of the present invention.
Al shows the top view, and the figure (bl shows the sectional view taken along the line A-A).
第1図において、11は例えばIQ16cm−’程度の
不純物濃度を持ち、結晶粒子径が約1000人でI X
10’Ω(至)の比抵抗を持つ、半絶縁性多結晶シリ
コン基板である。この半絶縁性多結晶シリコン基板11
に、4個のP型ピエゾ砥抗歪ゲージ12をボロンのイオ
ン注入または拡散によって形成する。次いで、半絶縁性
多結晶シリコン基板11の上面には5iozによる保護
膜13と、同じ(Si02によるダイヤフラムエツチン
グ用のマスク14がそれぞれCVD法により形成される
。In FIG. 1, 11 has an impurity concentration of, for example, IQ16 cm-', a crystal grain size of about 1000, and I
It is a semi-insulating polycrystalline silicon substrate with a specific resistance of 10'Ω (up to). This semi-insulating polycrystalline silicon substrate 11
Next, four P-type piezo anti-strain gauges 12 are formed by boron ion implantation or diffusion. Next, on the upper surface of the semi-insulating polycrystalline silicon substrate 11, a protective film 13 made of 5 ioZ and a mask 14 for diaphragm etching made of the same (SiO2) are formed by CVD.
その後フォトリソグラフィによりピエゾ抵抗歪ゲージ1
2上の保護膜13の所定部分がフォトエツチングされコ
ンタクトホールを形成する。さらに、アルミニウムより
なる配線部15を真空蒸着することにより、4個の歪ゲ
ージはプリフジを構成する様、電気的に接続される。After that, the piezoresistive strain gauge 1 was created using photolithography.
A predetermined portion of the protective film 13 on the photo-etching layer 2 is photo-etched to form a contact hole. Further, by vacuum-depositing a wiring portion 15 made of aluminum, the four strain gauges are electrically connected to form a pre-fuji.
次に、ダイヤプラムエツチング用のマスク14が所定の
形状(本例では円形)にフォトエツチングされた後、半
絶縁性多結晶シリコン基板11は水酸化カリウム(KO
H)水溶液等のアルカリによりエツチングされ、円形の
ダイヤフラム16が形成され、圧力センサを構成する。Next, after the mask 14 for diaphragm etching is photo-etched into a predetermined shape (circular in this example), the semi-insulating polycrystalline silicon substrate 11 is etched with potassium hydroxide (KO).
H) It is etched with an alkali such as an aqueous solution to form a circular diaphragm 16, which constitutes a pressure sensor.
そこで上記の構成によると、ピエゾ抵抗歪ゲージ12の
基板からの電気的な分離を、従来の単結晶シリコンを用
いた拡散型圧力センサの様にPN接合を用いるのではな
く、半絶縁性多結晶シリコン基板11とピエゾ抵抗歪ゲ
ージ12との大きな比抵抗の差により行っているため、
150℃以上の高温においても各歪ゲージ毎の絶縁が保
たれ、安定な動作が可能となる。Therefore, according to the above configuration, the piezoresistive strain gauge 12 is electrically isolated from the substrate by using semi-insulating polycrystalline silicon instead of using a PN junction as in conventional single-crystal silicon diffusion type pressure sensors. This is done due to the large difference in specific resistance between the silicon substrate 11 and the piezoresistive strain gauge 12,
Even at high temperatures of 150°C or higher, the insulation of each strain gauge is maintained, allowing stable operation.
又、本実施例で用いる基板は、半絶縁性多結晶シリコン
11であるため、化学的に等方的な物質であり、単結晶
シリコンに対して異方性エッチングを行う水酸化カリウ
ム水溶液等のアルカリを利用して、等方性エツチングを
行うことが可能となる。そこで、略完全な円形のダイヤ
フラムを形成することができ、応力の比対称性による怒
度の低下は起こらなくなる。又、単結晶シリコンは機械
的性質、とくに破壊強度の異方性が大きく、強度の小さ
い方位(方向)が存在するが、半絶縁性多結晶シリコン
はランダムな方位をもった非常に小さい単結晶の粒子の
集合体であるので、その機械的性質は完全に等方向であ
ると見なす事ができ、単結晶シリコンの様に強度の低い
方向が存在せず、ダイヤフラム形状の設計の自由度が増
すという利点がある。Furthermore, since the substrate used in this example is semi-insulating polycrystalline silicon 11, it is a chemically isotropic substance, and a potassium hydroxide aqueous solution or the like is used to perform anisotropic etching on single crystal silicon. It becomes possible to perform isotropic etching using alkali. Therefore, a substantially completely circular diaphragm can be formed, and the degree of anger does not decrease due to the relative symmetry of stress. In addition, single crystal silicon has large anisotropy in mechanical properties, especially its fracture strength, and there are orientations (directions) with low strength, but semi-insulating polycrystalline silicon has very small single crystals with random orientations. Since it is an aggregate of particles, its mechanical properties can be considered to be completely isodirectional, and unlike single crystal silicon, there is no direction of low strength, increasing the degree of freedom in designing the diaphragm shape. There is an advantage.
次に第2図は、単結晶又は多結晶又は非晶質シリコンの
薄膜層からなるピエゾ抵抗歪ゲージ22を、半絶縁性多
結晶シリコン基板11の主表面上にCVD法や真空蒸着
法によって形成した、本発明の他の実施例の半導体歪検
出器の断面図を示している。このような構造の場合も第
1図に示す実施例と同様の効果を得ることができる。Next, in FIG. 2, a piezoresistive strain gauge 22 made of a thin film layer of single crystal, polycrystalline, or amorphous silicon is formed on the main surface of the semi-insulating polycrystalline silicon substrate 11 by CVD or vacuum evaporation. FIG. 6 is a cross-sectional view of a semiconductor strain detector according to another embodiment of the present invention. Even in the case of such a structure, the same effects as the embodiment shown in FIG. 1 can be obtained.
尚、本発明のいう半絶縁性多結晶シリコン基板は、化学
式がSiχOy(又は、SixNy)で表され、
S i H4+NzO−→ SiχOy。The semi-insulating polycrystalline silicon substrate referred to in the present invention has a chemical formula of SiχOy (or SixNy), as follows: SiH4+NzO-→SiχOy.
S iHa + CO□ −→ Stχoy等の反応を
用い、CVD法によって形成される、いわゆるS I
P OS (Semi4nsulating Po1y
crys−talline 5ilicon)か、ある
いは、酸素をほとんど含存せず、シリコンのみから成る
もので、引上げ法、鋳造法、超急冷法(ロール法)ある
いは高速CVD法等によって形成され、その結晶粒径を
小さくする事により多くの結晶粒界を存在させ、その比
抵抗を大きくしたようなものが適用可能であるが、前者
のS I PO5は所定の厚みを有する基板として形成
するのは技術的に困難であり、又、5rposは酸素の
含有量を多くすることによってその比抵抗を増加させて
いるが、酸素の含有量を増加させると、ピエゾ抵抗係数
が小さくなり歪感度が低下するという問題があるので、
望ましくは後者の基板がよい。The so-called S I Ha + CO□ −→ Stχoy is formed by the CVD method using a reaction such as
P OS (Semi4nsulating Poly
It is made of silicon only and contains almost no oxygen, and is formed by a pulling method, a casting method, an ultra-quenching method (roll method), a high-speed CVD method, etc., and its crystal grain size It is possible to apply a method in which more crystal grain boundaries exist and the specific resistance is increased by reducing the S I PO5, but it is technically difficult to form the former S I PO5 as a substrate with a predetermined thickness. In addition, 5rpos increases its specific resistance by increasing the oxygen content, but when the oxygen content is increased, the piezoresistance coefficient becomes smaller and the strain sensitivity decreases. Because there is
The latter substrate is preferable.
さらに、半絶縁性多結晶シリコン基板は、基板と歪ゲー
ジとを電気的に分離するという目的から、その比抵抗は
通常ピエゾ抵抗歪ゲージの比抵抗が10−1ないし10
−3Ω・(2)であることから考えて約104Ω・口辺
上であることが望ましい。Furthermore, for the purpose of electrically separating the substrate and the strain gauge, the semi-insulating polycrystalline silicon substrate has a specific resistance that is normally 10-1 to 10
-3Ω·(2), it is desirable that the resistance be approximately 104Ω·around the mouth.
又、本発明は上記二つの実施例に限定される事なく、そ
の主旨から逸脱しない限り例えば以下に示す如く種々変
形可能である。Furthermore, the present invention is not limited to the above two embodiments, and can be modified in various ways, for example as shown below, without departing from the spirit thereof.
(1)保護膜13及びマスク14はSi3N、等から成
ってもよく、又、配線部15の占有面積がそれ程太き(
なく、もれ電流の心配がない時はこの保護膜13はなく
てもよい。そうする事により、熱歪の発生を低減できる
。(1) The protective film 13 and the mask 14 may be made of Si3N, etc., and the area occupied by the wiring portion 15 is large (
If there is no need to worry about leakage current, this protective film 13 may be omitted. By doing so, the occurrence of thermal strain can be reduced.
(2)ダイヤフラム16の形状としては円形に限定され
る事なく、等方性エツチングが可能な事を利用して、任
意の形状にしてもよい。(2) The shape of the diaphragm 16 is not limited to a circular shape, and may be formed into any shape by taking advantage of the fact that isotropic etching is possible.
(3)上記実施例では、P型のピエゾ抵抗歪ゲージを用
いているが、言うまでもな(、その導電型はN型であっ
てもよい。(3) In the above embodiment, a P-type piezoresistive strain gauge is used, but it goes without saying that the conductivity type may be N-type.
(4)上記実施例では、ダイヤフラム16のエツチング
液としてアルカリ等の異方性エツチング液を使用してい
るが、マスク14の材質として5iiN4゜Au等を用
いて等方性エツチング液を使用してもよい。(4) In the above embodiment, an anisotropic etching solution such as alkali is used as the etching solution for the diaphragm 16, but it is possible to use an isotropic etching solution by using 5iiN4°Au or the like as the material of the mask 14. Good too.
以上述べた如く、本発明によれば基板として半絶縁性多
結晶シリコンを用いているので、円形のダイヤフラムが
形成可能で、高温においても安定に作動する半導体歪検
出器を提供できるという効果がある。As described above, according to the present invention, since semi-insulating polycrystalline silicon is used as the substrate, a circular diaphragm can be formed, and there is an effect that it is possible to provide a semiconductor strain detector that operates stably even at high temperatures. .
第1図(alは本発明の一実施例の上面図、第1図(b
)は第1図(alにおけるA−A線断面図、第2図は本
発明の他の実施例の断面図、第3図は単結晶シリコンを
基板として用いたダイヤフラムを示す図である。
11・・・半絶縁性多結晶シリコン基板、12.22・
・・P型ピエゾ抵抗歪ゲージ、16・・・ダイヤフラム
。Figure 1 (al is a top view of one embodiment of the present invention, Figure 1 (b)
) is a sectional view taken along the line A-A in FIG. ...Semi-insulating polycrystalline silicon substrate, 12.22.
...P-type piezoresistive strain gauge, 16...diaphragm.
Claims (2)
リコン基板と、 該半絶縁性多結晶シリコン基板の上に形成される半導体
歪ゲージとを備える事を特徴とする半導体歪検出器。(1) A semiconductor strain detector comprising: a semi-insulating polycrystalline silicon substrate having a thin diaphragm; and a semiconductor strain gauge formed on the semi-insulating polycrystalline silicon substrate.
径を小さくする事により、その比抵抗を大きくしている
ものである特許請求の範囲第1項記載の半導体歪検出器
。(2) The semiconductor strain detector according to claim 1, wherein the semi-insulating polycrystalline silicon substrate has a large specific resistance by reducing its crystal grain size.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18583886A JPS6342179A (en) | 1986-08-07 | 1986-08-07 | Semiconductor strain detector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18583886A JPS6342179A (en) | 1986-08-07 | 1986-08-07 | Semiconductor strain detector |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6342179A true JPS6342179A (en) | 1988-02-23 |
Family
ID=16177763
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18583886A Pending JPS6342179A (en) | 1986-08-07 | 1986-08-07 | Semiconductor strain detector |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6342179A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1214744A4 (en) * | 1999-07-22 | 2003-03-19 | Measurement Spec Inc | SILICON DYNAMOMETRIC GAUGE HAVING HIGHLY CONDUCTIVE SILICON FINE LAYER |
| DE102009041865A1 (en) | 2009-02-27 | 2010-09-09 | Mitsubishi Electric Corp. | Semiconductor pressure sensor and manufacturing method therefor |
-
1986
- 1986-08-07 JP JP18583886A patent/JPS6342179A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1214744A4 (en) * | 1999-07-22 | 2003-03-19 | Measurement Spec Inc | SILICON DYNAMOMETRIC GAUGE HAVING HIGHLY CONDUCTIVE SILICON FINE LAYER |
| DE102009041865A1 (en) | 2009-02-27 | 2010-09-09 | Mitsubishi Electric Corp. | Semiconductor pressure sensor and manufacturing method therefor |
| US8327712B2 (en) | 2009-02-27 | 2012-12-11 | Mitsubishi Electric Corporation | Semiconductor pressure sensor having symmetrical structure, and manufacturing method thereof |
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