JPH10154476A - Display device - Google Patents

Abstract

(57) [Problem] To provide an electron beam excitation type flat display element having high definition and display quality comparable to that of a CRT. A non-forming MIM or MIS electron source is formed on a substrate as an electron beam source, a face plate coated with a phosphor is separated from the substrate by 1 mm or more, and an acceleration voltage of 2 KV or more is applied to the face plate. . [Effect] By increasing the acceleration voltage, it is possible to use a phosphor excellent in color purity and life, such as a phosphor for a CRT, thereby realizing a high display image quality. MIM in non-forming state
Alternatively, since a MIS electron source is used, a high-definition image can be realized even when the face plate and the substrate are separated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device having a three-layer structure of metal-insulator-metal or metal-insulator-semiconductor and using a thin-film electron source that emits electrons in a vacuum.

[0002]

2. Description of the Related Art As a display device using a cold cathode array in which cold cathodes are formed at respective intersections of electrode groups orthogonal to each other, for example, a field emission display (FED) described in JP-A-4-289644 is known. is there. F
In the ED, a large number of field emission cathodes are arranged in each pixel on the substrate, and the field emission electrons therefrom are accelerated in a vacuum.
It irradiates the phosphor on the face plate to emit light. The cathode on which the field emission cathodes are arranged is called a field emitter array (FEA).

The FED does not require an electron beam deflecting lens system such as a cathode ray tube (CRT), so that a flat panel display can be realized. Further, since the FED is a self-luminous element, it can realize an excellent display quality comparable to a CRT. Has features.

[0004]

Phosphors that emit light when excited by an electron beam include phosphors that emit light with a low-speed electron beam having an acceleration voltage of 1 KV or less, in addition to phosphors used in CRTs. However, the slow electron beam excited phosphor is ZnO: Zn which emits blue-green light.
Other than the phosphor, the luminous efficiency is poor and the operating life is not sufficient.
Further, the color purity is inferior to that of a phosphor for CRT. Therefore, in order to obtain a display quality comparable to that of a CRT, CR
It is desirable to use a phosphor for T.

On the other hand, in order to emit light from a CRT phosphor, the acceleration voltage of the excitation electron beam must be at least 2 KV, preferably 4 KV or more. In order to apply a voltage of 2 to 4 KV or more to the acceleration electrode on the face plate, the distance between the face plate and the substrate must be 1 mm or more from the viewpoint of dielectric strength.

However, when the distance d between the face plate 110 and the substrate 14 is increased, the spread Δx of the electron beam emitted from a certain point of the cathode of the substrate 14 on the face plate is increased (see FIG. 2A). Initial velocity v _{0 of} electrons emitted from the cathode
Is sufficiently smaller than the accelerating voltage Va applied to the accelerating electrode 210, the flight time Δt of the electrons from leaving the cathode to reaching the face plate is Δt

[0007]

(Equation 1)

Is proportional to Since the electric field between the substrate 14 and the face plate 110 is almost a parallel electric field, the spread of the electron beam is determined by the product of the lateral component v _0t of the initial velocity v ₀ of the electrons and Δt.
Therefore, Δx is

[0009]

(Equation 2)

Is proportional to

In a typical FEA, d = 0.2 mm and Va = 0.
Since Δx = about 0.1 mm at 4 KV, d = 1 mm, Va =
In the case of 2 KV, Δx = 0.22 mm. That is, the electron beam emitted from one point spreads to a spot having a diameter of about 0.44 mm on the face plate. Actually, as shown in FIG. 2B, since the electron emission portion 220 of each pixel has a finite diameter a, the spot diameter on the phosphor screen is (a
+ 2Δx). On the other hand, for example, when a color display of SXGA standard (1024 × 1280 pixels) with a diagonal length of 20 inches is realized, the interval between adjacent dots is about 100 μm. In addition, diagonal 1 which is widespread as home TV
In the case of a 4-inch television (VGA standard, 480 × 640 pixels), the interval between adjacent dots is 148 μm. Therefore, no matter which standard display is made, if FEA is used as the matrix electron source, the electron beam is irradiated on the phosphor corresponding to the adjacent dot, and a correct image cannot be displayed. I will.

In order to solve this problem, a method of converging the electron beam emitted from the FEA has been proposed. In this method, a new converging electrode is formed on the substrate, or
The focusing electrode must be newly positioned and inserted between the face plates, and there is a problem that the structure of the display device is complicated.

[0013]

According to the present invention, a lower electrode,
It has a structure in which an insulating layer and an upper electrode are laminated in this order, and when a voltage having a polarity that causes the upper electrode to have a positive voltage is applied between the lower electrode and the upper electrode, electrons are applied from the surface of the upper electrode to a vacuum. A non-forming electron source is used as a thin film type electron source that emits electrons, and the distance between the substrate and the face plate is set to 1 mm or more.
The above problem was solved by setting the voltage applied to the acceleration electrode to 2 KV or more.

The thin-film electron source includes a metal-insulator-metal (MIM) electron source using a metal as a lower electrode and a metal-insulator-semiconductor (MIS) electron source using a semiconductor as a lower electrode. Is included.

A display device using a MIM electron source arranged in a matrix as a cathode is described, for example, in Journal of Vacuum Sc
ience and Technologies, B, Vol. 11, No. 2, 514
Pp. 517-1993 (1993). In this report, the distance between the substrate and the face plate d = 1 mm, the acceleration voltage Va = 1 KV
At that time, it was reported that Δx was about 0.15 mm. Therefore, when Va = 2 KV, Δx = approximately 0.1 mm, that is, even if the diameter of the electron-emitting portion is 0.05 mm, the spot spreads as a whole to 0.25 mm, and a 20-inch SXGA class high-definition display can be realized. Absent. The cause of the spread of the electron beam emitted from the MIM electron source reported in this document is that the MIM electron source is operated in the forming state.

We have studied a method of operating the MIM electron source in a non-forming state, and have been studying characteristics of an electron beam emitted by the non-forming MIM electron source. As a result, it has been found that the MIM electron source operated in the non-forming state has a very small spread of the emitted electron beam. In a display device using an MIM electron source matrix manufactured by a method described later, for example, when d = 2 mm and Va = 0.5 KV, Δx =
It was 0.05 mm. Therefore, Δx = 18 μm when d = 1 mm and Va = 2 KV, Δx = 14 μm when d = 2 mm and Va = 4 KV. Therefore, even if the diameter of the electron-emitting portion is 40 μm, the spot diameter on the phosphor screen is
Thus, a color display with a resolution of 100 dpi (dot per inch) can be realized.

[0017]

Embodiments of the present invention will be described below with reference to the drawings.

One embodiment of a display device using the present invention will be described with reference to FIGS. 1, 3, 4, and 5. FIG. FIG. 3 is a plan view of the display panel viewed from the face plate side, and FIG. 4 is a plan view of the substrate 14 viewed from the face plate side. FIGS. 3 and 4 are cross-sectional views between A and B in FIG. 1A, and cross-sectional views of the left half between CDs are in FIG. 1B.
It is.

First, a method of forming a thin film electron source formed on a substrate will be described. FIG. 5 shows a process for producing a thin-film electron source on the substrate 14. The right column is a plan view,
A cross-sectional view between AB is shown in the left column. Although only one element is illustrated in FIG. 5, actually, the elements are arranged in a matrix as shown in FIGS.

Al is formed on an insulating substrate 14 such as glass as a thin film for forming the lower electrode 13 to a thickness of, for example, 300 nm. For forming the Al film, for example, a sputtering method, a resistance heating evaporation method, an MBE method (molecular beam epitaxy method), or the like is used. Next, the Al film is processed into a stripe shape by photolithography resist formation and subsequent etching to form a lower electrode 13. The resist used here may be any suitable for etching, and the etching may be wet etching,
Any of dry etching is possible. The surface of the lower electrode 13 is anodized to form an insulating layer 12 having a thickness of about 5 to 10 nm. In this embodiment, the formation voltage is set to 4 V, and the thickness of the insulating layer is set to 5.5 nm. This is the state shown in FIG.

Next, a resist 501 is applied, exposed to ultraviolet rays and patterned to form a pattern shown in FIG. As the resist 501, for example, a quinonediazide-based positive resist is used. With the resist 501 still attached, anodic oxidation is performed again to form the protective layer 15. In the second anodic oxidation, the formation voltage is about 50 V, and the thickness of the protective layer 15 is about 70 nm. This is the state shown in FIG.

After the resist 501 is stripped with an organic solvent such as acetone, a resist 502 is applied and formed in a pattern shown in FIG. Next, a metal film to be the upper electrode bus line 32 is formed on the entire surface of the substrate 14. The metal film serving as the upper electrode bus line 32 has a laminated film configuration in which a metal such as Mo having excellent adhesion to the substrate 14 is used as a lower layer, and a metal such as Au which is rich in electrical conductivity and hardly oxidized is used as an upper layer. It is desirable to form a continuous film by a sputtering method or a vapor deposition method. Materials for the lower layer include Cr, T
Other metals, such as a, W, and Nb, having good adhesion to the insulating substrate may be used. In addition to the Au, Pt, Ir, R
h, Ru etc. can be used. By using these metals, electrical contact with the upper electrode 16 to be formed later can be ensured. The thickness of the metal film forming the upper electrode bus line 32 is appropriately selected according to the required specification of the wiring resistance. In this embodiment, the thickness of the Mo film is 30 nm and the thickness of the Au film is 100 nm. Subsequently, the resist 502 is washed with an organic solvent such as acetone.
Is lifted off to obtain the shape shown in FIG.

Subsequently, a resist 503 is applied, and FIG.
Patterning into the pattern of (f). In this state, anodic oxidation is performed by immersion in a chemical conversion solution. The formation voltage is set to the same voltage as when the insulating layer 12 was formed. In the case of this embodiment, it is 4V. The insulating layer 12 has been slightly damaged by a chemical such as a developing solution in the resist patterning process performed several times so far. Therefore, the damage can be repaired by anodizing the insulating layer 12 again before forming the upper electrode. Thereafter, an upper electrode interface layer film 16, an upper electrode intermediate layer film 17, and an upper electrode surface layer film 18 are formed in this order. It is desirable to use a sputtering method or the like to form these layers, and to continuously form each layer without breaking vacuum. In this embodiment, the upper electrode interface layer film 16 is made of Ir having a thickness of 1 nm, and the upper electrode intermediate layer film 17 is formed.
Pt having a thickness of 2 nm and a film thickness of 3
nm of Au was used. Further, as in the present embodiment, there is a dedicated bus line 32 for supplying an applied voltage to the upper electrode, and when the area of the upper electrode is small, except for the upper electrode surface layer film 18, for example, Ir having a film thickness of 1 nm is used. Upper electrode interface layer film 1 composed
6 and 2 of the upper electrode intermediate layer film 17 composed of Pt having a thickness of 2 nm.
The upper electrode may be composed of layers.

Then, when lifted off with an organic solvent such as acetone, a thin film electron source having a structure shown in FIG. 5 (g) is obtained. Through the above process, a thin-film electron source is completed on the substrate 14. In this thin-film electron source, electrons are emitted from a region defined by the resist 501. Since the protective layer 15 which is a thick insulating film is formed on the periphery of the electron emitting portion, the upper electrode
The electric field applied between the lower electrodes does not concentrate on the end of the lower electrode, and stable electron emission characteristics can be obtained for a long time.

A translucent glass or the like is used for the face plate 110. First, a black matrix 120 is formed for the purpose of increasing the contrast of the display device (FIG. 1B). The black matrix 120 is disposed between the phosphors 114 in FIG. 3, but is not shown in FIG.

The black matrix 120 is prepared by applying a solution in which graphite powder is mixed with PVA (polyvinyl alcohol) and ammonium bichromate to the face plate 110 and irradiating the black matrix 120 with a portion to be formed with ultraviolet rays to expose the black matrix 120. , To remove unexposed portions.

Next, a red phosphor 114A is formed. After applying an aqueous solution in which PVA (polyvinyl alcohol) and ammonium dichromate are mixed to the phosphor particles on the face plate 110, the portions where the phosphors are to be formed are exposed to ultraviolet rays and exposed, and the unexposed portions are flushed with running water. To remove. Thus, the red phosphor 114A is patterned. The pattern is a stripe pattern as shown in FIG. This stripe pattern is just an example.
Depending on the design of the display, for example, an “RGBG” pattern in which one pixel is composed of four adjacent dots may of course be used. The thickness of the phosphor should be about 1.4 to 2 layers. Similarly, the green phosphor 114B and the blue phosphor 1
Form 14C. As the phosphor, for example, Y ₂ O ₂
S: Eu (P22-R), Zn ₂ SiO ₄ : Mn for green, ZnS: Ag (P22
-B) may be used.

Next, after filming with a film of nitrocellulose or the like, Al is applied to the entire face plate 110 to a thickness of 50 to 300 nm.
A metal back 122 is formed by vapor deposition of about m. This metal back 122 functions as an acceleration electrode. Then, face plate 11
0 is heated to about 400 ° C. to thermally decompose organic substances such as a filming film and PVA. In this way, the face plate 11
0 is completed.

The face plate 110 and the substrate 14 thus manufactured are
And seal. The distance between the face plate 110 and the substrate 14 is 1 to 3
mm. The positional relationship between the face plate 110 and the substrate 14 is as shown in FIG. FIG. 4 shows the pattern of the thin-film electron source formed on the substrate 14 corresponding to FIG. In addition, as can be seen from FIG.
3 is covered with the protective layer 15, the horizontal wiring should be written as "protective layer 15" rather than "lower electrode 13" in FIGS. However, in order to clearly show the functional relationship in which the lower electrode 13 and the upper electrode bus line 32 constitute a matrix, this is intentionally described in FIGS. 3 and 4. Similarly, the upper electrode bus line 32 is correctly covered with the upper electrode surface layer film 18 in the plan views of FIGS. 3 and 4, but is described as the upper electrode bus line 32 for the same purpose. . When a display having a diagonal length of about 3 inches or more is manufactured, a spacer (support) is sandwiched between the face plate 110 and the substrate 14 to evacuate the inside of the panel. It is necessary to prevent damage to the panel, which will be described later.

The sealed panel is evacuated to a vacuum of about 1 × 10 ⁻⁷ Torr and sealed. Thus, a display panel using the thin-film electron source is completed.

As described above, in this embodiment, since the distance between the face plate 110 and the substrate 14 is as long as about 1 to 3 mm, the acceleration voltage applied to the metal back 122 can be as high as 3 to 6 KV. Therefore, as described above, a phosphor for a cathode ray tube (CRT) can be used as the phosphor 114.

FIG. 6 is a connection diagram of the display panel 100 manufactured in this manner to a drive circuit. The lower electrode 13 is connected to a lower electrode drive circuit 41, and the upper electrode bus line 32 is connected to an upper electrode drive circuit. The acceleration electrode 112 is connected to the acceleration electrode drive circuit 43. The dot at the intersection of the n-th lower electrode 13Kn and the m-th upper electrode bus line 32Cm is represented by (n, m).

FIG. 7 shows the waveform of the voltage generated by each drive circuit. A voltage of about 3 to 6 KV is constantly applied to the metal back 122.

At time t ₀ , since no voltage is applied to any of the electrodes, no electrons are emitted, and thus the phosphor 114 does not emit light.

At time t ₁ , the lower electrode 13K1 has −V ₁
The becomes voltage, the upper electrode bus line 32C1, C2 for applying a voltage comprising + V _2. Since a voltage of (V ₁ + V ₂ ) is applied between the lower electrode 13 and the upper electrode of the dots (1, 1) and (1, 2), (V ₁ + V ₂ ) is equal to or higher than the electron emission start voltage. , Electrons are emitted into the vacuum 10 from the two-dot thin film electron source. The emitted electrons are accelerating electrodes
After being accelerated by the voltage applied to 112, it hits phosphor 114 and causes phosphor 114 to emit light.

[0036] In time t _2, the application of a -V ₁ becomes voltage to the lower electrode 13K2, by applying a V ₂ becomes voltage to the upper electrode bus line 32C1, similarly dots (2,1) is turned on. Thus, when the voltage waveform of FIG. 7 is applied, only the hatched dots of FIG. 6 are turned on.

Thus, a desired image or information can be displayed by changing the signal applied to the upper electrode bus line 32. Also, the upper electrode bus line 32
The magnitude of the applied voltages V ₁ to the appropriately changing in accordance with the image signal, it is possible to display an image with a gradation.

Next, another embodiment of the present invention will be described with reference to FIGS. FIG. 9 is a plan view of the display panel viewed from the face plate side, and FIG. 10 is a plan view of the substrate 14 viewed from the face plate side. 9A and 9B and FIG. 8B are cross-sectional views of the left half between CD and FIG. 8B. FIG. 11 is a sectional view taken along the line EF in FIG.

The present embodiment has the same basic structure as the previous embodiment, except that a spacer 60 is interposed between the face plate 110 and the substrate 14, and that a projection 62 is formed on the substrate 14. ing.

The spacer 60 is inserted to prevent the panel from being damaged by an external force of atmospheric pressure when the inside of the panel is evacuated. Thus, a large-screen display device with a diagonal of 5 to 20 inches can be created. The shape of the spacer 60 is, for example, as shown in FIG. Here, R (red), G (green),
The columns of the spacer are provided for each dot that emits light in B (blue), that is, for each of the three rows of upper electrodes, but the number (density) of columns may be reduced as long as the mechanical strength can withstand. In manufacturing the spacer 60, a hole having a desired shape is formed in an insulating plate such as glass or ceramic having a thickness of about 1 to 3 mm by, for example, a sand blast method.

As shown in the plan view of FIG. 9, the spacer 60 is formed on a portion of the substrate where there is no electron emission portion. However, when the face plate 110, the substrate 14, and the spacer 60 are sealed while being aligned, if the spacer position is slightly shifted, the spacer 60 comes into contact with the surface of the electron emission portion. Since the upper electrode and the insulating layer of the thin film type electron source are formed of a thin film having a thickness of about several nm, they are easily broken by contact with the spacer 60. Further, the upper electrode bus line 32 and the upper electrode 16,
In some cases, contact with 17, 18 is cut off, causing dot dropout.

In this embodiment, this problem is eliminated by providing the projection 62 on the substrate. That is, the protrusion 62 is formed at a position shown in FIGS. 8 and 10 higher than the surface of the electron-emitting portion. Since the projections 62 are formed on the substrate by using a photolithography process, there is no possibility that the surface of the electron-emitting portion is damaged during the formation. The height h of the protrusion 62 measured from the position of the electron source surface is set to be larger than the height of the microscopic unevenness on the surface of the spacer 60. h is usually about 1 μm. In this way, as can be seen from FIG. 11, even if there are microscopic irregularities Δz in the spacer 60, Δz <h
Thus, contact with the electron source surface is eliminated. As a result, element destruction during assembly can be prevented.

A method for manufacturing a substrate will be described. Si on the substrate 14
An insulator such as O ₂ or Al ₂ O ₃ is formed by a sputtering method or the like, and patterned by photolithography and etching into a shape shown in FIGS. The height of the projection is about 1 μm. Thereafter, the lower electrode 13, the insulating layer 12, the protective layer 15, the upper electrode bus line 32, and the upper electrodes 16, 17, 18 are formed in the same procedure as in the previous embodiment. Thus, the substrate 14 is completed. As shown in FIGS. 9 and 10, the face plate 110, the spacer 60, and the substrate 14 formed in the same manner as in the previous embodiment are sealed while being aligned, and furthermore, are evacuated and sealed. The display device is completed as described above.

In the above embodiment, an example in which a MIM electron source using a metal for the lower electrode has been described. However, an MIS (Metal-Insulator-Semiconducto) using a semiconductor for the lower electrode has been described.
It goes without saying that the effect of the present invention can be obtained even when the r) type electron source is used in a non-forming state.

[0045]

As described above, according to the present invention, it is possible to realize a flat type image display device having high definition and a display quality comparable to that of a CRT without using a focusing electrode or the like.

[Brief description of the drawings]

FIG. 1 is a sectional view of a first embodiment of a display element according to the present invention.

FIG. 2 is a diagram schematically showing the spread of an electron beam.

FIG. 3 is a plan view showing a phosphor screen position in the first embodiment of the display element according to the present invention.

FIG. 4 is a plan view of a substrate in the first embodiment of the display element according to the present invention.

FIG. 5 is a view showing a substrate forming process in the first embodiment of the display element according to the present invention.

FIG. 6 is a diagram showing connection of a display element to a drive circuit according to the present invention.

FIG. 7 is a diagram showing a drive voltage waveform of a display element according to the present invention.

FIG. 8 is a sectional view of a second embodiment of the display element according to the present invention.

FIG. 9 is a plan view showing a phosphor screen position in a second embodiment of the display element according to the present invention.

FIG. 10 is a plan view of a substrate in a second embodiment of the display element according to the present invention.

FIG. 11 is a sectional view taken along line EF of FIG. 9;

[Explanation of symbols]

10 vacuum, 11 upper electrode, 12 insulating layer, 13 lower electrode, 14 substrate, 15
Protective layer, 16: electrode terminal, 16: upper electrode interface layer film, 17: upper electrode intermediate layer film, 18: upper electrode surface layer film, 20: drive voltage, 32 ... -Upper electrode bus line, 60 ... spacer, 62 ... projection,
110 ... face plate, 114 ... phosphor, 120 ...
Black matrix, 122 ... metal back, 41
... lower electrode drive circuit, 42 ... upper electrode drive circuit, 43 ... acceleration electrode drive circuit, 210 ... acceleration electrode, 220 ... electron emission portion of each pixel, 501 ... resist, 502: resist, 503: resist.

Claims (3)

[Claims] 1. A structure in which a lower electrode, an insulating layer, and an upper electrode are laminated in this order, and when a voltage having a polarity such that the upper electrode has a positive voltage is applied between the lower electrode and the upper electrode. In a display device having a substrate in which thin-film electron sources that emit electrons into a vacuum from the surface of the upper electrode are arranged in a matrix, and a face plate provided with a phosphor and an accelerating electrode, the thin-film electron source is non-conductive. A display device in a forming state, wherein a distance between the substrate and the face plate is 1 mm or more, and a voltage applied to the acceleration electrode is 2 KV or more. 2. The display device further includes a spacer interposed between the substrate and the face plate, and a protrusion higher than a surface of the thin-film electron source provided on the substrate.
A part of the spacer is disposed on the protrusion,
2. The display device according to claim 1, wherein a height of the protrusion with respect to a surface of the thin-film electron source is larger than a height of microscopic unevenness on a surface of the spacer on the substrate side. 3. 3. The display device according to claim 1, wherein a minimum interval between adjacent dots of the dot formed by the thin-film electron source is 150 μm or less.