JPH0239102B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an integrated circuit device, and more particularly to a one-chip integrated circuit device containing an analog signal processing circuit.

One of the tape noise reduction systems used in tape recorders is the so-called Dolby Noise Reduction method, which processes small signals to increase their magnitude so that they are louder than the noise level during tape recording. . Such signal processing is called dynamic range compression, and during playback, the peak level is restored to its original level, and the compressed signal is processed to return it to its original minute level. This signal processing is called dynamic range extension.

In this Dolby system, B type and C
There are two types of methods: the major difference between the two methods is the frequency characteristics of the signal compression/expansion processing and the degree of compression/expansion.For tape recorders that can select from both of these methods, each type In addition, a circuit with characteristics required for the recording and reproducing systems is required, and the circuit becomes complicated.

Therefore, it is required to simplify the circuit as much as possible and downsize it as a single-chip IC (integrated circuit) device. However, in the circuit system having each operation mode as described above, mode switching control signals etc.
External connection pin for power supply in conventional analog IC,
Required in addition to the grounding pin and analog signal input/output pin.

When deciding the placement of IC pins, it is necessary to take into account that even if adjacent pins are electrically shorted for some reason, the device will not be damaged or destroyed.
It is especially important to consider pins to which DC voltage is applied. Therefore, when there are many types of signals to be applied as described above, the degree of freedom in pin arrangement is extremely small compared to conventional ICs.

SUMMARY OF THE INVENTION An object of the present invention is to provide an IC device that can eliminate the above-mentioned drawbacks and improve the degree of freedom in the arrangement of external connection pins in an analog signal processing circuit that exchanges various signals.

In the analog IC device of the present invention, a series of pins are used as DC voltage application pins, and another series of pins are used as analog signal pins, and the DC voltage application pins are arranged adjacent to each other, and the analog signal is placed between the DC voltage application pins. It is characterized in that the areas where the DC voltage application pin and the analog signal pin exist are separated without arranging a signal pin.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit block diagram for explaining an embodiment of the present invention, and shows noise reduction of a one-chip IC (integrated circuit) system used in a tape recorder in which Dolby B and C type noise reduction systems can be selected. The circuit of the reduction system is shown.

Regarding the recording system, the recording signal (REC-
IN) is applied to the R (recording) input of switch amplifier 1, which has an analog switch function, through an external connection IC pin (hereinafter simply referred to as pin) _P1 , and this switch output is also applied to the next stage. This becomes the R input of switch amplifier 2. This switch output is input to an impedance voltage divider circuit 4 which is provided externally between pins _P2 and _P3 and has frequency characteristics. This voltage divider circuit 4 has a resistor R ₁ equivalently inserted in series with the signal line, a coil L ₁ inserted in parallel, a capacitor C ₁ and a resistor R ₂ connected in series, and is of C type. This is a so-called spectral skewing circuit that is required only in the system.

This circuit 4 supports 8K when recording C type.
This is a so-called emphasis circuit that suppresses the noise reduction operation in the high frequency range above Hz and restores it to the original state during playback.It eliminates the deterioration of frequency characteristics caused by the tape, and also prevents mistracking such as midrange signal modulation when the high frequency signal is saturated. This is to prevent This makes the noise reduction effect worse for frequencies above 8KHz, but this takes advantage of the fact that the lower the level in this band, the lower the auditory sensitivity is, so it is not perceived as noise.

This divided voltage output becomes the C (C type) input of the switch amplifier 5. Since this spectral skewing circuit 4 is unnecessary in the B type or OFF mode, as well as in the noise reduction off mode, the switch output of the switch amplifier 2 is directly transmitted to the switch amplifier 5 at B&OFF (B type & OFF mode).
OFF) input, and in response to the OFF&B/C switching, the switch amplifier 5 selects the signal that has passed through the spectral skewing circuit 4 or the signal output directly from the switch amplifier 2.

The output of the switch amplifier 5 becomes the R input of the switch amplifier 6, and this switch output becomes the R input of the switch amplifier 8 through an inverter 7 consisting of resistors R ₃ and R ₄ and an operational amplifier OP ₁ . The output of the amplifier 8 is input to an impedance voltage divider circuit 9 which is provided externally between pins _P4 and _P5 and has frequency characteristics. This circuit 9 includes a resistor _R5 equivalently inserted in series with the signal line,
It consists of a capacitor C ₂ and resistors R ₆ and R ₇ inserted in parallel, and operates as a so-called anti-saturation circuit that is required only in the C type system.

This circuit 9 effectively works only for large amplitude signals to suppress high frequency saturation of the tape, since as the recording level increases, high frequencies decrease due to saturation of the magnetic tape. This divided voltage output becomes the C input of the switch amplifier 10. Since this anti-saturation circuit 9 is unnecessary not only in the B type but also when the noise reduction mode is off, the switch output of the switch amplifier 8 is directly introduced to the B input of the switch amplifier 10, and the B&
This switch amplifier 10 according to OFF/C switching
Accordingly, the signal passed through the anti-saturation circuit 9 or the signal directly output from the switch amplifier 8 is selected.

The selected output of this switch amplifier 10 becomes the R input of the switch amplifier 11, and is connected to the pin R ₆ via an inverter 12 consisting of an operational amplifier OP ₂ and resistors R ₈ and R ₉ .
It is derived as the recording output (REC-OUT).
The above is the main signal path during recording.

Next, regarding the side signal path during recording, the switch output of switch amplifier 6 becomes the R input of switch amplifier 13, and this output is connected to pin _P7.
and P ₈ is applied to the side chain fixed filter 14 provided between This filter 14 has a high-pass filter configuration, and extracts middle and high frequency signals that require a noise reduction operation and outputs them to the sub-signal path circuit 15 of the high-level stage. The sub-signal path circuit 15 of this high level stage has a variable register circuit and a peak detection circuit, and when the input signal is large but does not contain high frequencies, it increases the high frequency correction and If the signal also contains a lot of high frequencies, it operates to reduce the reduction effect. The output of the sub-signal path circuit 15 of this high level stage is connected to the inverter ₇ via a resistor R10.
and is added to the main signal path system signal in this inverter. Furthermore, the output of the amplifier 8 is inputted to the side chain fixed filter 16 and the side signal path system of the sub signal path circuit 17 of the low level stage, and the same signal processing as the side signal path by the circuits 14 and 15 described above is performed. It has a two-stage processing configuration, and by dividing the operation into 10 dB units at each stage, the operation level is changed so that the dynamic operation regions do not overlap. Incidentally, the side chain fixed filter 16 is provided between pins _P4 and _P9 , and the output of the sub signal path circuit 17 of the low level stage is inputted to the inverter ₁₂ via the resistor R11, and It is added to the system signal.

Next, talking about the playback system, the playback signal (PB-IN) is sent to the switch amplifier 1 via pin _P10 .
This is the P input. This switch output becomes the P input of the switch amplifier 11 and, via the inverter 12, becomes the positive-phase input of the P inputs of the switch amplifier 8. A switch amplifier 10 is provided between the output of the amplifier 8 and the reverse phase input of the P input, and is controlled to switch between B type and C type.
In the C type, the divided voltage output from the anti-saturation circuit 9 is inserted into the negative feedback system of the amplifier 8, and in the B type and off mode, this circuit 9 is inserted into the negative feedback system of the amplifier 8. It will not be inserted into the system. The output of this amplifier 8 passes through a side chain fixed filter 16 and a side signal path of a low-level stage sub-signal path circuit 17, and is added to the reproduced signal from the amplifiers 1 and 11 at an inverter 12. The output of the feedback amplifier 8, which uses the anti-saturation circuit 9 as a negative feedback system, becomes the P input of the switch amplifier 6, and via the inverter 7 becomes the P input of the switch amplifier 13.
This switch output is connected to the side chain fixed filter 14 and the high level stage sub signal path circuit 15.
The signal passes through the side signal path of , and is added to the signal of the main signal path at inverter 7 . This addition output is applied to the positive phase input of the P inputs of the switch amplifier 2. A switch amplifier 5 is provided between the output of the amplifier 2 and the negative phase input of the P input, and is controlled by switching between B type and C type, and when it is C type, the spectral shifting circuit 4 outputs a divided voltage. will be inserted into the negative feedback system of amplifier 2, and in the B type and off mode,
This circuit 4 will not be inserted into the negative feedback system of the amplifier 2. The output of this amplifier 2 becomes the playback output (PB/MON-OUT) and is derived from pin _P2 .

A power supply 18 is provided which inputs the circuit device power supply Vcc through pin P ₁₁ , and supplies power, reference voltage, etc. to each amplifier.A noise reduction operation mode control circuit 19 is also provided, and external power supply 18 is provided. It is applied to pin _P12 by a mode selection switch (not shown) and generates a three-value output according to each control voltage of OFF, B type, and C type, and serves as a switch control signal for switch amplifiers 5 and 10. It also serves as a characteristic control signal for the sub-signal path circuits 15 and 17 of the high and low level stages and the side chain fixed filter 14. Furthermore,
A REC/PB control circuit 20 is provided which responds to a signal applied to pin ₁₃ according to a REC/PB mode switch (not shown), and switches the switch amplifiers 1, 2, 6 in response to each recording and playback mode. ，
8, 11 and 13 generate control signals to select its R and P inputs. Note that _P14 is a ground terminal.

An analog switch can be used as the switch amplifier, but for example, the differential amplifiers in the input stage of an operational amplifier configuration are provided as many as the number of input signals (two in the above example) to be switched, and the outputs of these differential amplifiers are transferred to the next stage amplifier. It is also possible to adopt a configuration in which a constant current source of each differential amplifier is controlled on and off by a control signal using a common input of the differential amplifier, but the configuration is not limited to this.

Here, considering the time constant circuit 4, which is a spectral skewing circuit, in the C type system, it has a series connection configuration of a resistor R ₁ in series with the signal line, a coil L ₁ in parallel with the signal line, a capacitor C ₁ , and a resistor R ₂ . Transfer characteristics of voltage divider circuit G _R
(ω) is expressed as G _R (ω)=Z(ω)/(R ₁ +Z(ω)) (1). Here, Z(ω) indicates an impedance inserted in parallel to the signal line. The transfer characteristic G _R (ω) shown by equation (1) is the characteristic required during recording, but during playback, this voltage divider circuit 4 is inserted into the feedback system of the amplifier 2, so the amplifier 2 The transfer characteristic G _P (ω) at is, assuming that the open loop gain of amplifier 2 is sufficiently large, G _P (ω) = (R ₁ + Z (ω)) / Z (ω) = 1 / G _R ( ω)
...(2) becomes. That is, the characteristics of the spectral skewing circuit 4 during recording and during reproduction are opposite to each other, and can fully satisfy the characteristics of the noise reduction system. This is exactly the same for the time constant circuit 9, which is an anti-saturation circuit. Therefore, the time constant circuit can be shared during recording and playback, and the circuit configuration can be simplified.

Next, to describe the features of the present invention, the circuit device power supply
The Vcc application pin P ₁₁ , the switching command signal application pin P ₁₂ from the noise reduction mode switch, and the recording/reproduction switching command signal application pin P ₁₃ are arranged adjacent to each other. These pins P ₁₁ to _{P 13} are all DC signals, and even if these pins touch each other by arranging all of these DC applying pins next to each other, there is no connection between these pins and the circuit from the ground level. Since the design is such that a potential up to the power supply level can be applied, no problem will occur. Therefore, no special consideration is required when arranging other pins. Figure 2 shows the circuit in Figure 1 as a DIP (dual inline package) type.
This shows the pin arrangement when used as an IC device.

As described above, the present invention has the advantage of increasing the degree of freedom in pin arrangement in an analog IC having a variety of signal inputs, and improving reliability.

[Brief explanation of drawings]

FIG. 1 is a circuit block diagram of an embodiment of the present invention, and FIG. 2 is a pin arrangement diagram when the circuit of FIG. 1 is integrated. Explanation of symbols of main parts 1, 2, 5, 6, 8,
10, 11, 13...Switch amplifier, 4...Time constant circuit for spectral skewing, 9...Time constant circuit for anti-saturation, _P1 to _P14 ...IC pins for external connection.

Claims (1)

[Scope of Claims] 1. An integrated circuit device including an analog signal processing circuit, in which a series of pins are used as DC voltage application pins, and another series of pins are used as analog signal pins, and the DC voltage application pins are adjacent to each other. 1. An integrated circuit device characterized in that the DC voltage application pins and the analog signal pins are located in separate areas without disposing analog signal pins between the DC voltage application pins. 2. The analog signal processing circuit is a signal processing circuit for reducing tape noise in a tape recorder, and the external connection pin for control signal input is a pin for each signal for recording/playback mode switching control and tape noise reduction mode switching control. An integrated circuit device according to claim 1, characterized in that: