JPH0231462A - semiconductor element - Google Patents

Abstract

PURPOSE:To eliminate the variability of a semiconductor element in characteristic due to the variability of a gate electrode in size by a method wherein crystals are micronized or an amorphous gate electrode is utilized. CONSTITUTION:A high melting point metal layer, whose carbon atom content is 10at.% or less, is deposited on a semiconductor substrate 11, which is etched to be formed into a gate electrode of an adequate shape. When the carbon atom content of the gate electrode exceeds 10at.%, the gate electrode decreases in electrical conductivity, and when the content is less than 0.1at.%, crystals large in diameter or crystal boundaries are generated in the high melting point metal layer, which is not preferable. Si.GaAs, or the like is utilized as a base material, and it is especially preferable to use GaAs as the base material, because the element of GaAs is excellent in high speed responsiveness. And, an oxide film may be either formed or not formed on the surface. W, Mo, Ta, Ti, or the like and their alloy, for instance, silicide, aluminum tungsten, or the like is used as a mother material of the high melting point metal layer.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a semiconductor device. In particular, it relates to gate electrodes processed to submicron order.

(B) Conventional Technology GaAs MESFETs have been widely used as transistors with excellent high speed performance.

In this GaAs MESFET, for example, an n-layer is formed on a semi-insulating substrate, and then a high-melting point metal film such as tungsten silicide, tungsten nitride, or tungsten aluminum is formed thereon by generally sputtering deposition. This was patterned to form a gate electrode, and then n0 ions were implanted using this gate as an implantation mask for the n layer. After the n ion implantation, a high temperature heat treatment of about 80 at was performed to activate the implanted atoms. The device was manufactured by forming source and drain electrodes on this n active layer.

On the other hand, although GaAs MESFETs are widely used as transistors with excellent high-speed performance, it has been desired to miniaturize the gate electrode in order to further improve the performance of the -layer.

(c) Problems to be Solved by the Invention However, a tungsten film, for example, formed on a semiconductor substrate by sputtering vapor deposition, for example, has columnar crystals grown perpendicular to the substrate surface, and these crystal grain boundaries The diameter is on the order of 0.1 μm. Therefore, when processing this metal film into a fine gate with a length of 0.5 μm or less, for example, there is a problem that the gate dimensions vary greatly due to the large diameters of the columnar crystals and grain boundaries. .

The present invention has been made to solve the above problems, and aims to provide a high-performance MESFET with small variations in gate length even if the gate is minute.

(d) Means for Solving the Problems The present inventors conducted extensive research to reduce the diameters of crystals and grain boundaries that occur in the high melting point metal deposited film formed on a semiconductor substrate, and found that By depositing a carbon-containing high melting point metal, which is a high melting point metal with carbon added within a specific range, on a semiconductor substrate, a high melting point metal layer with finer crystals or amorphous crystals can be created without reducing conductivity. This invention was discovered by discovering the fact that this phenomenon occurs.

Thus, according to the present invention, there is provided a semiconductor device characterized in that a gate electrode film on a semiconductor substrate is constituted by a high melting point metal layer containing carbon atoms in an amount of 10 at.% or less.

The semiconductor device of the present invention has 10 carbon atoms on a semiconductor substrate.
It can be obtained by depositing a high melting point metal layer containing less than at% and etching it to form a gate electrode in an appropriate shape. Examples of this semiconductor substrate include Si, GaAs, etc., and GaAs is particularly preferable because it has excellent high-speed response as an element, and it may be used with an oxide film formed on the surface, or may be used without forming an oxide film. good. Examples of the base material of the high melting point metal layer include metals with a melting point of 800° C. or higher, such as WlMo, Ta5Ti, etc., and alloys thereof, such as silicides such as tungsten silicide, aluminum tungsten, and the like.

Such a high melting point metal layer has the above-mentioned high melting point metal as a base material, and carbon atoms are added to the base material by 10 at% or less, usually 0.1 to 1.
It can be deposited and formed by sputtering or vapor deposition using a metal material containing Oat. At this time, if the content of carbon atoms exceeds 1 oat.%, the conductivity of the gate electrode decreases, and if it is less than 0.1 at. It is not sufficient to indicate this and is not desirable. Note that the high melting point metal layer may be formed of one type, but it can also be formed in multiple layers of two or more types of materials (high melting point metal containing carbon), and the thickness is usually 0.1 to 1 μm. It is preferable that

After patterning, this high melting point metal layer is etched by a known etching method such as RIE to form a gate electrode. The width of this gate electrode can be set depending on the purpose, but it can be set to a fine width of 0.1 to 0.5 μm.

(E) Function In the semiconductor device of the present invention, the gate electrode is formed by etching a carbon-containing high-melting metal film in which the diameter of crystals and crystal grain boundaries has been reduced or made amorphous, so that the diameter of the crystals and grain boundaries is, for example, 1 μm. Dimensional accuracy is also high in finely etched products processed to the following widths.

(f) Example Example 1 An embodiment of the present invention will be described with reference to the drawings.

In FIG. 2, first, a semi-insulating GaAs substrate 11 is coated with Si.
Ion implantation was performed. However, the acceleration voltage is 50 kev
, the dose amount is 2X 10"ca+-'. Next,
This substrate was adhered to the surface of the silicon nitride film substrate and heat treated at 850°C for 15 minutes in a nitrogen atmosphere to form an n-type active layer 12.
form.

Next, as shown in Fig. 3, a tungsten carbide carbide (W) film with a thickness of 1000 was deposited by sputtering deposition.
Slo, sCo, +) film 18 with a thickness of 4
A tungsten carnoide (TCo, +) film 19 of 0.000000000000000000 is formed. As a result of X-ray diffraction analysis, it was confirmed that the film was in a microcrystalline or amorphous state in all cases.

Subsequently, as shown in FIG. 4, a gate pattern mask 20 is formed on the tungsten carbide film 19' using an AX 1400-27 resist, and then by RIE method.
CF4 and 0. The tungsten silicide carbide film 18 is etched using a mixed gas of
Then, a gate made of a tungsten carbide film 19 is formed.

Next, as shown in FIG. 6, using this gate as a mask, S
Inject i ions in two stages. However, for the first stage implantation, the acceleration voltage is 50Kev, and the dose is 2X 10"cm-" 2
The second stage implantation was performed at an accelerating voltage of 150 K e V % and a dose of 2
X 10I3cab-". After this, the thickness is 1000
A nitride film for the annealing cap is deposited by plasma CVD, and heat treated at 800° C. for 15 minutes in a water environment to form an n′″ active layer 14.15.

After removing the annealing nitride film, A
A source electrode 16 and a drain electrode 17 of u-Ge/Ni/Au were formed.

The gate length of the MESFET thus obtained was 0.
3μl, its dimensional accuracy is within 5%, and the in-plane fraction of the gate length can be suppressed to within 5%. The accuracy was significantly improved compared to 25%.

On the other hand, the Schottky barrier potential and specific resistance are approximately the same values as the above conventional gate, and each is 0.74eL 2X
It was 10-'Ω·cm.

(G) Effects of the Invention Since the semiconductor device of the present invention has a gate electrode in which crystals are made fine or amorphous, variations in semiconductor device characteristics due to variations in the size of the gate electrode are improved. Ru. In addition, since the dimensional accuracy of the gate electrode has been improved, it is possible to create a device with a fine gate electrode suitable for fine semiconductor devices.
It is extremely useful as a semiconductor element for aAs MESFET configuration.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of the configuration of the MESFET manufactured in an example of the present invention, and FIGS. 2 to 6 are the MESFETs shown in FIG. 1.
It is an explanatory diagram showing a manufacturing process of. 11... Half-proof GaAs substrate, 12...
. . . n-type active layer, 13 . . . gate electrode, 14.
15...n° active layer, 16...source electrode, 17...drain electrode, 18...tungsten silicide carbide film, 19...・Tungsten carbide film, 20...Resist. Filling 1 Figure @ 2 Figure Rod 3Wi 4 Figure 1] Rod 5e Fue 6 Sonoi

Claims (1)

[Claims] 1. The gate electrode film on the semiconductor substrate is 10at. 1. A semiconductor device comprising a high-melting point metal layer containing carbon atoms in an amount of less than or equal to %.