JPH09321049A - Method for manufacturing bump structure - Google Patents

Abstract

(57) Abstract: In a plating process for forming a bump, plating does not grow at an interface with a barrier metal layer, plating control can be easily performed, and contamination of a plating solution and a short circuit between electrodes can be prevented. It is to provide a bump forming method. In a bump forming method of forming a bump on an electrode pad on a wafer via a barrier metal layer, a first step of applying a thin film resist on the barrier metal layer and the thin film. A second step of applying a thick film resist 16 on the resist 15, and a third step of removing the thin film resist 15 and the thick film resist 16 facing the electrode pad 12 to expose the electrode pad 12. And a fourth step of forming bumps 18 on the exposed electrode pads 12 by plating.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a bump structure formed on an electrode pad of a semiconductor chip such as a bare chip.

[0002]

2. Description of the Related Art Bumps formed on electrode pads of semiconductor chips such as bare chips are formed as shown in FIG. That is, an electrode pad 2 made of aluminum or the like is formed on a part of the upper surface of the wafer 1 by a lithography technique, and the periphery of the electrode pad 2 is covered with a passivation film 3 as a protective film made of, for example, silicon nitride. Next, a barrier metal layer 4 such as Ti (titanium) or Cu (copper) is formed on the entire surface of the passivation film 3 including the upper surface of the electrode pad 2 by a sputtering method or the like.
To form Next, a thick film resist 5 is applied on the upper surface of the wafer 1 including the barrier metal layer 4. The wafer 1 is a disk-shaped silicon substrate, and after forming bumps 7 described later, it is cut into chip pieces to form a so-called bare chip.

Next, the thick film resist 5 facing the barrier metal layer 4 is exposed and then developed to form an opening 6 in the thick film resist 5 above the barrier metal layer 4. Next, the wafer 1 is immersed in an electroplating bath to grow a gold film on the barrier metal layer 4 by an electroplating method, and bumps 7 of gold or the like are formed inside the opening 6 surrounded by the thick film resist 5. . After forming the bumps 7, the thick film resist 5 is removed, and the barrier metal layer 4 on the upper surface of the passivation film 3 is removed by etching.

[0004]

However, when the bumps 7 are formed by plating inside the openings 6 surrounded by the thick film resist 5 as described above, depending on the kind of resist, as shown in FIG. At the interface between the thick film resist 5 and the barrier metal layer 4, the thick film resist 5 and the plating solution cause an electrochemical reaction, and the adhesive force between the thick film resist 5 and the thick film resist 5 decreases. The plating may grow (portion a in FIG. 5) at the interface with.

When the plating growth occurs on the interface in this way, it becomes difficult to control the plating for forming the bumps 7 and it also causes the plating solution to be contaminated. There is also a short circuit. Further, when the resist becomes thicker, that is, the thicker the resist is, the more easily this phenomenon occurs.

The present invention has been made in view of the above circumstances, and an object thereof is to grow a plating film at an interface with a barrier metal layer in a plating process for forming bumps even if the resist is a thick film. The purpose of the present invention is to provide a bump forming method capable of preventing contamination of a plating solution and short circuit between electrodes.

[0007]

In order to achieve the above object, the present invention provides a semiconductor wafer, an electrode pad provided on the semiconductor wafer, and a bump formed on the electrode pad. And a barrier metal layer interposed between the electrode pad and the bump for preventing diffusion of a metal contained in the electrode pad toward the bump side. A first step of applying a first resist to the layer, and a second step of applying a second resist having a film thickness of at least 5 times or more than the first resist on the first resist A third step of exposing the electrode pad by removing only the first resist and the second resist that cover the electrode pad among the first resist and the second resist , Characterized by comprising a fourth step of forming by plating the bumps on the electrode pads that are the exposed.

According to a second aspect of the present invention, a semiconductor wafer, electrode pads provided on the semiconductor wafer, bumps formed on the electrode pads, and the electrodes interposed between the electrode pads and the bumps are provided. A method for manufacturing a bump structure, comprising: a barrier metal layer for preventing diffusion of a metal contained in a pad toward a bump side; a first step of applying a first resist to the barrier metal layer; A second step of removing only the first resist covering the electrode pad of the first resist to expose the electrode pad, and a step of exposing the electrode pad exposed in the second step and the first step. A third step of applying a second resist having a film thickness of at least 5 times or more than the first resist on the first resist, and covering the electrode pad of the second resist. A fourth step of exposing the electrode pad alone is removed the second resist that, the fourth
The fifth step of forming the bump on the electrode pad exposed by the step of.

According to a third aspect of the present invention, a semiconductor wafer, an electrode pad provided on the semiconductor wafer, a bump formed on the electrode pad, and the electrode interposed between the electrode pad and the bump. A method for manufacturing a bump structure, comprising: a barrier metal layer for preventing diffusion of a metal contained in a pad toward a bump side; a first step of applying a first resist to the barrier metal layer; A second step of exposing the electrode pad by removing only the first resist covering the electrode pad of the first resist; and plating on the electrode pad exposed by the second step. A third step of forming a layer, and a fourth step of applying a second resist having a film thickness of at least 5 times or more than the first resist on the plating layer and the first resist. When, a fifth step of exposing the plating layer only is removed the second resist covering the plating layer of the second resist, the fifth
And a sixth step of forming the bump on the plating layer exposed by the step of.

According to a fourth aspect, the film thickness of the first resist according to the first, second or third aspect is 1 to 2 μm, and
The thickness of the second resist is 10 to 100 μm.

A fifth aspect of the present invention is characterized in that a bare chip is produced by dividing a semiconductor wafer from the bump structure having the bump according to the first, second or third aspect.

A sixth aspect of the present invention is characterized in that the bare chip of the fifth aspect is positioned on the wiring electrodes of the mounting board via bumps and then reflow soldered to the mounting board.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 illustrates a method of manufacturing the bump structure according to the first embodiment. After forming the electrode pad 12 of aluminum or the like on a part of the upper surface of the wafer 11 by using the lithography technique, the electrode pad 1 is formed.
A passivation film 13 made of, for example, silicon nitride is formed so as to surround 2 and the barrier metal layer 14 is formed on the entire surface of the passivation film 13 including the electrode pads 12 by a sputtering method or the like.

The wafer 11 is a disk-shaped silicon substrate, and LSI elements are formed in advance by a lithography technique. Then, this wafer 11 is cut into chip pieces after forming bumps 18 to be described later, and becomes a so-called bare chip.

Next, the wafer 1 including the barrier metal layer 14
A thin film resist 15 having a thickness of 1 to 2 μm is applied to the upper surface of the substrate 1 by spin coating. The resist used here has strong plating resistance and does not cause a gap with the barrier metal layer 14. For example, OFPR-8 manufactured by Tokyo Ohka Kogyo Co., Ltd.
Positive resists such as 00, OFPR-5000 and OMR-83, BMR C-100
It is a negative resist such as 0. This thin film resist 15
Has a viscosity of 100 cps or less and is excellent in plating resistance, but it is difficult to make the thickness 5 μm or more.

Next, 10 is formed on the upper surface of the thin film resist 15.
A thick film resist 16 of about 30 μm is formed by spin coating. The thick film resist 16 used here is, for example, AZ LP-10, AZ 4903 manufactured by Hoechst Industry, or PMER AR900 manufactured by Tokyo Ohka Kogyo. This thin film resist 15
Has a viscosity of 300 cps or more and poor plating resistance, but can have a thickness of 10 μm or more. That is, the thick film resist 16 is made of a material having a higher film forming property than the thin film resist 15.

Next, ultraviolet rays (UV) are applied to the thin film resist 15 and the thick film resist 16 located right above the electrode pad 12.
After exposure by light, development is performed, and the opening 1 is formed in the thin film resist 15 and the thick film resist 16 immediately above the electrode pad 12.
7 is formed. Next, the wafer 11 is immersed in an electroplating bath, and the electrode pad 12 on which the barrier metal layer 14 is deposited is gold-plated from the opening 17 by electroplating to form bumps 18 on the electrode pad 12. To do.

After forming the bumps 18, the thin film resist 15 and the thick film resist 16 are peeled and removed, and finally the barrier metal layer 14 is removed by etching.
Then, as described above, the wafer 11 is diced into a predetermined size to obtain bare chips.

The bare chip is positioned on the wiring electrodes of the mounting board through the bumps 18 and then mounted on the mounting board by the known Littal soldering method. In addition,
In developing and removing the thin film resist 15 and the thick film resist 16, two types of resists may be treated with the same developing solution and the same removing solution, or different developing solutions and removing solutions may be used.

As mentioned above, in this embodiment,
Photoresists used in the manufacture of semiconductor devices (eg OF
Since a positive resist such as PR-800 and OFPR-5000 and a negative resist such as OMR-83) are used, it has excellent plating resistance and can be formed with the barrier metal layer 14 in the plating process for forming the bumps 18. The plating does not grow on the interface, the plating can be easily controlled, and the contamination of the plating solution and the short circuit between the electrodes can be prevented. As a result, it is possible to contribute to improvement in production efficiency for forming bumps.

FIG. 2 shows a second embodiment of the bump structure manufacturing method. The same parts as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted. This embodiment is the same until the thin film resist 15 having a thickness of 1 to 2 μm is applied to the upper surface of the wafer 11 including the barrier metal layer 14.

After the thin film resist 15 is formed, the thin film resist 15 facing the electrode pad 12 is exposed and then developed to form an opening 19 in the thin film resist 15 above the electrode pad 12.

Next, a thick film resist 16 having a thickness of 10 to 100 μm is formed on the upper surface of the thin film resist 15 including the opening 19. Here, the thick film resist 16 used is, for example, made of Hoechst Industry, as in the first embodiment.
AZ LP-10, AZ 4903, PMER AR900 made by Tokyo Ohka Kogyo.

Thick film resist 1 facing the electrode pad 12
6 and the thin film resist 15 are exposed and then developed to form an opening 17 in the thin film resist 15 and the thick film resist 16 above the electrode pad 12. Next, the wafer 11 is immersed in an electroplating bath, and the electrode pad 12 is gold-plated from the opening 17 by an electroplating method to form bumps 18 on the electrode pad 12.

After the bumps 18 are formed, the thin film resist 15 and the thick film resist 16 are peeled and removed, and finally the barrier metal layer 14 is removed by etching to complete the process.

Also in this second embodiment, since the thick film resist 16 is formed through the thin film resist 15 having strong plating resistance, the plating does not grow on the interface with the barrier metal layer 14 and the first film is not formed. The same effect as that of the embodiment can be obtained.

FIG. 3 shows a third embodiment of the bump structure manufacturing method. The same parts as those of the first and second embodiments are designated by the same reference numerals and the description thereof will be omitted. In the present embodiment, a thin film resist 15 having a thickness of 1 to 2 μm is applied to the upper surface of the wafer 11 including the barrier metal layer 14, the thin film resist 15 facing the electrode pad 12 is exposed, and then developed to be developed.
The process is the same as that of the second embodiment until the opening 19 is formed in the thin film resist 15 on the top of.

After forming the opening 19 in the thin film resist 15, the wafer 11 is immersed in an electroplating bath, and the electrode pad 12 is gold-plated from the opening 19 by an electroplating method to form a plating layer on the electrode pad 12. Form 20.

Next, a thick film resist 16 having a thickness of 10 to 100 μm is formed on the upper surface of the thin film resist 15 including the plating layer 20. The thick film resist 16 used here is, for example, AZ LP-10, AZ 4903 manufactured by Hoechst Industry, PMER AR9 manufactured by Tokyo Ohka Kogyo, as in the first and second embodiments.
00. The resists and developers used here are summarized in Table 1.

[0030]

[Table 1]

Next, the thick film resist 16 and the thin film resist 15 facing the electrode pad 12 are exposed and then developed to form an opening 17 in the thin film resist 15 and the thick film resist 16 above the electrode pad 12. Next, the wafer 11 is immersed again in the electroplating bath, and the plating layer 20 is gold-plated from the opening 17 by the electroplating method, and the bumps 18 are formed on the electrode pads 12 via the plating layer 20.
To form

After the bumps 18 are formed, the thin film resist 15 and the thick film resist 16 are peeled and removed, and finally the barrier metal layer 14 is removed by etching to complete the process.

Also in this third embodiment, since the thick film resist 16 is formed through the thin film resist 15 having a strong resistance to plating, the plating does not grow at the interface with the barrier metal layer 14 and the first film is not formed. The same effect as that of the embodiment can be obtained. In addition, in the said 1st-3rd embodiment, although the two-layer resist of the thin film resist 15 and the thick film resist 16 was formed, the resist of three or more layers may be sufficient.

[0034]

According to the first to third aspects of the present invention, a first resist is applied to the barrier metal layer, and a film thickness of at least 5 times or more than that of the first resist is applied onto the first resist. The second resist that is applied is applied, and only the first resist and the second resist that cover the electrode pad of the first resist and the second resist are removed to expose the electrode pad, and By forming the bumps on the existing electrode pads by plating, the resist adheres to the barrier metal layer, and plating does not grow at the interface with the barrier metal layer in the plating process for forming bumps, and plating control is easy. Therefore, the contamination of the plating solution and the short circuit between the electrodes can be prevented.

According to the present invention, thick bumps can be formed, and even if flip-chip mounting is performed, the occurrence of thermal stress due to the heat cycle during mounting can be reduced, and the bumps on the electrode pads and bumps can be reduced. The occurrence of cracks can be prevented.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing a bump forming method according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a bump forming method according to a second embodiment of the present invention.

FIG. 3 is an explanatory diagram showing a bump forming method according to a third embodiment of the present invention.

FIG. 4 is an explanatory view showing a conventional bump bump forming method.

FIG. 5 is a vertical cross-sectional side view showing a conventional bump structure.

[Explanation of symbols]

 11 ... Wafer 12 ... Electrode pad 14 ... Barrier metal layer 15 ... Thin film resist 16 ... Thick film resist 18 ... Bump 20 ... Plating layer

Claims (6)

[Claims] 1. A semiconductor wafer, an electrode pad provided on the semiconductor wafer, a bump formed on the electrode pad, and an electrode pad interposed between the electrode pad and the bump. And a barrier metal layer for preventing diffusion of a metal to the bump side, a first step of applying a first resist to the barrier metal layer, and a first resist A second step of applying a second resist having a film thickness that is at least five times as large as that of the first resist, and covering at least the electrode pad of the first resist and the second resist A third step of removing the first resist and the second resist in a region to be exposed to expose the electrode pad,
A fourth step of forming the bump on the exposed electrode pad by plating, the method of manufacturing a bump structure. 2. A semiconductor wafer, an electrode pad provided on the semiconductor wafer, a bump formed on the electrode pad, and an electrode pad interposed between the electrode pad and the bump. And a barrier metal layer for preventing diffusion of a metal to the bump side, a first step of applying a first resist to the barrier metal layer, and a first resist A second step of exposing the electrode pad by removing at least the first resist in a region covering at least the electrode pad, and on the electrode pad exposed in the second step and the first resist A third step of applying a second resist having a film thickness of at least 5 times or more than that of the first resist, and at least the electrode pad of the second resist. A fourth step of removing the second resist in the area to be covered to expose the electrode pad, and a fifth step of forming the bump on the electrode pad exposed by the fourth step. A method of manufacturing a bump structure, comprising: 3. A semiconductor wafer, an electrode pad provided on the semiconductor wafer, a bump formed on the electrode pad, and an electrode pad interposed between the electrode pad and the bump. And a barrier metal layer for preventing diffusion of a metal to the bump side, a first step of applying a first resist to the barrier metal layer, and a first resist A second step of removing the first resist in a region covering at least the electrode pad to expose the electrode pad, and a plating layer on the electrode pad exposed by the second step And a fourth step of applying a second resist having a film thickness of at least 5 times or more than the first resist on the plating layer and the first resist. And a fifth step of exposing the plating layer by removing the second resist at least in a region of the second resist covering the plating layer, and exposing the plating layer by the fifth step. And a sixth step of forming the bumps on the plated layer. 4. The bump structure according to claim 1, wherein the first resist has a film thickness of 1 to 2 μm, and the second resist has a film thickness of 10 to 100 μm. Body manufacturing method. 5. The method of manufacturing a bump structure according to claim 1, 2 or 3, wherein a bare chip is produced by dividing the semiconductor wafer from the bump structure having the bumps formed thereon. 6. The method of manufacturing a bump structure according to claim 5, wherein the bare chip is positioned on the wiring electrodes of the mounting substrate via bumps and then reflow soldered to the mounting substrate.