JPH084335B2 - Storage device - Google Patents

Description

The present invention relates to a storage device for storing information signals.

<Prior Art> Conventionally, for example, a field memory is used as a storage device that stores a video signal or the like in a storage unit such as a semiconductor memory and repeatedly reproduces the video signal stored in the storage unit to reproduce a still image. Known VTR.
Such a device has a great effect on use in that it can reproduce a still image without blur due to the influence of the reproduction head or the jitter of the medium.

<Problems to be Solved by the Invention> The above-mentioned device is generally configured to detect vertical and horizontal sync signals of a video signal and write the video signal to the memory in synchronization with the sync signal. It was

Therefore, if no video signal is input, the vertical and horizontal sync signals are not detected, so the video signal cannot be written to the memory. If no measures are taken, the previously written video signal remains in the memory. It will be uncomfortable for the user,
There was a problem that operability was not good.

Such a problem is not limited to a storage device that stores a video signal, but is a problem that similarly occurs in a device that stores an information signal that is communicated with other synchronization signals.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a storage device that solves the above problems and has improved operability that is easier to use.

<Means for Solving Problems> The present invention has been made to solve the above problems, and is based on a synchronization signal that defines synchronization when an information signal is stored in a storage unit. A storage device for storing the information signal in a storage means, wherein the storage means stores the information in the storage means when the presence or absence of the synchronization signal is detected, and when the absence of the synchronization signal is detected by the detection means. Means for erasing at least a part of the stored content stored therein.

<Embodiment> According to a preferred embodiment of the present invention described below, still picture information recorded on a magnetic sheet is reproduced, or a video signal inputted from an external terminal is written in a frame memory to obtain still picture information. A description will be given of a power transmission device capable of performing power transmission to another device after adjusting the color balance of the still image information, and further receiving information transmitted from the other device to record on a magnetic sheet. However, it is clear that the invention is not limited to such devices.
FIG. 1-1 is a front view of a power transmission device according to an embodiment of the present invention, and FIG. 1-2 is a block diagram showing the configuration of the device.

In FIG. 1-1, 1 is a power switch, 2 is a video floppy insertion slot having a magnetic sheet, 3 is a monitor display section, 4 is a plurality of still images which are automatically reproduced and are freezed (written into a memory). ) Is a switch for selecting an automatic reproduction transmission mode in which the items are sequentially transmitted. Further, this switch is a self-illuminating switch which is also used as the display LED L17 which is turned on when the switch is selected. The automatic switch transmission is started by the start switch 32. In this mode, the track number to be transmitted must be programmed in advance. If this is not done, the start switch 32 will not operate even if it is turned on. A track number setting circuit 255 for programmatically setting a track number to be transmitted is connected as described later. No. 5 is a 2-digit 7-segment LED that also serves as the track number, the number of empty tracks, and other displays.

7 is an eject switch for discharging video flow, 8 is an automatic reception switch for performing automatic reception recording, and this switch is also used as a display LED L16.

Reference numeral 9 is a recording switch for recording on the magnetic sheet, which is also used as the LED L18 which is turned on in the recording mode and when recording is possible, that is, when the track accessed by the head 205 described later is unrecorded. Has been done.

Reference numeral 10 denotes a switch for switching the sole of the signal to be reproduced on the monitor 3 to the video floppy (VF) side, and by pressing this switch, the reproduction mode for reproducing from the video floppy is set. This switch is also used as a display LED L5 that lights up when the switch is selected.

Reference numeral 11 is an NTSC signal selection switch for switching the source of the signal to be reproduced on the monitor 3 to the input NTSC signal from the outside. By pressing this switch, the EE monitors the external input.
It will be possible to see. Further, this switch is also used as the display LED L6 which is turned on when the switch is selected. Reference numeral 12 is a memory selection switch for switching the source of the signal to be reproduced on the monitor 3 to a reproduced image of an internal frame memory described later. Further, this switch is also used as a display LED L7 which is turned on when the switch is selected.

As will be described later, when the external input or the built-in frame memory is selected as the source of the signal to be reproduced on the monitor 3, the apparatus automatically enters the recording mode and whether or not the track accessed by the head is unrecorded. If it is determined and unrecorded, the LEDL18 is turned on to display that recording is possible, and if recorded, the LEDL18 is turned off to display that recording is not possible. Therefore, the user can know whether the image displayed on the monitor 3 can be recorded on the magnetic sheet.

19 is a switch for moving the track of the magnetic sheet accessed by the head to the direction in which the track number increases, that is, the inner side of the magnetic sheet, and 20 is the track number of the track of the magnetic sheet accessed by the head. Is a switch for moving the head toward the outer peripheral side of the magnetic sheet, 23 is a memory lock switch for locking so as not to erase the contents of the frame memory, and is lit in the memory lock state, the memory lock release state. Is also used as LED L13 which is turned off.

24, 25, 26, 27 are switches for setting a single color in both the transmission monitor mode and display LEDs L1, L respectively.
2, L3, L4 are also used for lighting and blinking according to a sequence described later. When reproducing a signal from a frame memory described later on the monitor 3, the red (R) component and the green ( G) component, blue (B) component, black (Bk) component, etc. are used as a display means for indicating which component is displayed in the single color display mode or in the color display mode. ing. The single color display mode is executed by reading a signal from one of an R memory 213, a G memory 214, and a B memory 215 described later. The display LEDs L1, L2, L3, L4 are also used as means for displaying the transmission / reception state, that is, which memory corresponds to which signal is transmitted / received.

28 is a display LED L8 that is controlled according to the ID signal obtained from the video signal reproduced from the video floppy to turn on (ON) when the signal is frozen by the frame signal and turn off (OFF) when the signal is frozen by the field signal. And the setting switch for switching the field mode and frame mode of the freeze operation.

29 is a switch for setting the transmission mode,
It also serves as LED L14, which indicates that the transmission mode is set.

30 is a switch for setting the reception mode,
It also serves as LED L15, which indicates that the reception mode is set.

32 is a start switch for starting transmission, 33 is a stop switch for stopping the transmission once started, and 34 is a resolution switch for switching between the frame transmission mode and the field transmission mode as the transmission mode. , 35 is a freeze switch for freezing a video signal in a memory to be described later, 37 is a transmission mode in which a G component of a video signal is first transmitted, and then a B component and an R component are transmitted line-sequentially in a two-color transmission mode, an R component, 3-color transmission mode in which G and B components are sequentially transmitted in this order, 4-color transmission mode in which R, G, B, and Bk components are sequentially transmitted in this order, Monochrome transmission mode in which only black and white signal Y is transmitted , Which is a color mode switch for selecting one of the transmission modes, and is also used as the LED L19. The switch 37
Each time the switch is turned on, the transmission mode set changes in the order of the two-color transmission mode, the three-color transmission mode, the four-color transmission mode, and the monochrome transmission mode.

38, 39, 40, 41 are function switches 42 respectively Tx / Rx
LED9, L10, L1 for display that is turned on according to the color transmission mode set when the color mode switch 37 is operated or the automatic reception described later
The light sources 1 and 12 are turned on when the two-color mode, the three-color mode, the four-color mode, and the monochrome transmission modes described above are set.

Further, the color mode switch 37 has a function of switching the monitor display mode described above when a function switch described later is tilted to the MONITOR side.

Reference numeral 42 is a Tx / Rx or MONITOR switching switch for switching whether the color mode switch 37 is used as a switch for setting the transmission mode or as a switch for setting the monitor display mode as described above.

Reference numeral 43 is a switch for setting either the odd line-th area or the even line-th area of the memory area to be frozen when the field mode setting switch 28 selects the field mode.

FIG. 1-2 is a block diagram showing the construction of the apparatus of one embodiment of the present invention.

In FIG. 1-2, reference numeral 100 is a control circuit, the details of its operation will be described later. 201 is the video floppy insertion slot 2
It is a disk-shaped magnetic sheet that can be recorded and reproduced from the video signal inserted from. On the magnetic sheet shown in this embodiment, 50 concentric tracks are formed, and a video signal for one file is recorded on each track.

Reference numeral 202 denotes a motor for rotating the magnetic sheet 201, which has a predetermined rotation speed (NTSC) synchronized with the vertical synchronizing signal of the video signal.
In this case, the magnetic sheet 201 is rotated at 3600 rpm.

203 is a head carriage supporting the head 205,
By driving the step motor 204, it is possible to control the access position of the head 205 supported by the head carriage 203 on the magnetic sheet 201. Reference numeral 204 is the step motor for driving the head carriage 203, and 205 is the head, which is used for both recording and reproduction in this embodiment. Reference numeral 206 denotes a driver that outputs a signal for driving the step motor 204.
A signal for driving the step motor 204 is generated based on the control signal. The control circuit 100 is a track UP switch 1
9. The driver 20 is used when the access position of the head 205 on the magnetic sheet 201 is changed according to the operation of the track DOWN switch 20 or when the track recording state detection operation described later is performed.
It outputs a control signal to 6 and operates so as to change the access position of the head 205. Reference numeral 207 is a reproduction process circuit that performs processing such as preamplification and clamp operation of reproduction output on the track on the magnetic sheet 201 reproduced by the head 205, and 208 is reproduction output on the track on the magnetic sheet 201 reproduced by the head 205. It is a level detection circuit for detecting whether or not there is.

If a signal is recorded on the track that the head 205 on the magnetic sheet 201 is accessing, the reproduction output of the head 205 is more than a predetermined value, and if no signal is recorded on the track on the magnetic sheet 201, the reproduction of the head 205 is performed. The fact that the output is below a predetermined level is used to detect whether the track accessed by the head 205 is recorded or not recorded.
209 is an R, G, B matrix circuit that divides the signal processed by the reproduction process circuit 207 or the decoder 222 into R, G, B components, 210,211,212 are R components that are divided by the R, G, B matrix circuit 209, A / D converters for A / D converting G component and B component signals, 213, 214, 215 storing R component, G component, B component digital signals A / D converted by A / D converters 210, 211, 212, respectively. Memory, G memory, B memory, each memory is 1
It is possible to store video signals for frames. The memories 213, 214, 215 are also used as memories for receiving the transmitted video signal. Further, a memory 250 for the black (Bk) component is provided especially for the four-color transfer mode.

216,217,218 are R memories input via switch SW5
13 is a D / A converter for converting the digital signal stored by the G memory 14 and the B memory 15 into an analog signal. 219
Is the R component A / D converted by the D / A converters 216, 217, 218,
A color difference matrix circuit that outputs color difference signals RY, BY, and a luminance signal Y from signals of the G component and B component, and 220 is a color difference signal RY, BY, and a luminance signal Y input via SW3. An encoder that modulates and outputs to the monitor 3 as a standard television signal of the NTSC standard, 222 demodulates the standard television signal of the NTSC standard input through the external input terminal 221, and color difference signals RY, BY, A decoder for outputting the luminance signal Y, 223 is the above-mentioned R memory 21
3, write to G memory 214, B memory 215Bk memory 250,
A memory controller for controlling reading, the memory controller 223 outputs the output of an A / D converter 224, which will be described later, to R
Control to write to the memory 213, G memory 214, B memory 215, and Bk memory 250, and control to read the signals written to the R memory 213, G memory 214, and B memory 215 and output to the D / A converter 226. . The controller 223 also performs the later-described calculation of the Bk (black) component.

Reference numeral 224 denotes the A / D converter, which is a modulated signal received via the telephone line 231, specifically, for example, R component, G component,
This is a converter for converting an analog signal after being demodulated by a demodulator 225 into a modulated signal that is divided into B components and received in time series for each component.

225 is the demodulator, which demodulates the modulated signal input via the telephone line 231.

226 is a memory controller 223 for R memory 213, G
It is a D / A converter that converts a digital signal read from the memory 214, the B memory 215, and the Bk memory 250 into an analog signal.

Reference numeral 227 is a modulator for modulating the analog signal converted by the D / A converter 226 and transmitting the modulated analog signal via a telephone line.

The conversion speeds of the A / D converter 224 and A / D converter 226 are lower than the conversion speeds of the D / A converters 210, 211, 212 and D / A converters 216, 217, 218. This is A / D converter 210, 211, 212, D / A converter 2
16,217,218 is required to convert the video rate in order to write or read the memories 213,214,215 within one field period of the standard television signal, whereas the A / D converter 224 and the D / A converter 226 are required to change the bandwidth. This is because the writing or reading of the memories 213, 214, 215 is performed within a period of several minutes via a narrow telephone line.

Reference numeral 228 is a reception detection circuit that detects a calling signal (corresponding to a ringing tone of a telephone) sent prior to the transmission of the video signal via the telephone line 231, and outputs a reception command signal.

Reference numeral 3 denotes the monitor shown in FIG. 1-1, which displays a standard television signal input through the color killer circuit 256. 230 indicates each memory from the memory controller 223
It is a control line for controlling 213 to 250.

 231 is the telephone line.

Reference numeral 232 is a magnetic sheet presence / absence detection circuit for detecting the presence / absence of the magnetic sheet 201 from the signals of the photo interrupters 232-A and 232-B. If there is a magnetic sheet 201, the sheet 1
Thus, the optical paths of the photo interrupters 232-A and 232-B are blocked, and when the magnetic sheet 201 is not provided, the optical paths of the photo interrupters 232-A and 232-B are not blocked. The magnetic sheet presence / absence detection circuit 232 detects the presence / absence of the magnetic sheet 201 by detecting the difference in the output of the photo interrupter thereby, and sends the result to the control circuit 100.

Reference numeral 233 is a recording process circuit that modulates a signal input via the switch SW4 and sends it to the head 205.

Reference numeral 235 is a display device driven by the output of the control circuit 100, which controls the above-mentioned LEDs L1 to L19 and the 7-segment LED 5 to display, for example, the 7-segment LED 5 indicating that automatic reception is impossible, The remaining recordable number in the reception mode is displayed.

Reference numeral 236 is the above-mentioned motor drive circuit, which is operated and stopped by the output of the control circuit 100.

Reference numeral 250 is the memory in which the black (Bk) component of the video signal is written, and 251 is an ID signal detection circuit for reproducing the ID signal frequency-multiplexed with the video signal from the magnetic sheet 1.

Reference numeral 253 is an interrupt counter for causing the control circuit 100 to perform interrupt processing.

Reference numeral 255 is a track NO setting circuit connected to the control circuit 100 for program setting a track number for automatic transmission. The track NO setting circuit 255 has an UP switch 26 for sending the head of the main body to both the inner peripheral side and the outer peripheral side.
3 and DOWN switch 264, setting switch 260 for setting the track NO setting circuit 255 in an operable state, decision switch 261 for storing the track NO to be transmitted in the control circuit 100, and setting operation of the track NO. A terminating switch 262 is provided for the purpose.

Reference numeral 256 denotes a color killer circuit for causing the monitor 3 to display only the luminance signal when the monochrome display mode or the single color display mode is set, and the circuit 256 is controlled to operate or not operate by the control circuit 100. . Reference numeral 270 is a sync signal detection circuit for separating the sync signal from the signal output via the switching switch SW2 and detecting whether or not the sync signal is present.

SW1 is a switching switch for connecting the head 205 to the reproduction process circuit 207 during reproduction and connecting to the recording process circuit 233 during recording.

SW2 connects the decoder 222 to the switch SW3 when outputting the video signal input through the external input terminal 221 to the monitor 3, and reproduces when outputting the video signal reproduced from the magnetic sheet 201 to the monitor 3. A switching switch that connects the process circuit 207 to the switch SW3.

SW3 selects the switch SW2 to the encoder 220 when outputting the video signal reproduced from the magnetic sheet 201 or the video input directly via the external input terminal 221 to the monitor 220, and the R memory 213, G memory 214, B This is a switching switch that connects the color difference matrix circuit 219 to the encoder 220 when outputting the video signals stored in the memory 215 and the Bk memory 250 to the monitor 3.

SW4 connects the color difference matrix circuit 219 to the recording process circuit 233 when recording the video signals stored in the R memory 213, the G memory 214, and the B memory 215 on the magnetic sheet 201, and inputs them through the external input terminal 221. Video signal to magnetic sheet 2
When recording on 01, the decoder 222 is connected to the recording process circuit 233.
Is a switching switch connected to.

SW5 is a switching switch that controls to which of the D / A converters 216 to 218 the signals read from the R memory 213, the G memory 214, the B memory 215, and the Bk memory 250 are sent. Details of the operation will be described later.

The states of the switching switches SW1 to SW5 described above are switched by the control circuit 100.

Next, the data format transmitted by the apparatus of this embodiment will be described with reference to FIG.

FIG. 2 shows a still image transmission data waveform of this embodiment. In such transmission, data is read out and written in each memory by using the memories 213, 214, 215 and 250 for each color signal shown in FIG. 1-2, but FIG. 2 shows the data waveform for the single color. In FIG. 2, the horizontal axis represents the time axis and the vertical axis represents the level of transmission data. The code attached to the horizontal axis indicates the address of the memory corresponding to the data being transmitted. The structure of such a data waveform is as follows: a synchronization section consisting of 3H (1H is the time required to transmit one horizontal line on the screen), a white level section consisting of 2H, a data section including transmission data consisting of 1H and playback 1D data. , A blank part consisting of 1H, and a video part.

The synchronizing part is repeated at a cycle of 1H (when the 1st line 0 to XE dots of the memory are read at 1H and the synchronizing part is generated, the 0-4th dot is the white level and the 5th-XE dot is the black level). This is for knowing the line breaks in the video signal section. The white level is a level corresponding to the white level of the image portion, and is for correcting the change in the electric transmission level that depends on the state of the electric transmission circuit. In this data waveform, the repeating period of the synchronizing part and the period of the synchronizing part, the period of the white level part are other periods, and the repeating period of the synchronizing part is 2
-3 seconds, and other periods may be set to a long time such as 10 seconds.

The transmission data in the data section is data indicating whether the transmission mode is frame transmission or field transmission (bit 0), transmission color mode (monochrome or single color, two colors, three colors).
Data for distinguishing colors (4 colors) (bits 1 and 2), data for distinguishing between normal transmission mode and monochromatic transmission mode (bit 3), and a switch when the color of the monochromatic mode, which will be described later, is set. 2 bytes to 6 for each still image recorded by frequency multiplexing in the video signal reproduced from the indicated code (bits 4, 5) and video floppy
It consists of up to bytes of information data (hereinafter referred to as ID data).

Bits 1 and 2 in the monochromatic transmission mode are data indicating which transmission color mode is set before the monochromatic transmission mode is set.

The ID data is composed of, in addition to the date of photographing, the time, and the like, data indicating whether frame recording is field recording, or if frame recording is even field or odd field.

As for the form of data, bit allocation is performed as follows. (1 byte: transfer mode, 2-6 bytes ID
data) 3 bytes ... The video track number 4 bytes ... Shooting year (4bit 10th above, lower 4bit 1st BC
D) 5 bytes ... Month of shooting (upper 4bit 10th place / lower 4bit 1st place BC)
D) 6 bytes ... Shooting date (upper 4bit 10th place / lower 4bit 1st place BC)
D) When sending the above data, when it is "1",
When it is "FF" level or "0", it is set to "00" level, and 1 bit may be expressed by a plurality of dots of X shown in FIG. 3, for example, 2 dots.

The 1H blank part is provided to more accurately obtain the start of the video signal data.

FIG. 3 shows two-dimensionally arranged data of the image part, which shows the arrangement of the memories 213 to 215,250. In the horizontal direction, X = 0 to XE dots, and in the vertical direction, Y = 0, which corresponds to the synchronization part, white level part, data part, and blank part.
Video section Y = 7 to YE lines excluding ~ 7 lines (XE +
1) x (YE-6) dots.

Next, the operation of the embodiment of the present invention will be described using a flow chart. FIG. 4 is a basic operation flow of this embodiment.

When the power switch 1 is turned on, various initial settings are made in step 4-1. That is, the memory lock flag MLF which determines whether or not the memory freeze operation is prohibited is cleared, and the freeze operation for writing the video signal in the memory shown in FIG. 1-2 is enabled. Further, the initialization request flag IRQFL indicating whether or not the track recording state needs to be detected is set. Further, the interrupt mask IRQMSK for prohibiting the interrupt for obtaining the data transmission / reception timing is set to prohibit the interrupt.

Further, the later-described transmission mode number is "1", that is, the two-color transmission mode, the transmission mode is set as the transmission / reception mode, and the automatic transmission / reception mode is not set.

Also, the memory lock flag MLF is reset and the memory lock state is released.

The monitor mode number, which will be described later, is "0", that is, the color monitor mode is set. Therefore, if the function switch is pushed down to the Tx / Rx side, LEDL1, L2, L9, L19, MONITOR
LED L1, L2, L3, L19 lights up if it is pushed down to the side.

In addition, the playback mode is set as the initial setting and LEDL
5 is lit.

In addition, the LED L8 for displaying a field frame, which will be described later, is turned off, and the field mode is set.

When the above initialization is completed, an initial operation routine (step 4-2) described later is performed. If it is confirmed here that the recording / playback can be sent / received, in step 4-3, if it is the playback mode, s
To the playback routine of tep4-4, if it is the recording mode, step4−
Each branches to the recording routine of No. 5. The mode discrimination is performed by detecting the state of the switch SW1 described above. That is, when it is on the A side, it is in the reproduction mode, and when it is on the B side, it is in the recording mode. step4-4,4-5
After that, in step 4-6, it is judged whether the transmission mode is the reception mode. If the transmission mode is selected, the flow proceeds to the transmission routine of step 4-7, and if the transmission mode is selected, the flow branches to the reception routine of step 4-8.

When the recording / reproducing routine and the transmission / reception routine are completed in this way, the process returns to step 4-2 again, and the operation is always performed in accordance with the command input from each switch.

Next, the initial operation routine shown as step 4-2 above will be described with reference to FIG. First, each LED shown in FIG. 1-1 lights up according to the state of each flag (step 5−
0). Next, the presence / absence of the magnetic sheet 201 is detected from the output of the magnetic sheet presence / absence detection circuit 232 (step 5-1). If it does not exist, the in-rise request flag IRQFL is set (step 5-2) until the magnetic sheet 201 is inserted. step5
Wait with -1. If the magnetic sheet 201 is provided, it is checked whether the IRQFL is set (step 5-3). If the IRQFL is set, the output of the level detection circuit 208 of all the tracks from 1 track to 50 tracks is checked, and the magnetic field is detected. Recording status on sheet 1 (recording of each track, unrecorded status)
(Step 5-4). After grasping, the head 205 is controlled so as to be located on the first track. The track recording state thus obtained is held in the control circuit 100, and when it changes due to a recording operation or the like, it is changed accordingly. When detection is completed in step 5-4, IRQFL is reset to 0 and LED5 displays 1 (s
tep5-5).

Next, the same operation as the flow shown in step 6-12 to step 6-22 described later is performed to send the signal of the first track to the memories 213 to 2
Freeze to 15 (step 5-5 '). Then, the state of the function switch 42 is detected, and if it is tilted to the MONITOR side, it branches to step 5-13, and if it is tilted to the Tx / Rx side, it branches to step 5-6.

When the function switch 42 is pushed down to the Tx / Rx side, the following routine is executed. In such a case, when the color mode switch 37 is turned on (step 5-6), 1 is added to the transmission mode number by the operation of module 4 (step 5-
7).

Here, the transmission mode number is set to monochrome or monochromatic transmission mode .... 0 two-color transmission mode ... 1 three-color transmission mode ... 2 four-color transmission mode ... 3. In addition, the display LEDs L1 to L4 are turned on accordingly. As described above, when the power is turned on, the two-color transfer mode is set and the mode number is 1. The lighting LED corresponding to each color mode is as follows.

Lit LED Monochrome or single color transmission mode ... L4, L12, L19 (L19 is off in monochrome) Two color transmission mode ... L1, L2, L9, L19 Three color transmission mode ... L1, L2, L3, L10, L19 four-color transmission mode ... L1, L2, L3, L4, L11, L19 The LEDs L1 to 4 are appropriately controlled to blink or light according to the sequence described later.

It should be noted that the selection of the electric transmission mode does not depend on the number of times the color mode switch is turned on, and a switch may be provided in the LEDs 38 to 41 to determine the state of the death switch and each electric transmission mode may be selected.

Next, step 5-24 detects that one of the switches corresponding to the LEDs that are lit and controlled according to the transmission mode is turned on, and when it is turned on, the transmission mode number is set to "0". , Set the monochromatic transmission mode (step5−25 to step5
-28), if not turned on, proceed to step 5-8.

On the Tx / Rx side of the function switch, the LEDs L9 to L12 corresponding to each transmission mode are lit, and one of the switches 24 to 27 corresponding to L1 to L4 that is lit according to this is selected.
By turning on one of them, the monochrome transmission mode is set (step 5-25). Now, among the LEDs L12 and LEDs L1 to L4, only the LED corresponding to the switch that is turned on is lit, and the other LEDs are extinguished (steps 5-26, step 5-27), and the setting state of the monochromatic transmission mode is displayed.

Then, the switch code SC corresponding to the monochrome transmission mode set as described above is determined. The switch code SC corresponds to bits 4 and 5 of the above-mentioned transmission data and is defined as follows.

Switch code SC 00 ……………… Switch 24 01 ……………… Switch 25 10 ……………… Switch 26 11 ……………… Switch 27 Further select the source switch 10,11,12 When any one of them is turned on, the source reproduced on the monitor 3 is selected accordingly (step 5-8).

When the VF selection switch 10 is pressed, SW1-2, Fig. 1-2
Connect all 3 to A side and turn on LED L5 for display (L6, L
7 is turned off) (step 5-9) (SW4 is optional).

When the memory selection switch 12 is pressed, SW1-2 in Fig. 1-2.
3 and 4 are connected to the B side, B side and A side, respectively, and the display LED L7 is turned on (L5 and L6 are turned off) (step 5-10) (SW4 is optional). The reproduction of the memories 13, 14, 15 to the monitor 3 can be performed even during the transmission of the information of the memories because the access speed of the memories of the memory controller 223 is high.

When the NTSC signal selection switch 11, which is an external input, is pressed, SW1,2,3,4 in Fig. 1-2 are connected to B, B, A, B side respectively, and the display LED L6 is turned on (L5 and L7 are turned off. ) (Step 5-1
1). When the external input or memory is selected as described above, SW1 is switched to the B side and the recording mode is automatically set. Immediately before such switching, the output of the level detection circuit 208 is determined to determine whether recording is possible.
Lighting control of EDL18 is performed.

Also, in step 5-12, freeze the odd line in the function switch 42 memory, in field 2 the even line in the frame memory) (step 5-19), and in frame mode, freeze the frame (in the odd line in the frame memory). The information of the first field is written to the even-numbered line (the information of the second field is written) (step 5-20), and the LED 17 is turned on (step 5-23).

When it is detected that there is no sync signal in step 5-30, it is judged whether it is the frame or field mode by turning on and off the LED 8 as in step 5-18, and if it is the field mode, it corresponds to the state of the field designated switch 43. Field information is erased from the frame memory, and in frame mode, the entire frame memory is erased.

Therefore, for example, when an external input such as NTSC is selected and the external input is not connected, the memory is erased and the video signal previously written in the frame memory is erased.

Furthermore, in step 5-21, the frame field setting switch 2
It is checked whether or not 8 is pressed, and if it is pressed, the state of the field frame display LED L8 is reversed (steps 5-22).

FIG. 6 is a detailed flow chart of the reproduction routine. When the memory lock button is pressed (step6−
1) Depending on the current memory lock flag status (step
6-2), it is changed to the opposite value (step6-3,6
-4).

Next, there is an input of a track feed button (Up and Down) (step 6-5). If it is Up, it branches to step 6-6, and if it is Down, it branches to step 6-8 (step 6-5). step6−
In No. 6, if the currently accessed track position of the head 5 is less than the 50th track, the head is fed in the direction in which the track number increases (inner circumferential direction) (steps 6-7), and ste
In p6-8, if the track position is larger than 1, head feed is performed in the direction (outer peripheral direction) in which the track number decreases (step 6-9). 7 segments in steps 6-7 and 6-9
LED5 shows the current track number.

When the head feeding is completed, the monitor 3 is switched to the SV reproducing side as in step 5-9 (step 6-10). If the memory lock flag MLF is 0 (step 6-11), it is judged whether the output of the level detection circuit 8 is above a predetermined level (step 6-12). If it is below a predetermined level, the memory 213, 21
Erase 4,215,250 with black level (step6-2
Five).

At this time, if necessary, set the playback head that is in contact with the magnetic sheet to the non-contact state and set the playback signal system to OFF.
You may take measures such as F.

When the output of the level detection circuit 208 is equal to or higher than a predetermined level in step 6-12, the ID signal frequency-multiplexed with the video signal is demodulated by the ID detection circuit 251 to reproduce the ID data (step 6-
13). Based on this ID data, it is checked whether the reproduced video signal has an odd or even field of the frame image (step 6-1
4) If it is a field image, the reproduction signal is a field specified by the switch 43 of the R, G, B frame memory, for example, if field 1 is specified, an odd line, field 2
If is specified, write to even lines (steps 6-18). s
If it is determined in tep6-14 that one field of the frame image is present, the head shift is performed to the inner side of one track if the first field, and to the outer side of one track if the second field is set (step 6-15). The reason why such head shift is necessary is
This is because the reproduction head is single in the present embodiment and can be frozen only by one track unit. If the apparatus has a multi-head (in-line head), such head shift is not always necessary. Further, when performing frame recording, the odd field is recorded on the smaller track number and the even field is recorded on the larger adjacent track number. When the head shift in step 6-15 is completed, the level detection circuit
The 208 output is detected (step 6-16), and if it is above a certain level, the ID data is reproduced (step 6-19) and it is determined whether it is the other field signal paired with the field signal reproduced in step 6-15. If it is checked (step 6-20), if so, the video signal reproduced by the head 205 is frozen to the address corresponding to the field, the head is returned to the first track, and then the field is frozen again ( step6-21).

If only one field of the video signals forming the frame is recorded in step 6-10 and step 6-20, the playback head is returned to the first track and then (step 6-1
7) Obtain the other field in the unfrozen area of the frame memory from the average value interpolation of the upper and lower lines and freeze the information obtained by the interpolation (step 6-1
8) Frame data (step 6-22). By doing so, it is possible to obtain a frame image having a higher image quality compared to the framing when the input in step 6-20 in FIG. 5 is the SV reproduction image.

In this way, after performing freeze according to the frame mode and field mode of the reproduced video signal, the switch is switched so as to supply the memory reproduced signal to the monitor. Specifically, the same operation as step 5-10 is performed (step 6-23). Further, in step 6-24, the frame and field of the reproduced image are displayed using the LEDL8 based on the reproduction ID data. At this time, as described above, if the frozen video signal is a frame video signal, LEDL8 is turned on, and if it is a field, it is turned off.

Next, the recording routine shown in step 4-5 shown in FIG. 4 will be described with reference to FIG.

FIG. 7 is a flow chart of the recording routine. When it is detected that the switch SW-1 is connected to the B side in step 4-3 of FIG. 4 described above, that is, the switch
When it is detected that 11, 12 are turned on, the flow proceeds to the routine.

First, in step 7-1, the presence or absence of unrecorded tracks on the magnetic sheet 1 is detected. If there are no unrecorded tracks, the 7-segment LED 5 is turned on. Is displayed, a warning is displayed (step7-7), and if there is an unrecorded track, LEDL18 is set in step7-2.
Is turned on (step 7-3), and the recordable state is displayed. In this step, SW1 is once switched to the A side.

When the recording switch 9 is pressed with the LEDL18 turned on (step7-4), the magnetic sheet 201 is subjected to steps 5-10 and 5-11.
If the memory other than the video floppy set in step 4 or the NTSC external source is recorded (step 7-5) and there are no other unrecorded tracks (step 7-6), further recording is impossible. Therefore, the warning display as described above indicating the disk FULL is displayed (step 7-7). If an unrecorded track still remains, the head is automatically accessed to the next unrecorded track (steps 7-8).

Next, the transmission routine shown in step 4-7 of FIG. 4 will be described with reference to FIG. FIG. 8 is a specific flow chart of the transmission operation routine. In the present embodiment, it is possible to use the interrupt operation for transmission / reception to perform track feeding even during transmission / reception so that a reproduced image from the magnetic sheet can be viewed.

First, in step 8-0, LED L14 is turned on and L15 is turned off, and the transmission mode is displayed.

In step8-1, determine whether it is the automatic transmission mode,
In manual mode, LEDL17 goes out at step 8-2 ',
In the auto transmission mode, it branches so that LEDL17 lights up in step 8-7 '.

First, the manual mode will be described. When the start switch 32 is pressed (step 8-2), the memory lock flag MLF is set (step 8-3) in order to prevent the replay auto freeze from rewriting the frozen still image information and rewriting. Then, the address (X, Y) of the transmission data is reset to (0,0) (step8-4), and the flag TXFLG indicating that transmission is in progress is set (step8).
-5). Then, the interrupt mask is reset to 0 so that an interrupt generated at each data interval of transmission and reception described later can be accepted. By this operation, transmission is started by the next output of the interrupt counter 253. Further, the variable j representing the color of the transmission mode determined according to the transmission mode number is reset to the first 0 (step 8-6 ').

On the other hand, in the automatic transmission mode, the state of the flag ATXFLG indicating whether or not automatic transmission is possible is checked in step 8-7, and if it is set, the flow proceeds. The ATXFLG flag is set to 1 by setting the track NO to be transmitted prior to the transmission with the track NO setting circuit 255 in FIG. 1-2, and when it is 0, automatic transmission is not accepted and step8- Track N shown in 24 (details shown in Fig. 11)
O Go to the setting routine.

Next, the track NO setting routine executed in step 8-24 will be described with reference to FIG. Fig. 11 shows track NO
It is a flow chart of a setting routine.

When the setting switch 260 is pressed once on the side of the track NO setting circuit 255 which is a remote controller (step 11-1), the setting image number i is cleared to 0 and the same state as when the VF selection switch 10 is turned on, that is, the reproduction mode is set. Set. The monitor mode number also becomes 0 (step 11-2). Next, it is detected whether or not the track UP switch 263 of the remote controller 255 has been pressed (step 11-3), and if detected, the head is sent one track in the inner peripheral direction (step 11-4). Subsequently, in step 11-5, it is detected whether or not the track down switch 264 on the remote control side has been pressed, and if detected, the head 5 is forwarded by one track in the outer peripheral direction (step 11-6).

The UP switch 263 and the DOWN switch 264 may be input by the UP switch 19 and the DOWN switch 20 on the main body side.

Next, it is checked whether the decision switch 261 for inputting the track NO to be transmitted on the remote controller side has been pressed (step1
1-7), i is incremented when pressed (step 11-
8) The track number currently accessed by the head 205 is stored as Tr (i) in the main memory (step 11-
9).

Finally, step 11-3 until the end switch 262 for ending the track number input on the remote control side is turned on.
~ It goes through the loop of step11-9 and the input setting of the track number is not completed (step11-10).

When the end switch 262 is turned on, the value of i is input to the register N (step 11-15), and i is substituted for the number N of still images to be automatically transmitted (step 11-15). It is checked whether i is 0 (step 11-11). If it is 0, the track number has not been set. Therefore, ATXFLG is reset to 0 so that automatic transmission setting is not performed (step 11-12). Also,
If i is not 0, one or more track numbers are set, so ATXFLG is set to 1 so that automatic transmission is possible (step 11-13) and i = 1 is set (step 11- 14).

When the track to be automatically transmitted is programmed as described above, the flow advances to step 8-22 shown in FIG. 8 and the flow described later is executed.

If the ATXFLG is set, go to step8-
In 8, it is checked whether or not the flag TXFLG indicating that the transmission is in progress is 1, and if the transmission is in progress (TXFLG = 1), the following flow is omitted, and if not in progress, whether the start switch 22 is turned on or not. (Step 8-9). If the start switch 32 is pressed, the memory lock flag MLF is set, the automatic freeze operation is prohibited, and the transmission data is prevented from being inadvertently rewritten (steps 8-10).

On the other hand, when the start switch 32 is not turned on, it is detected whether or not the variable i is "1", and when it is "1",
If the flow proceeds to step8-22 and it is not "1", STEP8-13
The flow proceeds to.

If i is larger than N, that is, if it is incremented when it is detected that the video signal for one image has already been transmitted in the interrupt routine to be described later (see step 10-54 described later), from step 8-11. The flow branches to steps 8-13. At step 8-13, it is determined whether or not the variable i is larger than the number set in the register N, that is, whether or not the video signals for the number of images set in the track NO setting routine step 8-24 have already been transmitted. If it is already transmitted, the flow branches to step 8-20, and if it is still being transmitted, the flow branches to step 8-14.

At step 8-20, ATX is set so that automatic transmission is not set.
FLG is reset to "0" (step 8-20), memory lock flag MLF is also reset to "0", and the transmission state is released.
In this case, the flag TXFLG indicating transmission is also reset to "0".

If it is determined in step 8-13 that transmission is still in progress, TXFLG is set to "1" (step 8-14), and the track corresponding to the value stored in the track NO setting routine is stored according to the value of the variable i. NO Tr (i) is read and it is determined whether or not the head is presently present on the track Tr (i) (step 8-15). If it does not exist, the head is accessed up to Tr (i) (step 8-16), and the reproduced video signal is frozen in the memory (step 8-17). Then, (X, Y) is reset to (0,0) as in the case of manual transmission (step8-18), and the interrupt mask IRQMSK is set to 0.
Then, the interrupt is ready to be accepted, and the interrupt routine shown in FIG. 10 is executed (steps 8-19). Further, as in step 8-6 ', j is reset (step 8-19').

When the above transmission routine is finished, the following steps are performed to blink the display LED described in FIG. 1-1 according to the transmission color.

In step 8-22, it is checked whether the TXFLG is set or not. If it is set, the LED (transmission mode number, j) corresponding to the color currently being transmitted is controlled to blink (step 8-23).

The blinking LEDs corresponding to the transmission mode number and j are as follows.

(Transmission mode number, j) Flashing LED (O (monochrome), 0) L4 (Y) (1 (2 colors), 0) L1 (G) (1, 1) L2 (R / B) (2, 0) L1 (R) (2,1) L2 (G) (2,2) L3 (B) (3,0) L1 (R) (3,1) L2 (G) (3,2) L3 (B) ( 3, 3) L4 (Bk) In the case of single color transmission mode, the LED corresponding to the switch code SC blinks.

However, even if these LEDs blink, step 5 in Fig. 5
Lighting LEDs other than the above blinking LEDs selected in -7 shall maintain their lighting operation so that the progress of transmission can be understood.

Next, the reception routine will be described with reference to FIG. step9
With -1, automatic reception mode setting switch 8 determines whether the automatic reception mode is set or not.
Branch to tep9-14 or lower.

When the automatic reception mode is not set in switch 8 and the manual reception mode is set, when the reception start button is pressed in step 9-2, the synchronization part (step 9-3) and white part (step 9-4) are detected subsequently. , The white part is detected and the gain is adjusted at the same time (step 9-5). Then ID
Read the data section to capture the data (step9-
6). In steps 9-3 and 9-4, if the white part or the sync part is not detected even after the lapse of a predetermined time, st
Move to ep9-39. When a blank area is detected (step9
-7) Set the memory lock flag MLF to prohibit memory freeze during video floppy playback (step9
-8), data address (X, Y) is initialized to (0,7) (step 9-9). This corresponds to that the video portion starts from Y address 7 as shown in FIG. Then, the receiving flag RXFLG is set (step 9-10), the interrupt counter is reset (step 9-11), and the interrupt mask IRQMSK is reset (step 9-12). By this operation, the video data inputted from the transmission line can be sequentially fetched from the next interrupt. Further, a variable j representing the color of the transmission color mode is set to j of the first color.
Reset to = 0 (step 13).

Next, the flow in the automatic reception mode after step 9-14 will be described. When performing automatic reception, it is first determined whether or not there is a recordable empty track on the magnetic disk (step 9-14), and if there is not, it is displayed on the display unit 5 as described above. Is displayed (step 9-36) and the automatic reception flow is not performed. If there is an empty track, it is judged whether or not there is a head on the first unrecorded track at present (step 9-15), and if it does not exist, the head is accessed to that position to prepare for recording (step 9- 16). When this is finished, the number of automatically received and recordable sheets (remaining number of tracks) is displayed on the 7-segment LED 5 (step 9-17).

Next, it is checked whether the receiving operation is currently in progress, and the receiving flag RXFL
If G is 0, that is, if it is in the non-reception state, the process jumps to step 9-3 to detect the above-mentioned synchronizing part. Here, if the synchronization part does not appear even after a certain period of time, the algorithm ends the routine.

If the receiving state is in step 9-18, the above-mentioned step 9-6
Since the reading of the data portion (the electric transmission data and the ID data) has been completed at step, steps 9-20 are executed next.

If the reading of the data section (see FIG. 2) obtained upon reception is completed and the data indicates the frame transmission mode (step 9-20), in order to record the received video signal on the magnetic sheet 201, An empty track for two fields, that is, two tracks is required. Therefore, in step 9-21, it is judged whether or not there are two or more empty tracks. If it is determined in steps 9-20 and 9-21 that they are in the field transmission mode, respectively, and that there are two or more empty tracks, step 9-2 to be described later.
7 Move to the following routines.

This determination is possible because the data shown in the field transmission mode or the frame transmission mode is sent prior to the video signal as shown in FIG.

When the flow proceeds to step 9-21, there are no unrecorded tracks of two or more tracks (that is, when only one track exists, it is detected in step 9-14 that there are already empty tracks. Therefore, in this case, only one track exists.) In this case, since the reception mode is frame, the number of tracks for frame recording becomes insufficient. Therefore, in the present embodiment, the video signal reproduced from the magnetic sheet 201 on the transmitting side by detecting the bit 8 of the ID data transmitted in the data section (see FIG. 2) obtained upon reception in step 9-22 is It is judged whether it is a video signal obtained by field recording or a video signal obtained by frame recording, and if it is a video signal obtained by frame recording, the flow advances to step 9-36 to warn that recording is not possible. Is performed. When the video signal obtained by field recording is converted into a frame signal by the interpolation operation (see step 6-22 in Fig. 6) on the transmission side, the frame transmitted in one track after the reception is completed. The sequence is such that the video signal is recorded as a field video signal.

Such a sequence is possible because the ID data is transmitted prior to the video signal as described above. Therefore, the effect of transmitting the ID data prior to the video signal is very large.

 Step 9-22 The above flow will be described below.

In step 9-22, see the ID data bit 8 as described above,
If it is a video signal obtained by frame recording, a warning is given in advance (step 9-36). Since the receiving operation is continued due to the interrupt even during this period, the jacket having the magnetic sheet having two or more unrecorded tracks may be exchanged after the reception is completed and before the next reception is received.

If it is judged in step 9-22 that the image signal is obtained by field recording, the line currently being received is larger than j = “transmission mode number”, that is, the YC line of the last received 1-frame data. Judge whether or not (step9-2
3). Here, YC may be a value that allows the rotation of the magnetic sheet 201 to be started by the time the reception of the final line YE is completed and that the time required for the rotation control by the motor drive circuit to be stable is sufficient. When this condition is satisfied in step 9-23, the magnetic sheet 201 is rotated (step 9-24), and when the reception is completed (step 9-25), one field in one frame, that is, an image is recorded from the memories 213, 214, 215. 1 when reading
Reading is performed every line and recording is performed for one track (step 9-26). Then, the flow moves to step 9-32 described later. Note that the completion of reception may be determined by detecting the state of IRQMSK that controls whether or not to accept an interrupt, or by detecting that all the memories that are receiving have been recorded.

On the other hand, regardless of whether the received signal is a field-transmitted signal or a frame-transmitted signal, if there are two or more unrecorded tracks, the flow branches to step 9-27 and the ste
Perform the same sequence as p9-23 to 9-25 in steps 9-27 to 9-2
Do at 9.

Next to step 9-29, depending on whether the reception mode is field transmission or frame transmission, step 9-31, 9-32 or step 9-33, 9-34
Branch to (step 9-30). In the field transmission mode, the lines are read from the memories 213 to 215, 256 after completion of reception one line at a time. The processed signal is written in advance.) Recording is performed for one track (step 9-31). The ID signal received at this time may be frequency-multiplexed again and added to the video signal and recorded.

When recording is completed, the number of empty tracks is decremented by 1 along with the branch from step 9-26, and the number of tracks is displayed on the LED 5 shown in FIG. 1-1 (step 9-32).

On the other hand, when received in the frame transmission mode, each field is recorded in a separate track (step 9-3).
3). In this embodiment, since the head 5 is single, step 9-33
In the first track, the first field is read and recorded from the memories 213 to 215, 256, and then the head 5 is accessed to another unrecorded track to read and record the second field. In the case of a device with an inline head, 2 fields are stored continuously.
It is possible to read from 213 to 215, 256 and record without moving the head.

When recording is completed, subtract 2 from the number of unrecorded tracks (step
9-34), the rotation of the magnetic sheet is stopped (step 9-35).
This reduces wear on the head and magnetic sheets,
This is to save power. Then RX is completed and RX is completed
Reset FLG (step 9-37). Then, it is checked whether the number of remaining tracks that can be recorded is zero (step 9-38),
If it is zero, further automatic reception recording is impossible, so the flow moves to step 9-36 to issue a warning.

Incidentally, when reception of one video signal is completed by resetting RXFLG in step 9-37, RXFLG is once reset to reset the above-mentioned steps 9-1 to 9-18.
When executing, the flow branches from step 9-18 to step 9-3, and the operations after step 9-3 described above are executed. Therefore, from step 9-3 to step 9-39 until the synchronization part is detected.
The flow is jumped.

When the above routine for reception is finished, the following steps are performed to blink the display-like LED described in FIG. 1-1 according to the reception state.

In step 9-39, it is judged whether the receiving flag RXFLG is set or not, and if it is set, the LED (transmission mode number, j) corresponding to the color currently being received is controlled to blink (s
tep9-40). The LED corresponding to the transmission mode number and j may be the same as described in step 8-23 in FIG.

Also, as in the case of transmission, even if these LEDs blink, the transmission mode selected in step 5-7 in Fig. 5 (monochrome or single color transmission mode, two-color transmission mode, three-color transmission mode, four-color transmission mode). The lit LED indicating) and other lit LEDs corresponding to the color to be received shall maintain their lit operation.

Therefore, for example, when the three-color transfer mode is set as the transfer mode, the LED L10 lights up and the R memory 21
LEDL1 blinks while receiving a signal to write to 3 LE
DL2, L3 lights up, then LEDL2 blinks while receiving the signal to be written to the G memory. LEDL1, L3 lights up,
LEDL while receiving the signal to be written to the B memory
3 blinks LEDs L1 and L2 light up. Therefore, the reception state can be displayed in a manner that is easy for the user to understand.

Next, an interrupt routine for transmitting and receiving video signal data will be described with reference to FIG. st
In ep10-1, check whether the stop switch 33 for stopping transmission / reception is turned on or not. If there is a stop input, transmitting or receiving is canceled, so RXFLG or TXFLG
Is reset (step 10-2). Then, IRQMSK is set to disable the interrupt (step 10-3), and the MLF is reset to release the memory lock (step 10-).
4). If no stop input is made in step 10-1, the interrupt branches to step 10-6 or lower or step 10-38 or lower depending on the transmission mode or the reception mode (step 10-5).

TXFLG = 1, that is, in the transmission mode, the number of vertical lines Y is checked in step 10-6, and if this is 0 or more and 2 or less, that is, the synchronizing part (see FIG. 2), further in step 10-7 or less, depending on the horizontal address X To create a synchronization pattern. If X is 0 or more and 4 or less, it corresponds to the high level part of the synchronizing part, so the output data D (X, Y) is "FF" (8 bits, maximum level 255).
(Step 10-8), otherwise, set D (X, Y) to “0”.
Set to 0 "(minimum level 0) (step 10-9).

If Y is 3 or more and 4 or less, it corresponds to the white level part, so all the data D (X, Y) are set to "FF" (step 10-
10,11).

If Y is 5, it is the data part, so that the transmission data D (X, Y) corresponding to the horizontal address X is determined according to the transmission mode (see steps 10-12 and 13 in FIG. 2).

If Y is 6, it is a blank part, so all D (X, Y) are set to "00" (steps 10-14, 15).

The data D (X, X) of each address (X, Y) thus obtained
Memory controller 2 to output Y) to D / A converter 226
23 is operated (step 10-20). X when outputting data
The address is incremented by 1 (step 10-21), and when Y is 7 or more, this corresponds to the image part, so step 10-16
According to the following flow, the number of vertical lines Y is discriminated according to the variable j representing the color of each transmission mode number, and the data D (X, Y) of the video signal to be output is determined.

Before shifting to the judgment of step 10-16, the electric transmission field in the field mode is the field selection switch 43.
The following flow is performed so that it is selected depending on the state.

If the switch 43 is set to the second field, it is judged whether Y is an even number in step 10-60 because the data to be transmitted is a signal written in all even lines in the line Y of the memory. If is an odd number, this is incremented by 1, and thereafter, all even numbers are selected in step 10-27 described later (step 10-61). When the first field is selected in step 10-59, the flow starts at Y = 7 (odd number) in this step, and therefore the step shown in step 10-27 is considered and the electric power is transmitted. Data to be read in step 10 of odd line in line Y of memory
Skip -61 and skip to the next step.

When the transmission mode number is "1" or "2" in step 10-16,
That is, in the two-color mode or the three-color mode, the frame memory used for reading data is defined as follows.

(Transmission mode number, j, vertical line Y) Selected memory (1, 0, all lines) G (1, 1, odd number) R (1, 1, even number) B (2, 0, all lines) R ( 2, 1, all lines) G (2, 2, all lines) B In step 10-17, the transmission data (X, Y) is read from the frame memory for each color in accordance with this.

Next, in step 10-16, if the transmission mode number is judged to be "3", that is, the four-color mode, the transmission data is under-color-removed R,
The G, B data and the black data Gk are formed, and the data is formed by the following calculation (step 10-19).

When j = 0, D (X, Y) = R (X, Y) -Bk (X, Y) When j = 1, D (X, Y) = G (X, Y) -Bk (X, Y) When j = 2, D (X, Y) = B (X, Y) −Bk (X, Y) When j = 3, D (X, Y) = Bk (X, Y) where Bk = (X, Y) Y) = k × min (R (X, Y), G (X, Y), B (X,
Y)) k: If a predetermined coefficient, is set to the MONITOR side, go to the routine from step 5-13. Step5-13, same as described in step5-6, 5-7
Every time the color mode switch 37 is turned on in 5-14, the monitor mode number is incremented by 1 in the calculation of the module 6, and the color displayed on the monitor 3 is determined according to the monitor mode number.
Lighting of SW5 and LEDs L1 to L4, L19 is controlled according to the mode (steps 5-15). The control sequence for each mode is set as shown in the table below.

Here, the monochrome monitor mode, that is, each of the memories 213 to 215 and 25
When the content of one memory of 0 is reproduced on the monitor 230, the output of the selected memory is output to the D / A converters 216 to 218 so that the output of each memory is displayed on the monitor 3 as a luminance signal, that is, a monochrome signal. Can be played.

In this embodiment, the monitor mode selection is switched.
Although the operation is performed by the operation of 37, the states of the switches 24-27 may be discriminated and the respective modes may be selected.

Next, if the memory lock flag is 0 (step5
-16) It is detected whether or not the input of the freeze switch 37 is made (step 5-17), and it is further detected from the output of the sync signal detection circuit 270 whether or not the sync signal is added to the signal to be frozen, and this is detected. And freeze operation of steps 5-18 and below. In step 5-18, it is judged whether the frame or the field mode is selected depending on the ON / OFF state of the LED8. In the field mode, the memory corresponding to the state of the field designated switch 43 is set (in the field 1, the frame min represents the smallest of the three). .

In step 10-16, the transmission mode number is "0", that is, monochrome or
If it is determined that the mode is the monochromatic mode and the monochromatic transmission mode flag MCLFLG is not set in step 5-27 shown in FIG. 5 and the monochromatic transmission mode is not set, only the luminance signal Y is transmitted as the transmission data. To obtain the data, from the data read from the frame memory of each color, D (X, Y) = 0.59 = G (X, Y) + 0.30 × R (X, Y) + 0.11 × B (X, Y ) Is calculated (step 10-18). R (X, Y), G (X, Y), B
(X, Y) is the data of the addresses (X, Y) of the memories 213 to 215, respectively. If MCLFLG is set, step
Data D (X, Y) of the video signal to be transmitted is set as follows by the switch code set in 5-28, the transmission mode number and the vertical line Y when the switch code is set.

The above-mentioned under color removal (UCR) operation may be performed during transmission. When the data D (X, Y) is set in this way, Y>
In the 6th video period, if X = 0 in steps 10-55 and 56 described later, the operation of rewriting the data D (X, Y) to "FF", that is, the white peak level is performed. This is in the screen,
This is because if there is a wide black portion, there will be no signal over many lines, and there is a possibility that the receiving side may erroneously judge that this is transmission stop. Therefore, this can be prevented by generating at least one data white signal for each line.

Data D at each address (X, Y) thus obtained
The (X, Y) is output to the D / A converter 226 (step 10-20). When the data is output, the address of X is incremented by 1 (step10-21), and when it becomes larger than the final address XE, X is reset (step10-22, step10-2).
3). When the horizontal address X is reset, the next vertical line number Y is incremented, but when Y is 6 or less, that is, when it is a non-image portion such as a synchronizing portion, it is incremented by 1 in step 10-26 and Y is larger than 6, that is, In the case of the video section, it is detected whether the transmission mode is the frame mode (step 10-2
5) As a result, since all the vertical lines are transmitted in the frame mode, Y is incremented by 1 in step 10-26, and in the field mode, the vertical lines are scattered every line and transmitted in step 10- At 27, increment Y by 2.

When the value of Y is increased in this way, in step 10-28, it is checked whether or not the value is larger than the final line YE of Y (step
10-28), the transmission for one color is completed when the value becomes large, so j is incremented by 1 (step 10-29). As a result, if the variable j is smaller than the value of the transmission mode number (step10
-30), and subsequently, Y is reset to 0 to move to the transmission of the next color signal (step 10-31). If the variable j is not smaller than the transmission mode number, it is judged whether ATXFLG is "1" (step 10-54), and if it is "1", i is incremented (step 10-54).

Then reset TXFLG (step 10-32), reset MLF to release the memory lock (step 10-33),
Set IRQMSK to disable interrupts (step
10-34).

Next, the interrupt process in RXFLG = 1, that is, the reception mode will be described.

As described with reference to FIG. 9, step 9 at the time of reception
−2 to step9−7 are executed and the blank area shown in FIG. 2 is detected, then in step 9−9, the memory address (X, Y) is initialized to (0,7), and the receiving flag RXFL.
G is set (steps 9-10) and the interrupt mask flag IRQMSK is reset (steps 9-12).

Only in this state, the interrupt process in the reception mode becomes possible. That is, the receiving flag RXFLG is 1
Since it has been set to step 10, the flow is st
Branch to ep10-38. In step 10-38, A / D converter 2
Read the data from 24 and write the data to the memory specified by (Transmission mode number, j, y) (step10-3
9). Incidentally, Y = 7 at the time of initial setting.

Next, bit 3 of the received transmission data is "0".
Or "1", that is, normal color transmission mode (monochrome, 2
Color, 3 colors, 4 colors) or single color transmission mode (R, G, B, Bk, etc.)
Check the value of the flag that indicates whether step10-39 or step10
Branch to -60 (step 10-59). In step 10-39, the frame memory is selected to be stored as follows according to the transmission mode number, the variable j, and Y.

If bit 3 is "1", that is, monochromatic transmission mode,
The received data D (X, Y) is written in the frame memory corresponding to these by the transmission data number, switch code and vertical line Y in the transmission data (step 10-6).
0).

 The correspondence is as shown below.

As described above, the memory to write data is selected,
Then, when 1 data is taken into such a memory, X is incremented (step 10-40), and when the result becomes larger than the final address XE (step 10-41), X is reset to 0 (step 10-42) and step 10- Increment Y according to the same idea as -24 to 27 (steps 10-43 to 4)
6). When the result is larger than the end address YE (s
tep10-47), to increase to the next color, increase j by 1 (ste
If the value of j is smaller than the value of the transmission mode number (step 10-49), Y is reset to 0 (step 10-48).
10-50), and when it becomes large, it means that the reception has ended, so the MLF is reset to release the memory lock (step10
-51), IRQMSK is set to prohibit interrupt (step 10-52). It should be noted that it is not necessary to reset the MLF so that the memory lock is not released even after the reception is completed by omitting step 10-51.

Here, especially in the two-color mode, the R signal and the B signal are stored in the R memory 213 and the B memory 215, respectively, in a line-sequential manner. Therefore, when recording the received signal on the magnetic sheet 1, the memories 213 and 215 are directly stored. Since the luminance signal of the color difference matrix circuit 219 cannot be encoded only by reading, the line having no data must be interpolated by using the lines before and after. Such operation is performed in real time in the memory controller 223 in parallel with reception.

In the above embodiments, analog transmission was considered, but it is needless to say that digital transmission may be used without being limited to this.

Further, in the present embodiment, the case where the number of the jackets is set to 1 is considered, but the number is not limited to this, and in consideration of an automatic chainer that can appropriately replace a plurality of jackets, the number of automatically received and automatically recordable sheets is increased. You can

Further, in the present embodiment, the modes for freezing the frame memory are set to the field and the frame mode, respectively, depending on whether the reproduction ID signal is the field or the frame. However, it is possible to freeze the frame mode image to the field mode. A switch may be provided.

Further, in the present embodiment, the system having a single field head was considered, but it is needless to say that the same effect can be obtained by a system having an in-line type frame-compatible head.

Although the magnetic recording medium is used as the recording medium in the above embodiments, another recording medium, for example, a rewritable optical recording medium may be used.

In the present embodiment described above, the synchronization signal detection circuit 270 is provided as a means for detecting the presence or absence of the synchronization signal of the video signal, and when the absence of the synchronization signal is detected by the means, the storage means (frame of the present embodiment As a means for erasing at least a part of the memory (corresponding to the memory), the control circuit 100 for executing steps 5-30 to 5-33 shown in FIG.

The storage means of this embodiment is not limited to the frame memory of the embodiment, but may be another solid-state memory or a medium such as a magnetic sheet or an optical disk. If there is no sync signal, the area for storing the video signal in the storage means (the odd line of the frame memory in the field mode, the entire frame memory in the frame mode) is erased. The previously stored video signal does not remain in the area.

In the present embodiment, the erased area is left as it is, but other information, for example, characters such as “no information” or “cable is not connected” or other colors may be written and stored. Needless to say, the present invention is included as long as at least a part of the means is deleted.

<Effects of the Invention> As described above, according to the present invention, based on the synchronization signal that defines the synchronization when the information signal is stored in the storage means,
A storage device for storing the information signal in the storage means,
A means for detecting the presence or absence of the synchronization signal; and a means for erasing at least a part of the stored contents stored in the storage means when the absence of the synchronization signal is detected by the detecting means. Therefore, if there is no synchronization signal, that is, if the storage unit cannot store the data, at least a part of the stored contents stored in the storage unit will be erased. Can be recognized by the user, and the user-friendliness can be achieved without the user erroneously recognizing.

[Brief description of drawings]

FIG. 1-1 is a front view of an apparatus according to an embodiment of the present invention, FIG. 1-2 is a block diagram showing the configuration of the apparatus shown in FIG. 1-1, and FIG. A time chart showing data transmitted by the apparatus, FIG. 3 is a diagram showing respective addresses of the memories 213 to 215 and 250 of FIG. 1-1, and FIGS. 4 to 11 are shown in FIG. 1-1. 3 is a flowchart illustrating the operation of the control circuit 100. 100: control circuit, 201: magnetic sheet, 205: head, 235: display circuit

Front page continuation (72) Inventor Kunio Tsuruno 770 Shimonoge, Takatsu-ku, Kawasaki-shi, Kanagawa Canon Inc., Tamagawa Plant (72) Inventor Yasutomo Suzuki, 770 Shimonoge, Takatsu-ku, Kawasaki-shi, Kanagawa Canon Inc. Tamagawa Plant (56) References JP-A-61-255158 (JP, A) SAI-51-13312 (JP, U)

Claims (4)

[Claims] 1. A storage device for storing the information signal in the storage means on the basis of the synchronization signal that defines synchronization when the information signal is stored in the storage means, the presence or absence of the synchronization signal being detected. A storage device comprising: a means and a means for erasing at least a part of the storage contents stored in the storage means when the absence of a synchronization signal is detected by the detecting means. 2. The information signal is a video signal, and the detecting means is means for detecting the presence or absence of a vertical or horizontal synchronizing signal of the video signal. Storage device. 3. The storage content is video information, and at least a part of the storage content erased by the erasing means is field information of the video information. The storage device according to item 1. 4. The storage content is video information, and at least a part of the storage content erased by the erasing means is frame information of the video information. The storage device according to item 1.