JPH0816505A - Channel processor - Google Patents

Abstract

(57) [Summary] [Purpose] Even if a failure occurs, the logical channel number corresponding to the physical channel path can be dynamically assigned to another physical channel path. [Structure] The input / output processing device 6 is a channel processing device 60.
And a channel device 70 to 7 m, which is connected to the channel device through the switching mechanism 8 or
The input / output devices 90 to 92 are directly connected. Further, in the main memory device 3, information on the correspondence between the physical channel number and the logical channel number, which are the two channel path numbers assigned to the channel device group, the information on each logical channel number, and the logical channel The input / output information and the like assigned to the numbers are defined, and the channel processor 60
Can be updated and referred to. Then, when the physical channel path becomes unusable due to a failure or the like, the channel processing device dynamically assigns the logical channel number associated with the physical channel path to another physical channel path. assign.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a channel processing device, and more particularly to a channel processing device of an information processing system having a channel device group, an input / output device group, and a switching mechanism for connecting these to each other.

[0002]

2. Description of the Related Art Generally, an input / output device connected to an information processing device is assigned to a logical channel, but normally the maximum value of the input / output devices assigned to one logical channel number is predetermined. .

For example, "Input / Output Configuration P
rogram User's Guide and ESCON Channel-to-Channel R
IBM Enterprise shown in eference (GC38-0097-05)
System Architecture / 390 ESCON I / O Interface (SA22-
7202) ”, a channel path that supports an I / O interface (in the document, Connection Cha
It is said that a maximum of 1024 I / O devices can be assigned to each logical channel number.

However, in actual use, a maximum of 1024 I / O devices are rarely assigned to all logical channel numbers, and usually few logical I / O devices are assigned to some logical channel numbers. Not not. Generally, the physical channel number and the logical channel number are in one-to-one correspondence, so that one physical channel has a channel path function of 102 per physical channel number.
It is possible to handle up to four input / output devices.

For this reason, a general information processing system may use only about 10% of the channel path function per physical channel number. In this way, for a physical channel that has a channel number assigned to a logical channel that has a small number of I / O devices defined, another logical channel that also has a defined small number of I / O devices is assigned. In that case, the physical channel can hold information about all the input / output devices assigned to the plurality of logical channels in the channel path indicated by the physical channel number. That is, if the number of input / output devices assigned to one logical channel number is small, a plurality of logical channel numbers can be assigned to one physical channel number.

As a conventional technique that enables such a thing, for example, "IBM System / 360 and Syste
m / 370 I / O Interface Channel to Control Unit Origin
al Equipment Manufactures Information (GA22-6974) ''
There are known techniques for the I / O interface described in.

In the channel path supporting the I / O interface according to this conventional technique, if a new logical channel number is assigned to a physical channel number to which another logical channel number is already assigned as described above, All I / O devices for all logical channel numbers assigned to a physical channel number must be connected to the channel path of that physical channel.

That is, in the above-mentioned conventional technique, the input / output device group assigned to each of the plurality of logical channel numbers is connected to the channel path corresponding to the logical channel number by a single path. . In the above-mentioned conventional technique, when trying to assign such a plurality of logical channel numbers to one physical channel number, a plurality of logical channel number groups must be put together into one channel path and the cable connection must be changed. It does not happen. If this connection is not changed, the input / output device connected to the physical channel number that is not associated with the logical channel number will be in a state of not being connected to any logical channel number.

However, there is known a technique in which it is possible to combine a plurality of logical channel number groups into one channel path without the need to change the cable connection as described above. This prior art is known as "IBM Enterprise System
stem Architecture / 390 ESCON I / O Interface (SA22-720
This is a technology related to the I / O interface described in "2)".

This conventional I / O interface has a switching mechanism (called a director in the document) for dynamically selecting a route between a channel path and an input / output device. By using
There is a possibility that a plurality of logical channel number groups can be combined into one channel path without changing the cable connection. In this conventional technique, when there is no switching mechanism, all the input / output devices related to all the logical channel numbers assigned to the physical channel numbers are arranged on one channel path in the same way as the channel path described in GA22-6974 described above. Need to be connected to.

However, according to this conventional technique, when a switching mechanism is provided, if all the input / output devices assigned to the added logical channel number are already connected to this switching mechanism, the connection of the cable should be changed. You can eliminate the need to do it. This is because it is possible to dynamically connect from the channel path of the physical channel number to which the logical channel number is added to the input / output device assigned to the added logical channel number via the switching mechanism.

At present, the ESCON director of IBM Corp. is known as a conventional technique relating to a switching mechanism. Since only a maximum of 60 devices (channel control devices, input / output devices, etc.) can be connected to this ESCON director, all channel paths (channel control devices) of the computer system and one input / output device are connected to one. It is difficult to connect to the switching mechanism.

However, considering the easiness of changing the connection of the input / output configuration, a switching mechanism that enables more devices to be connected will be constructed in the future.

[0014]

The prior art having the above-mentioned switching mechanism has a failure of one physical channel path (identified by a physical channel number), or
There is no consideration for associating the logical channel number corresponding to the physical channel path with another physical channel path while holding the logical channel number when the physical channel path cannot be used due to some circumstances. Have a point.

Therefore, in the above-mentioned conventional technique, when the operating system cannot continue the process while recognizing the logical channel number newly associated with another physical channel path as the operable state. Results in
In addition, when a storage device or the like holding system information is connected to a logical channel number corresponding to a physical channel path that has become unusable, there is a problem that the system goes down. ing.

Normally, a plurality of channel paths are connected to an input / output device that holds important information such as system information, so that reliability is improved. However, for convenience, there are cases where only a channel path related to one logical channel number can be connected to an input / output device that holds such important information.

An object of the present invention is to solve the above-mentioned problems of the prior art and to allow an operating system to recognize a logical channel number newly associated with another physical channel path as an operable state. , Allows changing the mapping of logical channel numbers to physical channel numbers,
Even when the input / output device holding the important information is connected only to the channel path related to one logical channel number, the logical channel number is dynamically added to another physical channel path to process the information. An object of the present invention is to provide a channel processing device capable of improving the reliability of the system.

Another object of the present invention is to eliminate the need to connect a plurality of channel paths to one input / output device in order to improve reliability, and to use the surplus channel paths for other input / output devices. It is possible to assign, at this time, the physical channel number to which a new logical channel number is associated has already corresponded to another logical channel number, and that logical channel number is in channel online, that is,
Another object of the present invention is to provide a channel processing device capable of newly associating a logical channel number even if it is in operation.

Furthermore, it is possible to associate the physical channel numbers and the logical channel numbers described above as one-to-n correspondence (n is a natural number starting from 1), and one physical channel can be associated without changing the cable connection. It is to provide a channel processing device that can add a logical channel number to a number.

[0020]

According to the present invention, the above objects are achieved by a channel processing device for managing and controlling a channel path, and a plurality of channel processing devices connected to the channel processing device for controlling the channel path. One-to-one with the physical channel number, which is the channel path number indicating the mounting position
Corresponding to the channel device group, an input / output device group capable of individually communicating with the channel device group according to a predetermined protocol, and a channel device group and an input / output device group connected to the channel device group and the input / output device group. In a channel processing device of an information processing system, which comprises a switching mechanism for dynamically selecting routes between channels, the correspondence between the logical channel number, which is the channel path number recognized by the operating system, and the physical channel number is set to n: 1. (Logical channel number vs. physical channel number: n is a natural number starting from 1), a means for detecting an opportunity to newly associate a logical channel number with one physical channel number, and a physical channel number. A means for searching a logical channel number group and a logical channel number to be added to the physical channel number Means for determining whether or not allocated to the physical channel number is achieved by providing a means for associating a new logical channel number to the physical channel number.

[0021]

In one physical channel path, a physical channel number which is a channel path number indicating the mounting position in the hardware and a logical channel number which is a channel path number recognized by the operating system are given. There is. Since these two channel path numbers represent one and the same channel path used for different purposes, it is necessary to associate them.

The information of this association is stored and held after the computer system is powered on. The initial value is defined as a one-to-one correspondence between the physical channel number and the logical channel number, but after that, there is a possibility that it will be one to n (physical channel number to logical channel number: n is a natural number starting from 1). is there. The reason is that a change may occur when one physical channel path fails, or due to operational reasons of the operator.

The channel processing device for managing and controlling the channel path catches such an occasion and newly associates the logical channel number with the physical channel number already associated with the logical channel number already online. Start the attachment process. Then, the channel processing device adds the logical channel number according to the number of input / output devices that can handle the added logical channel number, the attribute of the logical channel number, the connection form (whether the switching mechanism is connected or not), and the like. Check if it can be done.

For this reason, the channel processing device acquires the logical channel number to be newly added, the input / output information about the already-corresponding logical channel number, the attribute about the logical channel number group, the connection form, etc. It is determined whether or not the logical channel number to be added to the physical channel number can be assigned. If it is determined in this determination that the allocation is impossible, the channel processing device terminates the association of the logical channel number with a failure, and if the determination is determined that the allocation is possible, the physical channel number is assigned. Correspondingly, a logical channel number to be newly added is associated.

[0025]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a channel processing device according to the present invention will be described in detail below with reference to the drawings. Note that, for convenience of description, the embodiment of the present invention defines the following conditions as a premise, but the present invention is configured without these conditions or by arbitrarily setting numerical values in these conditions. be able to.

Up to two logical channels can be assigned to one physical channel number.

When a physical channel path to which two logical channel numbers are allocated fails, dynamic allocation is not performed.

The maximum number of logical channel numbers that can be referred to by the operating system is 256.

The number of channels per input / output processing device is 64.

FIG. 1 is a block diagram showing a schematic configuration of a computer system to which the present invention is applied. In FIG. 1, 1
Is an operating system (OS), 2 is a basic processing unit (BPU), 3 is a main storage unit (MS), 4 is a storage control unit (SCU), 5 is a service processor (SVP),
6 is an input / output processing device (IOP), 8 is a switching mechanism (SW), 50 is a terminal device, 60 is a channel processing device (CHP), 70 to 7m are channel devices, and 91 to 92 are input / output devices (IO). is there.

In FIG. 1, an input / output processing unit (IOP)
Reference numeral 6 includes a channel processing device (CHP) 60 that performs channel path selection and management processing, and a channel device (CH) group 70 to 7m (m represents a channel number in the IOP) that controls the channel path. Composed. Further, the computer system shown in FIG. 1 has a plurality of IOPs 6 to which IOP numbers 0 to n are assigned, each of which is a main storage device (MS).
It is connected to a storage control unit (SCU) 4, a basic processing unit (BPU) 2, and a service processor (SVP) 5 that control the device 3.

The MS 3 sends each IOP 6 via the SCU 4.
Inside CHP60, CH70 ~ 7m, BPU2, SVP5
It is accessible from. The operating system (OS) 1 can use each resource of the computer system via the BPU 2. And each CH
Via the switching mechanism (SW) 8, or
It is directly connected to the input / output devices (IO) 90 to 92. SW
8 is a port 81 that is commonly provided for a plurality of IOPs 6 of the computer system and is connected to each of the CH group and the IO group.
Equipped with ~ 85. Fixedly determined port numbers a to e are assigned to the respective ports.

The dotted line in SW8 shown in FIG. 1 indicates that the route connected by the dotted line is system-defined. That is, in the illustrated example, only the IO90 connected to the port number d is connected to CH7m
It is shown that only the IO 91 connected to the port number e is configured and defined in (m-1) and CH7 (m-2). Therefore, the IO 91 is accessed from two paths of CH7 (m-1) and CH7 (m-2).

In the example described below, CH7 (m-1)
Will fail, and the logical channel number CHPID = x-1 corresponding to CH7 (m-1) will be newly associated with CH7m. When this association is performed, C
It becomes possible to access the IO 91 connected to the port number e from H7m.

A is assigned to SW8 shown in FIG. 1 as a switch number used for identifying the switching mechanism. This switch number information is the logical channel number CH
It is stored in the entry corresponding to the logical channel number in the logical channel number area storing the information for each PID (see FIG. 6). That is, this information makes it possible to identify the SW to which the logical channel having the respective logical channel number CHPID is connected.

When the logical channel is not connected to SW, "0" indicating invalidity is stored in the storage section of the switch number in the entry corresponding to the logical channel number. That is, a valid switch number has a value other than "0".

An IOP number is set for each IOP according to its connection position so that the IOP can be identified, and since only one CHP is provided in the IOP, the IOP is IO.
It can be identified by the P number. Also, CH is a physical channel number P_CH that represents the mounting position inside the hardware.
And a logical channel number CHPID which is a channel path number recognized by the operating system.

The physical channel number P_CH and the logical channel number CHPID are both represented by 2 bytes, the details of which are shown in FIG.

The physical channel number P_CH has an IOP number in the upper byte and a channel number according to the mounting position in the IOP in the lower byte. In this embodiment of the present invention, up to 64 channels can exist in the IOP, so this channel number is "0".
~ "63". Also, the logical channel number CHPID
Contains fixed information of "0" in bits 1 to 7 of the upper byte, "0" or "1" indicating that the entry is valid or invalid is entered in bit 0, and is recognized by the OS in the lower byte. It is configured by including the channel pass number.
In the embodiment of the present invention, since the OS can handle up to 256 channel paths, the channel path number CHPID is "0" to "255".

In the channel device CH7m shown in FIG.
Since the OP number = n and the channel number in the IOP = m, the physical channel number P_CH = n_m and the logical channel number CHPID = x are given.

FIG. 2 is a block diagram showing the structure of the channel processor CHP60. In FIG. 2, 601 is an SV
P_IF unit, 602 BPU_IF unit, 603 memory request unit, 604 processor unit, 605 CH_
IF unit, 606 is control storage (CS), 6
Reference numeral 07 is a work memory unit.

The CHP 60, as shown in FIG.
A control storage (CS) 606 that stores a microprogram (μp) that controls itself, a processor unit 604 that controls CHP according to μp, a work memory unit 607 that the μp uses for processing, and an S
A SVP_IF unit 601 that handles communication with the VP5, and
A BPU_IF unit 602 for processing communication with PU2, and S
Memory request unit 603 for accessing MS3 via CU4 and CH for processing communication with each channel
_IF unit 605.

Between CHP60 and SVP5, CHP
Two bidirectional signal lines of 60 → SVP5 and SVP5 → CHP60 are connected. These signal lines are SVP_IF
The value of each of these signal lines connected to the unit 601 is normally set to “0”. In addition, SVP5 is another I
It also has two bidirectional signal lines for each OP.

When requesting the SVP 5 for processing, the CHP 60 puts "1" on the signal line of CHP → SVP. On the other hand, if the SVP 5 can perform the processing requested by the CHP 60, the SVP 5 puts “1” on the SVP → CHP signal line, and the CHP 60 recognizes that C
"0" is put on the HP → SVP signal line. SVP5 is
Checking that the signal line of CVP → SVP becomes “0”, the signal line of SVP → CHP is set to “0”. CHP6
0 confirms that the signal line of SVP → CHP becomes “0”, then writes the request content in the SVP-CHP communication area (see FIG. 5) in MS3, and after writing, again CHP.
→ Put "1" on the SVP signal line.

When the SVP5 receives this signal, the MS3
The request content written from the CHP 60 is read from the inside SVP-CHP communication area. When this reading is completed, the SVP 5 sets the signal line of SVP → CHP to “1”. CHP60 checks this, CHP → SV
The signal line of P is set to “0”, and by this, SVP → C
The HP signal line is also set to "0".

In the above description, the sequence when the CHP 60 requests the SVP 5 for processing has been described, but when the SVP 5 requests the CHP 60 for processing, the same sequence is performed in the reverse order of the above processing.

A CHP is provided between the CHP 60 and the BPU2.
Two bidirectional signal lines of 60 → BPU2 and BPU2 → CHP60 are connected. These signal lines are BPU_IF
Connected to the section 602, the values of these signal lines are usually specified as "0". In addition, BPU2 is
It also has two bidirectional signal lines for each OP.

From CHP60 to BPU2 or BP
The sequence for requesting processing from U2 to CHP60 is the same as the communication method between CHP60 and SVP5 described above. A BPU-CHP communication area (see FIG. 5) is provided in the MS 3.

Communication between CHP60 and CH70 to 7m
This is performed in the same manner as in the case of communication with the SVP5 and BPU2 described above. Therefore, CHP60 is a CH under its control
CHP → CH, CH →
Two CHP bidirectional signal lines are provided. Also, the CHP-CH communication area in MS3 is IOP
It is provided in units (see FIG. 5). Further, a signal line for failure reporting, which is set to "1" when each CH fails, is connected from each CH to the CHP one by one. These failure reporting signals are aggregated into 8 bytes of data,
Each bit corresponds to a channel number in the IOP. This allows the CHP 60 to immediately know which numbered channel in the IOP has failed.

FIG. 5 is a diagram showing a format for explaining various kinds of information stored in the MS 3, which will be described below.

The MS 3 is divided into a user area used by programs including the OS and a hardware area used by hardware. In the embodiment of the present invention, the upper portion of the hardware pointer HPTR is set as an area used by the hardware, and the lower portion is the user area, that is, the program area.

The hardware pointer HPTR is set by the SVP 5 when the power is turned on, and varies depending on the input / output information or the like assigned to the system.
The information belonging to the input / output relationship is the position of the relative address determined from the HPTR point (HPTR in the example of the figure).
It is stored from the area indicated by the pointer (hardware IO address: HIOA hereinafter) stored at + t).
At the position of HIOA, relative pointers (HI
The address when the value of OA is “0”) is stored as directory information.

CHP60, CH7-7m or BP
U2 acquires or updates necessary input / output information and the like by using these pointers.

In the system shown in FIG. 1, CH
It is assumed that a fixed failure has occurred at 7 (m-1). As a result, the signal on the signal line for failure communication going from CH7 (m-1) to CHP60 becomes "1". CHP6
0 is the channel number (m-in the IOP of the failed CH.
1) can be immediately known as described above, and
Both the IOP number and (n) are known. Therefore, CHP6
0 is the physical channel number P_C of the failed channel device
It can be seen that H is n_ (m-1).

The CHP 60 has the physical channel number P_
In order to retrieve the logical channel number CHPID assigned to this physical channel number from CH = n_ (m-1), the hardware IO address HIOA in MS3 is searched.
Directory information P_CH → CHPID, CHP
SCHPTBL which is a pointer of the conversion table CHPTBL of ID → P_CH is read (see FIG. 5). Then, the CHP 60 uses HIOA + SCHPTBL to
Find the address of CHPTBL.

Details regarding this CHPTBL are shown in FIG. 7, which will be described below.

As shown in FIG. 7, HIOA + SCHPT
512 bytes from the BL position are CHPID → P_C
It is a conversion table of H, HIOA + SCHPTBL +
From 512 to 1024 bytes is a conversion table of P_CH → CHPID.

Then, the CHP 60 obtains the physical channel number P_CH from the logical channel number CHPID by using HIOA + SCHPTBL + CHPID (= x-
1) P_CH corresponding to the CHPID by reading 2-byte data from the address indicated by × 2
Can be requested. Conversely, when the logical channel number CHPID is obtained from the physical channel number P_CH, 4-byte data is read from the address indicated by HIOA + SCHPTBL + 512 + (IOP number × 64 + channel number in IOP) × 4. This gives C
The HP 60 can obtain the CHPID corresponding to the P_CH.

At this time, two CHPIDs are stored every 2 bytes of the read 4-byte data.
Whether or not the stored CHPID is valid can be determined by the value of bit 0 of each 2-byte data. That is, when the CHPID is valid, the value of bit 0 is "0", and when it is invalid, the value of bit 0 is "1". The actual CHPID is stored in the last 1 byte of each 2 bytes of data.

The conversion tables for these channel paths are
It is set to correspond one-to-one when the power is turned on. Therefore, in the P_CH → CHPID conversion table, at least one bit indicating that the CHPID is invalid is set. Further, there is no invalid entry in the CHPID → P_CH conversion table. This is because one CHPID is always assigned to one P_CH. Then, in one embodiment of the present invention, even if the dynamic logical channel number allocation to the physical channel number fails, the logical channel number remains allocated to the previous failed physical channel number P_CH. Become.

As described above, the CHP 60 can obtain two logical channel numbers CHPID from the failed physical channel number P_CH = n_ (m-1). If two CHPIDs are valid, the CHPID dynamic allocation process is processed as a failure according to the above-described conditions of the present invention.

Even in such a case, it is possible to perform the process of assigning the two logical channel numbers CHPID to different physical channel numbers (by changing the above-mentioned condition). , The two required CH
Even if the PID is valid, the CHPID can be dynamically allocated.

Since CH7 (m-1) has been operating until then, it is impossible for both CHPIDs to be invalid. In the embodiment of the present invention, one C
It is assumed that only the HPID is assigned and its value is x-1.

As described above, the CHP 60 has the logical channel number CHPID = x for the channel device CH7 (m-1).
It can be recognized that -1 was associated. After that, the CHP 60 acquires, from the MS 3, information regarding CHPID = x−1 corresponding to CH7 (m−1).

Information on this CHPID = x-1 can be obtained from the HIOA directory information of MS3 by SCH.
W is read and HIOA + SCHW + CHPID (= x
-1) CHPID = x-1 in the channel information area CHW that holds information for each CHPID by the calculation of x8
This is done by reading the information about.

FIG. 6 is a diagram showing a format for explaining the information stored in the channel information area CHW, which will be described below.

As shown in FIG. 6, each CHP in the CHW is
The ID information holds 8 bytes of information. The 8-byte information includes a FLG area indicating whether the CHPID is online, a CHTYP area indicating the type of the CHPID, a CHPID area storing the CHPID, and an S to which the CHPID is connected.
It includes a SWN area (A in this example) in which the W number is entered.

The CHP 60 uses the C
Check if the HPID can be dynamically assigned to another P_CH. That is, the CHP 60 is a channel type in which this CHPID can be dynamically assigned to another P_CH, and this CHPID (= x-
If the condition 1) is not connected to the switching mechanism or the like, the CHPID (= x-1) is not dynamically assigned to another P_CH. And CH
If P60 satisfies the above condition, the process proceeds to the next step.

At this time, the CHP 60 holds these pieces of information in the work memory unit (WM) 607 provided inside the CHP 60.

The CHP 60 calculates the calculated CHPID = x-1.
HIO of MS3 to retrieve input / output information about
SIOTBL is read from the directory information of A, and H
IOA + SIOTBL + CHPID (= x-1) × 10
The address of the IO table IOTBL regarding the input / output information held for each CHPID is obtained by the 24 × 4 calculation.

FIG. 9 is a diagram for explaining the structure of the IOTBL. As shown in FIG. 9, the IOTBL has 1024 IO information entries for each CHPID. These entries are made up of 4 bytes, and an FL holding a bit indicating whether or not the entry is valid and whether or not the port number in the entry is valid.
If the G area and its IO are connected to the switching mechanism (the valid port number bit of the FLG area is "1"), the PORT area storing the connected port number and its IO And an SBCH number area for storing the SBCH number for identifying detailed information of the.

The above-mentioned port number is the port number of the SW to which the IO corresponding to that entry is connected. In one embodiment of the present invention, as shown in FIG.
Regarding (m-1), since only the input / output device IO91 is connected, only the entry related to this IO91 is C
Valid on IOTBL for HPID = x-1. Further, the port number e is entered in the port number area of this entry.

The CHP 60 has the above-mentioned CHPID (= x-
If all the IOTBL areas related to 1) are checked and there are more than 512 valid entries, another physical channel number P of the logical channel number CHPID = x-1
The dynamic allocation to _CH is stopped, and if the number is 512 or less, the IOTBL information regarding the CHPID is temporarily taken into the WM 607 inside the CHP.

Thereafter, CHP 60 is assigned P
Search for _CH. Therefore, the CHP 60 has CHPIs corresponding to all P_CHs in the input / output processing device IOP6.
D is obtained from the conversion table CHPTBL in the MS3 described above. At that time, those already assigned with two CHPIDs are excluded. Then, with respect to the obtained CHPID, IOTBL information and CHW information are obtained by the method described above.

The CHP 60 is the same as the CHPID whose channel type is to be added is CHPID = x-1 (if it is not the same, it is impossible to connect to the assigned IO), or it is connected to the same SW8. Yes (if you are not connected to the same SW8, you need to change the cable connection) or P
IO assigned to CHPID already associated with _CH
The sum of the number and the number of IOs assigned to CHPID = x-1 does not exceed 1024 (one CHPID
Since each CH can connect only 1024 IOs, it is physically impossible to exceed 1024 in total),
Also, the IOTB of CHPID = x-1 to be added
Is there a port number that duplicates the port number defined on L? (If there is a duplicate port number, the request from the IO reported from those ports indicates which CHP
It may not be possible to identify whether or not it is an ID)).

The CHP 60 checks if the above check
If even one is not satisfied, the next CHPID is checked, and if it is not satisfied for all CHPIDs, dynamic allocation to another P_CH with CHPID = x-1 is stopped. If a satisfying CHPID is found, P_CH (CH 7m, P_CH = n_m, CHPID = in FIG. 1) corresponding to the CHPID is found.
It is determined that CHPID = x−1 can be assigned to x).

The CHP 60 is the P that is determined to be allocatable.
_CH (P_CH = n_m), CHPID = x
-1 is assigned. Therefore, CHP60 is MS
Conversion table CHPT of P_CH → CHPID in 3
CHPID = x−1 is written in the vacant CHPID area of the entry for P_CH (n_m) on BL, and bit 0 of that area is set to “0” to validate the entry.

Further, the CHP 60 is
For CH7m identified by _CH number (n_m),
It is determined whether or not to make an additional notification. CHPID = x-
The CHW information regarding 1 is held in the WM 607 of the CHP 60, but in the FLG area in that, C
If HPID = x-1 is shown online, then
The CHP 60 makes an additional notification to the CH 7m identified by the P_CH number (n_m). This notification is
It is performed using the CH_IF unit 605 and the CHP-CH communication area related to the IOP in the MS3. If you are offline, at that point, CHPID
= X−1 to P_CH (P_CH = n_m) is dynamically allocated.

When the CHP 60 normally receives a response from the CH 7m to the above-mentioned notification of the addition to the CH 7m, the CHP 60 keeps the CHPID = x-1 as the channel online recognition, and the P_CH (of the CHPID = x-1). P_C
The process of dynamic allocation to H = n_m) ends. However, the CHP 60 determines that the CHPID = x-1 is no longer operable when the CH7m does not respond normally, and the MS3 regarding the CHPID = x-1 is determined.
Reset the online bit in the FLG area of the CHW information entry in the.

In the system shown in FIG. 1, the operator may attempt to dynamically add a CHPID via the SVP 5 as a trigger for assigning a new logical channel number CHPID to the physical channel number P_CH. In this case, if the CHPID to be added at that time is still offline, it is not necessary to notify the CH of the addition as described above.

Next, the IO operation from the program in the system of FIG. 1 will be described.

The IO operation from the program is
It is started by activating IOP6 via BPU2. Then, the start of the IO operation is usually S
The BCH number, that is, the number for identifying the IO information entry in the MS 3, is used.
This SBCH number is received from BPU2.

The CHP 60 identifies the SBCH entry in the MS 3 from the received SBCH number, and from the input / output device information SBCH, which CH is used as the IO to be activated.
Determine if a PID is assigned. This allocated CHPID is SBC as shown in FIG.
It can be obtained from the path information in H.

Further, the CHP 60 refers to the valid entries of the IOTBL in the MS 3 regarding the CHPID by using the SBCH number one by one, and searches for an entry that matches the SBCH number. As a result, the CHP 60 can acquire which port the IO corresponding to this SBCH number is connected to, and further, this SBCH
The UA can also be determined by the SBCH entry for the number.

Then, the CHP 60 obtains the P_CH number corresponding to the CHPID obtained as described above, and P_C
Notify the H by writing the port number of the IO to be activated, the device address UA, and the CHPID to be activated in the CHP-CH communication area in the MS 3,
The IO operation will be notified.

FIG. 3 is a block diagram showing the configuration of the channel device. The channel device will be described below by taking the configuration of CH7m as an example. In FIG. 3, 7m1 is a processor unit, 7m2 is a work memory unit (WM), 7m3 is a control storage (CS), and 7m4 is CHP_IF.
Section, 7m5 is a memory request section, 7m6 is a data transfer section, 7m7 is an IO_IF section, and other reference numerals are the same as those in FIG.

As shown in FIG. 3, CH7m is a control storage CS7m3 storing a microprogram μp for controlling the CH itself, and a CH7m according to the μp.
A processor unit 7m1 for controlling 7m, a work memory unit WM7m2 used by the μp for processing, and an SC
A CHP that processes communication between the memory request unit 7m5 for accessing the MS3 via the U4 and the CHP60.
_IF unit 7m6, a data transfer unit 7m6 that handles data transfer with the input / output device IO, and an IO_IF unit 7m7 that performs interface processing with the IO and the switching mechanism 8.

FIG. 4 is a diagram showing a format for explaining the information stored in the WM 7m2 in the CH 7m, which will be described first.

The WM 7m2 is an area CHPI that holds the logical channel number CHPID assigned to this CH.
D0, CHPID1 (can hold up to 2 CHPIDs, each is a 2-byte entry: if bit 0 is “0”, the entry is valid), and the port number and IO device address UA within the CH IO number used to identify retained IO information {pointer (STBL) of address conversion table + port number × 512 + IO required at address position determined by UA
Address conversion table TBL for obtaining the number stored therein}, and the CHP associated with this CH
With respect to ID, total CNT0 and CNT1 that hold how many IOs are allocated (corresponds to the arrangement of CHPID areas: CHPID0 and total CNT
0, CHPID1, total CNT1), and IO information IOINFO held in the CH are stored.

Each IO information has a FLG area that holds a bit indicating whether or not the IO information is valid, and the IO is M.
SBCH that identifies the SBCH that is IO information in S3
Number, the port number to which the IO is connected, and the IO
UA and a CHPID to which a IO is assigned.

The IO number is 2-byte information and is defined from 1 to 1024. In each IO number area of TBL, "0" is entered if the area is invalid.

In the example shown in FIG. 1, CH7m has CHPI.
Since D = x has been assigned, CHPID = x is entered in the area for CHPID0 together with a flag indicating validity. Further, before CHPID = x−1 is assigned, invalid is displayed in the area of CHPID1.

Now, the CH and CHP described above
The operation of CH7m shown in FIG. 3 will be described on the assumption that the CHP 60 has notified the CH7m of the addition of CHPID (= x−1) by the interface processing with 60.

When the CH7m is notified of the addition of the logical channel number, the CH7m checks with the WM7m2 whether or not two CHPIDs have already been assigned to the CH7m itself. If already assigned, C
H7m sends a response of addition failure to CHP60
It reports by writing in the CHP-CH communication area regarding IOP in MS3 via P_IF part 7m4. Also, if it is not already assigned, the IOT relating to the logical channel number CHPID = x-1 for which the addition is notified, as in the case of the CHP described above.
With reference to BL, it is checked how many IOs are allocated to CHPID = x-1.

For CH7m, the number of IOs related to CHPID = x which has been corresponded so far with own CH7m is WM7m2.
Calculated by total CNT0 of
The total number of IOs assigned to PID = x-1 is 1
024 is checked, and if so, a failure response is reported to the CHP 60.

Next, the CH 7m checks whether there is a duplication of port numbers. Therefore, the CH 7m processes the valid entries of the IOTBL in the MS 3 regarding the CHPID = x−1 to be added one by one.

The CH7m reads a valid entry of one IOTBL, and refers to the TBL of the WM7m2 of the CH7m from the port number in the read information. As a result, in the TBL, if all the 512-byte areas related to the port number are “0”, it means that there is no definition for this port number for CHPID = x. If there is an IO number other than "0", it means that there are duplicate IO numbers. The CH 7m repeats this processing for each valid entry of the IOTBL in the MS 3, and if there is no overlapping port number, the next processing is performed.

When the above-mentioned checks are all satisfied, the CH 7m sends the IO information regarding CHPID = x-1 to the CH information.
It is stored in the IO information of WM7m2 in 7m.
In this case, which IO number should be applied?
It is used by adding +1 to the value indicated by the total CNT area for CHPID = x of WM7m2. Because CHPID = x is assigned to P_CH = n_m before adding CHPID = x−1, and the value indicated by the total CNT area for that CHPID = x−1 is the P_CH at that time. Regarding I
This is because it is the maximum value of the O number. In the example of the present invention, it is "1".

Therefore, the CH7m first copies the CIO number obtained by adding 1 to the value indicated by the total CNT area for the CHPID = x of the WM7m2 to a certain work position, and thereafter, adds the CIO number of the MS3 relating to the CHPID = x-1 to be added. Processing is performed one by one from the valid entries of IOTBL inside.

Because of this processing, CH7m has one IO
A valid entry of TBL is read and SBCH which is IO information in MS3 is read by the entry. The device address UA is stored in the SBCH information, and this information is HIOA + SSBCH + S.
It is obtained using the address calculated by BCH number × 128. The SBCH number is stored in one valid entry of IOTBL. Then, with the obtained port number and UA, the value of the CIO number is written in the IO number area of the TBL of the WM 7m2. Further, the data (SINFO + CIO number × 16) defined in the IOINFO of the WM 7m2 obtained by the value of the CIO number is written.

The CH7m adds 1 to the CIO number each time the processing of one entry is completed, and executes the above-mentioned processing to IOTB.
Repeat for each valid entry in L, and when done,
The value obtained by the value indicated by the total CNT area for the CIO number-CHPID = x is CHPID = x-
Write to the total CNT area associated with 1.

By the above-mentioned processing, CH7m becomes CHPI
This means that the process of setting the IO information regarding D = x−1 has been completed. After completing the above processing, CH7m will be
A response indicating that the logical channel number has been successfully added is sent to CH
C related to IOP of MS3 via P_IF unit 7m4
Report by writing in the HP-CH communication area, C
A path is set for the IO related to HPID = x-1.

The setting of this path is "IBM Enterprise sys
tem Architecture / 390 ESCON I / O Interface (SA22-720
This is done by establishing a logical path with the partner IO, like the I / O interface shown in 2). That is, the port number (= e) for CHPID = x-1
It is performed according to.

These processes in CH7m are executed via the IO_IF unit 7m7 according to the instruction of μp.

The IO operation from the subsequent program is activated to IOP6 via BPU2, and CHP6
It is performed by notifying one CH by 0. At that time, the CHP 60 uses the port number, UA, and CHPID.
It is possible to refer to the IOINFO of the WM 7m2 in order to notify that, and perform IO operation operation for the IO according to the information.

Next, the operation when the CH 7m receives a request from the IO 90-91 will be described.

The request from the IO is the port number and UA.
Will be reported and carried out. CH7m is WM from the value
Refer to IOINFO in 7m2. And IOI
In the NFO, the CHP to which the IO is assigned
Since CH7m has ID information, which CH
You can ask the PID to report. Furthermore, C
The H7m shall report to the CHP 60 the SBCH number of that IO (also in IOINFO) and the CHPID to which that IO is assigned (the CHP in MS3).
-Write to CH communication area)
Can convey the request from O.

Next, the processing for changing the offline channel to the online channel in the system shown in FIG. 1 will be described.

In FIG. 1, now, the logical channel number C
It is assumed that HPID = x and CHPID = x-1 are assigned to P_CH for one physical channel number. At that time, it is assumed that CHPID = x−1 is in the channel online, but CHPID = x is still in the channel offline. Then, in this state, CHPID =
Regarding x, it is assumed that the channel online instruction is given from SVP5 to CHP60.

The CHP 60 uses the SVP-IF unit 601 in the CHP 60 and the SVP-CHP communication area in the MS 3 to perform the communication as described above. First, the CHPID corresponding to the designated CHPID P_CH that is doing CHPID of CHPTBL in MS3 → P
The conversion table CHPTBL of _CH is used to obtain the same as described above.

Then, the CHP 60 obtains the C in the MS 3 in order to obtain all CHPIDs corresponding to the P_CH.
HPTBL P_CH → CHPID conversion table CH
PTBL is used. Two CHPs obtained by this
If only one of the IDs is valid, then C is valid
Since only HPID = x, the CHP 60 is
The current channel online processing may be performed for the PID.

If the two CHPIDs obtained as described above have been effectively allocated, this P_CH has already been allocated.
The information on CHPID = x-1 associated with is obtained from the CHW in MS3 by the method described above. As a result, the CH associated with this P_CH
When PID = x−1 is still the channel offline, the CHP 60 may perform the current channel online processing regarding CHPID = x at this time as well.

However, if the CHPID = x-1 associated with this P_CH is already online, the CHP 60 determines the CH corresponding to this P_CH.
The additional notification of CHPID = x is sent to 7m. If this notification is received, CH7m sends a normal response to CHP.
Returning to 60, the CHPID is now channel online. Then, the online bit of the entry relating to the CHPID of CHPTBL in the MS3 relating to CHPID = x is set to "1".

For the notification of the addition of CHPID = x, C
If the H7m cannot return a normal response to the CHP 60, the CHPID remains the channel offline. That is, the online bit of the entry for the CHPID of CHPTBL in MS3 is set to "0".

Next, the process of changing the online channel to the offline channel in the system shown in FIG. 1 will be described.

In FIG. 1, now, the logical channel number C
It is assumed that HPID = x and CHPID = x-1 are assigned to one physical channel number P_CH, and at this time, both CHPID = x-1 and x are channel online. Then, in this state, CHPID =
Channel off-line indication for x from SVP5 to C
It is assumed that it was done on HP60.

The CHP 60 uses the SVP-IF unit 601 in the CHP 60 and the SVP-CHP communication area in the MS 3 to perform the communication as described above. First, the CHPID corresponding to the designated CHPID P_CH that is doing CHPID of CHPTBL in MS3 → P
The conversion table CHPTBL of _CH is used to obtain the same as described above.

Then, the CHP 60 obtains the C in the MS 3 in order to obtain all CHPIDs corresponding to the P_CH.
HPTBL P_CH → CHPID conversion table CH
PTBL is used. Two CHPs obtained by this
If only one of the IDs is valid, then C is valid
Since only HPID = x, the CHP 60 is
The current channel offline processing may be performed for the PID.

If the two CHPIDs obtained as described above have been effectively assigned, this P_CH has already been assigned.
The information on CHPID = x-1 associated with is obtained from the CHW in MS3 by the method described above. As a result, the CH associated with this P_CH
When PID = x−1 has already been set as a channel offline, the CHP 60 may also perform the current channel offline processing for CHPID = x at this time as well.

However, if the CHPID = x-1 associated with this P_CH is still in the channel online, the CHP 60 sends the CH7 corresponding to this P_CH.
The deletion notification of CHPID = x is notified to m. Then, the CHP 60 sets CHPID = x to the channel online state. That is, the MS for CHPID = x
The online bit of the entry relating to the CHPID of CHPTBL in 3 is set to “0”.

Next, the processing for deleting a logical channel in the system shown in FIG. 1 will be described.

In FIG. 1, from CHP60, C
It is assumed that the H7m is notified of deletion of CHPID = x.

Upon receiving this notification, the CH7m selects C among the assigned CHPIDs in 2 of the WM7m in its own device.
Invalidate the area for HPID = x. That is,
Bit 0 of this entry is set to "1". And C
H7m is the IOT in MS3 for CHPID = x
BL and IO in MS3 for CHPID = x
SBCH, which is information, is acquired by the method described above.

CH7m is the port number of the acquired information,
Refer to TBL of WM7m2 in CH7m from UA,
All the relevant areas are cleared to "0" and all IOINFO information related to the cleared IO number is cleared to "0". Also, the total CNT area relating to the CHPID = x to be deleted is cleared to “0”.

CH7m is the CHPID to be deleted thereafter
A notification for releasing the established logical path to the IO group related to == x, the related port number (in the illustrated example,
Issued to the corresponding IO group by port number = d) and UA. This processing is the reverse of the processing for establishing a path with the IO described above, and as a result, the path cancellation, that is, the deletion processing for CHPID = x in CH7m, ends.

[0126]

As described above, according to the present invention, 1
Even if one physical channel path fails or becomes unavailable for some reason, the logical channel number associated with that physical channel path is dynamically changed to another physical channel path. , Which allows the operating system to continue processing assuming that the logical channel number is normal.

Further, according to the present invention, if the logical channel number corresponding to the physical channel path to be assigned and the logical channel number to be newly assigned in the above are connected to the same switching mechanism, There is no need to change the cable connection.

Further, according to the present invention, as described above, even if only one access path is connected to the input / output device, that is, only one logical channel number is defined in the input / output device. Also, it is possible to improve the reliability of the entire system.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a computer system to which the present invention is applied.

FIG. 2 is a block diagram showing a configuration of a channel processing device CHP.

FIG. 3 is a block diagram showing a configuration of a channel device CH.

FIG. 4 is a diagram illustrating a format that describes the contents of a work memory unit WM in the channel device CH.

FIG. 5 is a diagram showing a format for explaining various types of information stored in a main storage device MS.

FIG. 6 is a diagram showing a format explaining a content of a channel information area CHW of a logical channel number CHPID.

FIG. 7 is a diagram showing a format for explaining a channel path table CHPTBL.

FIG. 8 is a diagram illustrating a representation method of a physical channel number P_CH and a logical channel number CHPID.

FIG. 9 is a diagram showing a format for explaining an input / output device table IOTBL.

FIG. 10 is a diagram showing a format for explaining input / output device information SBCH.

[Explanation of symbols]

 1 Operating System (OS) 2 Basic Processing Unit (BPU) 3 Main Storage Unit (MS) 4 Storage Control Unit (SCU) 5 Service Processor (SVP) 50 Operator Terminal 6 Input / Output Processing Unit (IOP) 60 Channel Processing Device (CHP) 601 SVP-IF unit 602 BPU-IF unit 603 Memory request unit 604 Processor unit 605 CH-IF unit 606 Control storage (CS) 607 Work memory unit (WM) 70 to 7 m Channel device (CH) 7 m1 Processor unit 7m2 Work memory part (WM) 7m3 Control storage (CS) 7m4 CHP-IF part 7m5 Memory request part 7m6 Data transfer part 7m7 IO-IF part 8 Switching mechanism (SW) 90-92 Input / output device (IO)

Claims (2)

[Claims] 1. A channel processing device for managing and controlling a channel path, and a plurality of channel processing devices connected to the channel processing device for controlling the channel path and a physical channel number which is a channel path number indicating a mounting position in hardware. One-to-one correspondence with a channel device group, an input / output device group that individually communicates with the channel device group by a predetermined protocol, and a channel device group and an input / output device group,
In a channel processing device of an information processing system including a switching mechanism for dynamically selecting a path between a channel device and an input / output device, a logical channel number and a physical channel number, which are channel path numbers recognized by an operating system, Of n to 1 (logical channel number to physical channel number: n is a natural number starting from 1), a means of detecting an opportunity to newly associate a logical channel number with one physical channel number, and a physical channel Means for retrieving a logical channel number group associated with a number, means for determining whether a logical channel number to be added to a physical channel number can be assigned to the physical channel number, and a new logical channel number for the physical channel number. Channel processing including means for associating channel numbers Location. 2. The determination as to whether or not a logical channel number to be added to the physical channel number can be assigned to the physical channel number, the number of logical channels that can be assigned to one physical channel number, the operating system can refer to 2. The channel processing device according to claim 1, wherein the processing is performed based on the maximum value of the number of logical channels and the number of channels for each input / output processing device.