JPH066371A - Cell communication control circuit - Google Patents

Abstract

(57) [Summary] [Purpose] A cell that restricts cell transmission when the number of cells transmitted within a fixed time is greater than the specified number of cells, and the number of cells received within a fixed amount of time If the number is larger than the number, the cell reception regulation is stopped to stop the cell reception accurately. [Structure] Up / down counter 104 for cell generation request
The count value is compared with the number of cells that can be generated in a fixed time stored in the register 106 by the comparison circuit 105. When the count value exceeds the number of cells, the gate 102 does not allow the generation of cells. And the generation of cells was stopped, the count value of the up / down counter 104 was set to 1
Count down. In this way, cell transmission regulation is accurately performed. In addition, this circuit is applied to cell reception regulation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cell transmission / reception regulation circuit which regulates cell output when transmitting cells to a transmission line in asynchronous transfer mode and regulates reception when cells are received. is there.

[0002]

2. Description of the Related Art FIG. 19 shows, for example, a reception regulation circuit for a cell shown in B-698 "Policing method for a wide range VBR signal capacity defining parameter value" at the 1991 Spring National Convention of the Institute of Electronics, Information and Communication Engineers. In the figure, 201 is a monitoring processing circuit, 202 is a cell reception detection circuit, 103 is a storage circuit, 1
04 is an up-down counter, 105 is a comparison circuit, 10
6 is a register. Further, 12 is a transmission path, 21 is a transmission cell signal, 22 is a cell reception detection signal, 13 is a memory circuit output, 14 is a count value of an up / down counter, 15 is a comparison circuit output, and 16 is a register value.

Next, the operation will be described. FIG. 20 shows FIG.
It is a figure for demonstrating operation | movement of the circuit of FIG. 19 and 20, when no restriction is imposed by the monitoring process, the cell on the transmission line 12 is directly transmitted to the transmission cell signal 21.

On the other hand, for example, when a restriction is imposed that only the transmission of up to 2 cells is allowed in 3 cell time, the following operation is performed. Upon receiving a cell, the cell reception detection circuit 202 makes the cell reception detection signal 22 significant and outputs it to the storage circuit 103 and the up / down counter 104. The memory circuit delays the cell reception detection signal 22 for a preset time and outputs it as the memory circuit output 13. The up / down counter 104 receives the cell reception detection signal 2
When 2 is significant, the count value is incremented by 1, and when the memory circuit output 13 is significant, the count value is decremented by 1 and output as the count value 14. The cell reception signal 22 and the memory circuit output 13 are described as "H" significant.

In FIG. 20, the delay time of the memory circuit is 3 cell time. Further, in this figure, it is assumed that the cell reception signal 20 has not been significant for at least 3 cell time before the request signal A. Also T1 to T6
Indicates a window for applying restrictions.

In FIG. 20, the count value 14 is counted up to 1 by the request signal A, and the count value 14 is counted up to 2 by the request signal B. This value corresponds to the number that is significant in the cell reception detection signal 22 in the window T1. Further, when the request signal is C, the delay circuit output becomes significant, so the count-up and the count-down cancel each other out, and the count value 14 remains 2. This value corresponds to the number that is significant in the cell reception detection signal 22 in the window T2.

Therefore, with this configuration, the count value 14
Indicates the cell reception detection signal 2 in each of the windows T1 to T6.
It agrees with the number that is significant in 2. The register is set in advance as a value that regulates the number of cells that can be transmitted within one window (2 in this case), and is output as a register value 16. The comparison circuit 15 compares the count value 14 with the register value 16, and when the register value 16 is larger, the comparison circuit output 15 is set to "L". In this example, the register value 16 is set to 2 and the comparator circuit output is set to "L" when the count value 14 becomes 3 or more.

In the monitoring process, the output 15 cells of the comparison circuit are "L".
Then, the cell is discarded. Alternatively, processing such as raising the discard priority is performed, and the cell is transmitted to the transmission cell signal 21. By doing so, it is possible to restrict the transmission to only two cells within an arbitrary 3 cell time or more.

[0009]

The conventional cell reception regulation circuit is configured as described above, and when actually discarding a cell in the monitoring processing circuit, the up-down counter is not notified of the discarding, so The count value of the down counter does not match the number of cells that sent cells in the monitoring circuit,
There was a problem that the regulation could not be carried out accurately.

For example, at the time when the cell reception detection signal 22 in FIG. 20 indicates that the signal D is received, the comparison circuit output 15 changes from H to L, and then the signals E, F, G.
The comparison circuit output 15 keeps L even when the signal is received. Therefore, the signals D, E, F, and G are all regulated, and the cells are discarded in the monitoring processing circuit. Actually, maximum 2 in 3 cell time
When it is possible to send data up to the cells, even if this regulation can be achieved by discarding the cells corresponding to the signal D and the signal G, the cells corresponding to the signal E and the signal F are also discarded. There was a problem that regulations could not be enforced.

Even when the conventional cell reception regulation circuit is applied to the cell transmission regulation circuit, since the cell transmission signal 21 is connected to the transmission line, when the cell is actually discarded by the monitoring processing circuit, the cell transmission regulation circuit will be displayed on the transmission line. There is a problem that the regulation cannot be performed accurately because the transmitted cell and the count value of the up-down counter do not match.

The present invention has been made to solve the above problems, and an object thereof is to obtain a cell transmission / reception circuit capable of accurately controlling cell transmission / reception.

[0013]

A cell communication regulation circuit according to the present invention comprises, for example, a cell transmission circuit, a memory circuit, an up / down counter, a comparison circuit, a register, a gate, and a counter control circuit. , The cell transmission circuit is connected to the cell transmission line, outputs the cell transmission request signal to the gate and the up / down counter, and outputs the output of the gate as the cell transmission permission signal and inputs it to the cell transmission circuit and the storage circuit. The output is input to the up / down counter, the count value of the up / down counter is input to the comparison circuit, the output of the register is input to the comparison circuit, and the output of the comparison circuit is input to the gate and the counter control circuit.

A particular feature of the cell communication regulation circuit according to the present invention is that a count control circuit is provided for counting down the count value of the up / down counter when the cell is regulated and is not output. is there. That is, the count control circuit operates so as to input the instruction when the comparison circuit gives an instruction to discard the cell and decrease the counter value in the up-down counter. This allows the up / down counter to decrease the count value even when the cell is discarded in the cell circuit.

Another feature of the present invention is that the memory circuit decreases the count value of the up / down counter via the gate. The number at which this gate becomes an open output indicates the number of cells actually transmitted from the cell circuit, and the memory circuit inputs the number of actually transmitted cells to decrease the value of the up / down counter. It will be.

Therefore, the up / down counter is counted up by the request of the cell, and is decreased by the number of cells actually transmitted by the memory circuit and is decreased by the number of discarded cells by the count control circuit. That is, the value of the up / down counter is counted by the number of transmission requests issued, the number actually transmitted, and the number discarded, which reflects the accurate number of cells.

The cell communication regulation circuit according to the invention described in claim 2 is, for example, a cell transmission circuit, a cycle generation counter,
It consists of an up / down counter, a comparison circuit, a register, and a gate counter control circuit. The cell transmission circuit is connected to the cell transmission line. The cell transmission request signal is input to the gate and the up / down counter, and the gate output is the cell transmission permission signal. And input to the cell sending circuit, the output of the cycle generation counter to the up / down counter, the count value of the up / down counter to the comparison circuit, the output of the register to the comparison circuit, and the output of the comparison circuit. Is input to the gate and the counter control circuit.

A feature of the cell communication regulation circuit described in claim 2 is that the up-down counter is decreased by the number of cells discarded by the count control circuit as described above. The point is that a cycle generation counter is used instead of the memory circuit. The cycle generation counter outputs a reset signal at a predetermined cycle to reset the counter value of the up / down counter. As a result, the first embodiment can apply the restriction at any arbitrary time, whereas the second embodiment can apply the restriction within the cycle generated by the cycle generation counter. Occurs.

A cell communication regulation circuit according to the invention described in claim 3 is, for example, a cell transmission circuit, a cycle generation counter,
It consists of a memory circuit, an up / down counter, a comparison circuit, a register, and a gate counter control circuit. The cell transmission circuit is connected to the cell transmission line, outputs a cell transmission request signal to the gate and up / down counter, and outputs the gate output to the cell. It is sent to the cell sending circuit and the memory circuit as well as the sending permission signal, the output of the cycle generation counter is input to the up / down counter as the reset signal, the output of the memory circuit is input to the up / down counter, and the The reset enable signal is input to the up / down counter, the count value of the up / down counter is input to the comparison circuit, the output of the register is input to the comparison circuit, and the output of the comparison circuit is input to the gate and the counter control circuit. .

A feature of the cell communication regulation circuit described in claim 3 is that the memory circuit described in claim 1 and the cycle generation counter described in claim 2 are both provided. The point is that selection means is provided for selective use.

In the cell communication regulation circuit according to the present invention as defined in claim 4, for example, the cycle generation counter is deleted from the cell generation regulation circuit according to claim 3, and the memory circuit comprises a memory, a counter circuit and a sequential circuit. The cell transmission request signal according to claim 3 is input to the memory, the count value of the counter circuit is input to the address of the memory, the read / write signal of the memory from the counter circuit is input to the memory, and the output from the memory is output. The output of the sequential circuit is input to the sequential circuit, the output of the sequential circuit is used as the storage circuit output of the third aspect, the reset signal is output from the counter circuit, and the reset signal is input to the up-down counter of the third aspect.

A feature of the cell communication regulation circuit according to claim 4 is that the cycle generation counter uses the counter circuit used in the memory circuit, and thus the cycle generation already exists. The device configuration can be reduced by using the counter circuit of the memory circuit.

The cell communication regulation circuit according to the invention described in claim 5 is, for example, an OR gate, the cell transmission circuit and gate described in claim 1, and the memory circuit described in claim 4, an up-down counter, a comparison circuit, and a register. It is composed of first and second regulation control circuits composed of counter control circuits, and inputs a cell transmission request signal from the cell transmission circuit to a gate and up / down counters in the first and second regulation control circuits to make a gate. Is used as a cell transmission permission signal and is input to the cell transmission circuit and the storage circuits in the first and second regulation control circuits, and the outputs of the comparison circuits in the first and second regulation control circuits are respectively used as OR gates. The output of the OR gate is input to the gate and the counter control circuit in the first and second regulation control circuits, and is output to the first and second regulation control circuits. The output of the memory circuit is input to the up / down counter, the reset signal from the memory circuit is input to the up / down counter, the count value of the up / down counter is input to the comparison circuit, and the output of the register is input to the comparison circuit as the register value. It is a thing.

A feature of the cell communication circuit according to claim 5 is that a plurality of regulation control circuits having different regulation standards are provided, and by providing the plurality of regulation control circuits, The point is that an OR gate is provided to generate a signal that satisfies both regulations.

A cell communication regulation circuit according to a sixth aspect of the present invention includes, for example, a first regulation control circuit including the memory circuit, the up / down counter, the comparison circuit, and the register counter control circuit according to the first aspect. A second regulation control circuit including an up / down counter, a cycle counter, a comparison circuit, and a register counter control circuit according to claim 2, an OR gate, and a cell transmission circuit and a gate counter control circuit according to claim 1. The cell transmission circuit inputs the cell transmission request signal to the gate and the up / down counters in the first and second regulation control circuits, and uses the output of the gate as the cell transmission permission signal and the cell transmission circuit and the first control circuit. Input to the memory circuit in the cell transmission regulation control circuit, and
And the output of the comparison circuit in the second cell transmission regulation control circuit is input to the OR gate, and the output of the OR gate is input to the gate and the counter control circuits in the first and second control circuits, In the regulation control circuit, the output of the memory circuit is input to the up / down counter, the count value of the up / down counter is input to the comparison circuit, and the output of the register is input as the register value to the comparison circuit. Is input to the up / down counter, the count value of the up / down counter is input to the comparison circuit, and the output of the register is input to the comparison circuit as the register value.

A feature of the cell communication regulation circuit described in claim 6 is that the plurality of regulation control circuits described in claim 5 regulate cell transmission by different configurations as described in claims 1 to 4. This is the point of implementation.

The cell communication regulation circuit according to the invention as defined in claim 7 is, for example, as defined in claim 1, 2 or 3 or 4.
Alternatively, in the cell transmission restriction circuit described in 5 or 6, the cell transmission request signal is not input to the up / down counter, but the cell transmission permission signal is input to the up / down counter.

A feature of the cell communication regulation circuit according to claim 7 is that the comparison result of the comparison circuit is output after being shifted by a predetermined period, and a cell transmission request from the cell circuit is gated within the predetermined period. Is output to an up / down counter via the.

The cell communication regulation circuit according to the invention as defined in claim 8 is, for example, as defined in claim 1, 2 or 3 or 4.
Alternatively, in the cell transmission restriction circuit described in 5 or 6 or 7, the cell transmission request signal is output to the comparison circuit, and the output of the comparison circuit is only output to the gate but not to the up / down counter.

A feature of the cell communication regulation circuit shown in claim 8 is that in the cell communication regulation circuit shown in claims 1 to 7, the number of cells discarded by the count control circuit is calculated from the counter value of the up-down counter. On the other hand, in the case of claim 8, the counter control circuit does not exist, and instead, a cell transmission request from the cell circuit is directly input to the comparison circuit, and the comparison circuit discards the cell. When the determination is made, the up-down counter is not counted up. The up / down counter is not counted when the cell is discarded by the comparison circuit. That is, the counter value of the up-down counter is incremented by the number of cells actually judged to be transmitted by the comparison circuit, and is decreased by the number of cells actually transmitted by the memory circuit. ing.

The cell communication regulation circuit according to the invention shown in claim 9 is connected to, for example, a cell transmission circuit or a cell reception circuit, and the cell communication regulation circuit according to claim 1 or 2 or 3 or 4 or 5
Alternatively, a monitoring processing circuit is provided in place of the cell transmission circuit of the cell transmission regulation circuit according to 6 or 7 or 8, and other configurations are according to claim 1 or 2 or 3 or 4 or 5 or 6 or 7 or 8. The output of the cell transmission circuit is input to the monitoring processing circuit and the output of the monitoring processing circuit is connected to the transmission path, or the transmission path is connected to the monitoring processing circuit and the output of the monitoring processing circuit is input to the cell reception circuit. It is designed to be connected.

[0032]

According to the first aspect of the present invention, the memory circuit outputs the cell transmission permission signal after storing it for a fixed cell time, and outputs the up / down counter by 1 when the cell transmission request signal indicates the cell transmission request. 1 counts down when the output of indicates that cell transmission is permitted, and when the comparator circuit compares the threshold value set in the register with the count value of the up / down counter to open / close the gate and close the gate. Counts down the up / down counter by one, and when the cell transmission request signal has no cell transmission request on the cell transmission request signal or the gate is closed, cell transmission is not permitted, and the cell transmission request signal If there is a cell transmission request above and the gate is open, cell transmission is enabled, and the cell transmission circuit sends a cell transmission enable signal. When the cell transmission is permitted, the cell is transmitted to the transmission line, and when the cell transmission permission signal is in the state where the cell transmission is re-permitted, the cell transmission circuit does not transmit the effective cell. You can meet transmission restrictions.

The cycle generation counter in claim 2 resets the up / down counter at regular intervals,
The up / down counter counts up by 1 when the cell transmission request signal indicates a cell transmission request, and the comparison circuit opens and closes the gate by comparing the threshold value set in the register with the count value of the up counter. , When the gate is closed, the up / down counter is decremented by 1 and the cell transmission enable signal is in a state in which cell transmission is not allowed when there is no cell transmission request on the cell transmission request signal or when the gate is closed. If there is a cell transmission request on the cell transmission request signal and the gate is open, cell transmission is enabled, and the cell transmission circuit is in the state where the cell transmission enable signal permits cell transmission. Accurately regulate cell transmission by transmitting cells to the cell transmission line and not transmitting cells when the cell transmission permission signal does not permit cell transmission. Ukoto can.

According to another aspect of the present invention, the memory circuit outputs the cell transmission permission signal after storing it for a fixed cell time, and outputs it. When the reset pulse is input to and the reset enable signal permits resetting, the count value is reset, and when the cell transmission request signal indicates a cell transmission request, the count value is incremented by 1 and the output of the memory circuit is When the cell output permission is indicated and the storage circuit use permission signal indicates the countdown, the countdown is performed by 1, and the comparison circuit compares the threshold value set in the register with the count value of the up / down counter to open / close the gate. When the gate is closed, the up / down counter is decremented by 1 and the cell transmission permission signal is sent. Indicates that if there is no cell transmission request on the cell transmission request signal or the gate is closed, cell transmission is not permitted, and if there is a cell transmission request on the cell transmission request signal and the gate is open. If the cell transmission circuit is in the state in which cell transmission is permitted, the cell transmission circuit transmits the cell to the cell transmission line when the cell transmission permission signal is in the state in which cell transmission is permitted, and the cell transmission permission signal permits cell transmission. By not transmitting the cell in the non-use state, it is possible to accurately regulate the cell transmission.

The counter circuit according to claim 4 outputs a reset pulse, the memory circuit delays the cell request signal based on the count value of the counter circuit and the write / read signal, and the sequential circuit waveforms the delayed cell request signal. The output according to claim 3, which is shaped and output as a delay circuit output, and the up / down counter uses a reset pulse output from a counter circuit in the memory circuit instead of the reset pulse output from the cycle generation counter described in claim 3. By performing the reset operation of, it is possible to accurately regulate cell transmission.

The opening and closing of the gate in claim 5 is performed by the output of the OR gate. When the gate is closed, the first and second up / down counters are decremented by one, and the storage circuit in the first and second control circuits. The operations of the up / down counter, the comparison circuit, and the register other than those described above operate in the same manner as the operation described in claim 4, whereby the cell transmission can be accurately controlled.

The opening and closing of the gate in claim 6 is performed by the output of the OR gate, the first and second up / down counters are counted down by 1 when the gate is closed, and the other operation is the operation of claim 4. The first control circuit, the storage circuit, the up / down counter, the comparison circuit,
The operation of the register other than the above operates in the same manner as the operation described in claim 1, and the operation of the up / down counter, the comparison circuit, and the register in the second control circuit other than the above operation is the same as the operation described in claim 2. The cell transmission control can be accurately performed by operating the above.

The gate signal in claim 7 is always opened at the beginning of one cell time, and when the cell transmission request signal indicates a cell transmission request signal, the cell transmission permission signal is started at the beginning of one cell time. Becomes an enable state, at which time the up / down counter can count up by 1, and the storage circuit stores the state of the cell transmission enable signal after the timing when the comparison circuit opens and closes the gate. By making the configuration and the operation similar to the configurations and operations described in claim 1 or 2 or 3 or 4 or 5 or 6, it is possible to accurately regulate the cell transmission.

The up / down counter according to claim 8 counts down by one when the output of the storage circuit is significant at the beginning of one cell time, and then the comparison circuit determines whether the value of the up / down counter is equal to the value of the register or the up / down counter. When the counter value is larger and the cell transmission request signal is significant, the gate is closed, and at this time, unlike the cell transmission restriction circuit according to claim 7, the up / down counter does not count down by one, and By making the configuration and the operation similar to the configuration and the operation described in claim 7, it is possible to accurately regulate cell transmission.

The monitoring processing circuit according to claim 9 receives a cell from the cell transmission circuit, and when a valid cell is received, the monitoring processing circuit according to claim 1 or 2 or 3 or 4 or 5 or 6 or 7
Alternatively, the cell transmission request signal according to claim 8 is output,
Alternatively, the cell transmission permission signal described in 2 or 3 or 4 or 5 or 6 or 7 or 8 is received, and when the cell transmission permission signal is significant, the received valid cell is output to the transmission path to accurately transmit and receive the cell. Regulations can be made. Further, the monitoring processing circuit receives a cell from the transmission line, and outputs a cell reception signal when a valid cell is received.
Or the cell transmission request signal according to claim 3 or 4 or 5 or 6 or 7 or 8 is output, and the cell transmission permission signal according to claim 1 or 2 or 3 or 4 or 5 or 6 or 7 or 8 is received. When the cell transmission permission signal is significant, the received and transmitted valid cells can be output to the cell reception circuit to accurately control the cell transmission and reception.

[0041]

EXAMPLES Example 1. An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows an embodiment of a cell transmission control circuit corresponding to claim 1. In FIG. 1, 101 is a cell sending circuit, 102 is a gate, 103 is a memory circuit, 104 is an up / down counter, 105 is a comparison circuit, 106 is a register, and 109 is a count control circuit. Further, 10 is a cell transmission request signal, 11 is a cell transmission permission signal, 12 is a transmission line, 13 is a memory circuit output, 14 is a count value of an up / down counter, 15 is a comparison circuit output, and 16 is a register value.

FIG. 2 is an operation diagram of the embodiment shown in FIG. Figure 2
In this example, there is no request for at least 3 cells and the cell transmission permission signal is not significant for 3 cells or more before the request signal A is input. Since the cell regulation window is set to 3 cells, the time for delaying the cell transmission request signal 10 in the storage circuit 103 is 3 cells time.
Therefore, in FIG. 2, 15 is set to “L” 3 hours after the input of the request signal A. In the figure, T1 to T6 indicate windows to be regulated, and the windows are shifted every cell time. This window is hereinafter referred to as a sliding window. 1 cell time is 1
It corresponds to the transmission time of a cell, for example, 156 Mb /
When a cell is transmitted in s, one cell is 424 bits, so 424/156 Mb / s = 2700 ns, and one cell time is about 2700 ns. In this example, register value 1
It is assumed that 6 is set to 2 and the comparison circuit output is set to "L" when the count value 14 becomes 3 or more. With this setting, cell transmission is restricted so that no more than 2 cells are output in any 3 cell section.

1 and 2, the cell transmission circuit 10
The cell transmission request signal 10 is output from 1 to the gate 102 and the up / down counter 104. The up-down counter 104 counts up 1 when the cell transmission request signal 10 is "H", and counts up 1 when the memory circuit output 13 is "H".
Count down. In FIG. 2, the count value 14 of the up / down counter is 1 for the A request signal, 2 for the B request signal, and the memory circuit output 13 is "H" for the C request signal. Because the count-up and count-down cancel each other, the count value of the up-down counter is 14
Remains 2. Next, when the D request signal is input, the memory circuit output 13 is "L", so only counting up occurs, the count value 14 becomes 3, and the comparison circuit output 15 becomes "
When the cell transmission permission signal 11 becomes "L", the cell transmission permission signal 11 also becomes "L".
1 determines that cell transmission is not permitted, and does not output a cell on the transmission path 12, or outputs an idle cell. Idle cells are cells that are supposed to be discarded at the physical layer and do not carry valid information. The timing at which the cell transmission circuit 101 determines whether to output a cell is the cell transmission permission signal 11
Is performed after the timing at which the cell can change, and if the result of this determination is that the cell can be transmitted, the cell is output.

In FIG. 2, the change timing of the cell transmission request signal 10 and the change timing of the cell transmission permission signal 11 are written at the same time for simplification of the drawing. Change timing is delayed compared to the change timing of the cell transmission request signal 10.

In FIG. 2, determination is made at the midpoint of one cell time, and the cell is transmitted. In FIG. 2, a, b, c, e, and f are valid cells corresponding to the request signals A, B, C, E, and F.

Count control circuit 109 outputs comparison circuit output 1
When 5 becomes "L", the count value of up / down counter 14
Is counted down by 1 and the count value 14 is returned to 2. The reason for counting down by 1 is that the cell is not output even though it is counting up by 1, so that counting down by 1 causes the actual transmission of the cell to match the count value 14 of the up / down counter. . Further, in this example, the comparison circuit output 15 has a configuration in which "L" is held in one cell section. Therefore, even if the countdown occurs, the comparison circuit output 15 is held at "L" for one cell period. The cell transmission permission signal 11 is stored in the memory circuit 103.
Is also input to the up / down counter 10 as a memory circuit output 13 by delaying this signal by 3 cells.
Output to 4. The number of delay cells in the memory circuit is set in advance.

In FIG. 2, the same operation as described above is performed for E, F and G request signals. Cell transmission permission signal 11
Does not allow the request signals A, B, C, E, and F to send, but does not allow D and G to send. T1
2 cells to transmit for any window in T6
Since it is within the cell, transmission is regulated accurately.

As described above, in this embodiment, the cell transmission regulation circuit is composed of the cell transmission circuit, the memory circuit, the up / down counter, the comparison circuit, the register, the gate, and the count control circuit. It is connected to the cell transmission line, outputs a cell transmission request signal to the gate and up / down counter, inputs the gate output as a cell transmission permission signal and inputs it to the cell transmission circuit and the storage circuit, and outputs the output of the storage circuit to the up / down counter. The count value of the up / down counter is input to the comparison circuit, the output of the register is input to the comparison circuit, the output of the comparison circuit is input to the gate and the counter control circuit, and the storage circuit sets the cell transmission enable signal to a constant value. The cell time is stored and then output, and the up / down counter counts up 1 when the cell transmission request signal indicates a cell transmission request, When the output of the storage circuit indicates the transmission permission of the cell, the count down is performed by 1. The comparison circuit compares the threshold value set in the register with the count value of the up / down counter to open / close the gate and close the gate. The count control circuit counts down the up / down counter by 1 when the cell transmission request signal is not present on the cell transmission request signal, or when the gate is closed, cell transmission is not permitted. If there is a cell transmission request on the cell transmission request signal and the gate is open, the cell transmission is enabled, and the cell transmission circuit indicates that the cell transmission permission signal is in the cell transmission enabled state. The cell transmission circuit does not transmit a valid cell when the cell is transmitted to the transmission line and the cell transmission permission signal does not permit the cell transmission. That.

Example 2. FIG. 3 shows an embodiment of a cell transmission control circuit corresponding to claim 2. In FIG. 3, 101 is a cell transmission circuit, 102 is a gate, 104 is an up / down counter, 105 is a comparison circuit, 106 is a register, 10
Reference numeral 7 is a cycle generation counter, and 109 is a count control circuit. Further, 10 is a cell transmission request signal, 11 is a cell transmission permission signal, 12 is a transmission line, 14 is an up / down counter count value, 15 is a comparison circuit output, 16 is a register value, and 17 is a reset signal.

FIG. 4 is an operation diagram of the embodiment shown in FIG. Figure 4
2, T1, T2, and T3 are windows to which restrictions are applied, and this window is a window of a fixed phase, unlike the window of FIG. Hereinafter, this window is called a fixed window. In this embodiment, cell transmission control can be performed on a fixed window. The register value 16 is set to 2, and control is performed so that three or more cells are not generated in one window.

In FIGS. 3 and 4, the cycle generation counter 107 resets the up / down counter 104 every three cells. The cell transmission circuit 101 outputs the cell transmission request signal 10 to the gate 102 and the up / down counter 104. When the regulation is not applied, the output of the comparison circuit is "H", so that the cell transmission request signal 10 is output as it is as the cell transmission permission signal 11. Cell transmission permission signal 1
1 is input to the cell transmission circuit 101, and the up / down counter 104 counts up by 1 when the cell transmission request signal 10 is "H".

In FIG. 4, the count value of the up / down counter is 1
4 changes from 0 to 1 for the A request signal and 2 for the B request signal. When the request signal is C, the count value 14 is first reset to 0 and then becomes 1. When the request signal is D, the count value 14 is 2. When the request signal is E, the count value 1 is 1.
4 becomes 3. At this time, the comparison circuit output 15 becomes "L" and the cell transmission permission signal also becomes "L". When the cell transmission permission signal 11 becomes "L", the cell transmission circuit 101 determines that cell transmission is not permitted, and either does not output the cell on the transmission line 12 or outputs an idle cell.
The timing at which the cell transmission circuit 101 determines whether or not to output a cell is performed after the timing at which the cell transmission permission signal 11 may change. As a result of this determination, if the cell can be transmitted, the cell is output. To do. In FIG. 4, determination is made at the midpoint of one cell time, and the cell is transmitted.

Count control circuit 109 outputs comparison circuit output 1
When 5 becomes "L", the count value of up / down counter 14
Is counted down by 1 and the count value is returned to 2. The reason for counting down by 1 is that the cell is not output even though it is counting up by 1, so that counting down by 1 causes the actual transmission of the cell to match the count value 14 of the up / down counter. . Further, in the present example, the comparison circuit output 15 has a configuration in which it is held at "L" for one cell section. Therefore, even if the countdown occurs, the output of the comparison circuit is held at "L" for one cell period.

In FIG. 4, the same operation as above is performed for the F and G request signals. The cell transmission request signal 11 permits transmission of request signals A, B, C, D, F, and G, and does not permit transmission of E. T1, T
Since the number of cells to be transmitted in any of the windows of 2 and T3 is within 2 cells, the transmission is regulated accurately.

As described above, in this embodiment, the cell transmission regulation circuit is composed of the cell transmission circuit, the cycle generation counter, the up / down counter, the comparison circuit, the register, and the gate count control circuit. It is connected to the cell transmission line, inputs the cell transmission request signal to the gate and the up / down counter, uses the gate output as the cell transmission permission signal and the cell transmission circuit, and inputs the output of the cycle generation counter to the up / down counter. Then, the count value of the up / down counter is input to the comparison circuit, the output of the register is input to the comparison circuit, the output of the comparison circuit is input to the gate and the count control circuit, and the cycle generation counter is the up / down counter at regular intervals. When the cell transmission request signal indicates a cell transmission request, the up / down counter is set to 1 The comparator circuit compares the threshold value set in the register with the count value of the up counter to open / close the gate. When the gate is closed, the count control circuit counts down the up / down counter by 1, The cell transmission permission signal is in a state in which cell transmission is not permitted when there is no cell transmission request on the cell transmission request signal or when the gate is closed, and there is a cell transmission request on the cell transmission request signal. When the gate is open, the cell transmission is enabled, and the cell transmission circuit transmits the cell to the cell transmission line when the cell transmission permission signal is in the state where the cell transmission is permitted, and the cell transmission permission signal is transmitted to the cell. The feature is that the cell is not transmitted when the transmission of the cell is not permitted.

Example 3. FIG. 5 shows an embodiment of a cell transmission control circuit corresponding to claim 3. FIG. 5 shows that the cell transmission control circuit of the first embodiment is provided with the cycle counter 107 of the second embodiment.
The reset signal 17 is connected to the up / down counter, and the storage circuit use permission signal 18 and the reset permission signal 19 are input to the up / down counter 104. The up / down counter 104 outputs the storage circuit when the storage circuit use permission signal 18 is significant. The countdown operation by 13 is performed, and when the reset permission signal 19 is significant, the reset operation by the reset signal 17 is performed. If the memory circuit use permission signal 18 is set to be significant and the reset permission signal 19 is set to be insignificant in this configuration, this circuit can regulate cell transmission by a sliding window as in the first embodiment. If the memory circuit use permission signal 18 is made insignificant and the reset permission signal 19 is set to be significant, this circuit can regulate cell transmission by a fixed window as in the second embodiment. Therefore, if this circuit is implemented as an LSI, for example, it is possible to deal with either a sliding window or a fixed window with one LSI.

As described above, in this embodiment, the cell transmission regulation circuit includes the cell transmission circuit, the cycle generation counter, the storage circuit,
It consists of an up / down counter, a comparison circuit, a register, and a gate count control circuit.The cell transmission circuit is connected to the cell transmission line, outputs a cell transmission request signal to the gate and up / down counter, and outputs the gate output to the cell. It is used as a transmission enable signal and is also input to the cell transmission circuit and the memory circuit. The output of the cycle generation counter is input to the up / down counter as a reset signal. The output of the memory circuit is input to the up / down counter. The reset enable signal is input to the up / down counter, the count value of the up / down counter is input to the comparison circuit, the output of the register is input to the comparison circuit, the output of the comparison circuit is input to the gate and the count control circuit, and the storage circuit Outputs the cell transmission enable signal after storing it for a fixed cell time, and the cycle generation counter It outputs a reset pulse to the down-counter, and the up-down counter resets the count value when the reset pulse is input on the reset signal and the reset enable signal is in the state of permitting the reset, and the cell transmission request signal indicates the cell When the transmission request is indicated, the count is incremented by 1. When the output of the storage circuit indicates the transmission permission of the cell and the storage circuit use permission signal indicates the countdown, the count is reduced by 1, and the comparison circuit is
The threshold value set in the register is compared with the count value of the up / down counter to open / close the gate. When the gate is closed, the count control circuit counts down the up / down counter by 1 and the cell transmission enable signal is transmitted to the cell. When there is no cell transmission request on the request signal or when the gate is closed, cell transmission is not permitted, and when there is a cell transmission request on the cell transmission request signal and the gate is open. When the cell transmission circuit is in the state of permitting cell transmission, the cell transmission circuit transmits the cell to the cell transmission line when the cell transmission permission signal is in the state of permitting cell transmission, and the cell transmission permission signal is in the state of not permitting cell transmission. It is characterized by not sending a cell when.

Example 4. FIG. 6 shows an embodiment of a cell transmission control circuit corresponding to claim 4. In FIG. 6, the cycle generation counter 107 is deleted from the third embodiment, and the reset signal 17 is output from the memory circuit 103 to the up / down counter 104. FIG. 7 shows an example of the memory circuit 104. In FIG. 7, 1031 is a memory, 1032 is a counter circuit, 1033 is a flip-flop, 11 is a cell transmission permission signal, 13 is a delay circuit output, 17 is a reset signal, and 10 is a reset signal.
A counter circuit count value 34 is connected to an address of the memory. Reference numeral 1035 is a write / read control signal and 1036 is a memory output.

FIG. 8 shows the operation of FIG. 7. In this example, the counter circuit repeats counting at 0, 1, 2 and delays the cell transmission permission signal 11 by 4 cells to produce the memory circuit output 13. There is. In FIG. 7 and FIG. 8, the cell read enable signal 11 is the write read signal 1035 “L”.
When, the cell transmission permission signal 11 is the counter circuit count value 10
It is written in the address indicated by 34. In this case, D0 is written at address 0, D1 is written at address 1, D2 is written at address 2.
Next, when the count value 1034 of the counter circuit returns to 0, when the write / read signal 1035 is “H”, the data D0 written at address 0 is read out on the memory output 1036, and the timing adjustment circuit 1033 converts the data. Sampled, latched for one cell, and output as the memory circuit output 13. At this time, D3 is written to address 0, and data is sequentially output with a delay of 4 cells by the same operation. Since the counter circuit 1032 has an address that repeats periodically, the reset signal can be easily generated. For example, if the address 0 of the count value 1034 of the counter circuit is detected, the reset signal 17 as shown in FIG. 8 can be generated. If the reset signal 17 generated in this way is input to the up / down counter 104, the cycle generation counter 107 as shown in the second and third embodiments is not necessary, and a cell transmission regulation control circuit that is downsized is realized. Obtainable.

As described above, in this embodiment, in the cell transmission regulation circuit described in the third embodiment, the cycle generation counter is deleted, and the cell transmission circuit, the storage circuit, the up / down counter, the comparison circuit, the register and the gate, the count. The control circuit performs the operation described in the third embodiment, the storage circuit is a memory,
It is composed of a counter circuit and a sequential circuit, the cell transmission request signal described in the third embodiment is input to the memory, the count value of the counter circuit is input to the address of the memory, and the write / read signal of the memory is input from the counter circuit to the memory. The output from the memory is input to the sequential circuit, the output of the sequential circuit is used as the output of the storage circuit described in Embodiment 3, the reset signal is output from the counter circuit, and the storage circuit outputs the count value of the counter circuit and the write read signal. The cell request signal is delayed based on the above, the sequential circuit waveform-shapes the delayed cell request signal and outputs it as the output of the delay circuit, and the up / down counter is the reset pulse output by the cycle generation counter described in the third embodiment. Instead, the reset operation described in the third embodiment is performed by the reset pulse output from the counter circuit in the memory circuit.

Example 5. FIG. 9 shows an embodiment of a cell transmission control circuit corresponding to claim 5. In FIG. 9, the memory circuit 10
3a, up-down counter 104a, comparison circuit 105
a, the register 106a, and the count control circuit 109a as the first control circuit 100a, the memory circuit 103b, the up / down counter 104b, the comparison circuit 105b, and the register 106b as the second control circuit 100b.
And the output 15a of the comparison circuit in the first control circuit is provided.
And the output 15b of the comparison circuit in the second control circuit is taken and connected to the gate 102 as the OR gate output 15 to open / close the gate 102. Or gate 1
08 is a negative logic OR for the sake of logic. When the gate 102 is closed by the OR gate output 15, the count control circuit 109 counts down the up / down counters 104a and 104b in the first and second control circuits by one. The operations of the cell sending circuit 101 and the gate 102 other than the above are the same as those of the first embodiment, and the memory circuits 103a and 1a
03b, up / down counters 104a and 104b, comparison circuits 105a and 105b, and registers 106a and 106.
b and the operation of the count control circuits 109a and 109b other than the above are the same as in the fourth embodiment. Although the reset signal 17a is output from the memory circuit 103a in this embodiment, the cycle generation counter 107a may be provided and the output of the cycle generation counter 107a may be used as the reset signal 17a as in the second and third embodiments. By configuring the cell transmission regulation control circuit in this way, the two regulation windows can be set independently, and for example, the section of one regulation window can be set short and the section of the other regulation window can be set long.

As described above, in this embodiment, the cell transmission regulation control circuit is an OR gate, the cell transmission circuit and the gate described in the first embodiment, the memory circuit described in the fourth embodiment, the up-down counter, the comparison circuit, It is composed of a first and a second regulation control circuit composed of a register count control circuit, and inputs a cell transmission request signal from the cell transmission circuit to a gate and an up / down counter in the first and second regulation control circuits. Then, the output of the gate is used as a cell transmission permission signal and is input to the cell transmission circuit and the storage circuits in the first and second regulation control circuits, and the outputs of the comparison circuits in the first and second regulation control circuits are output. Enter each into the OR gate,
The output of the OR gate is input to the gate and the count control circuit in the first and second regulation control circuits, the memory circuit output is input to the up-down counter in the first and second regulation control circuits, and reset from the memory circuit. The signal is input to the up / down counter, the count value of the up / down counter is input to the comparison circuit, the output of the register is input as the register value to the comparison circuit, the gate is opened / closed by the output of the OR gate, and the gate is closed. At this time, the count control circuit counts down the first and second up / down counters by one, and the storage circuit, the up / down counter, the comparison circuit, and the register count control circuit in the first and second control circuits perform operations other than the above. It is characterized in that it operates similarly to the operation described in the fourth embodiment.

Example 6. FIG. 10 shows an embodiment of a cell transmission control circuit corresponding to claim 6. In FIG. 10, the storage circuit 103a, the up / down counter 104a, and the comparison circuit 1
05a and the register 106a as the first control circuit 100a, the periodic circuit 107b, the up-down counter 104
b, the comparison circuit 105b, and the register 106b are used as a second control circuit 100b, an OR gate 108 is provided, and an OR of the output 15a of the comparison circuit in the first control circuit and the output 15b of the comparison circuit in the second control circuit is provided. Take or gate output 15
Is connected to the gate 102 to open and close the gate 102. When the gate 102 is closed by the OR gate output 15, the up / down counters 104a and 104b in the first and second control circuits are counted down by one.
Cell transmission circuit 101, gate 102, storage circuit 103
a, up / down counter 104a, comparison circuit 105
Operations of the register a and the register 106a other than the above are the same as those in the first embodiment. Cycle generation counter 107b, up / down counter 104b, comparison circuit 105a, register 106a
Operations other than the above are the same as those in the second embodiment. When the cell transmission regulation control circuit is configured in this way, one regulation window can be a sliding window and the other regulation window can be a fixed window. In the fifth embodiment, such a setting is possible, but in a system in which it is determined in advance that one regulation window is the sliding window and the other regulation window is the fixed window, the memory circuit of the present embodiment is better. Since only one is sufficient, the circuit scale can be reduced.

As described above, in this embodiment, the cell transmission regulation control circuit is the first regulation control including the memory circuit, the up / down counter, the comparison circuit, the register, and the counter control circuit described in the first embodiment. A circuit, a second regulation control circuit including an up / down counter, a period counter, a comparison circuit, a register, and a counter control circuit described in the second embodiment, an OR gate, and a cell transmission circuit and a gate described in the first embodiment. The cell transmission circuit inputs a cell transmission request signal to a gate and an up / down counter in the first and second regulation control circuits, and outputs the gate as a cell transmission permission signal and at the same time to the cell transmission circuit and the first circuit. 1 into the storage circuit in the cell transmission regulation control circuit
The output of the comparison circuit in the cell transmission regulation control circuit is input to the OR gate, and the output of the OR gate is input to the gate and the first gate.
Input to the counter control circuit in the second control circuit, the memory circuit output in the first control circuit to the up-down counter, the count value of the up-down counter to the comparison circuit, The output is input as a register value to the comparison circuit, the output of the cycle counter in the second regulation control circuit is input to the up / down counter, the count value of the up / down counter is input to the comparison circuit, and the output of the register is compared as the register value. Input to the circuit, the gate is opened / closed by the output of the OR gate, and when the gate is closed, the counter control circuit counts down the first and second up / down counters by one, and other operations are described in the fourth embodiment. The operation of the first control circuit, the storage circuit, the up-down counter, the comparison circuit, the register, the counter control circuit The operation other than that is the same as the operation described in the first embodiment, and the operation other than the above operations of the up / down counter, the comparison circuit, the register, and the counter control circuit in the second control circuit is the same as the operation described in the second embodiment. It is characterized in that it operates similarly.

In this embodiment, the first control circuit is based on the circuit shown in the first embodiment, and the second control circuit is based on the circuit shown in the second embodiment. In the fifth example, the first control circuit and the second control circuit are configured based on the circuit shown in the fourth example, but the first and second control circuits are independently formed in the first example or the first example. It is also possible to configure based on the circuit of the second embodiment, the third embodiment, or the fourth embodiment.

Example 7. FIG. 11 shows an embodiment of a cell transmission control circuit corresponding to claim 7. In this embodiment, the configuration corresponds to that of the first embodiment. In FIG. 11, each block and signal name are the same as those in the first embodiment, and the preconditions for the cell regulation window are the same as those in the first embodiment, and the description thereof will be omitted.

FIG. 12 is a diagram showing the operation of FIG. 11 and 12, the cell transmission request signal 10 is output from the cell transmission circuit 101 to the gate 102. During the first ΔT of one cell time, the comparison circuit output 15 is always "H", and the gate 102 is open. Further, if the up-down counter 104 is configured to be able to count up 1 during ΔT at the beginning of one cell time, when the cell transmission request signal 10 is “H” at the beginning ΔT of one cell time, cell transmission is permitted. The signal 11 becomes "H", and the up / down counter 104 counts up by 1. The up / down counter 104 counts down by 1 when the memory circuit output 13 is "H".

In FIG. 12, the count value 14 of the up / down counter is 1 for the A request signal, 2 for the B request signal, and 2 for the C request signal.
Since it is also "H", the count up and count down cancel each other, and the count value 14 of the up / down counter is 2
It remains. Next, when the D request signal is input, the memory circuit output 13 is "L", so only counting up occurs, the count value 14 becomes 3, the comparison circuit output 15 becomes "L", and the cell transmission permission signal 11 also becomes. It becomes "L". When the cell transmission permission signal 11 becomes "L", the cell transmission circuit 101 determines that cell transmission is not permitted, and the transmission line 12
No cells are output above or idle cells are output. The timing at which the cell transmission circuit 101 determines whether or not to output a cell is performed after the timing at which the cell transmission permission signal 11 may change. As a result of this determination, if the cell can be transmitted, the cell is output. To do. In FIG. 12, the determination is made at the midpoint of one cell time, and the cell is transmitted. 12, a, b, c, e, and f are valid cells corresponding to the request signals A, B, C, E, and F. When the comparison circuit output 15 becomes "L", the count control circuit 109 counts down the count value 14 of the up / down counter by 1 and returns the count value 14 to 2. The reason for counting down by 1 is that the cell is not output even though it is counting up by 1, so that counting down by 1 causes the actual transmission of the cell to match the count value 14 of the up / down counter. .

Further, in the present example, the comparison circuit output 15 has a structure in which "L" is held in one cell section. Therefore, even if the countdown occurs, the comparison circuit output 15 is held at "L" for one cell period. Further, in order to perform the countdown, the first ΔT of the next one-cell time is the comparison circuit output 15
Becomes "H". Therefore, at the beginning of one cell time, ΔT, the comparison circuit output 15 is always "H". The cell transmission permission signal 11 is also input to the memory circuit 103. Storage circuit 103
Stores the state of the cell transmission permission signal 11 at a timing after the comparison circuit 105 opens and closes the gate 102. In FIG. 12, for example, the state of the cell transmission permission signal 11 at the midpoint of one cell time is stored. The memory circuit 103 delays this signal by 3 cells and outputs it as the memory circuit output 13 to the up / down counter 104. In FIG. 12, the same operation as above is performed for E, F, and G request signals. The cell transmission permission signal 11 permits transmission of request signals A, B, C, E, and F, but does not permit transmission of D and G. Since the number of cells to be transmitted in any of the windows T1 to T6 is within 2 cells, transmission is accurately regulated.

As described above, this embodiment does not input the cell transmission request signal to the up / down counter in the cell transmission regulation circuit described in the first, second, third, fourth, fifth or sixth embodiment, and permits cell transmission. The signal is input to the up / down counter, the gate signal is always opened at the beginning of one cell time, and when the cell transmission request signal indicates a cell transmission request, the cell transmission permission signal is started at the beginning of one cell time. Becomes the enable state, at which time the up / down counter can count up by 1, and the storage circuit stores the state of the cell transmission enable signal after the timing when the comparison circuit opens and closes the gate. The configuration and operation are the same as those described in the first or second or third or fourth or fifth or sixth embodiment.

Example 8. FIG. 13 shows an embodiment of a cell transmission control circuit corresponding to claim 8. In this embodiment, the configuration corresponds to that of the first embodiment. In FIG. 13, each block and signal name are the same as those in the first embodiment, and the preconditions of the cell regulation window are the same as those in the first embodiment, and the description thereof will be omitted. FIG. 14 is a diagram showing the operation of FIG.

13 and 14, cell transmission request signal 10 is output from cell transmission circuit 101 to gate 102 and comparison circuit 105. Up-down counter 104
Indicates that the memory circuit output 13 is "D" during the first ΔT of one cell time.
When it is H ", it counts down by 1. Next, the comparison circuit 1
05 is up / down counter count value 14 and register value 1
6 are compared, and if they are equal or the count value of the up / down counter count value 14 is larger and the cell transmission request signal 10 is "H", the comparison circuit output 15 is set to "L",
In other cases, the comparison circuit output 15 is set to "H". The comparison circuit 105 may detect only the equality, but the magnitude relation is also compared so as not to malfunction when the power is turned on. The comparison circuit output 15 holds the initial value of 1 cell time for 1 cell time. When both the comparison circuit output 15 and the cell transmission request signal 10 are "H", the cell transmission permission signal 11 is "H". Up-down counter 104
Counts up 1 when the cell transmission permission signal 11 becomes "H".

In FIG. 14, the count value 14 of the up / down counter becomes 1 for the A request signal, 2 for the B request signal, and 2 for the C request signal in the latter half of each cell time. Since 13 is also "H", it is counted down during ΔT and becomes 1, but is counted up thereafter, and this count up and count down cancel each other out, and the count value 14 of the up / down counter becomes 2. Next, when the D request signal is input, the memory circuit output 1
Since 3 is "L", the countdown does not occur, the count value 14 remains 2 at the beginning of one cell time, the comparison circuit output 15 becomes "L", and the cell transmission permission signal 11 also becomes "L". When the cell transmission permission signal 11 becomes "L", the cell transmission circuit 101 determines that cell transmission is not permitted, and either does not output the cell on the transmission line 12 or outputs an idle cell. The timing for determining whether or not the cell transmission circuit 101 outputs a cell is the cell transmission permission signal 1
It is performed after the timing when 1 may change, and if the result of this determination is that the cell can be transmitted, the cell is output. In FIG. 14, the determination is made at the midpoint of one cell time, and the cell is transmitted. In FIG. 14, a, b, c, e, and f are request signals A,
It is a valid cell corresponding to B, C, E, and F.

In FIG. 14, the same operation as described above is performed for E, F, and G request signals. Cell transmission permission signal 1
No. 1 permits transmission of request signals A, B, C, E and F, but does not permit transmission of D and G. T1
2 cells to transmit for any window in T6
Since it is within the cell, transmission is regulated accurately.

As described above, according to this embodiment, the cell transmission restriction circuit outputs the cell transmission request signal to the comparison circuit, and the comparison circuit output is output to the gate only, not to the up / down counter. The counter counts down by 1 when the memory circuit output is significant at the beginning of one cell time, and then the comparator circuit counts when the value of the up / down counter is equal to the value of the register or the up / down counter value is larger, and When the cell transmission request signal is significant, the gate is closed, and at this time, the above-described first to first embodiments are performed.
Unlike the cell transmission regulation circuit of No. 7, the up-down counter is not counted down by one, and other configurations and operations are the same as the configurations and operations described in the seventh embodiment.

Example 9. FIG. 15 shows a cell transmission regulation circuit corresponding to claim 9. In this embodiment, the configuration corresponds to that of the first embodiment. In the figure, 301 is a cell transmission circuit, 2
Reference numeral 01 is a monitoring processing circuit, and the other blocks are the same as those in the first embodiment, and therefore description thereof is omitted. Further, 20 is a reception cell signal, 12 is a transmission line, and other signals are the same as those in the first embodiment, and therefore the description thereof is omitted. FIG. 16 shows an embodiment of the monitoring processing circuit in FIG. 15, in which 210 is a delay circuit, 202 is a cell reception detection circuit, 230 is an output processing circuit, and 240 is a latch. 22 is the output of the delay circuit,
Reference numeral 23 is a latch output, 10 is a cell transmission request signal, and 11 is a cell transmission permission signal.

FIG. 17 is a diagram for explaining the operation of FIG. 16, in which a, b and c are valid cells, and A, B and C are codes corresponding to valid cells. 15, FIG. 16, and FIG.
The cell transmission circuit 301 outputs a cell on the transmission cell signal 20, and the monitoring processing circuit 201 detects a valid cell on the transmission cell signal 20 in the cell reception detection circuit 202 and makes the cell transmission request signal 10 significant. The operation as to whether or not the cell transmission permission signal 11 is significant with respect to the significance signal on the cell transmission request signal 10 is the same as that in the first embodiment, and therefore its explanation is omitted.
In FIG. 17, transmission is permitted for cells a and c, but transmission is not permitted for cell b.

In FIG. 2 for explaining the operation of the first embodiment, the change timing of the cell transmission request signal 10 and the change timing of the cell transmission permission signal 11 are written at the same time for simplification of the drawing. Therefore, the change timing of the cell transmission permission signal 11 lags behind the change timing of the cell transmission request signal 10 as shown in FIG. Latch 240
Latches the cell transmission enable signal 11 at the midpoint of one cell time and uses it as the latch output 23. The delay circuit delays the cells on the received cell signal 20 to match the timing of the latch output, and outputs the delayed cell output 22. Output processing circuit 230
Outputs the cell on the delay circuit output 22 on the transmission line 12 when the latch output 23 is "H", and does not output the cell or outputs the idle cell when the latch output is "L".

As described above, this embodiment is connected to the cell transmission circuit and replaces the cell transmission circuit of the cell transmission restriction circuit described in the first or second or third or fourth or fifth or sixth or seventh or eighth embodiment. Further, a monitoring processing circuit is provided, and the other configurations are the configurations described in the first or second or third or fourth or fifth or sixth or seventh or eighth embodiment, and the output of the cell transmitting circuit is input to the monitoring processing circuit to perform the monitoring processing. The output of the circuit is connected to the transmission line, the monitoring processing circuit receives the cell from the cell transmission circuit, and when the valid cell is received, the cell according to the embodiment 1 or 2 or 3 or 4 or 5 or 6 or 7 or 8 Output a transmission request signal, and the embodiment 1 or 2 or 3 or 4 or 5 or 6 or 7 or 8
When the cell transmission permission signal described in 1) is received and the cell transmission permission signal is significant, the received valid cell is output to the transmission path.

Example 10. FIG. 18 shows a cell reception regulation circuit according to claim 9. In this embodiment, the configuration is the same as that of the first embodiment.
It corresponds to. In the figure, reference numeral 302 is a cell receiving circuit, and the other blocks and signal names are the same as those in the ninth embodiment, and therefore their explanations are omitted. In FIG. 18, valid cells on the transmission line 12 are regulated by the monitoring processing circuit 201 as in the case of the ninth embodiment and output to the cell receiving circuit. Therefore, the cell receiving circuit can accurately receive the restricted cell.

As described above, this embodiment is connected to the cell reception circuit, and replaces the cell transmission circuit of the cell transmission regulation circuit described in the embodiment 1 or 2 or 3 or 4 or 5 or 6 or 7 or 8. In addition, a monitoring processing circuit is provided, and the other configuration is the configuration described in Embodiment 1 or 2 or 3 or 4 or 5 or 6 or 7 or 8, and the transmission line is connected to the monitoring processing circuit to output the monitoring processing circuit. Is connected to a cell receiving circuit, and the monitoring processing circuit receives a cell from the transmission line and receives a valid cell.
Or, the cell transmission request signal described in 4 or 5 or 6 or 7 or 8 is output, and the cell transmission permission signal described in Example 1 or 2 or 3 or 4 or 5 or 6 or 7 or 8 is received, and the cell When the sending permission signal is significant, the received valid cell is output to the cell receiving circuit.

[0082]

As described above, according to the present invention, since the up / down counter is counted down when cell transmission is not permitted in the cell communication regulation circuit, it is possible to accurately regulate cell communication.

[Brief description of drawings]

FIG. 1 is a diagram showing an embodiment according to claim 1 of the present invention.

FIG. 2 is a diagram showing the operation of the first embodiment.

FIG. 3 is a diagram showing an embodiment according to claim 2 of the present invention.

FIG. 4 is a diagram showing the operation of the second embodiment.

FIG. 5 is a diagram showing an embodiment according to claim 3 of the present invention.

FIG. 6 is a diagram showing an embodiment according to claim 4 of the present invention.

7 is a diagram showing a configuration of a memory circuit of FIG.

FIG. 8 is a diagram showing the operation of FIG. 6;

FIG. 9 is a diagram showing an embodiment according to claim 5 of the present invention.

FIG. 10 is a diagram showing an embodiment according to claim 6 of the present invention.

FIG. 11 is a diagram showing an embodiment according to claim 7 of the present invention.

FIG. 12 is a diagram showing the operation of the seventh embodiment.

FIG. 13 is a diagram showing an embodiment according to claim 8 of the present invention.

FIG. 14 is a diagram showing the operation of the eighth embodiment.

FIG. 15 is a diagram showing an embodiment according to claim 9 of the present invention.

16 is a diagram showing a configuration of the monitoring processing circuit of FIG.

FIG. 17 is a diagram showing the operation of the ninth embodiment.

FIG. 18 is a diagram showing an embodiment according to claim 9 of the present invention.

FIG. 19 is a diagram showing a conventional cell reception regulation circuit.

FIG. 20 is a diagram showing an operation of a conventional cell reception regulation circuit.

[Explanation of symbols]

 101 Cell Transmission Circuit 102 Gate 103 Storage Circuit 104 Up-Down Counter 105 Comparison Circuit 106 Register 107 Cycle Counter 108 OR Gate 109 Count Control Means 201 Monitoring Processing Circuit 202 Cell Reception Detection Circuit 210 Delay Circuit 230 Output Processing Circuit 240 Latch 301 Cell Transmission Circuit 302 Cell receiving circuit 1031 Memory 1032 Counter circuit 1033 Sequential circuit

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[Procedure amendment]

[Submission date] August 11, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] Full text

[Correction method] Change

[Correction content]

[Document name] Statement

[Title of Invention] Cell communication control circuit

[Claims]

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cell transmission / reception regulation circuit which regulates cell output when transmitting cells to a transmission line in asynchronous transfer mode and regulates reception when cells are received. is there.

[0002]

2. Description of the Related Art FIG. 19 shows, for example, a reception regulation circuit for a cell shown in B-698 "Policing method for a wide range VBR signal capacity defining parameter value" at the 1991 Spring National Convention of the Institute of Electronics, Information and Communication Engineers. In the figure, 201 is a monitoring processing circuit, 202 is a cell reception detection circuit, 103 is a storage circuit, 1
04 is an up-down counter, 105 is a comparison circuit, 10
6 is a register. Further, 12 is a transmission path, 21 is a transmission cell signal, 22 is a cell reception detection signal, 13 is a memory circuit output, 14 is a count value of an up / down counter, 15 is a comparison circuit output, and 16 is a register value.

Next, the operation will be described. FIG. 20 shows FIG.
It is a figure for demonstrating operation | movement of the circuit of FIG. 19 and 20, when no restriction is imposed by the monitoring process, the cell on the transmission line 12 is directly transmitted to the transmission cell signal 21.

On the other hand, for example, when a restriction is imposed that only the transmission of up to 2 cells is allowed in 3 cell time, the following operation is performed. Upon receiving a cell, the cell reception detection circuit 202 makes the cell reception detection signal 22 significant and outputs it to the storage circuit 103 and the up / down counter 104. The memory circuit delays the cell reception detection signal 22 for a preset time and outputs it as the memory circuit output 13. The up / down counter 104 receives the cell reception detection signal 2
When 2 is significant, the count value is incremented by 1, and when the memory circuit output 13 is significant, the count value is decremented by 1 and output as the count value 14. The cell reception signal 22 and the memory circuit output 13 are described as "H" significant.

In FIG. 20, the delay time of the memory circuit is 3 cell time. Further, in this figure, it is assumed that the cell reception signal 20 has not been significant for at least 3 cell time before the request signal A. Also T1 to T6
Indicates a window for applying restrictions.

In FIG. 20, the count value 14 is counted up to 1 by the request signal A, and the count value 14 is counted up to 2 by the request signal B. This value corresponds to the number that is significant in the cell reception detection signal 22 in the window T1. Further, when the request signal is C, the delay circuit output becomes significant, so the count-up and the count-down cancel each other out, and the count value 14 remains 2. This value corresponds to the number that is significant in the cell reception detection signal 22 in the window T2.

Therefore, with this configuration, the count value 14
Indicates the cell reception detection signal 2 in each of the windows T1 to T6.
It agrees with the number that is significant in 2. The register is set in advance as a value that regulates the number of cells that can be transmitted within one window (2 in this case), and is output as a register value 16. The comparison circuit 15 compares the count value 14 with the register value 16, and when the register value 16 is larger, the comparison circuit output 15 is set to "L". In this example, the register value 16 is set to 2 and the comparator circuit output is set to "L" when the count value 14 becomes 3 or more.

In the monitoring process, the output 15 cells of the comparison circuit are "L".
Then, the cell is discarded. Alternatively, processing such as raising the discard priority is performed, and the cell is transmitted to the transmission cell signal 21. By doing so, it is possible to restrict the transmission to only two cells within an arbitrary 3 cell time or more.

[0009]

The conventional cell reception regulation circuit is configured as described above, and when actually discarding a cell in the monitoring processing circuit, the up-down counter is not notified of the discarding, so The count value of the down counter does not match the number of cells that sent cells in the monitoring circuit,
There was a problem that the regulation could not be carried out accurately.

For example, at the time when the cell reception detection signal 22 in FIG. 20 indicates that the signal D is received, the comparison circuit output 15 changes from H to L, and then the signals E, F, G.
The comparison circuit output 15 keeps L even when the signal is received. Therefore, the signals D, E, F, and G are all regulated, and the cells are discarded in the monitoring processing circuit. Actually, maximum 2 in 3 cell time
When it is possible to send data up to the cells, even if this regulation can be achieved by discarding the cells corresponding to the signal D and the signal G, the cells corresponding to the signal E and the signal F are also discarded. There was a problem that regulations could not be enforced.

Even when the conventional cell reception regulation circuit is applied to the cell transmission regulation circuit, since the cell transmission signal 21 is connected to the transmission line, when the cell is actually discarded by the monitoring processing circuit, the cell transmission regulation circuit will be displayed on the transmission line. There is a problem that the regulation cannot be performed accurately because the transmitted cell and the count value of the up-down counter do not match.

The present invention has been made to solve the above problems, and an object thereof is to obtain a cell transmission / reception circuit capable of accurately controlling cell transmission / reception.

[0013]

A cell communication regulation circuit according to the invention as defined in claim 1 comprises, for example, a cell transmission circuit, a memory circuit, an up / down counter, a comparison circuit, a register, a gate, and a count control circuit. , The cell transmission circuit is connected to the cell transmission line, outputs the cell transmission request signal to the gate and the up / down counter, and outputs the output of the gate as the cell transmission permission signal and inputs it to the cell transmission circuit and the storage circuit. The output is input to the up / down counter, the count value of the up / down counter is input to the comparison circuit, the output of the register is input to the comparison circuit, and the output of the comparison circuit is input to the gate and the count control circuit .

A particular feature of the cell communication regulation circuit according to the present invention is that a count control circuit is provided for counting down the count value of the up / down counter when the cell is regulated and is not output. is there. That is, the count control circuit operates so as to input the instruction when the comparison circuit gives an instruction to discard the cell and decrease the counter value in the up-down counter. This allows the up / down counter to decrease the count value even when the cell is discarded in the cell circuit.

Another feature of the present invention is that the memory circuit decreases the count value of the up / down counter via the gate. The number at which this gate becomes an open output indicates the number of cells actually transmitted from the cell circuit, and the memory circuit inputs the number of actually transmitted cells to decrease the value of the up / down counter. It will be.

Therefore, the up / down counter is counted up by the request of the cell, and is decreased by the number of cells actually transmitted by the memory circuit and is decreased by the number of discarded cells by the count control circuit. That is, the value of the up / down counter is counted by the number of transmission requests issued, the number actually transmitted, and the number discarded, which reflects the accurate number of cells.

The cell communication regulation circuit according to the invention described in claim 2 is, for example, a cell transmission circuit, a cycle generation counter,
Up-down counter, comparison circuit, register, gate
It is composed of a count control circuit , the cell transmission circuit is connected to the cell transmission line, the cell transmission request signal is input to the gate and the up / down counter, the output of the gate is used as the cell transmission permission signal and is input to the cell transmission circuit, inputs the output of the period generating counter to the up-down counter, enter the count value of the up-down counter to a comparison circuit, inputs the output of the register to the comparison circuit, the gate and mosquito the output of the comparator circuit
It is input to the und control circuit .

A feature of the cell communication regulation circuit described in claim 2 is that the up-down counter is decreased by the number of cells discarded by the count control circuit as described above. The point is that a cycle generation counter is used instead of the memory circuit. The cycle generation counter outputs a reset signal at a predetermined cycle to reset the counter value of the up / down counter. As a result, the first embodiment can apply the restriction at any arbitrary time, whereas the second embodiment can apply the restriction within the cycle generated by the cycle generation counter. Occurs.

A cell communication regulation circuit according to the invention described in claim 3 is, for example, a cell transmission circuit, a cycle generation counter,
It consists of a memory circuit, an up / down counter, a comparison circuit, a register, a gate and a count control circuit.The cell transmission circuit is connected to the cell transmission line, outputs a cell transmission request signal to the gate and up / down counter, and outputs the gate output. It is used as a cell transmission enable signal, and is also input to the cell transmission circuit and the storage circuit. The output of the cycle generation counter is input as a reset signal to the up / down counter. The output of the storage circuit is input to the up / down counter and the storage circuit use enable signal. And the reset enable signal to the up-down counter, the count value of the up-down counter to the comparison circuit, the output of the register to the comparison circuit, and the output of the comparison circuit to the gate and the count control circuit. is there.

A feature of the cell communication regulation circuit described in claim 3 is that the memory circuit described in claim 1 and the cycle generation counter described in claim 2 are both provided. The point is that selection means is provided for selective use.

In the cell communication regulation circuit according to the invention as defined in claim 4, for example, the cycle generation counter is deleted from the cell generation regulation circuit according to claim 3, and the memory circuit is constituted by a memory, a counter circuit and a timing adjustment circuit . And claim 3
The cell transmission request signal described in 1 is input to the memory, the count value of the counter circuit is input to the address of the memory, the read / write signal of the memory from the counter circuit is input to the memory,
Enter the output from the memory to the timing adjustment circuit, data
The output of the imimating circuit is used as the output of the storage circuit according to claim 3, a reset signal is output from the counter circuit, and the reset signal is input to the up / down counter according to claim 3.

A feature of the cell communication regulation circuit according to claim 4 is that the cycle generation counter uses the counter circuit used in the memory circuit, and thus the cycle generation already exists. The device configuration can be reduced by using the counter circuit of the memory circuit.

The cell communication regulation circuit according to the invention described in claim 5 is, for example, an OR gate, the cell transmission circuit and gate described in claim 1, and the memory circuit described in claim 4, an up-down counter, a comparison circuit, and a register. And count system
The control circuit is composed of first and second regulation control circuits. The cell transmission circuit inputs the cell transmission request signal to the gate and the up / down counter in the first and second regulation control circuits to The output is used as a cell transmission permission signal and is input to the cell transmission circuit and the storage circuits in the first and second regulation control circuits, and the outputs of the comparison circuits in the first and second regulation control circuits are input to the OR gates. Then
The output of the OR gate is input to the gate and the count control circuit in the first and second regulation control circuits, the storage circuit output is input to the up-down counter in the first and second regulation control circuits, and reset from the storage circuit. The signal is input to the up / down counter, the count value of the up / down counter is input to the comparison circuit, and the output of the register is input to the comparison circuit as the register value.

A feature of the cell communication circuit according to claim 5 is that a plurality of regulation control circuits having different regulation standards are provided, and by providing the plurality of regulation control circuits, The point is that an OR gate is provided to generate a signal that satisfies both regulations.

The cell communication regulation circuit according to the invention described in claim 6 is, for example, a memory circuit, an up-down counter, a comparison circuit, a register and a count control circuit according to claim 1.
A first regulation control circuit configured by a path, an up-down counter according to claim 2, a cycle generation counter , a comparison circuit, a second regulation control circuit configured by a register and a count control circuit, and an OR gate. Comprised of the cell transmission circuit and the gate according to the item 1, the cell transmission request signal is input from the cell transmission circuit to the gate and the up / down counter in the first and second regulation control circuits, and the output of the gate is permitted to transmit the cell. The signal is input to the memory circuit in the cell transmission circuit and the first cell transmission regulation control circuit, and the outputs of the comparison circuits in the first and second cell transmission regulation control circuits are respectively input to the OR gates. inputs the output to the count control circuit of the gate and the first and second braking control in the circuit, the up-down counter memory circuit output in the first regulation control circuit Type, enter the count value of the up-down counter to a comparison circuit, and input to the comparison circuit the output of the register as a register value, the second regulation control circuit odor circumferential
The output of the period generation counter is input to the up / down counter, the count value of the up / down counter is input to the comparison circuit, and the output of the register is input to the comparison circuit as the register value.

A feature of the cell communication regulation circuit described in claim 6 is that the plurality of regulation control circuits described in claim 5 regulate cell transmission by different configurations as described in claims 1 to 4. This is the point of implementation.

The cell communication regulation circuit according to the invention as defined in claim 7 is, for example, as defined in claim 1, 2 or 3 or 4.
Alternatively, in the cell transmission restriction circuit described in 5 or 6, the cell transmission request signal is not input to the up / down counter, but the cell transmission permission signal is input to the up / down counter.

A feature of the cell communication regulation circuit according to claim 7 is that the comparison result of the comparison circuit is output after being shifted by a predetermined period, and a cell transmission request from the cell circuit is gated within the predetermined period. Is output to an up / down counter via the.

The cell communication regulation circuit according to the invention as defined in claim 8 is, for example, as defined in claim 1, 2 or 3 or 4.
Alternatively, in the cell transmission restriction circuit described in 5 or 6 or 7, the cell transmission request signal is output to the comparison circuit, and the output of the comparison circuit is only output to the gate but not to the up / down counter.

A feature of the cell communication regulation circuit shown in claim 8 is that in the cell communication regulation circuit shown in claims 1 to 7, the number of cells discarded by the count control circuit is calculated from the counter value of the up-down counter. On the other hand, in the case of claim 8, the count control circuit does not exist, and instead, the cell transmission request from the cell circuit is directly input to the comparison circuit, and the comparison circuit discards the cell. When the determination is made, the up-down counter is not counted up. The up / down counter is not counted when the cell is discarded by the comparison circuit. That is, the counter value of the up-down counter is incremented by the number of cells actually judged to be transmitted by the comparison circuit, and is decreased by the number of cells actually transmitted by the memory circuit. ing.

The cell communication regulation circuit according to the invention shown in claim 9 is connected to, for example, a cell transmission circuit or a cell reception circuit, and the cell communication regulation circuit according to claim 1 or 2 or 3 or 4 or 5
Alternatively, a monitoring processing circuit is provided in place of the cell transmission circuit of the cell transmission regulation circuit according to 6 or 7 or 8, and other configurations are according to claim 1 or 2 or 3 or 4 or 5 or 6 or 7 or 8. The output of the cell transmission circuit is input to the monitoring processing circuit and the output of the monitoring processing circuit is connected to the transmission path, or the transmission path is connected to the monitoring processing circuit and the output of the monitoring processing circuit is input to the cell reception circuit. It is designed to be connected.

[0032]

According to the first aspect of the present invention, the memory circuit outputs the cell transmission permission signal after storing it for a fixed cell time, and outputs the up / down counter by 1 when the cell transmission request signal indicates the cell transmission request. 1 counts down when the output of indicates that cell transmission is permitted, and when the comparator circuit compares the threshold value set in the register with the count value of the up / down counter to open / close the gate and close the gate. Counts down the up / down counter by one, and when the cell transmission request signal has no cell transmission request on the cell transmission request signal or the gate is closed, cell transmission is not permitted, and the cell transmission request signal If there is a cell transmission request above and the gate is open, cell transmission is enabled, and the cell transmission circuit sends a cell transmission enable signal. Cell sends to the transmission line when a state that permits the transmission of cells, the transmission of the exact cell by cell sending circuit does not perform the delivery of the active cell when the cell transmission allowance signal is in a state that does not allow transmission of cells Can meet regulations.

The cycle generation counter in claim 2 resets the up / down counter at regular intervals,
The up / down counter counts up by 1 when the cell transmission request signal indicates a cell transmission request, and the comparison circuit opens and closes the gate by comparing the threshold value set in the register with the count value of the up counter. , When the gate is closed, the up / down counter is decremented by 1 and the cell transmission enable signal is in a state in which cell transmission is not allowed when there is no cell transmission request on the cell transmission request signal or when the gate is closed. If there is a cell transmission request on the cell transmission request signal and the gate is open, cell transmission is enabled, and the cell transmission circuit is in the state where the cell transmission enable signal permits cell transmission. Accurately regulate cell transmission by transmitting cells to the cell transmission line and not transmitting cells when the cell transmission permission signal does not permit cell transmission. Ukoto can.

According to another aspect of the present invention, the memory circuit outputs the cell transmission permission signal after storing it for a fixed cell time, and outputs it. When the reset pulse is input to and the reset enable signal permits resetting, the count value is reset, and when the cell transmission request signal indicates a cell transmission request, the count value is incremented by 1 and the output of the memory circuit is When the cell output permission is indicated and the storage circuit use permission signal indicates the countdown, the countdown is performed by 1, and the comparison circuit compares the threshold value set in the register with the count value of the up / down counter to open / close the gate. When the gate is closed, the up / down counter is decremented by 1 and the cell transmission permission signal is sent. Indicates that if there is no cell transmission request on the cell transmission request signal or the gate is closed, cell transmission is not permitted, and if there is a cell transmission request on the cell transmission request signal and the gate is open. If the cell transmission circuit is in the state in which cell transmission is permitted, the cell transmission circuit transmits the cell to the cell transmission line when the cell transmission permission signal is in the state in which cell transmission is permitted, and the cell transmission permission signal permits cell transmission. By not transmitting the cell in the non-use state, it is possible to accurately regulate the cell transmission.

The counter circuit according claim 4 outputs a reset pulse, the memory circuit is based on delaying the cell request signal count and write / read signal of the counter circuit, data
The imming adjusting circuit waveform-shapes the delayed cell request signal and outputs it as a delay circuit output, and the up / down counter uses a counter circuit in the memory circuit instead of the reset pulse output by the cycle generation counter according to claim 3. By performing the reset operation according to the third aspect by the output reset pulse, it is possible to accurately regulate the cell transmission.

The opening and closing of the gate in claim 5 is performed by the output of the OR gate. When the gate is closed, the first and second up / down counters are decremented by one, and the storage circuit in the first and second control circuits. The operations of the up / down counter, the comparison circuit, and the register other than those described above operate in the same manner as the operation described in claim 4, whereby the cell transmission can be accurately controlled.

The opening and closing of the gate in claim 6 is performed by the output of the OR gate, the first and second up / down counters are counted down by 1 when the gate is closed, and the other operation is the operation of claim 4. The first control circuit, the storage circuit, the up / down counter, the comparison circuit,
The operation of the register other than the above operates in the same manner as the operation described in claim 1, and the operation of the up / down counter, the comparison circuit, and the register in the second control circuit other than the above operation is the same as the operation described in claim 2. The cell transmission control can be accurately performed by operating the above.

The gate signal in claim 7 is always opened at the beginning of one cell time, and when the cell transmission request signal indicates a cell transmission request signal, the cell transmission permission signal is started at the beginning of one cell time. Becomes an enable state, at which time the up / down counter can count up by 1, and the storage circuit stores the state of the cell transmission enable signal after the timing when the comparison circuit opens and closes the gate. By making the configuration and the operation similar to the configurations and operations described in claim 1 or 2 or 3 or 4 or 5 or 6, it is possible to accurately regulate the cell transmission.

The up / down counter according to claim 8 counts down by one when the output of the storage circuit is significant at the beginning of one cell time, and then the comparison circuit determines whether the value of the up / down counter is equal to the value of the register or the up / down counter. When the counter value is larger and the cell transmission request signal is significant, the gate is closed, and at this time, unlike the cell transmission restriction circuit according to claim 7, the up / down counter does not count down by one, and By making the configuration and the operation similar to the configuration and the operation described in claim 7, it is possible to accurately regulate cell transmission.

The monitoring processing circuit according to claim 9 receives a cell from the cell transmission circuit, and when a valid cell is received, the monitoring processing circuit according to claim 1 or 2 or 3 or 4 or 5 or 6 or 7
Alternatively, the cell transmission request signal according to claim 8 is output,
Alternatively, the cell transmission permission signal described in 2 or 3 or 4 or 5 or 6 or 7 or 8 is received, and when the cell transmission permission signal is significant, the received valid cell is output to the transmission path to accurately transmit and receive the cell. Regulations can be made. Further, the monitoring processing circuit receives a cell from the transmission line, and outputs a cell reception signal when a valid cell is received.
Or the cell transmission request signal according to claim 3 or 4 or 5 or 6 or 7 or 8 is output, and the cell transmission permission signal according to claim 1 or 2 or 3 or 4 or 5 or 6 or 7 or 8 is received. When the cell transmission permission signal is significant, the received and transmitted valid cells can be output to the cell reception circuit to accurately control the cell transmission and reception.

[0041]

EXAMPLES Example 1. An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows an embodiment of a cell transmission control circuit corresponding to claim 1. In FIG. 1, 101 is a cell sending circuit, 102 is a gate, 103 is a memory circuit, 104 is an up / down counter, 105 is a comparison circuit, 106 is a register, and 109 is a count control circuit. Further, 10 is a cell transmission request signal, 11 is a cell transmission permission signal, 12 is a transmission line, 13 is a memory circuit output, 14 is a count value of an up / down counter, 15 is a comparison circuit output, and 16 is a register value.

FIG. 2 is an operation diagram of the embodiment shown in FIG. Figure 2
In this example, there is no request for at least 3 cells and the cell transmission permission signal is not significant for 3 cells or more before the request signal A is input. Since the cell regulation window is set to 3 cells, the time for delaying the cell transmission request signal 10 in the storage circuit 103 is 3 cells time.
Therefore, in FIG. 2, 3 seconds after the A request signal is input.
After 13 hours, 13 becomes "H" . In the figure, T1 to T6 indicate windows to be regulated, and the windows are shifted every cell time. This window is hereinafter referred to as a sliding window. 1 cell time is 1
It corresponds to the transmission time of a cell, for example, 156 Mb /
When a cell is transmitted in s, one cell is 424 bits, so 424/156 Mb / s = 2700 ns, and one cell time is about 2700 ns. In this example, the register value 16 is set to 2 and the comparison circuit output is set to "L" when the count value 14 becomes 3 or more. With this setting, cell transmission is restricted so that no more than 2 cells are output in any 3 cell section.

1 and 2, the cell transmission circuit 10
The cell transmission request signal 10 is output from 1 to the gate 102 and the up / down counter 104. The up-down counter 104 counts up 1 when the cell transmission request signal 10 is "H", and counts up 1 when the memory circuit output 13 is "H".
Count down. In FIG. 2, the count value 14 of the up / down counter is 1 for the A request signal, 2 for the B request signal, and the memory circuit output 13 is "H" for the C request signal. Because the count-up and count-down cancel each other, the count value of the up-down counter is 14
Remains 2. Next, when the D request signal is input, the memory circuit output 13 is "L", so only counting up occurs, the count value 14 becomes 3, and the comparison circuit output 15 becomes "
When the cell transmission permission signal 11 becomes "L", the cell transmission permission signal 11 also becomes "L".
1 determines that cell transmission is not permitted, and does not output a cell on the transmission path 12, or outputs an idle cell. Idle cells are cells that are supposed to be discarded at the physical layer and do not carry valid information. The timing at which the cell transmission circuit 101 determines whether to output a cell is the cell transmission permission signal 11
Is performed after the timing at which the cell can change, and if the result of this determination is that the cell can be transmitted, the cell is output.

In FIG. 2, the change timing of the cell transmission request signal 10 and the change timing of the cell transmission permission signal 11 are written at the same time for simplification of the drawing. Change timing is delayed compared to the change timing of the cell transmission request signal 10.

In FIG. 2, determination is made at the midpoint of one cell time, and the cell is transmitted. In FIG. 2, a, b, c, e, and f are valid cells corresponding to the request signals A, B, C, E, and F.

Count control circuit 109 outputs comparison circuit output 1
When 5 becomes "L", the count value of up / down counter 14
Is counted down by 1 and the count value 14 is returned to 2. The reason for counting down by 1 is that the cell is not output even though it is counting up by 1, so that counting down by 1 causes the actual transmission of the cell to match the count value 14 of the up / down counter. . Further, in this example, the comparison circuit output 15 has a configuration in which "L" is held in one cell section. Therefore, even if the countdown occurs, the comparison circuit output 15 is held at "L" for one cell period. The cell transmission permission signal 11 is stored in the memory circuit 103.
Is also input to the up / down counter 10 as a memory circuit output 13 by delaying this signal by 3 cells.
Output to 4. The number of delay cells in the memory circuit is set in advance.

In FIG. 2, the same operation as described above is performed for E, F and G request signals. Cell transmission permission signal 11
Does not allow the request signals A, B, C, E, and F to send, but does not allow D and G to send. T1
2 cells to transmit for any window in T6
Since it is within the cell, transmission is regulated accurately.

As described above, in this embodiment, the cell transmission regulation circuit is composed of the cell transmission circuit, the memory circuit, the up / down counter, the comparison circuit, the register, the gate, and the count control circuit. It is connected to the cell transmission line, outputs a cell transmission request signal to the gate and up / down counter, inputs the gate output as a cell transmission permission signal and inputs it to the cell transmission circuit and the storage circuit, and outputs the output of the storage circuit to the up / down counter. Input the count value of the up / down counter to the comparison circuit, input the output of the register to the comparison circuit, and count the output of the comparison circuit with the gate.
Input to the control circuit , the memory circuit outputs the cell transmission permission signal after storing it for a fixed cell time, and outputs the up / down counter by 1 when the cell transmission request signal indicates a cell transmission request, and outputs the memory circuit. 1 indicates that cell transmission is permitted, the comparator circuit compares the threshold value set in the register with the count value of the up / down counter to open / close the gate, and counts when the gate is closed. The control circuit counts down the up / down counter by one, and when the cell transmission request signal has no cell transmission request on the cell transmission request signal or the gate is closed, the cell transmission is not permitted, and the cell transmission is not permitted. If there is a cell transmission request on the request signal and the gate is open, cell transmission is enabled, and the cell transmission circuit transmits the cell. When the permission signal is in a state permitting cell transmission, the cell is transmitted to the transmission line, and when the cell transmission permission signal is in a state not permitting cell transmission, the cell transmission circuit does not transmit a valid cell. To do.

Example 2. FIG. 3 shows an embodiment of a cell transmission control circuit corresponding to claim 2. In FIG. 3, 101 is a cell transmission circuit, 102 is a gate, 104 is an up / down counter, 105 is a comparison circuit, 106 is a register, 10
Reference numeral 7 is a cycle generation counter, and 109 is a count control circuit. Further, 10 is a cell transmission request signal, 11 is a cell transmission permission signal, 12 is a transmission line, 14 is an up / down counter count value, 15 is a comparison circuit output, 16 is a register value, and 17 is a reset signal.

FIG. 4 is an operation diagram of the embodiment shown in FIG. Figure 4
2, T1, T2, and T3 are windows to which restrictions are applied, and this window is a window of a fixed phase, unlike the window of FIG. Hereinafter, this window is called a fixed window. In this embodiment, cell transmission control can be performed on a fixed window. The register value 16 is set to 2, and control is performed so that three or more cells are not generated in one window.

In FIGS. 3 and 4, the cycle generation counter 107 resets the up / down counter 104 every three cells. The cell transmission circuit 101 outputs the cell transmission request signal 10 to the gate 102 and the up / down counter 104. When the regulation is not applied, the output of the comparison circuit is "H", so that the cell transmission request signal 10 is output as it is as the cell transmission permission signal 11. Cell transmission permission signal 1
1 is input to the cell transmission circuit 101, and the up / down counter 104 counts up by 1 when the cell transmission request signal 10 is "H".

In FIG. 4, the count value of the up / down counter is 1
4 changes from 0 to 1 for the A request signal and 2 for the B request signal. When the request signal is C, the count value 14 is first reset to 0 and then becomes 1. When the request signal is D, the count value 14 is 2. When the request signal is E, the count value 1 is 1.
4 becomes 3. At this time, the comparison circuit output 15 becomes "L" and the cell transmission permission signal also becomes "L". When the cell transmission permission signal 11 becomes "L", the cell transmission circuit 101 determines that cell transmission is not permitted, and either does not output the cell on the transmission line 12 or outputs an idle cell.
The timing at which the cell transmission circuit 101 determines whether or not to output a cell is performed after the timing at which the cell transmission permission signal 11 may change. As a result of this determination, if the cell can be transmitted, the cell is output. To do. In FIG. 4, determination is made at the midpoint of one cell time, and the cell is transmitted.

Count control circuit 109 outputs comparison circuit output 1
When 5 becomes "L", the count value of up / down counter 14
Is counted down by 1 and the count value is returned to 2. The reason for counting down by 1 is that the cell is not output even though it is counting up by 1, so that counting down by 1 causes the actual transmission of the cell to match the count value 14 of the up / down counter. . Further, in the present example, the comparison circuit output 15 has a configuration in which it is held at "L" for one cell section. Therefore, even if the countdown occurs, the output of the comparison circuit is held at "L" for one cell period.

In FIG. 4, the same operation as above is performed for the F and G request signals. The cell transmission request signal 11 permits transmission of request signals A, B, C, D, F, and G, and does not permit transmission of E. T1, T
Since the number of cells to be transmitted in any of the windows of 2 and T3 is within 2 cells, the transmission is regulated accurately.

As described above, in this embodiment, the cell transmission regulation circuit includes a cell transmission circuit, a cycle generation counter, an up / down counter, a comparison circuit, a register, and a gate and a counter.
The cell transmission circuit is connected to the cell transmission line, the cell transmission request signal is input to the gate and the up / down counter, the output of the gate is used as the cell transmission permission signal, and is input to the cell transmission circuit. Then, the output of the cycle generation counter is input to the up / down counter, the count value of the up / down counter is input to the comparison circuit, the output of the register is input to the comparison circuit, and the output of the comparison circuit is input to the gate and the count control circuit. Then, the cycle generation counter resets the up / down counter at regular intervals, the up / down counter counts up by 1 when the cell transmission request signal indicates a cell transmission request, and the comparison circuit is set in the register. The threshold value is compared with the count value of the up counter to open and close the gate, and when the gate is closed, the count control circuit The up / down counter is decremented by one, and when the cell transmission request signal has no cell transmission request on the cell transmission request signal or the gate is closed, the cell transmission is not permitted, and the cell transmission request signal is not transmitted. If there is a cell transmission request to the cell and the gate is open, the cell transmission is enabled, and the cell transmission circuit transmits the cell to the cell transmission line when the cell transmission enable signal is in the cell transmission enabled state. However, when the cell transmission permission signal is in a state in which the cell transmission is not permitted, the cell is not transmitted.

Example 3. FIG. 5 shows an embodiment of a cell transmission control circuit corresponding to claim 3. In FIG. 5, the cell transmission control circuit of the first embodiment is provided with the cycle generation counter 107 of the second embodiment, the reset signal 17 is connected to the up / down counter, and the up / down counter 104 is provided with the memory circuit use permission signal 18 and the reset permission signal. 19, the up / down counter 104 performs the countdown operation by the memory circuit output 13 when the memory circuit use permission signal 18 is significant, and the reset signal 1 when the reset permission signal 19 is significant.
The reset operation by 7 is performed. With this configuration, the memory circuit use permission signal 18 is made significant, and the reset permission signal 1
If 9 is set to be insignificant, this circuit can regulate cell transmission by a sliding window as in the first embodiment, make the storage circuit use permission signal 18 insignificant, and make the reset permission signal 19 significant. If set, this circuit can regulate cell transmission by a fixed window as in the second embodiment. Therefore, for example, if this circuit is
If it is made into SI, it is possible to cope with both a sliding window and a fixed window with one LSI.

As described above, in this embodiment, the cell transmission regulation circuit includes the cell transmission circuit, the cycle generation counter, the storage circuit,
Up-down counter, comparison circuit, register, and gate
The cell transmission circuit is connected to the cell transmission line, outputs the cell transmission request signal to the gate and the up / down counter, and uses the gate output as the cell transmission permission signal and the cell transmission circuit. To the up / down counter as the reset signal, the output of the memory circuit to the up / down counter, and the memory circuit use enable signal and the reset enable signal to the up / down counter. Then, the count value of the up-down counter is input to the comparison circuit, the output of the register is input to the comparison circuit, the output of the comparison circuit is input to the gate and the count control circuit, and the storage circuit outputs the cell transmission enable signal to the constant cell time. After storing, it outputs and the cycle generation counter outputs a reset pulse to the up / down counter at regular intervals, The up-down counter resets the count value when a reset pulse is input to the reset signal and the reset enable signal is in the state of permitting reset, and counts up by 1 when the cell transmission request signal indicates a cell transmission request. Then, when the output of the memory circuit indicates cell transmission permission and the memory circuit use permission signal indicates countdown, the count circuit counts down by 1, and the comparison circuit counts the threshold value set in the register and the count value of the up / down counter. When the gate is closed and the gate is closed, the count control circuit counts down the up / down counter by one, and the cell transmission enable signal indicates that there is no cell transmission request on the cell transmission request signal or the gate is closed. If it is, the cell transmission is not permitted, and the cell transmission is sent on the cell transmission request signal. Request there yet if the gate is open ready to allow delivery of the cell, the cell sending circuit cells sent to the cell transmission line when a state in which the cell transmission permission signal permits the transmission of cells,
It is characterized in that the cell is not transmitted when the cell transmission permission signal does not permit the cell transmission.

Example 4. FIG. 6 shows an embodiment of a cell transmission control circuit corresponding to claim 4. In FIG. 6, the cycle generation counter 107 is deleted from the third embodiment, and the reset signal 17 is output from the memory circuit 103 to the up / down counter 104. FIG. 7 shows an example of the memory circuit 104. In FIG. 7, 1031 is a memory, 1032 is a counter circuit, 1033 is a timing adjustment circuit , 11 is a cell transmission permission signal, 13 is a delay circuit output, 17 is a reset signal,
A counter circuit count value 1034 is connected to an address of the memory. 1035 is a write / read control signal, 103
6 is a memory output.

FIG. 8 shows the operation of FIG. 7. In this example, the counter circuit repeats counting by 0, 1, 2 and delays the cell transmission permission signal 11 by 3 cell time to output it as the memory circuit output 13. There is. In FIG. 7 and FIG. 8, the cell read enable signal 11 is the write read signal 1035 “L”.
When, the cell transmission permission signal 11 is the counter circuit count value 10
It is written in the address indicated by 34. In this case, D0 is written at address 0, D1 is written at address 1, D2 is written at address 2.
Next, when the count value 1034 of the counter circuit returns to 0, when the write / read signal 1035 is “H”, the data D0 written at address 0 is read out on the memory output 1036, and the timing adjustment circuit 1033 converts the data. Sampled, latched for one cell, and output as the memory circuit output 13. At this time, D3 is written to address 0, and data is sequentially output with a delay of 4 cells by the same operation. Since the counter circuit 1032 has an address that repeats periodically, the reset signal can be easily generated. For example, if the address 0 of the count value 1034 of the counter circuit is detected, the reset signal 17 as shown in FIG. 8 can be generated. If the reset signal 17 generated in this way is input to the up / down counter 104, the cycle generation counter 107 as shown in the second and third embodiments is not necessary, and a cell transmission regulation control circuit that is downsized is realized. Obtainable.

As described above, in this embodiment, in the cell transmission regulation circuit described in the third embodiment, the cycle generation counter is deleted, and the cell transmission circuit, the storage circuit, the up / down counter, the comparison circuit, the register and the gate, the count. The control circuit performs the operation described in the third embodiment, the storage circuit is a memory,
The counter circuit and the timing adjustment circuit are used , the cell transmission request signal described in the third embodiment is input to the memory, the count value of the counter circuit is input to the memory address, and the memory write / read signal is input from the counter circuit. To the timing adjustment circuit , the timing adjustment circuit output is used as the memory circuit output described in the third embodiment, the counter circuit outputs the reset signal, and the memory circuit outputs the count value of the counter circuit. Align the timing by delaying the cell request signal based on the write / read signal
The circuit waveform-shapes the delayed cell request signal and outputs it as a delay circuit output, and the up-down counter outputs it from the counter circuit in the memory circuit instead of the reset pulse output from the cycle generation counter described in the third embodiment. The reset operation described in the third embodiment is performed by the reset pulse.

Example 5. FIG. 9 shows an embodiment of a cell transmission control circuit corresponding to claim 5. In FIG. 9, the memory circuit 10
3a, up-down counter 104a, comparison circuit 105
a, the register 106a, and the count control circuit 109a as the first control circuit 100a, the memory circuit 103b, the up / down counter 104b, the comparison circuit 105b, and the register 106b as the second control circuit 100b.
And the output 15a of the comparison circuit in the first control circuit is provided.
And the output 15b of the comparison circuit in the second control circuit is taken and connected to the gate 102 as the OR gate output 15 to open / close the gate 102. Or gate 1
08 is a negative logic OR for the sake of logic. When the gate 102 is closed by the OR gate output 15, the count control circuit 109 counts down the up / down counters 104a and 104b in the first and second control circuits by one. The operations of the cell sending circuit 101 and the gate 102 other than the above are the same as those of the first embodiment, and the memory circuits 103a and 1a
03b, up / down counters 104a and 104b, comparison circuits 105a and 105b, and registers 106a and 106.
b and the operation of the count control circuits 109a and 109b other than the above are the same as in the fourth embodiment. Although the reset signal 17a is output from the memory circuit 103a in this embodiment, the cycle generation counter 107a may be provided and the output of the cycle generation counter 107a may be used as the reset signal 17a as in the second and third embodiments. By configuring the cell transmission regulation control circuit in this way, the two regulation windows can be set independently, and for example, the section of one regulation window can be set short and the section of the other regulation window can be set long.

As described above, in this embodiment, the cell transmission regulation control circuit is an OR gate, the cell transmission circuit and the gate described in the first embodiment, the memory circuit described in the fourth embodiment, the up-down counter, the comparison circuit, Register and count control times
A first and a second regulation control circuit composed of a path, and the cell transmission circuit inputs a cell transmission request signal to a gate and an up / down counter in the first and second regulation control circuits to Is output to the cell transmission circuit and the storage circuits in the first and second regulation control circuits, and the outputs of the comparison circuits in the first and second regulation control circuits are respectively used as OR gates. The output of the OR gate is input to the gate and the count control circuit in the first and second regulation control circuits, and the memory circuit output is input to the up / down counter in the first and second regulation control circuits, and is also stored. The reset signal is input from the circuit to the up / down counter, the count value of the up / down counter is input to the comparison circuit, and the output of the register is input to the comparison circuit as the register value. And force, the opening and closing of the gate is carried out at the output of the OR gate, the first and second up-down counter by the count control circuit when the gate is closed 1
It counts down and stores in the first and second control circuits a storage circuit, an up / down counter, a comparison circuit, a register and a counter.
The operation of the und control circuit other than the above is the same as the operation described in the fourth embodiment.

Example 6. FIG. 10 shows an embodiment of a cell transmission control circuit corresponding to claim 6. In FIG. 10, the storage circuit 103a, the up / down counter 104a, and the comparison circuit 1
05a, register 106a, count control circuit 109a
Is the first control circuit 100a, and the cycle generation counter 10
7b, up / down counter 104b, comparison circuit 105
b, the register 106b, and the count control circuit 109b as the second control circuit 100b, the OR gate 108 is provided,
The output 15a of the comparison circuit in the first control circuit and the output 15b of the comparison circuit in the second control circuit are ORed and connected to the gate 102 as an OR gate output 15 to open / close the gate 102. Gate 102 outputs OR gate 15
When closed by, the up / down counters 104a and 104b in the first and second control circuits are counted respectively.
The count control circuits 109a and 109b count down by one . Cell sending circuit 101, gate 102, storage circuit 1
03a, up-down counter 104a, comparison circuit 10
5a and the operation of the register 106a other than the above are the same as in the first embodiment. Cycle generation counter 107b, up / down counter 104b, comparison circuit 105b , register 106
The operation of b other than the above is the same as that of the second embodiment. When the cell transmission regulation control circuit is configured in this way, one regulation window can be a sliding window and the other regulation window can be a fixed window. Example 5
However, such a setting is possible, but in a system in which it is determined in advance that one regulation window is a sliding window and the other regulation window is a fixed window, this embodiment has one storage circuit. Since it is good, the circuit scale can be reduced.

As described above, in this embodiment, the cell transmission regulation control circuit includes the memory circuit, the up / down counter, the comparison circuit, the register, and the count control circuit described in the first embodiment. A first regulation control circuit, an up / down counter, a cycle generation counter , a comparison circuit,
A second regulation control circuit including a register and a count control circuit , an OR gate, a cell transmission circuit and a gate according to the first embodiment, and a cell transmission request signal from the cell transmission circuit to the gate It is input to an up / down counter in the second regulation control circuit, the output of the gate is used as a cell transmission permission signal, and is also input to a memory circuit in the cell transmission circuit and the first cell transmission regulation control circuit, and the first and the second The output of the comparison circuit in the cell transmission regulation control circuit of No. 2 is input to the OR gate, and the output of the OR gate is input to the gate and the count control circuits in the first and second regulation control circuits . In the regulation control circuit of No. 1, the memory circuit output is input to the up / down counter, the count value of the up / down counter is input to the comparison circuit, and the output of the register is used as the register value for comparison. Input to circuit, the output of the second regulating control circuit odors period generating counter inputs to the up-down counter, enter the count value of the up-down counter to the comparison circuit and input to the comparison circuit the output of the register as a register value, The gate is opened / closed by the output of the OR gate. When the gate is closed, the count control circuit counts down the first and second up / down counters by 1, and the other operations are the same as those in the fourth embodiment. The operation of the storage circuit, the up / down counter, the comparison circuit, the register, and the count control circuit in the control circuit of No. 1 other than the above is the first embodiment.
And the up / down counter, the comparison circuit, the register, and the count control in the second control circuit.
The operation of the circuit other than the above is the same as the operation described in the second embodiment.

In this embodiment, the first control circuit is based on the circuit shown in the first embodiment, and the second control circuit is based on the circuit shown in the second embodiment. In the fifth example, the first control circuit and the second control circuit are configured based on the circuit shown in the fourth example, but the first and second control circuits are independently formed in the first example or the first example. It is also possible to configure based on the circuit of the second embodiment, the third embodiment, or the fourth embodiment.

Example 7. FIG. 11 shows an embodiment of a cell transmission control circuit corresponding to claim 7. In this embodiment, the configuration corresponds to that of the first embodiment. In FIG. 11, each block and signal name are the same as those in the first embodiment, and the preconditions for the cell regulation window are the same as those in the first embodiment, and the description thereof will be omitted.

FIG. 12 is a diagram showing the operation of FIG. 11 and 12, the cell transmission request signal 10 is output from the cell transmission circuit 101 to the gate 102. During the first ΔT of one cell time, the comparison circuit output 15 is always "H", and the gate 102 is open. Further, if the up-down counter 104 is configured to be able to count up 1 during ΔT at the beginning of one cell time, when the cell transmission request signal 10 is “H” at the beginning ΔT of one cell time, cell transmission is permitted. The signal 11 becomes "H", and the up / down counter 104 counts up by 1. The up / down counter 104 counts down by 1 when the memory circuit output 13 is "H".

In FIG. 12, the count value 14 of the up / down counter is 1 for the A request signal, 2 for the B request signal, and 2 for the C request signal.
Since it is also "H", the count up and count down cancel each other, and the count value 14 of the up / down counter is 2
It remains. Next, when the D request signal is input, the memory circuit output 13 is "L", so only counting up occurs, the count value 14 becomes 3, the comparison circuit output 15 becomes "L", and the cell transmission permission signal 11 also becomes. It becomes "L". When the cell transmission permission signal 11 becomes "L", the cell transmission circuit 101 determines that cell transmission is not permitted, and the transmission line 12
No cells are output above or idle cells are output. The timing at which the cell transmission circuit 101 determines whether or not to output a cell is performed after the timing at which the cell transmission permission signal 11 may change. As a result of this determination, if the cell can be transmitted, the cell is output. To do. In FIG. 12, the determination is made at the midpoint of one cell time, and the cell is transmitted. 12, a, b, c, e, and f are valid cells corresponding to the request signals A, B, C, E, and F. When the comparison circuit output 15 becomes "L", the count control circuit 109 counts down the count value 14 of the up / down counter by 1 and returns the count value 14 to 2. The reason for counting down by 1 is that the cell is not output even though it is counting up by 1, so that counting down by 1 causes the actual transmission of the cell to match the count value 14 of the up / down counter. .

Further, in the present example, the comparison circuit output 15 has a structure in which "L" is held in one cell section. Therefore, even if the countdown occurs, the comparison circuit output 15 is held at "L" for one cell period. Further, in order to perform the countdown, the first ΔT of the next one-cell time is the comparison circuit output 15
Becomes "H". Therefore, at the beginning of one cell time, ΔT, the comparison circuit output 15 is always "H". The cell transmission permission signal 11 is also input to the memory circuit 103. Storage circuit 103
Stores the state of the cell transmission permission signal 11 at a timing after the comparison circuit 105 opens and closes the gate 102. In FIG. 12, for example, the state of the cell transmission permission signal 11 at the midpoint of one cell time is stored. The memory circuit 103 delays this signal by 3 cells and outputs it as the memory circuit output 13 to the up / down counter 104. In FIG. 12, the same operation as above is performed for E, F, and G request signals. The cell transmission permission signal 11 permits transmission of request signals A, B, C, E, and F, but does not permit transmission of D and G. Since the number of cells to be transmitted in any of the windows T1 to T6 is within 2 cells, transmission is accurately regulated.

As described above, this embodiment does not input the cell transmission request signal to the up / down counter in the cell transmission regulation circuit described in the first, second, third, fourth, fifth or sixth embodiment, and permits cell transmission. The signal is input to the up / down counter, the gate signal is always opened at the beginning of one cell time, and when the cell transmission request signal indicates a cell transmission request, the cell transmission permission signal is started at the beginning of one cell time. Becomes the enable state, at which time the up / down counter can count up by 1, and the storage circuit stores the state of the cell transmission enable signal after the timing when the comparison circuit opens and closes the gate. The configuration and operation are the same as those described in the first or second or third or fourth or fifth or sixth embodiment.

Example 8. FIG. 13 shows an embodiment of a cell transmission control circuit corresponding to claim 8. In this embodiment, the configuration corresponds to that of the first embodiment. In FIG. 13, each block and signal name are the same as those in the first embodiment, and the preconditions of the cell regulation window are the same as those in the first embodiment, and the description thereof will be omitted. FIG. 14 is a diagram showing the operation of FIG.

13 and 14, cell transmission request signal 10 is output from cell transmission circuit 101 to gate 102 and comparison circuit 105. Up-down counter 104
Indicates that the memory circuit output 13 is "D" during the first ΔT of one cell time.
When it is H ", it counts down by 1. Next, the comparison circuit 1
05 is up / down counter count value 14 and register value 1
6 are compared, and if they are equal or the count value of the up / down counter count value 14 is larger and the cell transmission request signal 10 is "H", the comparison circuit output 15 is set to "L",
In other cases, the comparison circuit output 15 is set to "H". The comparison circuit 105 may detect only the equality, but the magnitude relation is also compared so as not to malfunction when the power is turned on. The comparison circuit output 15 holds the initial value of 1 cell time for 1 cell time. When both the comparison circuit output 15 and the cell transmission request signal 10 are "H", the cell transmission permission signal 11 is "H". Up-down counter 104
Counts up 1 when the cell transmission permission signal 11 becomes "H".

In FIG. 14, the count value 14 of the up / down counter becomes 1 for the A request signal, 2 for the B request signal, and 2 for the C request signal in the latter half of each cell time. Since 13 is also "H", it is counted down during ΔT and becomes 1, but is counted up thereafter, and this count up and count down cancel each other out, and the count value 14 of the up / down counter becomes 2. Next, when the D request signal is input, the memory circuit output 1
Since 3 is "L", the countdown does not occur, the count value 14 remains 2 at the beginning of one cell time, the comparison circuit output 15 becomes "L", and the cell transmission permission signal 11 also becomes "L". When the cell transmission permission signal 11 becomes "L", the cell transmission circuit 101 determines that cell transmission is not permitted, and either does not output the cell on the transmission line 12 or outputs an idle cell. The timing for determining whether or not the cell transmission circuit 101 outputs a cell is the cell transmission permission signal 1
It is performed after the timing when 1 may change, and if the result of this determination is that the cell can be transmitted, the cell is output. In FIG. 14, the determination is made at the midpoint of one cell time, and the cell is transmitted. In FIG. 14, a, b, c, e, and f are request signals A,
It is a valid cell corresponding to B, C, E, and F.

In FIG. 14, the same operation as described above is performed for E, F, and G request signals. Cell transmission permission signal 1
No. 1 permits transmission of request signals A, B, C, E and F, but does not permit transmission of D and G. T1
2 cells to transmit for any window in T6
Since it is within the cell, transmission is regulated accurately.

As described above, according to this embodiment, the cell transmission restriction circuit outputs the cell transmission request signal to the comparison circuit, and the comparison circuit output is output to the gate only, not to the up / down counter. The counter counts down by 1 when the memory circuit output is significant at the beginning of one cell time, and then the comparator circuit counts when the value of the up / down counter is equal to the value of the register or the up / down counter value is larger, and When the cell transmission request signal is significant, the gate is closed, and at this time, the above-described first to first embodiments are performed.
Unlike the cell transmission regulation circuit of No. 7, the up-down counter is not counted down by one, and other configurations and operations are the same as the configurations and operations described in the seventh embodiment.

Example 9. FIG. 15 shows a cell transmission regulation circuit corresponding to claim 9. In this embodiment, the configuration corresponds to that of the first embodiment. In the figure, 301 is a cell transmission circuit, 2
Reference numeral 01 is a monitoring processing circuit, and the other blocks are the same as those in the first embodiment, and therefore description thereof is omitted. Further, 20 is a reception cell signal, 12 is a transmission line, and other signals are the same as those in the first embodiment, and therefore the description thereof is omitted. 16 shows an embodiment of the monitor processing circuit in FIG. 15, in which 210 is a delay circuit, 220 is a cell reception detection circuit, 230 is an output processing circuit, and 240 is a latch. 22 is the output of the delay circuit,
Reference numeral 23 is a latch output, 10 is a cell transmission request signal, and 11 is a cell transmission permission signal.

FIG. 17 is a diagram for explaining the operation of FIG. 16, in which a, b and c are valid cells, and A, B and C are codes corresponding to valid cells. 15, FIG. 16, and FIG.
The cell transmission circuit 301 outputs a cell on the transmission cell signal 20, and the monitoring processing circuit 201 detects a valid cell on the transmission cell signal 20 in the cell reception detection circuit 220 and makes the cell transmission request signal 10 significant. The operation as to whether or not the cell transmission permission signal 11 is significant with respect to the significance signal on the cell transmission request signal 10 is the same as that in the first embodiment, and therefore its explanation is omitted.
In FIG. 17, transmission is permitted for cells a and c, but transmission is not permitted for cell b.

In FIG. 2 for explaining the operation of the first embodiment, the change timing of the cell transmission request signal 10 and the change timing of the cell transmission permission signal 11 are written at the same time for simplification of the drawing. Therefore, the change timing of the cell transmission permission signal 11 lags behind the change timing of the cell transmission request signal 10 as shown in FIG. Latch 240
Latches the cell transmission enable signal 11 at the midpoint of one cell time and uses it as the latch output 23. The delay circuit delays the cells on the received cell signal 20 to match the timing of the latch output, and outputs the delayed cell output 22. Output processing circuit 230
Outputs the cell on the delay circuit output 22 on the transmission line 12 when the latch output 23 is "H", and does not output the cell or outputs the idle cell when the latch output is "L".

As described above, this embodiment is connected to the cell transmission circuit and replaces the cell transmission circuit of the cell transmission restriction circuit described in the first or second or third or fourth or fifth or sixth or seventh or eighth embodiment. Further, a monitoring processing circuit is provided, and the other configurations are the configurations described in the first or second or third or fourth or fifth or sixth or seventh or eighth embodiment, and the output of the cell transmitting circuit is input to the monitoring processing circuit to perform the monitoring processing. The output of the circuit is connected to the transmission line, the monitoring processing circuit receives the cell from the cell transmission circuit, and when the valid cell is received, the cell according to the embodiment 1 or 2 or 3 or 4 or 5 or 6 or 7 or 8 Output a transmission request signal, and the embodiment 1 or 2 or 3 or 4 or 5 or 6 or 7 or 8
When the cell transmission permission signal described in 1) is received and the cell transmission permission signal is significant, the received valid cell is output to the transmission path.

Example 10. FIG. 18 shows a cell reception regulation circuit according to claim 9. In this embodiment, the configuration is the same as that of the first embodiment.
It corresponds to. In the figure, reference numeral 302 is a cell receiving circuit, and the other blocks and signal names are the same as those in the ninth embodiment, and therefore their explanations are omitted. In FIG. 18, valid cells on the transmission line 12 are regulated by the monitoring processing circuit 201 as in the case of the ninth embodiment and output to the cell receiving circuit. Therefore, the cell receiving circuit can accurately receive the restricted cell.

As described above, this embodiment is connected to the cell reception circuit, and replaces the cell transmission circuit of the cell transmission regulation circuit described in the embodiment 1 or 2 or 3 or 4 or 5 or 6 or 7 or 8. In addition, a monitoring processing circuit is provided, and the other configuration is the configuration described in Embodiment 1 or 2 or 3 or 4 or 5 or 6 or 7 or 8, and the transmission line is connected to the monitoring processing circuit to output the monitoring processing circuit. Is connected to a cell receiving circuit, and the monitoring processing circuit receives a cell from the transmission line and receives a valid cell.
Or, the cell transmission request signal described in 4 or 5 or 6 or 7 or 8 is output, and the cell transmission permission signal described in Example 1 or 2 or 3 or 4 or 5 or 6 or 7 or 8 is received, and the cell When the sending permission signal is significant, the received valid cell is output to the cell receiving circuit.

[0082]

As described above, according to the present invention, since the up / down counter is counted down when cell transmission is not permitted in the cell communication regulation circuit, it is possible to accurately regulate cell communication.

[Brief description of drawings]

FIG. 1 is a diagram showing an embodiment according to claim 1 of the present invention.

FIG. 2 is a diagram showing the operation of the first embodiment.

FIG. 3 is a diagram showing an embodiment according to claim 2 of the present invention.

FIG. 4 is a diagram showing the operation of the second embodiment.

FIG. 5 is a diagram showing an embodiment according to claim 3 of the present invention.

FIG. 6 is a diagram showing an embodiment according to claim 4 of the present invention.

7 is a diagram showing a configuration of a memory circuit of FIG.

FIG. 8 is a diagram showing the operation of FIG. 6;

FIG. 9 is a diagram showing an embodiment according to claim 5 of the present invention.

FIG. 10 is a diagram showing an embodiment according to claim 6 of the present invention.

FIG. 11 is a diagram showing an embodiment according to claim 7 of the present invention.

FIG. 12 is a diagram showing the operation of the seventh embodiment.

FIG. 13 is a diagram showing an embodiment according to claim 8 of the present invention.

FIG. 14 is a diagram showing the operation of the eighth embodiment.

FIG. 15 is a diagram showing an embodiment according to claim 9 of the present invention.

16 is a diagram showing a configuration of the monitoring processing circuit of FIG.

FIG. 17 is a diagram showing the operation of the ninth embodiment.

FIG. 18 is a diagram showing an embodiment according to claim 9 of the present invention.

FIG. 19 is a diagram showing a conventional cell reception regulation circuit.

FIG. 20 is a diagram showing an operation of a conventional cell reception regulation circuit.

[Description of Reference Signs] 101 cell transmission circuit 102 gate 103 storage circuit 104 up / down counter 105 comparison circuit 106 register 107 cycle generation counter 108 or gate 109 count control means 201 monitoring processing circuit 210 delay circuit 220 cell reception detection circuit 230 output processing circuit 240 Latch 301 Cell transmission circuit 302 Cell reception circuit 1031 Memory 1032 Counter circuit 1033 Timing adjustment circuit

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[Correction method] Change

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FIG. 11

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yasushi Takagi 1-6, Uchisaiwaicho, Chiyoda-ku, Tokyo Inside Nippon Telegraph and Telephone Corporation (72) Kenji Miyabo 1-6, Uchisaiwaicho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corp. (72) Inventor Kimio Oguchi 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corp.

Claims (9)

[Claims] 1. A cell communication regulation circuit having the following elements: (a) a cell circuit for requesting transmission of cells to a transmission line and transmitting cells to the transmission line; (b) transmission of cells from the cell circuit. An up / down counter for counting the number of requests, (c) a memory circuit for reducing the up / down count when a cell is sent from the cell circuit, (d) comparing the up / down count with a predetermined value (E) A gate that controls cell transmission of the cell circuit based on the comparison result of the comparison circuit, and (f) Count control that controls the count of the up / down counter based on the comparison result of the comparison circuit. circuit. 2. A cell communication regulation circuit having the following elements: (a) a cell circuit for requesting transmission of cells to a transmission line and transmitting cells to the transmission line; (b) transmission of cells from the cell circuit. An up / down counter that counts the number of requests, (c) a cycle generation counter that outputs a reset signal at a predetermined cycle and resets the count by the up / down counter, (d) compares the count of the up / down counter with a predetermined value (E) A gate that controls cell transmission of the cell circuit based on the comparison result of the comparison circuit, and (f) Count control that controls the count of the up / down counter based on the comparison result of the comparison circuit. circuit. 3. A cell communication regulation circuit having the following elements: (a) a cell circuit that requests transmission of cells to a transmission line and sends cells to the transmission line; and (b) transmission of cells from the cell circuit. An up / down counter that counts the number of requests, (c) a memory circuit that decreases the count of the up / down counter when cells are sent from the cell circuit, and (d) a reset signal is output at a predetermined cycle. A cycle generation counter for resetting the count by the up / down counter, (e) a comparison circuit for comparing the count of the up / down counter with a predetermined value, (f) a cell of the cell circuit based on the comparison result of the comparison circuit A gate for controlling transmission, (g) a count system for controlling the count of the up / down counter based on the comparison result of the comparison circuit. Circuit. (H) Selection means for selecting either the decrease of the count by the storage circuit or the reset of the count by the cycle generation counter. 4. The cell communication regulation circuit according to claim 3, wherein the cycle generation counter is included in the storage means. 5. A cell communication regulation circuit having the following elements: (a) a cell circuit for requesting transmission of cells to a transmission line and transmitting cells to the transmission line; (b) at least claims 1, 2, 3 Or an up-down counter described in 4, a comparison circuit, and a count control circuit,
A plurality of regulation control circuits that regulate the transmission of cells from the cell circuit to the transmission path by different standards; (c) permit cell transmission from the cell circuit when the regulation by the plurality of regulation control circuits is satisfied. Gate. 6. The cell communication regulation circuit according to claim 5, wherein at least one of the plurality of regulation control circuits has a regulation control circuit that regulates cell transmission with a different configuration. 7. The cell communication regulation circuit, wherein the comparison circuit shifts and outputs the comparison result by a predetermined period, and the gate outputs the cell transmission request of the cell circuit to the counter within this period. The cell communication regulation circuit according to item 1, 2, 3, 4, 5, or 6. 8. A cell communication regulation circuit having the following elements: (a) a cell circuit for requesting transmission of cells to a transmission line and transmitting cells to the transmission line; and (b) transmission of cells from the cell circuit. (C) a counter that counts the number of cell transmission requests from the cell circuit while reducing the count by the input from the memory circuit within a predetermined period, and (d) the cell circuit A comparison circuit that inputs a cell transmission request and refers to the state of the cell transmission request from the input cell circuit to compare the count of the counter with a predetermined value. (E) Based on the comparison result of the comparison circuit A gate for controlling cell transmission of the cell circuit, 9. The cell circuit according to claim 1, wherein the cell circuit is one of a cell sending circuit for generating and sending a cell and a cell monitoring circuit for receiving and monitoring the cell.
The cell communication regulation circuit according to 3, 4, 5, 6, 7, or 8.