JPH0654825B2 - Semiconductor laser - Google Patents
Semiconductor laserInfo
- Publication number
- JPH0654825B2 JPH0654825B2 JP62293233A JP29323387A JPH0654825B2 JP H0654825 B2 JPH0654825 B2 JP H0654825B2 JP 62293233 A JP62293233 A JP 62293233A JP 29323387 A JP29323387 A JP 29323387A JP H0654825 B2 JPH0654825 B2 JP H0654825B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- insulating
- semiconductor laser
- semi
- buried
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 47
- 150000001875 compounds Chemical class 0.000 claims description 27
- 238000009792 diffusion process Methods 0.000 claims description 19
- 239000000463 material Substances 0.000 claims description 18
- 230000000903 blocking effect Effects 0.000 claims description 14
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 21
- 238000005253 cladding Methods 0.000 description 19
- 229910052581 Si3N4 Inorganic materials 0.000 description 9
- 238000000034 method Methods 0.000 description 9
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 9
- 239000000758 substrate Substances 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000002184 metal Substances 0.000 description 7
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 6
- 239000013078 crystal Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 230000003287 optical effect Effects 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- 239000000470 constituent Substances 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 239000002994 raw material Substances 0.000 description 3
- 239000000243 solution Substances 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 229910001020 Au alloy Inorganic materials 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 229910000927 Ge alloy Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 238000003776 cleavage reaction Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 230000007017 scission Effects 0.000 description 1
Landscapes
- Semiconductor Lasers (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体レーザに係わり、特に屈折率導波形半導
体レーザのストライプ状活性領域の構造に関するもので
ある。The present invention relates to a semiconductor laser, and more particularly to a structure of a stripe-shaped active region of a refractive index guided semiconductor laser.
従来、この種の屈折率導波形半導体レーザは、活性領域
の光の伝搬方向に平行な側面が同種のｐ形およびｎ形の
２層以上の半導体層を用いて埋込まれていた。なお、こ
れらの層は一般に埋め込み層と称されている。この埋込
み層の半導体層の配置は、レーザに電流を注入すると
き、これらの層からなるｐｎ接合に逆バイアスがかかる
ようになつており、このｐｎ接合が電流阻止層として作
用する。通常、大きな光出力を得るためには、大電流を
供給する必要がある。通常の半導体レーザの２電極間の
抵抗は２〜５Ω程度であるので、大電流を供給すると、
埋込み層にも高電圧がかかる。この高電圧が埋込み層の
逆方向耐圧以上となると、埋込み層がプレークダウンす
る。このため、このプレークダウン電圧に到達する直前
が最大光出力の得られる状態となる。Conventionally, a refractive index guided semiconductor laser of this type has been embedded by using two or more semiconductor layers of the same type, which are p-type and n-type, on the side surface parallel to the light propagation direction of the active region. Note that these layers are generally referred to as buried layers. This arrangement of the buried semiconductor layers is such that when a current is injected into the laser, the pn junction formed by these layers is reverse-biased, and this pn junction acts as a current blocking layer. Usually, in order to obtain a large light output, it is necessary to supply a large current. Since the resistance between two electrodes of a normal semiconductor laser is about 2 to 5Ω, when a large current is supplied,
High voltage is also applied to the buried layer. When this high voltage exceeds the reverse breakdown voltage of the buried layer, the buried layer is broken down. Therefore, the maximum optical output is obtained immediately before the breakdown voltage is reached.
しかしながら、このように構成される埋込み半導体レー
ザでは、埋込み層とクラツド層との間の電気的分離は、
バンド構造のステツプを利用している。このため、高電
流注入状態では活性層以外にも電流が流れ、この結果、
効率が低下することになる。また、半導体レーザの両電
極間には、埋込み層による接合容量があり、特に逆バイ
アスがかかるため、その容量が大きくなる。このため、
高速でパルス電流を注入し、レーザを変調しようとする
と、ＣＲ時定数が大きいため、最大変調可能周波数が低
くなるという問題があつた。さらに埋込み層の各層の配
置は、活性層との位置関係を考慮しなければならないと
いう製作上の複雑さを有していた。However, in the buried semiconductor laser thus configured, the electrical isolation between the buried layer and the cladding layer is
A band structure step is used. Therefore, in the high current injection state, a current flows not only in the active layer, but as a result,
The efficiency will decrease. Further, there is a junction capacitance due to the buried layer between both electrodes of the semiconductor laser, and in particular, a reverse bias is applied, so that the capacitance becomes large. For this reason,
When a pulse current is injected at high speed to try to modulate the laser, there is a problem that the maximum modifiable frequency becomes low because the CR time constant is large. Further, the arrangement of each layer of the buried layer has a manufacturing complexity that the positional relationship with the active layer must be taken into consideration.
このような問題点を解決したものとしては、例えば特開
昭５７−１２８０９２号公報に開示されているように埋
込み層を半絶縁性II−VI族化合物材料で形成することが
行われてきた。すなわち、埋込み領域を半絶縁性II−VI
族化合物材料で埋込んで形成することにより、大電流注
入時であつてもリークを生じることなく、活性層に電流
を狭窄できるので、高出力，高効率動作が可能となり、
かつ電極間の埋込み領域の容量も大幅に小さくなるの
で、高速変調が可能となる。As a solution to such a problem, for example, as disclosed in JP-A-57-128092, a buried layer is formed of a semi-insulating II-VI group compound material. That is, the embedded region is semi-insulating II-VI.
By embedding it with a group compound material, the current can be confined in the active layer without causing a leak even when a large current is injected, so that high output and high efficiency operation are possible.
In addition, since the capacitance of the buried region between the electrodes is significantly reduced, high speed modulation is possible.
しかしながら、埋込み領域をII−VI族化合物材料で埋込
む構造では、次のような問題があった。However, the structure in which the embedded region is embedded with the II-VI group compound material has the following problems.
すなわち、II−VI族化合物材料の構成元素であるII族と
VI族の元素がストライプ状活性領域を構成するIII−Ｖ
族化合物半導体層に拡散することである。II族とVI族の
元素はそれぞれIII−Ｖ族化合物半導体のｐ型とｎ型の
不純物になる。特にII族元素の拡散は、ストライプ状活
性領域のｐ型不純物濃度を増加させ、そのため、光吸収
を増大させ閾値の増加を招く。また、ｐ型とｎ型の不純
物が同時に添加されるため、ストライプ状活性領域を構
成するIII−Ｖ族半導体層が高抵抗化し、やはり閾値の
増加を招く。したがって埋込み領域をII−VI族化合物材
料で埋込む構造において期待される高出力，高効率およ
び高速変調という利点が十分に発揮できないという問題
があった。That is, the group II, which is a constituent element of the group II-VI compound material,
III-V elements of group VI constitute stripe-shaped active regions
Diffusion to the group compound semiconductor layer. Group II and VI elements become p-type and n-type impurities in the III-V compound semiconductor, respectively. Particularly, the diffusion of the group II element increases the p-type impurity concentration in the stripe-shaped active region, which increases light absorption and causes an increase in threshold value. Further, since the p-type and n-type impurities are added at the same time, the III-V group semiconductor layer forming the stripe-shaped active region has a high resistance, which also causes an increase in the threshold value. Therefore, there was a problem that the advantages of high output, high efficiency, and high-speed modulation expected in the structure of burying the buried region with the II-VI group compound material could not be fully exerted.
したがって本発明は、前述した従来の問題点を解決する
ためになされたものであり、その目的はIII−Ｖ族化合
物半導体を活性層に持つ半導体レーザの活性領域を半絶
縁性II−VI族化合物材料で埋込んだ半導体レーザにおい
て、埋込み層を構成するII族またはVI族元素が活性領域
を構成するIII−Ｖ族化合物半導体層に拡散することを
防止することができる半導体レーザを提供することにあ
る。Therefore, the present invention has been made to solve the above-mentioned conventional problems, and an object thereof is to provide a semi-insulating II-VI group compound for the active region of a semiconductor laser having a III-V group compound semiconductor as an active layer. Provided is a semiconductor laser embedded with a material, which can prevent a group II or VI element forming a buried layer from diffusing into a III-V group compound semiconductor layer forming an active region. is there.
〔問題点を解決するための手段〕 このような目的を達成するために本発明による半導体レ
ーザは、III−Ｖ族化合物半導体からなる屈折率導波形
半導体レーザのストライプ状活性領域の光の伝搬方向と
平行な側面の埋込み領域を、半絶縁性II−VI族化合物材
料で埋込んだ半導体レーザにおいて、ストライプ状活性
領域と半絶縁性II−VI族化合物材料からなる埋込み層と
の間に絶縁性拡散阻止層を配設したものである。[Means for Solving the Problems] In order to achieve such an object, the semiconductor laser according to the present invention is provided with a light guide direction of light in a stripe active region of a refractive index guided semiconductor laser made of a III-V group compound semiconductor. In a semiconductor laser in which a buried region on a side surface parallel to the semiconductor layer is buried with a semi-insulating II-VI compound material, an insulating property is provided between the stripe-shaped active region and the buried layer made of the semi-insulating II-VI compound material. A diffusion blocking layer is provided.
本発明においては、III−Ｖ族化合物半導体からなるス
トライプ状活性領域と半絶縁性II−VI族化合物材料から
なる埋込み層との間に絶縁性拡散阻止層を配設すること
により、II−VI族化合物材料の構成元素であるII族とVI
族の元素がストライプ状活性領域を構成するIII−Ｖ族
化合物半導体層に拡散することを防ぐことができる。し
たがってII族とVI族の元素の拡散に伴う閾値の増加を防
ぐことができる。このため、従来から期待されていた高
出力，高効率動作が可能となり、かつ高速変調が可能と
なる。In the present invention, the insulating diffusion blocking layer is provided between the stripe-shaped active region made of the III-V group compound semiconductor and the buried layer made of the semi-insulating II-VI group compound material to form the II-VI group. Group II and VI are the constituent elements of group compound materials
It is possible to prevent the group element from diffusing into the III-V group compound semiconductor layer forming the stripe-shaped active region. Therefore, it is possible to prevent the threshold value from increasing due to the diffusion of the group II and VI elements. For this reason, the high output and high efficiency operation expected from the past can be performed, and the high speed modulation can be performed.
第１図は本発明による半導体レーザの一実施例を説明す
るためのレーザ共振器を光の伝搬方向に垂直に切断した
断面図である。同図において、１は半導体基板、２はク
ラツド層、３は活性層、４はクラツド層、５はキヤツプ
層、６は絶縁性拡散阻止層、７はII−VI族半導体からな
る半絶縁性埋込み層、８，９は金属電極である。FIG. 1 is a cross-sectional view of a laser resonator for explaining an embodiment of a semiconductor laser according to the present invention, taken along a line perpendicular to the light propagation direction. In the figure, 1 is a semiconductor substrate, 2 is a cladding layer, 3 is an active layer, 4 is a cladding layer, 5 is a cap layer, 6 is an insulating diffusion blocking layer, and 7 is a semi-insulating buried layer made of a II-VI group semiconductor. Layers 8, 9 are metal electrodes.
このような構成において、電流は金属電極８から注入さ
れ金属電極９に達する。このとき、絶縁性である拡散阻
止層６と埋込み層７とによつて電流は狭窄され、活性層
３のみに注入される。拡散阻止層６および埋込み層７
は、半導体基板１，クラツド層２，活性層３，クラツド
層４およびキヤツプ層５を一層と見なしたときの等価屈
折率より低い材料であるため、光を活性層３に閉じ込め
ることができる。さらに拡散阻止層６および埋込み層７
が活性層３から発生する光に対して透明であるため、活
性層３から拡散阻止層６および埋込み層７に染み出して
きた光を吸収することもない。そのうえ、金属電極８と
金属電極９との間の拡散阻止層６および埋込み層７は上
下方向に接合がないため、電気的容量がない。したがつ
て、高効率，高出力および低閾値，高速変調が可能とな
る。In such a configuration, current is injected from the metal electrode 8 and reaches the metal electrode 9. At this time, the diffusion blocking layer 6 and the buried layer 7, which are insulative, confine the current, and the current is injected only into the active layer 3. Diffusion blocking layer 6 and buried layer 7
Is a material having a lower equivalent refractive index when the semiconductor substrate 1, the cladding layer 2, the active layer 3, the cladding layer 4 and the cap layer 5 are regarded as one layer, and thus light can be confined in the active layer 3. Furthermore, the diffusion blocking layer 6 and the buried layer 7
Is transparent to the light generated from the active layer 3, so that it does not absorb the light leaking from the active layer 3 to the diffusion blocking layer 6 and the buried layer 7. In addition, the diffusion blocking layer 6 and the burying layer 7 between the metal electrode 8 and the metal electrode 9 have no junction in the vertical direction, and thus have no electric capacity. Therefore, high efficiency, high output, low threshold and high speed modulation are possible.
第２図(a)〜(h)は前述した半導体レーザの製作工程を説
明する第１図と同方向の断面図である。同図において、
まず同図(a)に示すようにｎ形GaAs基板１１上にLPE,MOC
VDもしくはMBE法等のいずれかの結晶成長技術を用いて
層厚約３μｍのｎ形GaAlAsクラツド層１２，層厚約0.1
μｍのGaAs活性層１３，層厚約1.5μｍのｐ形GaAlAsク
ラツド層１４および層厚約0.5μｍのｐ形GaAsキヤツプ
層１５を順次成長させる。次にこのｐ形GaAsキヤツプ層
１５上にフオトリソグラフイ技術を用いてシリコン酸化
膜のストライプパターンを形成する。このシリコン酸化
膜をエツチングマスクとしてプロムメタノール液を用い
てｎ形GaAlAsクラツド層１２，GaAs活性層１３，ｐ形Ga
AlAsクラツド層１４およびｐ形GaAsキヤツプ層１５をエ
ツチングする。そして、シリコン酸化膜を弗酸でエツチ
ングして除去することにより同図(b)に示す構造を形成
する。この場合、GaAs活性層１３の幅は約0.8μｍであ
る。次に同図(c)に示すように全面にシリコン酸化膜も
しくはシリコン窒化膜１６をCVD，ECRプラズマデポジシ
ヨンもしくはRFマグネトロンスパツタリング技術を用い
てGaAs活性層１３，ｐ形GaAlAsクラツド層１４およびｐ
形GaAsキヤツプ層１５の側面を覆つて形成する。次に同
図(d)に示すようにシリコン窒化膜１６の凸部にフオリ
ソグラフイ技術を用いてフオトレジストパターン２０を
形成し、シリコン窒化膜１６の平坦部分を弗酸で化学的
にエツチングもしくはフレオン等の反応性ガスを用いて
リアクテイブイオンエツチングして除去する。次に有機
溶剤もしくはプラズマ灰化法を用いてシリコン窒化膜１
６の凸部上のフオトレジストパターン２０を除去する。
次に同図(e)に示すように全面にGaAsに格子整合した半
絶縁性であるZnSxSe1-xをMOCVDもしくはMBE法により成
膜してZnS0.08Se0.92半絶縁層１７を形成する。この場
合、MOCVDもしくはMBE法により250℃〜400℃程度の比較
的低温度に加熱した上記ｎ形GaAlAsクラツド層１２およ
びシリコン窒化膜１６上にＳを含む原料とＳｅを含む原
料との供給量比を調節しながら、Znを含む原料とともに
供給することにより所望の組成比ｘを有するZnSxSe1-x
からなるZnS0.08Se0.92半絶縁層１７を堆積する。この
半絶縁層１７の比抵抗はドーピングを行なわない高純度
層の場合には約１０ＭΩ−ｃｍ以上である。また、この
半絶縁層１７のうち、ｎ形GaAlAsクラツド層１２と接触
している部分は単結晶であり、シリコン窒化膜１６上は
多結晶もしくは非晶質である。次にこのZnSSeのエツチ
ング液である過酸化水素とアンモニアとの混合液に浸漬
すると、半絶縁層１７の多結晶もしくは非晶質領域の方
が単結晶領域よりも速くエツチングされ、この結果、同
図(f)に示すような形状となる。なお、RIE等のドライエ
ツチング法を用いて半絶縁層１７をエツチングしても良
い。次にシリコン窒化膜１６のうち、表面に露出した部
分を弗酸中でエツチングし除去して同図(g)に示すよう
にｐ形GaAsキヤツプ層１５を露出させる。次にｎ形GaAs
基板１１を研磨して約100μｍ程度の厚さとする。しか
る後、ｐ形GaAsキヤツプ層１５，シリコン窒化膜１６お
よび半絶縁層１７の表面にクロムと金とを順次蒸着して
積層し、さらにｎ形GaAs基板１１の底面には金とゲルマ
ニウムとの合金を蒸着して熱処理を行なつて金属と半導
体とを合金化して同図(h)に示すようにｐ形電極１８お
よびｎ形電極１９をそれぞれ形成する。なお、ｐ形電極
１８の形成時には、GaAs系特有のレーザ動作時の端面劣
化を防止するため、端面となる領域から約１０μｍ内側
に電極形成を行なうようにフオトリソグラフイ技術を用
いた。また、この半導体レーザは、ウエハから共振器長
約300μｍのレーザを劈開により切り出した。このよう
な製作方法によれば、製作プロセスが容易であり、高歩
留りで生産が可能となる。2 (a) to 2 (h) are sectional views in the same direction as FIG. 1 for explaining the manufacturing process of the above-mentioned semiconductor laser. In the figure,
First, as shown in FIG. 3A, LPE and MOC are formed on the n-type GaAs substrate 11.
An n-type GaAlAs cladding layer 12 having a layer thickness of about 3 μm and a layer thickness of about 0.1 using a crystal growth technique such as VD or MBE method.
A GaAs active layer 13 having a thickness of .mu.m, a p-type GaAlAs cladding layer 14 having a thickness of about 1.5 .mu.m and a p-type GaAs cap layer 15 having a thickness of about 0.5 .mu.m are successively grown. Then, a stripe pattern of a silicon oxide film is formed on the p-type GaAs cap layer 15 using the photolithography technique. Using this silicon oxide film as an etching mask, a n-type GaAlAs cladding layer 12, a GaAs active layer 13, and a p-type Ga layer are formed by using a promethanol solution.
The AlAs cladding layer 14 and the p-type GaAs cap layer 15 are etched. Then, the silicon oxide film is removed by etching with hydrofluoric acid to form the structure shown in FIG. In this case, the width of the GaAs active layer 13 is about 0.8 μm. Next, as shown in FIG. 3C, a silicon oxide film or a silicon nitride film 16 is formed on the entire surface by CVD, ECR plasma deposition or RF magnetron sputtering technique, and the GaAs active layer 13, p-type GaAlAs cladding layer 14 and p
It is formed so as to cover the side surface of the GaAs cap layer 15. Next, as shown in FIG. 3D, a photoresist pattern 20 is formed on the convex portion of the silicon nitride film 16 by using the photolithography technique, and the flat portion of the silicon nitride film 16 is chemically etched with hydrofluoric acid or Reactive ion etching is performed using a reactive gas such as Freon to remove the ions. Next, a silicon nitride film 1 is formed by using an organic solvent or plasma ashing method.
The photoresist pattern 20 on the convex portion 6 is removed.
Next, as shown in FIG. 7E, semi-insulating ZnSxSe 1-x lattice-matched to GaAs is formed on the entire surface by MOCVD or MBE to form a ZnS 0.08 Se 0.92 semi-insulating layer 17. In this case, the supply ratio of the raw material containing S and the raw material containing Se on the n-type GaAlAs cladding layer 12 and the silicon nitride film 16 heated to a relatively low temperature of about 250 ° C. to 400 ° C. by MOCVD or MBE method. Of ZnSxSe 1-x having a desired composition ratio x by supplying a raw material containing Zn while controlling the
ZnS 0.08 Se 0.92 semi-insulating layer 17 consisting of is deposited. The specific resistance of the semi-insulating layer 17 is about 10 MΩ-cm or more in the case of a high-purity layer without doping. Further, of the semi-insulating layer 17, the portion in contact with the n-type GaAlAs cladding layer 12 is single crystal, and the silicon nitride film 16 is polycrystalline or amorphous. Next, when this is immersed in a mixed solution of hydrogen peroxide and ammonia, which is an etching solution of ZnSSe, the polycrystalline or amorphous region of the semi-insulating layer 17 is etched faster than the single crystal region. The shape is as shown in FIG. The semi-insulating layer 17 may be etched by using a dry etching method such as RIE. Next, the exposed portion of the silicon nitride film 16 is removed by etching in hydrofluoric acid to expose the p-type GaAs cap layer 15 as shown in FIG. Then n-type GaAs
The substrate 11 is polished to a thickness of about 100 μm. After that, chromium and gold are sequentially deposited on the surfaces of the p-type GaAs cap layer 15, the silicon nitride film 16 and the semi-insulating layer 17 to be laminated, and an alloy of gold and germanium is further formed on the bottom surface of the n-type GaAs substrate 11. Is vapor-deposited and heat-treated to alloy the metal with the semiconductor to form a p-type electrode 18 and an n-type electrode 19 as shown in FIG. When the p-type electrode 18 is formed, a photolithography technique is used so that the electrode is formed approximately 10 μm inward from the end face region in order to prevent the end face deterioration during laser operation peculiar to the GaAs system. Further, in this semiconductor laser, a laser having a cavity length of about 300 μm was cut out from the wafer by cleavage. According to such a manufacturing method, the manufacturing process is easy and the production can be performed with a high yield.
このように構成されたGaAs／GaAlAs半導体レーザは、室
温CWでの光出力−電流特性を測定したところ、閾値電流
約15mA，片端面での外部微分量子効率約３０％および片
面からの最大光出力約260mWが得られた。また、強度変
調の応答特性について、バイアスを閾値電流の約1.5倍
において、振幅を閾値電流の約0.5倍として測定した。
光出力で室温時の３dB低下の周波数は約23GHzであつ
た。The optical output-current characteristics at room temperature CW of the GaAs / GaAlAs semiconductor laser thus configured were measured, and the threshold current was about 15 mA, the external differential quantum efficiency on one end was about 30%, and the maximum optical output from one side was obtained. About 260mW was obtained. The response characteristics of intensity modulation were measured with the bias at about 1.5 times the threshold current and the amplitude at about 0.5 times the threshold current.
The frequency at which the optical output dropped by 3 dB at room temperature was about 23 GHz.
なお、前述した実施例においては、拡散阻止層６を介し
て埋込み層７を埋込んだ場合について説明したが、埋込
み層７を低温度で成長するときには、クラツド層２，活
性層３，クラツド層４と埋込み層７との間で原子の相互
拡散が抑えられるため、拡散阻止層６は必要としない。
また、埋込み層７を単結晶層としたが、アモルフアスも
しくは多結晶で良いことは勿論である。この場合、単結
晶よりも多少比抵抗は低くなるが、１ＭΩ・cm程度とな
るので、充分である。また、半導体基板１と半絶縁性埋
込み層７との間にクラツド層２が存在しているが、存在
しなくても良い。また、半導体の極性をｎ形とｐ形との
順序を逆としても良いことは勿論である。Although the buried layer 7 is buried via the diffusion blocking layer 6 in the above-described embodiment, when the buried layer 7 is grown at a low temperature, the cladding layer 2, the active layer 3 and the cladding layer are formed. The mutual diffusion of atoms between the buried layer 4 and the buried layer 7 is suppressed, so that the diffusion blocking layer 6 is not necessary.
Although the buried layer 7 is a single crystal layer, it is needless to say that it may be amorphous or polycrystalline. In this case, the specific resistance is somewhat lower than that of the single crystal, but it is about 1 MΩ · cm, which is sufficient. Further, although the cladding layer 2 exists between the semiconductor substrate 1 and the semi-insulating buried layer 7, it does not have to exist. Further, it goes without saying that the polarities of the semiconductor may be reversed between the n-type and the p-type.
また、前述した実施例はGaAs／GaAlAs半導体レーザにつ
いて説明したが、本発明はこれに限定されるものではな
く、InGaAsP/InP半導体レーザについても半絶縁性埋込
み層をZnSexTe1-xとすることにより、本構造を適用でき
ることは言うまでもない。In addition, although the above-described embodiment has been described with respect to the GaAs / GaAlAs semiconductor laser, the present invention is not limited to this, and also for the InGaAsP / InP semiconductor laser, the semi-insulating buried layer is ZnSexTe 1-x. Needless to say, this structure can be applied.
以上説明したように本発明は、III−Ｖ族化合物半導体
からなるストライプ状活性領域と半絶縁性II−VI族化合
物材料からなる埋込み層との間に絶縁性拡散阻止層を配
設することにより、II−VI族化合物材料の構成元素であ
るII族とVI族の元素がストライプ状活性領域を構成する
III−V族化合物半導体層に拡散することを防ぐことがで
きる。したがってII族とVI族の元素の拡散に伴う閾値の
増加を防ぐことができる。また、活性領域の光の伝搬方
向に平行な側面の埋込み領域を半絶縁性II−VI族化合物
材料で埋込むことにより、容易に半絶縁性もしくは高抵
抗となるので、大電流注入時であつてもリークを生じる
ことなく、活性領域に電流を狭窄できるため、高出力，
高効率動作が可能となる。また、両電極間の埋込み領域
の容量も大幅に小さくなるので、高速変調が可能とな
る。さらにZnSxSe1-x，ZnSeTe1-xは、絶縁性がSiO2およ
び有機絶縁体よりそれぞれＧａＡｓやＩｎＰに極めて近
いので、単一横モード発振に必要な活性領域の幅を前述
した絶縁体を用いる場合よりも広くでき、したがつて活
性領域の体積が大きくなり、高出力動作が可能となるな
どの極めて優れた効果が得られる。As described above, the present invention provides the insulating diffusion blocking layer between the stripe-shaped active region made of the III-V compound semiconductor and the buried layer made of the semi-insulating II-VI compound material. , Group II and VI elements, which are the constituent elements of the II-VI group compound material, form the stripe-shaped active region
It is possible to prevent the diffusion into the III-V group compound semiconductor layer. Therefore, it is possible to prevent the threshold value from increasing due to the diffusion of the group II and VI elements. In addition, by embedding the semi-insulating II-VI group compound material in the buried region on the side surface parallel to the light propagation direction of the active region, the semi-insulating property or the high resistance can be easily obtained. However, since current can be confined in the active region without causing leakage, high output,
Highly efficient operation becomes possible. Further, since the capacitance of the embedded region between both electrodes is significantly reduced, high speed modulation becomes possible. Furthermore, since ZnSxSe 1-x and ZnSeTe 1-x are much closer in insulating properties to GaAs and InP than SiO 2 and organic insulators, the above-mentioned insulators are used for the width of the active region necessary for single transverse mode oscillation. It can be made wider than the case, and accordingly, the volume of the active region becomes large, and extremely excellent effects such as high-power operation can be obtained.
第１図は本発明による半導体レーザの一実施例を示す光
の伝搬方向に垂直な断面図、第２図(a)〜(h)は本発明に
よる半導体レーザの製作工程を説明するための第１図と
同方向の断面図である。 １……半導体基板、２……クラツド層、３……活性層、
４……クラツド層、５……キヤツプ層、６……絶縁性拡
散阻止層、７……II−VI族半導体からなる半絶縁性埋込
み層、８，９……金属電極、１１……ｎ形GaAs基板、１
２……ｎ形GaAlAsクラツド層、１３……GaAs活性層、１
４……ｐ形GaAlAsクラツド層、１５……ｐ形GaAsキヤツ
プ層、１６……シリコン窒化膜、１７……ZnS0.08Se
0.92半絶縁層、１８……ｐ形電極、１９……ｎ形電極、
２０……フオトレジストパターン。FIG. 1 is a sectional view showing an embodiment of a semiconductor laser according to the present invention, which is perpendicular to the light propagation direction, and FIGS. 2A to 2H are views for explaining a manufacturing process of the semiconductor laser according to the present invention. It is sectional drawing of the same direction as FIG. 1 ... semiconductor substrate, 2 ... cladding layer, 3 ... active layer,
4 ... Cladding layer, 5 ... Capping layer, 6 ... Insulating diffusion blocking layer, 7 ... Semi-insulating buried layer made of II-VI group semiconductor, 8, 9 ... Metal electrode, 11 ... N-type GaAs substrate, 1
2 ... n-type GaAlAs cladding layer, 13 ... GaAs active layer, 1
4 ... p-type GaAlAs cladding layer, 15 ... p-type GaAs cap layer, 16 ... silicon nitride film, 17 ... ZnS 0.08 Se
0.92 semi-insulating layer, 18 ... p-type electrode, 19 ... n-type electrode,
20 ... Photo resist pattern.
Claims (3)
波形半導体レーザのストライプ状活性領域の光の伝搬方
向と平行な側面の埋込み領域を、半絶縁性II−VI族化合
物材料で埋込んだ半導体レーザにおいて、 前記ストライプ状活性領域と半絶縁性II−VI族化合物材
料からなる埋込み層との間に絶縁性拡散阻止層を配設す
ることを特徴とした半導体レーザ。1. A semi-insulating II-VI group compound material is buried in a buried region on a side surface parallel to a light propagation direction of a stripe-shaped active region of a refractive index guided semiconductor laser made of a III-V group compound semiconductor. A semiconductor laser, wherein an insulating diffusion blocking layer is provided between the stripe-shaped active region and a buried layer made of a semi-insulating II-VI compound material.
ｘＳｅ１−ｘからなることを特徴とした特許請求の範囲
第１項記載の半導体レーザ。2. The semi-insulating II-VI compound material is ZnS.
The semiconductor laser according to claim 1, which is made of x Se 1-x .
ｅｘＴｅ１−ｘからなることを特徴とした特許請求の範
囲第１項記載の半導体レーザ。3. The semi-insulating II-VI compound material is ZnS.
The semiconductor laser according to claim 1, wherein the semiconductor laser is made of e x Te 1-x .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62293233A JPH0654825B2 (en) | 1987-11-20 | 1987-11-20 | Semiconductor laser |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62293233A JPH0654825B2 (en) | 1987-11-20 | 1987-11-20 | Semiconductor laser |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01135086A JPH01135086A (en) | 1989-05-26 |
| JPH0654825B2 true JPH0654825B2 (en) | 1994-07-20 |
Family
ID=17792151
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62293233A Expired - Fee Related JPH0654825B2 (en) | 1987-11-20 | 1987-11-20 | Semiconductor laser |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0654825B2 (en) |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57128092A (en) * | 1981-01-30 | 1982-08-09 | Sanyo Electric Co Ltd | Imbedded type semiconductor laser device |
| JPS58176990A (en) * | 1982-04-09 | 1983-10-17 | Sanyo Electric Co Ltd | Semiconductor laser |
| JPS58176991A (en) * | 1982-04-09 | 1983-10-17 | Sanyo Electric Co Ltd | Semiconductor laser |
| JPS6284581A (en) * | 1985-10-08 | 1987-04-18 | Fujitsu Ltd | semiconductor light emitting device |
| JPS62216386A (en) * | 1986-03-18 | 1987-09-22 | Nec Corp | Semiconductor light emitting element |
-
1987
- 1987-11-20 JP JP62293233A patent/JPH0654825B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01135086A (en) | 1989-05-26 |
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