JPH06342566A - Data separator circuit - Google Patents

Abstract

PURPOSE:To provide a data separator circuit to be constituted of one system filter circuit. CONSTITUTION:This data separator circuit is constituted of a phase comparator 10, a charge pump 11, a filter circuit 12, a gain switching type voltage control oscillation circuit(VCO) 13, a frequency devider circuit 14, a gain switching circuit 15 and a data separator 16 and thus, the filter circuit is realized by one system whereas two are necessary at conventional circuits. A gain switching is realized by receiving a gain switching signal outputted when it is synchronized with the one from the gain switching circuit 15 at the gain switching type VCO 13 and switching the characteristic of the change of the oscillation frequency of the gain switching type VCO 13 against a control voltage.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data separation circuit having a plurality of gains in one system of filter circuit.

[0002]

2. Description of the Related Art In recent years, it has been desired to reduce the number of circuits and the number of components in various circuits, and the same applies to data separate circuits.

A conventional data separation circuit will be described below. FIG. 4 is a block diagram of a conventional data separation circuit. In FIG. 4, 1 is a phase comparator. 2 is a charge pump, 3 is a filter circuit, 4 is a voltage controlled oscillator (hereinafter referred to as VCO), 5 is a frequency divider circuit, 6 is a gain switching circuit, 7 is a data separator, 8 is a high speed filter circuit, Reference numeral 9 is a low speed filter circuit.

The operation of the conventional data separation circuit configured as described above will be described below.

The data of the floppy disk read from the floppy disk drive is an asynchronous signal, and a window signal for reading the read signal in synchronization with this signal is required. In order to generate this window signal, it is necessary to use a PLL circuit and synchronize it with an asynchronous signal. The phase comparator 1, the charge pump 2, the filter circuit 3, the VCO 4, and the frequency divider circuit 5 form a PLL, and the phase comparator The read data in 1 is compared with the output divided by the frequency dividing circuit 5 of the VCO 4, and if the read data and the output of the VCO 4 are faster in phase of the read data, the charge pump 2 is UP (up). When the UP signal is input, the charge pump 2 outputs a current so as to charge the filter circuit 3. When the filter circuit 3 is charged, the output voltage level of the filter circuit 3 rises, the control voltage of the VCO 4 also rises, and the oscillation frequency also rises. Also, from the phase comparator 1, DOWN
When the (down) signal is output, the charge pump 2 draws a current so as to discharge the electric charge of the filter circuit 3, which lowers the output voltage level of the filter circuit 3 and also lowers the control voltage of the VCO 4 and thus VC.
The oscillation frequency of O4 also decreases.

In this way, a signal is produced which is synchronized with the asynchronous signal from the floppy disk. Until the synchronization, the high-speed filter 8 is used to increase the change in the oscillation frequency of the VCO 4 with one UP or DOWN signal in order to quickly synchronize with the read data.
Is used to increase the change in voltage level. However, once synchronized, a low-speed filter is used to make a single U-turn in order to follow only fluctuations caused by uneven rotation of the floppy disk drive and not follow peak shift.
It is necessary to reduce the voltage level that changes with the P or DOWN signal to reduce the change in the oscillation frequency of the VCO 4.
Two types of filter circuits, a high speed filter 8 and a low speed filter 9, are required.

The switching of the filter circuit is carried out by the charge pump 2 which receives the gain switching signal output from the gain switching circuit 6 in the case of synchronization, and switches which circuit of the high speed filter and the low speed filter is charged or discharged. The gain is switched. The data separator 7 outputs the read data based on the window signal generated by synchronizing with the read data and removes the clock pulse from the modulated read data to form only the data.

[0008]

However, the above-mentioned conventional structure has a problem that two types of filter circuits, one for high speed and the other for low speed, are necessary because the characteristics of the VCO are fixed.

The present invention solves the above-mentioned conventional problems, and an object of the present invention is to provide a data separation circuit which can realize a filter circuit in one system.

[0010]

In order to solve the above conventional problems, the data separating circuit of the present invention has the following configuration. That is, a phase comparator for comparing the read data from the floppy disk drive with the output of the voltage controlled oscillator circuit, a charge pump for driving the filter circuit with the signal from the phase comparator, and a charge pump for the charge pump. 1-system filter circuit for converting the charge / discharge of the battery into a voltage level, a gain switching circuit for switching the characteristics when the read data and the output of the voltage controlled oscillation circuit are asynchronous or synchronized, and the output of the charge pump Oscillates at a frequency according to the voltage level of
A gain switching type voltage controlled oscillator circuit capable of switching the characteristic of the oscillation frequency with respect to the voltage level by a gain switching signal from the gain switching circuit. Then, the gain switching type voltage controlled oscillator circuit has a plurality of transistors of different sizes for controlling a current that flows into the ring oscillator when a control voltage is input, a transistor for selecting one of the plurality of transistors, and an inverter of the ring oscillator. Is a gain switching type voltage controlled oscillator circuit including a load capacitance that determines the delay value of 1 and a transistor that switches the load capacitance.

[0011]

With the above structure, two types of filter circuits are provided, a high-speed filter circuit for phase matching at high gain until synchronization and a low-gain low-speed filter circuit for not following the peak shift after synchronization. It can be configured by a filter circuit having a gain characteristic of the system.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a data separation circuit according to the first embodiment of the present invention. Figure 1
In the figure, 10 is a phase comparator, 11 is a charge pump, 12 is a filter circuit, and 13 is a gain switching type VC.
O, 14 are frequency dividing circuits, 15 is a gain switching circuit, 16
Is the data separator.

The operation of the data separation circuit configured as described above will be described below.

In order to generate the window signal, the phase comparator 10, the charge pump 11, the filter circuit 12, the gain switching type VCO 13 and the frequency dividing circuit 14 constitute a PLL, and the phase comparator 10 reads the read data and the gain switching type. The output divided by the frequency dividing circuit 14 of the VCO 13 is compared, and if the read data and the output of the gain switching type VCO 13 are faster in the phase of the read data, the charge
Output the UP signal to the pump 11 and charge pump 1
In No. 1, when the UP signal is input, the current is discharged and the filter circuit 12 is charged. When the filter circuit 12 is charged, the output voltage level of the filter circuit 12 rises, the control voltage of the gain switching type VCO 13 also rises, and the oscillation frequency also rises. Also, the DOWN signal from the phase comparator 10
When a signal is output, the charge pump 11 draws a current and discharges the electric charge of the filter circuit 12, thereby lowering the output voltage level of the filter circuit 12 and also lowering the control voltage of the gain switching type VCO 13, so that the gain switching type VCO 13 oscillates. The frequency also goes down.

In this way, a signal is produced which is synchronized with the asynchronous signal from the floppy disk. In addition, until synchronized, the gain switching VCO 13 for the change in the voltage level is increased in order to increase the change in the oscillation frequency of the gain switching VCO 13 with one UP or DOWN signal for quick synchronization with the read data.
Characteristic that makes the change of oscillation frequency of 13 large (Fig. 2
17) of the above). However, once synchronized, only the fluctuation caused by the uneven rotation of the floppy disk drive is followed, and the peak shift is not followed, so that the change in the voltage level that changes with one UP or DOWN signal is Even if it is the same as the case of synchronizing, by selecting the characteristic (characteristic like 18 in FIG. 2) that reduces the change of the oscillation frequency with respect to the voltage change of the gain switching type VCO 13, there are two types of filter circuits of the conventional circuit. Can be achieved with.

This gain switching is performed by receiving the gain switching signal output from the gain switching circuit 15 when the gain switching circuit 15 is synchronized, and switching the characteristic of the change of the oscillation frequency with respect to the control voltage of the gain switching type VCO 13. To be realized. data·
The separator 16 outputs the read data based on the window signal generated by synchronizing with the read data and removes the clock pulse from the modulated read data to form only the data.

As a second embodiment, a gain switching type VCO 13 for realizing the above circuit will be described with reference to the drawings. FIG. 3 is a diagram showing the configuration of the gain switching type VCO 13.

In FIG. 3, the P-channel transistor 19
And the N-channel transistor 20 form an inverter circuit. The same applies to the P-channel transistor 21 and the N-channel transistor 22, and the P-channel transistor 23 and the N-channel transistor 24. A ring oscillator is composed of these three inverters. Small P-channel transistor 25,
The large-sized P-channel transistor 26 is a fixed transistor for controlling the current flowing through each inverter by a control voltage, and the N-channel transistors 27, 28 and N-channel transistors 29 to 31 form a current mirror circuit. This is because the current flowing through each transistor is the same. The P-channel transistor 32 and P-channel transistors 33 to 35 also form a current mirror circuit. The capacitors 36 to 41 are load capacities of the respective inverters of the ring oscillator and adjust the delay value. P-channel transistor 42, N-channel transistor 4
Reference numeral 3 is a transistor as a switch for selecting the size of the fixed transistor. N-channel transistors 44 to 46 are switching transistors for changing the load capacitance of the ring oscillator.

In the above structure, when the characteristic of high gain until synchronizing with the read data is used, the gain switching signal is "L", the P-channel transistor 42 is turned on, and the fixed transistor is a small-sized P-channel transistor. No. 25 is selected, and the load capacitance of the ring oscillator is only the capacitors 36 to 38 because the N-channel transistors 44 to 46 are in the off state, and has a characteristic like the high-speed characteristic 17 shown in FIG. Also, in the operation at low speed after synchronizing with the read data, the gain switching signal becomes "H", and the P-channel transistor 4
2 is turned off, the N-channel transistor 43 is turned on instead, the large-sized P-channel transistor 26 is selected as the fixed transistor, and the load capacitance of the ring oscillator is that the N-channel transistors 44 to 46 are turned on. , The capacitance values of the capacitors 36 to 41 are added, and the low speed characteristic 18 shown in FIG.
Therefore, the characteristic of the change of the oscillation frequency with respect to the control voltage can be selected by the gain switching signal, and the circuit shown in FIG. 1 can be configured.

As described above, according to the present embodiment, by providing the gain switching type VCO, the data separation circuit is realized by one system of filter circuit without using two kinds of filter circuits for high speed and low speed. This is especially advantageous when the data separation circuit is integrated in a semiconductor device.

[0022]

As described above, according to the present invention, by providing the gain switching type VCO, it is possible to realize an excellent data separation circuit in which the filter circuit can be realized by one system.

[Brief description of drawings]

FIG. 1 is a block diagram of a data separation circuit according to an embodiment of the present invention.

FIG. 2 is a gain switching type V according to an embodiment of the present invention.
CO characteristic diagram

FIG. 3 is a gain switching type V according to an embodiment of the present invention.
Circuit diagram of CO

FIG. 4 is a block diagram of a conventional data separation circuit.

[Explanation of symbols]

 1 Phase Comparator 2 Charge Pump 3 Filter Circuit 4 Voltage Controlled Oscillator (VCO) 5 Dividing Circuit 6 Gain Switching Circuit 7 Data Separator 8 High Speed Filter Circuit 9 Low Speed Filter Circuit 10 Phase Comparator 11 Charge Pump 12 Filter circuit 13 Gain switching type VCO 14 Dividing circuit 15 Gain switching circuit 16 Data separator 17 High speed characteristic 18 Low speed characteristic 25 Small size P channel transistor 26 Large size P channel transistor

Claims (2)

[Claims] 1. A phase comparator for comparing read data from a floppy disk drive and an output of a voltage controlled oscillator circuit, a charge pump for driving a filter circuit with a signal from the phase comparator, and the charge. A one-system filter circuit for converting charge / discharge from the pump into a voltage level, a gain switching circuit for switching the characteristics when the read data and the output of the voltage controlled oscillation circuit are asynchronous or synchronized, and the charge circuit A gain switching type voltage controlled oscillation circuit capable of oscillating at a frequency according to the voltage level of the output of the pump and switching the characteristic of the oscillation frequency with respect to the voltage level by a gain switching signal from the gain switching circuit. Characteristic data separation circuit. 2. A gain switching type voltage controlled oscillator circuit comprising: a plurality of transistors having different sizes for controlling a current inputted to a ring oscillator when a control voltage is inputted; a transistor for selecting one of the plurality of transistors; 2. The data separating circuit according to claim 1, wherein the data separating circuit is a gain switching type voltage controlled oscillation circuit including a load capacitance that determines a delay value of an inverter of the ring oscillator, and a transistor that switches the load capacitance.