JPH0522042A - Digital orthogonal demodulation circuit - Google Patents

Abstract

PURPOSE:To realize the digital orthogonal demodulation circuit which can execute demodulation without distortion by equalizing the absolute value levels of two orthogonal signals and precisely correcting phase difference to 90 deg.. CONSTITUTION:At the digital orthogonal demodulation circuit equipped with a reference wave generation circuit 1 to generate a reference wave differring the phase at 90 deg., two mixers 2 and 3 to mix this reference wave into received waves, two filters of first and second filters 4 and 5 to pass only the prescribed frequency component and demodulating means 6 to obtain a demodulated signal by calculating a square average, an absolute value level correcting means 7 is provided to compare the absolute value levels of the two orthogonal signals by a digital processing and to increase or decrease the strength of one signal only for a prescribed variable corresponding to the compared result.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a quadrature demodulation circuit, and more particularly to a digital quadrature demodulation circuit which performs digital demodulation processing.

[0002]

2. Description of the Related Art Conventionally, a super-heterodyne system is generally used as a detection circuit, but a direct conversion reception system using a quadrature demodulation circuit is an alternative to this. The direct conversion receiving method has the advantages that the circuit configuration can be simplified and that there are few adjustment points and high reliability can be obtained.

Particularly in recent years, there has been a performance improvement and a price reduction of a digital signal processor (hereinafter referred to as a DSP) capable of performing complicated filter processing at a high speed. By using this DSP for demodulation processing, the circuit is further improved. The simplification and the improvement of reliability are achieved. The applicant of the present invention is Japanese Patent Laid-Open No.
No. 1-273005 proposes a quadrature demodulation circuit with a simple structure and high reliability, and FIG. 9 is a diagram showing a basic structure of the circuit.

In FIG. 9, the oscillation signal from the local oscillation source 11g is mixed with the received wave by the mixer 3g and, at the same time, the phase is changed by 90 ° by the phase converter 12g, and then the mixer 2 is used.
It is mixed with the received wave at g. The signal from the mixer 2g is passed through a bandpass filter (BPF) 4g to be a signal * E ₁ having only a predetermined frequency component required for demodulation. The signal from mixer 3g is similar, and BPFs 4g and 5g are typically low pass filters (LPFs). Two signals * E ₁ and * E
_{In general, 2} is represented by a vector quantity in consideration of the phase component, and here, * represents the vector quantity.

* E ₁ and * E ₂ are digital-converted by A / D converters 91g and 92g, and then the root mean square is obtained by an arithmetic unit of 61g to 64g. This is the signal of the received wave, which is converted into an analog signal by the D / A converter 93g and output. The computing units 61g to 64g are all DSPs.
It is realized in the form of a digital filter according to. Here, the root mean square is calculated by digital processing, but it is of course also possible to perform it by analog processing. However, in reality, there is a problem in terms of accuracy, etc., and it is necessary to carry out digital processing by a DSP.

The circuit shown in FIG. 9 has the advantages that it has a simple structure and can be easily realized. However, in the circuit shown in FIG.
It is necessary that the two paths of the signals * E ₁ and * E ₂ have equal levels and are exactly orthogonal. If the levels of the two paths are different or not orthogonal, then the resulting signal will be distorted. The cause of such level difference and phase shift is the local oscillation 1
There are deviations when changing the phase of the signal from 1f by 90 °, differences in the characteristics of the LPFs 4f and 5f, and the like.

In any case, if there is a level difference between the two signal paths * E ₁ and * E ₂ or the phase is not 90 °,
Accurate demodulation cannot be performed. Therefore, the square calculators 61g and 6
Before the input to 2g, the level and phase difference of the two paths are corrected by digital processing.
FIG. 10 is a diagram showing the configuration of a circuit that detects the ratio of the levels of two paths and corrects them so that the levels become the same.
The absolute value of the signals of the two paths * E ₁ and * E ₂ is calculated by the calculator 7
Calculated at 71h and 772h. Since the signal calculated here naturally includes a signal component, LPFs 773h and 77 that pass only a frequency component lower than this signal component.
Calculate the average of the absolute values of * E ₁ and * E _{2 in 4} h. This is the level of two paths. Divider 775h
Then, the ratio of the two levels is calculated, and the signal of the path * E ₂ is amplified by the multiplier 71h so that the levels of the two paths match. In this way the levels of the two paths are kept equal.

Next, the correction when the phase difference between the signals of the two paths deviates from 90 ° will be described. The applicant of the present application discloses a quadrature modulation circuit for correcting a phase difference in Japanese Patent Application No. 3-113118, and the circuit will be described as an example. Figure 1
1 has a phase difference of 90 ° between the _two signals * E ₁ and * E ₂
It is the figure which represented the relationship when it deviates from (theta) _t from two-dimensional. To make * E ₂ a vector quantity orthogonal to * E ₁ ,
It can be seen that if * E ₁ direction vector equal to the absolute value of * E ₂ sin θ _t is added to * E ₂ , * E ₂₁ orthogonal to * E ₁ can be obtained. However, the magnitude of * E ₂₁ is not equal to * E ₂ , so it is necessary to correct it further to obtain * E ₂₂ .

The circuit shown in FIG. 12 realizes the above correction. Although detailed description is omitted here, the multiplier 8
When the inner product of the vectors * E ₁ and * E ₂ is taken at 31i, the result is the product of the absolute value of * E ₁ and * E ₂ times sin θ _t . Of course, since * E ₁ and * E ₂ contain high frequency components, only low frequency components are extracted by the LPF 832i. Since the product of the absolute values of * E ₁ and * E ₂ is output from the adder 63i that calculates the sum of squares, the LPF 84
If only the low frequency component is taken out at 1i and the ratio is obtained by the divider 834i, sin θ _t can be calculated. Constant multiplier 833
i corrects the coefficient. Sin calculated in this way
multiplied by the * E ₁ in the multiplier 836i and theta _t, adder 835
By adding * E ₂ with i, * E _{21 of} FIG. 11 is obtained. 83
7i to 840i are parts for correcting * E ₂₁ to * E ₂₂ .

[0010]

As shown in FIGS. 10 and 12, the levels * E ₁ and * E ₂ are matched and the phase is 90 °.
By setting, the signal without distortion can be reproduced. As shown in the figure, these corrections require a fairly complicated process, and D
It is realistic to use SP. 9 and 11
In the circuit shown in, LPF773g, 774g, 8
32h and 841h are used. These low-pass filters must prevent the modulation components contained in the signals * E ₁ and * E _{2 from} being mixed in, and the cutoff frequency of the filters must be lower than this modulation component. A typical configuration example of forming a digital filter with a DSP is an infinite impulse filter as shown in FIG. With such a configuration, the sampling frequency is 300
In order to form a filter that can be used in FIGS. 10 and 12 with KHz and a cutoff frequency of 1 Hz, it is necessary to set the coefficient of each amplifier to the value shown in FIG.

It can be seen that the number of significant digits is as large as 20 in order to realize the coefficient as shown in FIG. Although the performance of the DSP has been remarkably improved in recent years, it is difficult to completely realize the coefficients shown in FIG. Even if it could be realized, it would be very expensive. Therefore, in actuality, the number of significant digits is reduced so that the coefficient shown in FIG. In other words, we are dealing with loss of digits. However, if a low-pass filter is realized in this way, the correction cannot be performed accurately and the output signal is distorted.

When a quadrature demodulation circuit is corrected by forming a low-pass filter having a cutoff frequency significantly lower than the sampling frequency by digital signal processing as described above, it is difficult to perform accurate correction. There's a problem. The present invention has been made in view of the above problems, and an object thereof is to realize a quadrature demodulation circuit that enables more accurate correction and obtains an output with less distortion when performing quadrature demodulation by digital processing.

[0013]

In order to solve the above problems, the digital quadrature demodulation circuit of the present invention accurately determines the magnitude of the signal level and whether the phase leads or lags 90 °. Focusing on the fact that it can be performed, based on the determination result, it is corrected by a predetermined minute amount. FIG. 1 is a diagram showing a basic configuration of a digital quadrature demodulation circuit of the present invention. In the drawings relating to all the configurations, the same functional parts are designated by the same reference numerals, and they are represented by lowercase alphabetical characters in order from FIG.

That is, the digital quadrature demodulation circuit according to the present invention comprises a reference wave generating circuit 1 for generating two reference waves having different 90 ° phases, a first mixer 2 for mixing a received wave and two reference waves, and a second mixer for mixing two reference waves. The mixer 3, the first filter 4 and the second filter 5 which pass only the predetermined frequency components of the respective outputs of the first mixer 2 and the second mixer 3, and the first filter 4 and the second filter 5 by digital processing. In the digital quadrature demodulation circuit including the demodulation means 6 for obtaining the demodulated signal by calculating the root mean square of the outputs from the above, the absolute values of the intensities of the outputs from the first filter 4 and the second filter 5 are compared by digital processing, Correction is performed to increase or decrease the intensity of one of the outputs from the first filter or the second filter 5 by a predetermined amount according to the comparison result, and the absolute value level after correction is further compared. It is to repeat the correction to match the absolute value level comprises an absolute value level correction unit 7.

In still another mode, the absolute value levels of the intensities of the outputs from the first filter 4 and the second filter 5 are respectively compared with a reference value, and a correction for increasing or decreasing each by a predetermined amount according to the comparison result. And an absolute value level correction means for repeating the correction so that the absolute value level after correction is compared with a reference value and the absolute value level matches the reference value.

In still another mode, a correction for advancing or delaying one phase by a predetermined amount is performed according to whether the phase difference between the outputs of the first filter 4 and the second filter 5 is larger or smaller than 90 °. A phase difference correction unit is further provided, which further detects the corrected phase difference and repeats the correction so that the phase difference becomes 90 °.

[0017]

In the prior art, when correcting the absolute value level, the ratio between the absolute value levels of * E ₁ and * E ₂ is calculated, and one signal is amplified or attenuated by the ratio.
Similarly, in the case of the phase difference, the phase difference is detected and the phase is advanced or delayed by the detected phase difference. Therefore, if an error occurs due to cancellation of digits, it directly affects the output.

Whether the absolute value level of * E ₁ or * E ₂ is higher, or larger or smaller than the reference value, and whether the phase difference is larger or smaller than 90 ° can be judged relatively accurately. . Therefore, if the correction is performed in small increments based on the determination result, the corrected result is further determined, and the correction is repeated, the state gradually approaches the normal state, and thereafter, the correction amount only changes by the correction amount. If it is made small, accurate correction is possible and a demodulation output without distortion can be obtained. Therefore, even if some of the signal components included in * E ₁ and * E ₂ pass through the low-pass filter, the output is not abruptly affected. This means that this part also functions as a low pass filter.

If the deviation is larger than the amount of correction at one time at the start of processing, it takes time until it becomes normal. Since the initial deviation is determined to some extent by the performance of the reference signal generator, etc., the correction amount for one time is determined in consideration of these performances, the response of the correction, the allowable distortion rate of the final demodulated signal, and the like.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The quadrature demodulation circuit is often used for voice radio or the like because it can be directly converted into an audible signal by a simple circuit. Here, an embodiment in which the present invention is applied to voice radio will be described. FIG. 2 is a diagram showing the overall configuration of the embodiment.
In the figure, 11a is an oscillation source for generating a reference wave having a frequency equal to the carrier frequency of the received wave. Reference numeral 12a is a phase shifter for converting the phase of this reference wave into another reference wave by changing the phase by 90 °. The two reference waves are required to have a phase difference of 90 °, but in reality, a slight error occurs in the phase shifter 12a, which causes distortion of the demodulated signal. Reference numerals 2a and 3a are mixers for respectively mixing two reference waves with a received wave, and the signal output here passes through LPFs 4a and 5a which pass only low frequency components, and the above-mentioned * E ₁ and * E ₂ signal.

In the present invention, all demodulation processing is digital processing.
The above signal * E ₁And * E₂Is A / D
After being digitally converted by the converters 91a and 92a,
Corrected by the correction means 7a and demodulated by the demodulation means 6a
And then converted into an analog audible signal by the D / A converter 93a.
To be converted. The correction means 7a and the demodulation means 6a are all DS
Consists of a digital filter according to P100a
, DSP100a controlled by microcomputer
However, it is not shown here.

Next, an embodiment of the correcting means 7, which is a characteristic part of the present invention, will be described. Fig. 3 compares the absolute intensity levels of * E ₁ and * E ₂ and based on the comparison results, * E
It is a figure which shows the structure of the Example which correct | amends the level of ₂ . Absolute value calculators 771b and 772b calculate the absolute values of * E ₂₁ and * E ₁ and output them to LPFs 773b and 774b. *
E ₁ and * E ₂ (* E ₂₁ ) contain signal components,
The signal strength is naturally fluctuating. It is the absolute value level that is corrected, and only the low frequency components are extracted by the LPFs 773b and 774b. This is equivalent to obtaining the average level of * E ₁ and * E ₂₁ .

A filter structure as shown in FIG. 12 is used for the LPFs 773b and 774b. Therefore, an error occurs as described above, but this error does not cause a problem because only the large or small judgment is made here. Comparator 775b compares both average levels E ₁ and E ₂₁ . If E ₁ is larger, the switch 74b selects the value (1 + a) of 75b, the previous coefficient stored in the delay device 72b is multiplied by the multiplier 73b, and then the multiplier 71b calculates * E ₂ Get on. As a result, * E ₂ is amplified by the amount corresponding to the value of a and becomes * E ₂₁ . This is repeated until * E ₁ and * E ₂₁ match.

At the start of operation, 1 is stored in the delay device 72b. For example, when (1 + a) is continuously selected as the correction value, the correction amount to * E ₂ becomes a power of (1 + a). Since a is much smaller than 1, the correction amount is substantially (1 + na) at the nth time. If a is set small, precise correction is possible, but it can be corrected only gradually.

On the contrary, when a is made very small and a precise correction is to be performed, the change in the correction amount is 1+ in the circuit of FIG.
Since it is determined by a of a or 1-a, a needs to be a very small value. However, when a floating point operation is performed by the DSP, only 1 + a or 1-a is stored, so if a is made too small compared to 1, multiplication of * E ₂ or the like causes a digit loss. Therefore, the circuit shown in FIG. 4 is slightly complicated as compared with the circuit of FIG.

In FIG. 4, + a and -a are stored, and one of them is selected by the switch and added by the adder 73c with the previous correction amount stored in the delay unit 72c.
Then, after the product of this value and * E ₂ is calculated by the multiplier 71c, it is corrected by adding it to * E ₂ by the adder 70c. In this case, digit cancellation is less likely to occur. As described above, the digital arithmetic circuit shown in FIG. 3 is actually realized by using the DSP. FIG. 5 shows a processing procedure for performing the arithmetic circuit of FIG. 3 by the DSP. In step 101, * E ₂ is multiplied by b. B is 1 at the start. In step 102 *
The absolute value of E ₁ is obtained, and low-pass processing (low-pass filter processing) as shown in FIG. 12 is performed to calculate the absolute value level E ₁ of * E ₁ . In step 103 similarly calculates the absolute value level E ₂₁ of * E _21. Step 1
In 04, the magnitudes of E ₁ and E ₂₁ are compared. If E ₁ is larger, b is increased by (1 + a) times in step 105, and if E ₁ is smaller, it is changed to b (1-
Multiply by a) and decrease. Then, the process returns to step 101 and the above processing is repeated. As a result, the absolute value levels of * E ₁ and E ₂₁ are corrected to match.

In the embodiment of FIG. 3, both absolute value levels are corrected so that they coincide with each other. However, when the signal level is fixed to some extent, a certain reference value is set and both absolute value levels are set to this reference value. It is also possible to match both levels by matching. FIG. 6 is a diagram showing the configuration of such an embodiment. Compared to FIG. 3, the comparators are 776d and 777d.
, And the absolute value levels of * E ₂₁ and * E ₁ are respectively compared with the reference value stored in 778d, and feedback is applied to each system according to the comparison result. By performing correction so as to match the reference value in this manner, not only the absolute value levels of both match, but also the absolute value levels are always matched to the reference value, so that it also functions as automatic gain control.

Next, the deviation of the phase difference from 90 ° is corrected.
The configuration of the implementation is shown in FIG. * E in the multiplier 818e₁When*
E_{twenty one}The inner product of is calculated, and only the low frequency component is
Take out. The dot product of vectors is 0 when forming 90 °
If it is less than 90 °, it becomes positive, and if it is greater than 90 °,
Become an eggplant. Therefore, use this value as the reference value of zero and the comparator 8
Whether the phase difference is larger or smaller than 90 ° compared with 20e
To judge. Also in this case, the LPF819e is shown in FIG.
It is a filter like that and an error occurs depending on the number of significant digits
However, there is no problem in determining whether it is positive or negative. This judgment
Select + a or -a with the switch 815e according to the result,
The sum with the previous value stored in the delay device 813e is added by the adder 8
Calculate with 14e. This sum is corrected to sin α of the angle α
Equal. This sin α and * E₁The product of and is multiplied by 812e
After calculating with, adder 81d calculates * E ₂Add to.

At the start of processing, 0 is stored in the delay device 813e, and + a is continuously applied until the phase shift amount is reached.
Alternatively, when -a is selected, the correction amount is accumulated by the number of corrections. As shown in FIG. 11, the phase difference between * E ₁ and * E ₂ is 9
If the absolute values of * E ₁ and * E ₂ are the same when they are deviated from 0 ° by θ _t , * E ₁ sin θ _t can be added to * E ₂ to obtain * E ₂₁ of * E ₁ and 90 °. It becomes a phase difference. However, if θ _t is larger than 90 °, it is negative. Since the correction angle amount is α here, θ _t is equivalent to α.

As is apparent from FIG. 11, * E ₂ to * E ₁
When sin θ _t is added to correct the phase difference to 90 °, the absolute value of * E ₂₁ obtained by the correction becomes smaller than * E ₂ . To correct this amount, paying attention to the fact that the ratio of the absolute values of * E ₂ and * E ₂₁ is cos θ _t , adder 81
Calculate cosα from sinα obtained in 4e. First, the square calculator 94e calculates sin ² α, and this is calculated by the calculator 95e.
After subtracting from 1, the square root calculator 96e calculates cos α. The absolute value can be corrected by dividing * E ₂₁ by cos α with the divider 97d.

The above correction is a circuit for correcting the absolute value level and the phase difference, but in reality, it is necessary to perform both corrections. FIG. 8 is an example of such a circuit. In this circuit, as shown in the figure, first, in the circuit of FIG. 6, * E ₁ and * E ₂
Is corrected to a predetermined absolute value level, and then the phase difference is corrected by the circuit of FIG. The error caused by this phase correction is corrected by the last circuit. This correction only needs to be applied to * E ₂ .

In the circuit of FIG. 8, the absolute value level is corrected before the phase correction and the absolute value level is corrected by the phase correction after the phase correction. However, if the phase correction is performed first, the absolute value level The correction needs to be performed only once, and the circuit becomes simple. However, if the absolute value level is corrected before the phase correction, the accuracy of the phase correction is improved.

[0033]

According to the present invention, it is possible to realize a digital quadrature demodulation circuit which can be reproduced with little distortion.

[Brief description of drawings]

FIG. 1 is a diagram showing a basic configuration of a digital quadrature demodulation circuit of the present invention.

FIG. 2 is a diagram showing an overall configuration of an embodiment of the present invention.

FIG. 3 is a diagram showing a configuration of an embodiment for performing a correction for matching absolute value levels.

FIG. 4 is a diagram showing another circuit example for correcting an absolute value level.

5 is a flowchart showing a processing example for performing the comparison processing in FIG. 3 by a DSP.

FIG. 6 is a diagram showing a configuration of an embodiment in which an absolute value level is corrected to match a reference value.

FIG. 7 is a diagram showing a configuration of an embodiment for correcting a phase difference.

FIG. 8 is a diagram showing a configuration of an embodiment for correcting both an absolute value level and a phase difference.

FIG. 9 is a diagram showing a conventional digital quadrature demodulation circuit.

10 is a diagram showing an example of a circuit for correcting the absolute value level of the circuit of FIG.

11 is a vector diagram showing the occurrence of an error due to a phase difference in the circuit of FIG.

12 is a diagram showing a circuit example for correcting a phase difference in the circuit of FIG.

13 is a diagram showing a configuration example of a digital low-pass filter used in the circuits of FIGS. 10 and 12. FIG.

[Explanation of symbols]

1 ... Reference wave generation circuit 2 ... First mixer 3 ... second mixer 4 ... First filter 5 ... Second filter 6 ... Demodulation means 7 ... Absolute level correction means

Claims (3)

[Claims] 1. A reference wave generation circuit (1) for generating two reference waves having different 90 ° phases, a first mixer (2) and a second mixer (for mixing a received wave and the two reference waves, respectively). 3), a first filter (4) and a second filter (5) that pass only predetermined frequency components of the outputs of the first mixer (2) and the second mixer (3), and digital processing In a digital quadrature demodulation circuit comprising demodulation means (6) for obtaining a demodulated signal by calculating a root mean square of outputs from the first filter (4) and the second filter (5), the first filter ( 4) and the absolute value level of the intensity of the output from the second filter (5) are compared, and the intensity of one of the outputs from the first filter (4) or the second filter (5) is determined according to the comparison result. Correction by increasing or decreasing by a predetermined amount. , Digital quadrature demodulation circuit, characterized in that it comprises an absolute value level correction means for repeating the correction to match the absolute value level further performing comparison of the absolute value level of the corrected (7). 2. A reference wave generation circuit (1) for generating two reference waves having different 90 ° phases, a first mixer (2) and a second mixer (for mixing a received wave and the two reference waves, respectively). 3), a first filter (4) and a second filter (5) that pass only predetermined frequency components of the outputs of the first mixer (2) and the second mixer (3), and digital processing In a digital quadrature demodulation circuit comprising demodulation means (6) for obtaining a demodulated signal by calculating a root mean square of outputs from the first filter (4) and the second filter (5), the first filter ( 4) and the absolute value level of the intensity of each output from the second filter (5) is compared with a reference value, and depending on the comparison result, the first filter (4) and the second filter (5) Increase or decrease the output intensity by a predetermined amount A digital quadrature characterized by comprising absolute value level correction means for making a positive value, comparing the corrected absolute value level with the reference value, and repeating the correction so as to match the absolute value level with the reference value. Demodulation circuit. 3. A reference wave generating circuit (1) for generating two reference waves having different 90 ° phases, a first mixer (2) and a second mixer (for mixing the received wave and the two reference waves, respectively). 3), a first filter (4) and a second filter (5) that pass only predetermined frequency components of the outputs of the first mixer (2) and the second mixer (3), and digital processing In a digital quadrature demodulation circuit comprising demodulation means (6) for obtaining a demodulated signal by calculating a root mean square of outputs from the first filter (4) and the second filter (5), the first filter ( 4) and the phase difference between the outputs from the second filter (5) are detected, and the phase difference is 9
Depending on whether it is larger or smaller than 0 °, the phase of one of the output from the first filter (4) or the second filter (5) is corrected by advancing or delaying by a predetermined amount, and the position after correction is corrected. A digital quadrature demodulation circuit comprising phase difference correction means for further detecting the phase difference and repeating the correction so that the phase difference becomes 90 °.