JPH05143181A - Constant voltage circuit - Google Patents

Abstract

PURPOSE:To constitute this constant voltage circuit appropriate for its formation on a MOS integrated circuit by temperature-compensating the output voltage of a voltage generating circuit by an error amplifier and obtaining a constant voltage with required characteristics. CONSTITUTION:When the drain currents of transistors(TRs) M1 to M3 are I1 to I3 and a constant current source is I00, a voltage generating circuit l acts so that I00-I3=I1+I2 is formed and a reference voltage VREF is generated on a node between resistors R1, R3. One input of differential pair M4, M5 is obtained by resistance-dividing the voltage VREF and the other input is obtained by resistance-dividing an output constant voltage VOUT. Since the ratio W/L of a differential pair M4, M5 is M4:M5=1:K1. and the ratio W/L of active loads M6, M7 is M6:M7=K2:1, these pairs become unbalanced pairs and the input voltage of the differential pair M6, M7 is offset. Since the temperature characteristics of the offset voltage can be set up to positive, negative, or zero in accordance with the setting of K1 and K2 to '1' or larger than '1', the constant voltage VOUT with a required temperature characteristic is obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant voltage circuit, and more particularly to a constant voltage circuit formed on a MOS integrated circuit.

[0002]

2. Description of the Related Art As is well known, a conventional constant voltage circuit is generally a bandgap reference circuit composed of bipolar transistors, and a practical constant voltage circuit composed of only MOS transistors is not known. ..

[0003]

However, the MOS transistor has various advantages, and it is desired to develop a constant voltage circuit which can be realized on a MOS integrated circuit. At that time, it should be noted that the constant voltage circuit must have good temperature characteristics, but in the MOS transistor, the manufacturing deviation is large, and the temperature characteristics are curved rather than linear like bipolar. The issue is how to control these characteristics.

An object of the present invention is to provide a constant voltage circuit having a structure suitable for implementation on a MOS integrated circuit.

[0005]

In order to achieve the above object, the constant voltage circuit of the present invention has the following configuration. That is, the constant voltage circuit of the present invention is a constant voltage circuit composed of MOS transistors; the constant voltage circuit performs a temperature correction operation using the voltage generation circuit and the output voltage of the voltage generation circuit as a reference voltage. An error amplifier that outputs a constant voltage having a characteristic; the voltage generation circuit includes a constant current source;
A first transistor whose source is directly grounded, whose gate is connected to the output side of the current source through a first resistor, and whose drain is directly connected to the first resistor or through a second resistor; A second transistor whose source is grounded directly or through a resistor, whose gate is connected to the drain of the first transistor, and whose drain is connected to the output side of the constant current source through a third resistor; The source is directly grounded, the gate is connected to the drain of the second transistor, and the drain is directly connected to the output side of the constant current source, or directly connected to a negative feedback loop for controlling the constant current source the third transistor being; wherein the error amplifier is the ratio of gate width to gate length is 1: one input of the differential pair composed of two transistors is K ₁ is the constant current A differential circuit having the output voltage generated at the connection point between the first and third resistors and the other input being a divided voltage; and a gate width provided between the differential circuit and a power supply. An active load composed of two transistors having a gate length ratio of 1: K ₂ ; a level shift circuit for performing a level shift operation on the output of the differential circuit; An output circuit that outputs a constant voltage having a desired characteristic to the outside and that forms the divided voltage by resistance voltage division of the output constant voltage.

[0006]

Next, the operation of the constant voltage circuit of the present invention constructed as above will be described. In the present invention, the output voltage of the voltage generating circuit is temperature-corrected by the error amplifier to obtain a constant voltage having a desired characteristic. At this time, the temperature correction in the error amplifier can be made as desired depending on whether K ₁ and K ₂ are equal to 1 or larger than 1, and the temperature characteristics can be improved.

Therefore, according to the present invention, it is possible to provide a constant voltage circuit having a configuration suitable for implementation on a MOS integrated circuit.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a constant voltage circuit according to an embodiment of the present invention. In FIG. 1, this constant voltage circuit is a voltage generation circuit 1
And error amplifier 2.

The voltage generating circuit 1 basically has a power source V _DD.
It is composed of a constant current source I ₀₀ provided on the side and three MOS transistors (M1, M2, M3). (First)
In the transistor M1, the source is directly grounded, the gate is connected to the output side of the constant current source I ₀₀ via the (first) resistor R1, and the drain is connected to the resistor R via the (second) resistor R2.
Connected to 1. That is, in this embodiment, the drain is connected to the output side of the constant current source I ₀₀ via the resistors R2 and R1 connected in series, but the resistor R2 may be omitted and the drain and gate may be directly connected. ..

The source of the (second) transistor M2 is directly grounded, the gate is connected to the drain of the transistor M1, and the drain is connected to the output side of the constant current source I ₀₀ via the (third) resistor R3. Connected to. The source may be grounded via a predetermined resistor.

The source of the (third) transistor M3 is directly grounded, the gate is connected to the drain of the transistor M2, and the drain is directly connected to the output side of the constant current source I ₀₀ . As is well known, the constant current source I ₀₀ may be controlled by a negative feedback loop. In that case, the drain of the transistor M3 is directly connected to the negative feedback loop controlling the constant current source. May be.

In this voltage generating circuit 1, assuming that the drain currents of the three transistors are I _i , I ₀₀ −I ₃ = I ₁
It operates so as to be + I ₂ and generates the reference voltage V _REF at the connection point of the resistors R1 and R3. The details will be described below.

When the gate-source voltage of each transistor is V _GSi , the reference voltage V _REF is V _REF = V _GS1 +
Since R1 · I ₁ and V _GS1 −V _GS2 = R2 · I ₁ , the equation 1 can be obtained from both equations.

[0014]

[Equation 1]

Therefore, the temperature characteristic of the reference voltage V _REF can be expressed by Equation 2 obtained by differentiating Equation 1 with respect to temperature.

[0016]

[Equation 2]

Then, the formula 2 can be approximated as the formula 3 by considering 1 << R1 / R2.

[0018]

[Equation 3]

From Equation 3, it is understood that the value of dV _REF / dT can be positive, negative, or even zero depending on the magnitude relationship between dV _GS1 / dT and dV _GS2 / dT. it can.

Next, the error amplifier 2 includes a differential circuit composed of a differential pair transistor (M4, M5) and a constant current source I ₀₁ , and an active load composed of two transistors (M6, M7). , A level shift circuit composed of a transistor M8 and a constant current source I ₀₂ , and transistors (M9, M10,
M11), a capacitor C1, a resistor R6, and an output circuit including a resistor voltage divider circuit (a series circuit of resistors R4 and R5).

In the output circuit, a predetermined divided voltage is formed in addition to the original output constant voltage V _OUT , and the divided voltage is fed back to the differential circuit. That is, basically, a resistance voltage dividing circuit including a series circuit of the resistors R4 and R5 is provided between the source of the transistor M9 and the ground, and the constant output voltage V _OUT is output from the source of the transistor M9 to generate the resistance voltage dividing circuit. Although the divided voltage may be formed by means of this, in this embodiment, a transistor M11 which is a voltage passing element is added, and a resistance voltage dividing circuit is provided between the source of this transistor M11 and ground. This is appropriately selected depending on the weight of the load of the differential circuit.

The two transistors M4 and M5 forming the differential pair of the differential circuit are applied with the reference voltage V _REF from the voltage generating circuit to the gate of one transistor M4.
The divided voltage from the output circuit is applied to the gate of the other transistor M5. Then, an active load is provided between the differential pair and the power supply V _DD, and the output of the differential pair is given to the level shift circuit and the output circuit.

Here, the two transistors M4 and M5 forming the differential pair have a ratio of the gate width W to the gate length L (W
/ L) is M4: M5 = 1: K ₁ . Further, the two transistors M6 and M7 forming the active load have a ratio (W / L) of the gate width W to the gate length L of M6: M7 = K.
_{It is 2} : 1. Therefore, although the differential pair has an input offset, this offset voltage V _OS is obtained as follows.

First, in the differential circuit, the transconductance β ₁ of the transistor M4 is such that the ratio of the gate width W to the gate length L is (W / L) ₁ , the threshold voltage is V _T , the mobility is μ _n , and the unit area is When the gate oxide film capacitance and C _OX, since it is _{β 1 = μ n · C OX} · (W / L) 1/2, the transconductance of the transistor M5 becomes K ₁ · β _1.

Therefore, the drain current I _d4 of the transistor M4 can be expressed by Equation 4, the drain current I _d5 of the transistor M5 can be expressed by Equation 5, and the sum of both drain currents can be expressed by Equation 6. Further, the offset voltage V _OS can be expressed by the difference between the gate-source voltage of both transistors (Formula 7).

[0026]

[Equation 4]

[0027]

[Equation 5]

[0028]

[Equation 6]

[0029]

[Equation 7]

The active load consisting of two transistors (M6, M7) which are an unbalanced pair is I _d4 = K ₂ · I
Since it operates so as to maintain the relationship of _d5 , I _d4 can be obtained as Equation 8 and I _d5 can be obtained as Equation 9 from this relationship and Equation 6, so if these are substituted into Equations 4 and 5, Equation 10 can be obtained. Thus, the offset voltage V _OS is obtained.

[0031]

[Equation 8]

[0032]

[Equation 9]

[0033]

[Equation 10]

Equation 10 shows that the offset voltage V _OS is inversely proportional to the square root of the mobility μ _n , but the mobility μ _n has a temperature characteristic, and the ratio of the absolute temperature T to the same T ₀ and the mobility μ _n (T ) And the same μ _n (T ₀ ) ratio are related as shown in Equation 11.

[0035]

[Equation 11]

Therefore, the offset voltage V _OS is given by
Therefore, it is almost proportional to the absolute temperature.

[0037]

[Equation 12]

Then, from the equation 12, the offset voltage V
_OS is positive depending on whether K ₁ and K ₂ are greater than 1,
It will be either negative or zero. That is, when K ₁ > 1, K ₂ > 1, V _OS > 0, when K ₁ = 1 and K ₂ = 1 V _OS = 0, and K ₁ <1, K ₂ < When 1, V _OS <0.

Further, the output constant voltage V _OUT and the reference voltage V _REF
Since the relationship with is expressed by Expression 13, the temperature characteristic of the output constant voltage V _OUT can be expressed by Expression 14.

[0040]

[Equation 13]

[0041]

[Equation 14]

In short, dV _REF / dT can be positive, negative, or zero, and dV _OS / dT can be set to positive, negative, or zero, and its magnitude is determined by K ₁ and K _2. Therefore, dV _OUT / dT can be set to positive, negative, or zero.

Here, considering the case of dV _OUT / dT = 0, dV _OS / dT can be obtained from Equation 14 and Equation 15, but from Equation 12 and Equation 16.

[0044]

[Equation 15]

[0045]

[Equation 16]

In Expression 16, the absolute temperature T is compressed by the root (√) of 2 degrees, and can be approximated as Expression 17.

[0047]

[Equation 17]

That is, from the formula 17, the formula 15 can be established by appropriately selecting K ₁ , K ₂ and I ₀₁ , (W / L) ₁ . Therefore, in this case, a constant voltage circuit in which the temperature characteristic of the output constant voltage V _OUT is zero can be realized.

The reference voltage V due to the fluctuation of the power supply V _DD
The fluctuation range of _REF can be reduced by increasing the transconductance g _m of the transistors (M1, M2, M3). In practice, the ratio of the gate width to the gate length (W / L) may be increased. This is the same idea as in the case of the bipolar transistor.

[0050]

As described above, according to the constant voltage circuit of the present invention, the output voltage of the voltage generating circuit is temperature-corrected by the error amplifier to obtain the constant voltage having the desired characteristic. At this time, the temperature correction in the error amplifier can be made as desired depending on whether K ₁ and K ₂ are equal to 1 or larger than 1, and the temperature characteristics can be improved. There is an effect that it is possible to provide a constant voltage circuit having a configuration suitable for realizing the above.

[Brief description of drawings]

FIG. 1 is a configuration block diagram of a constant voltage circuit according to an embodiment of the present invention.

[Explanation of symbols]

1 Voltage Generation Circuit 2 Error Amplifier M1 to M11 Transistor I ₀₀ Constant Current Source I ₀₁ Constant Current Source I ₀₂ Constant Current Source V _DD Power Supply R1 to R6 Resistor C1 Capacitor

Claims (1)

[Claims] 1. A constant voltage circuit composed of MOS transistors; the constant voltage circuit performs a temperature correction operation using a voltage generating circuit and an output voltage of the voltage generating circuit as a reference voltage to generate a constant voltage having a desired characteristic. An error amplifier for outputting; the voltage generating circuit, a constant current source; a source directly grounded, a gate connected to the output side of the current source through a first resistor, a drain the first A first transistor directly connected to the resistor or via the second resistor; a source grounded directly or via the resistor, a gate connected to the drain of the first transistor, and a drain connected to the third resistor A second transistor connected to the output side of the constant current source via a source; the source is directly grounded, the gate is connected to the drain of the second transistor, and the drain is the constant current; A third transistor connected directly to the output side of the source or directly to a negative feedback loop controlling the constant current source; and the error amplifier has a gate width to gate length ratio of 1 One of the inputs of the differential pair composed of two transistors of K ₁ is the output voltage generated at the connection point between the constant current source and the first and third resistors, and the other input is A differential circuit that is a divided voltage; an active load that is provided between the differential circuit and a power supply and that is composed of two transistors with a gate width to gate length ratio of 1: K ₂ ; A level shift circuit for performing a level shift operation on the output of;
An output circuit which takes out the output of the differential circuit and outputs it as a constant voltage having the desired characteristic to the outside, and which forms the divided voltage by resistance division of the output constant voltage. Constant voltage circuit.