JPH0454240B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic musical instrument, and more specifically, the present invention relates to an electronic musical instrument.
This invention relates to a polyphonic synthesizer for generating (tiple voice).

The audible effect of multiple tones producing the same musical tone is well known; multiple string instruments in an orchestra, multiple voices in a choir or choir, and multiple pipes in an organ may generate the same musical tone. However, it produces an acoustic effect that is different from the sound of solo or solo singing. This effect is the result of one or more characteristics of each sound that can be distinguished by the ear. For example, multiple notes may not be perfectly in tune, ie, the pitch will be slightly different, producing beat frequencies. Also, those multiple tones will exhibit different frequency modulations (vibrato). Even if two or more tones have the same pitch, the harmonic content of each tone may be changing differently while the tones are being generated.
Also, the amplitude envelopes of some sounds will show different changes as they will be heard as multiple tones. That is, the attack/decay characteristics of individual sounds will be different.

Multiple tones can be generated separately in known electronic musical instruments, which is accomplished by providing multiple tone generation channels for each tone. If any of the above characteristics are to be controlled separately, separate channels must be used.

The present invention relates to a polytone synthesizer comprising means for simultaneously generating several tones for each musical tone. These sounds can be generated in one common tone generation channel.
The present invention allows separate ADSR envelopes and sliding formant filtering for individual notes through its common tone generation channel. This simply means computing one main data set for one tone generation channel in a series of sub-computation cycles, each sub-computation cycle defining the harmonics of the desired waveform of one of the tones. This is achieved by producing a set of values corresponding to the amplitudes of the points. Each set of values is added to a cumulative sum of several sets of values from the most recent subcomputation cycle. After the sub-computation cycle is completed, the resulting main data set is transferred to the tone generator and the computation process is repeated. The invention provides that the values of each set of points associated with one of the multiple tones are scaled by a scale factor that can vary as a function of time independently of the scale factors of any of the other tones. It becomes possible to be Therefore,
The relative magnitudes of the sets of calculated values vary over time, producing a changing waveform consisting of multiple tones in which the harmonic content of each tone changes in a predetermined manner.
Embodiments of the present invention are implemented as a variation of the polytone synthesizer issued as U.S. Pat. No. 4,085,644 entitled "Ditone Synthesizer". The polytone synthesizer described in the above application comprises a plurality of tone generators. Each tone generator, when assigned to one key pressed on the keyboard, generates one tone from a digitally calculated master data set. The main data set calculated during the calculation mode is stored in a buffer memory or shift register, from which the data is continuously read out repeatedly in real time at a rate determined by the pitch or fundamental frequency of the notes occurring. and is applied to a DA converter, which converts the data into a corresponding analog voltage waveform for driving an audio system. The main data set for each assigned tone generator is created by calculating the Fourier sine equation using a set of stored generalized Fourier coefficients and a sine wave data table. is calculated repeatedly in a time-sharing system, regardless of the Those elements in this disclosure that are common with the disclosures of the above patents are identified with the same reference numerals.

Referring in detail to FIG. 1, the musical tone synthesizer includes a keyboard 12 having a plurality of switches operated by individual keys. When any key is pressed, the note detection and assignment circuit 14, detailed in U.S. Pat. It stores information that identifies a specific musical tone, the octave and division (keyboard) of the musical tone being played. Execution control circuit 16 receives a signal from note detection and assignment circuit 14 indicating that one or more keys are pressed. As long as any key is pressed, execution control circuit 16 begins a series of calculation cycles. During each calculation cycle, a main data set is calculated and loaded into the main shift register 34. The manner in which the primary data set is calculated is described in detail in the above-mentioned US Pat. No. 4,085,644.

After the main data set is loaded into main register 34, the data set is transferred to note shift register 35 by note select circuit 40 in response to execution control circuit 16. The shift speed of register 35 is controlled by note clock 37, whose clock frequency is set by note and octave information derived from note detection and assignment circuit 14. The note clock frequency is controlled to be proportional to the pitch of the musical tone selected by the associated key on the keyboard of the instrument. Once the main data set is transferred from the main register 34 to the note shift register 35, the execution control circuit 16 starts a new calculation cycle to load the main register 34 with the same main data set or a new main data set. do. If only one key is pressed, the calculation cycle is repeated for that same key, but
If more than one key is pressed, after calculation cycles for all other pressed keys are executed,
The calculation cycle for each key is repeated. The main data set in note register 35 is shifted by note clock 37 to a digital to analog converter (DAC) 47 which produces a frequency output voltage with a fundamental frequency determined by note clock 37. The amplitude of the output voltage changes stepwise in proportion to the number successively shifted out from the note register 35. The analog voltage from the DAC for each tone is applied to the sound system 11 to drive a loudspeaker that plays the synthesized tone.

U.S. Patent No. 4085644 (Japanese Unexamined Patent Publication No. 52-27621)
During a calculation cycle, the main data set is generated from one or more sets of harmonic coefficients and from a set of sine wave coefficients stored in the sine wave function table 24, as described in detail in the sine wave function table 24. Calculated from wave function values or other orthogonal function values. Each coefficient memory has an associated stop switch as shown at 56 and 57 which is set by the musician to control the number of notes produced. Simply two coefficient memories 26 to store two sets of harmonic coefficients.
Although only 1 and 27 are shown, it will be appreciated that the number of stops and associated harmonic coefficient sets may be any number. Typically, the upper keyboard has, for example, 10 different stops. The calculation of the main data set is under the control of word counter 19 and harmonic counter 20. When a calculation cycle is initiated by a signal from execution control circuit 16, word counter 19 counts in synchronization with the shifts of main register 34. word counter 19
has a modulus corresponding to the number of words stored in main register 34, ie 32 words.
The word counter 19 starts counting so that one set of values in the sine wave function table is sequentially addressed, and the addresses of the set are different for each harmonic.

The harmonic coefficients in the memory 26 or 27 are sent to the harmonic counter 20 via the memory address decoder 25.
addressed in response to. Memory 26 or 27
Each coefficient from is added as one input to multiplier 28. The sine wave function value in Table 24 is sent to the adder-accumulator 21 via the address decoder 23.
addressed by. The contents of the harmonic counter are added to the accumulator along with each count of the word counter 19.

The contents of harmonic counter 20 are gated to the adder-accumulator through gate 22 each time harmonic counter 20 is incremented by execution control circuit 16. The adder-accumulator 21 adds the number derived from the harmonic counter 20 to itself every time the word counter 19 advances. Since the harmonic counter thus corresponds to the first harmonic calculation, the output of the adder-accumulator will go from 1 to 32, sequentially addressing the first 32 words in the sine wave function table 24. Become. This iterative process completes the first subroutine. At the end of the first subroutine,
The contents of main register 34 are 32 words, each word representing 32 points along a half cycle of a sine waveform representing the fundamental or first harmonic of the waveform generated in response to the setting of first stop switch 56. corresponds to the amplitude of

The memory address decoder then causes the word counter 19 to address the second harmonic coefficient memory 27 while the harmonic counter 20 remains unchanged. Therefore, the second set of 32 values is entered into the multiplier 2 during the second counting cycle of the word counter 19.
8 outputs are generated sequentially. These values are added by adder 33 to the existing set of values in main register 34. If additional subroutines are needed, they can be
Additionally, the harmonic coefficients of the additional stops are multiplied by the output of the sine wave function table and added to the word in main register 34. Upon completion of these subroutines, the harmonic counter 20 increments by one and the above subroutine increments the new one from the sine wave function table 24.
The set of values is used to repeat in each harmonic coefficient memory for the next coefficient value. Each time the harmonic counter 20 advances by one, the next higher harmonic is calculated and added to the contents of the main register 34. The maximum count value (count) that the harmonic counter corresponds to the highest order harmonic in the calculated waveform.
, the computation of the main data set in main register 34 is complete.

Upon completion of the calculation cycle, the main data set is transferred from main register 34 to note register 35 in synchronization with the note clock. A method by which two shift registers are synchronized during the transfer period to avoid interfering with the flow of data from the note register to the DA converter is described in the above-mentioned US Pat.
It is described in detail in No. 4085644 (Japanese Unexamined Patent Publication No. 52-27621). Once the transfer from main register 34 is complete, execution control circuit 16 begins a new calculation cycle. The iterative calculation cycle allows the primary data set to be changed as a function of time, allowing the envelope and harmonic content of the musical note to be modulated in the manner detailed below.

As mentioned above, the multitone synthesizer is disclosed in the above-mentioned U.S. Pat.
27621). The calculation cycle is repeated to calculate the main data set for additional tone generators when one or more keys are activated on the keyboard of the polytone synthesizer. As previously stated, even if one or more stop switches are set in the device, the resulting musical tone will not produce a polyphonic sound effect. Rather, the resulting tone sounds like a single note with a complex waveform generated by the combined tone characteristics of the several stops set. In order to create a multi-tone sound effect from a single musical tone generator, the method of the present invention shown in FIG.
According to one embodiment, each note (one stop is one
The attack/decay characteristics (corresponding to each note) are controlled separately. Usually the attack/take of the musical tone is controlled at the output of the musical tone generator by varying the amplitude envelope of the resulting acoustic signal in a desired manner as a function of time. However, by controlling the amplitude of the individual tones, it is possible for the output of one musical tone generator to produce multiple tones rather than a single tone.
To this end, the scaler circuit 510 applies a
connected between one or more harmonic coefficient memories 26 or 27 and the multiplier 28 for multiplying by a scale factor that varies as a function of time in a manner controlled by the ADSR generator 509. There is. This ADSR generator can take various forms similar to the ADSR generator described in US Pat. No. 3,610,805 (Japanese Patent Publication No. 50-33408) or US Pat. The present invention
A simple method for controlling the scale factor in the arrangement of FIG. 1, when applied to a musical tone generator, is described in a U.S. patent filed June 6, 1977, entitled "Amplitude Generator for Electronic Organs." It is described in No. 4144789 (Japanese Unexamined Patent Publication No. 1609-1988). The operation of the ADSR generator is triggered by the execution control circuit 16 when a key is operated and assigned to a tone generator. The ADSR generator generates a digital output that changes value over time according to the desired change in the amplitude of the envelope of the sound being controlled. The characteristics of the ADSR generator can be set by the musician to produce desired characteristics, such as fast attack and slow release to produce percussion-like sounds.

Although Figure 1 only shows the scaling of one set of harmonic coefficients, the output of each harmonic coefficient memory is
Separate amplitude modulation may be performed by a scaler controlled by an ADSR generator. Alternatively, a single scaler may be provided at the output of the sinusoidal function table 24 or at the output of the multiplier 28, for example as shown in FIG. In the arrangement shown in FIG. 2, the ADSR generator 509' is of the type described in U.S. Pat. Preferably a modified time division generator.
ADSR generator 509' is controlled by memory address decoder 25 so that different values are generated on the output of the ADSR generator for each respective coefficient memory. Therefore, ADSR
The generator 509' provides separate control in a time-shared manner for each note or each stop for each note.The note select 40 comprises several note generators used and one additional note generator. The instruments are a note clock 38, a note shift register 36,
Shown with DAC48.

Referring to FIG. 3, there is shown a block diagram of a modified ADSR generator of the type described in detail in U.S. Pat. No. 4,079,650, which is incorporated herein by reference. . As described in that patent, the ADSR generator includes an amplitude shift register 115 that stores the current envelope amplitude value for each generator of the polytone synthesizer. In order to provide multiple tones for each of these tone generators according to the invention, each word in the amplitude shift register contains a plurality of groups of bits, the number of groups corresponding to the number of stops, e.g. Corresponds to the current amplitude value of the envelope for the corresponding tone of the multitone channel.

Similarly, the envelope phase shift register 114 has one envelope phase shift register 114 for each tone generator.
Memorize group words. The envelope phase shift register is modified so that each word has 10 bit groups, and each bit group is associated with one of the tones of the multitone channel. Each group of bits in each word in envelope phase shift register 114 identifies the current phase of the envelope. As stated in the above patent for ADSR generators, the envelope curve has two attack phases, two decay phases and two decay phases.
Divided into two release phases. Which phase of the envelope a particular note of a particular tone generator is in determines how the amplitude value is modified by the ADSR generator to fit the next point on the desired amplitude envelope curve. . A constant value H derived from scale select register 135 and envelope phase shift register 114
By knowing the current phase derived from the amplitude shift register 115, the current amplitude A derived from the amplitude shift register 115 is determined by the N-computation circuit 116, the binary shift circuit 119, and the adder 122, all of which are derived from the above U.S. Pat. No. 4,079,650. It is used to calculate a new value A' of the amplitude at the output of the select gate 124 using the method described in detail in JP-A No. 52-93315. Select gate 124 selects the calculated value or initial value of A' from envelope phase initializer 127. Change detector 1
Amplitude select gate 12 controlled by 31
6 changes the associated amplitude value in the amplitude shift register 115 to a new value A' or leaves the current amplitude value A unchanged.

The ADSR generator operates in time division, with
The foregoing calculations are performed for each of the ten tones in turn by scanning the ten bit groups as they are shifted out of amplitude shift registers 114 and 115. Shifting of these registers is controlled by execution control circuit 16 in synchronization with the scanning of the tone generator by note detection and assignment circuit 14. The scanning of the ten bit groups of each word at the outputs of shift registers 114 and 115 is controlled by memory address decoder 25 as described in connection with FIG. As explained above, memory address decoder 25 sequentially selects the harmonic coefficient memory associated with each stop.
In addition to selecting one of the harmonic coefficient memories, the memory address decoder 25 is used to select bits from the word read from the shift registers 114 and 115 associated with the same stop as the coefficient memory. To this end, the output of memory address decoder 25 is used by data select circuits 214 and 2 to select the appropriate group of bits of a word as they are shifted out of registers 114 and 115.
15. When selected by amplitude select gate 126, either the current amplitude value A or the calculated new amplitude value A' is applied to the output from ADSR generator 509' to scaler 510, as shown in FIG. is applied to Therefore, as memory address decoder 25 shifts calculations from tone to tone, ADSR generator 509' adds a corresponding current amplitude value to scaler 510 corresponding to the tone (stop) being computed. The data select circuit 226 responds to the output of the decoder by assigning ADSR to the appropriate bit group in the word at the output of the amplitude shift register 115 to update the amplitude value.
Add the output of

The change detector 131 of the ADSR generator also includes a separate group of ADSR clocks for each tone compared to that described in the change detector of U.S. Pat. No. 4,079,650. It has been slightly changed in that respect. The ADSR clock is detected by a change detector 131 depending on the current phase, the current tone (stop) and the current tone generator for which the amplitude value is being calculated by the ADSR generator.
Selected by The state of the stop switch for each tone generator is determined by registers 114 and 11.
A stop register 40 is shifted in synchronization with 5.
It is stored as bits of a word in 1. The bits of the word shifted out of register 401 are applied to the input of data select circuit 402 which selects one of the stop switch status bits based on the output of memory address decoder 25.
The logic of change detector 131 determines whether the corresponding stop switch is set or not.
The ADSR clock determines whether an output pulse is currently being generated, and if both conditions are true, it causes amplitude select gate 126 to change the current amplitude value A to the newly calculated value A'.
The output of change detector 131 signals phase increment 132 to increase the phase value of the word portion in envelope phase shift register 114. The word portion is selected by data select circuit 232 in response to a stop word select signal from decoder 25.

Thus, as shown and described in connection with FIG. 3, ADSR generator 509' of FIG.
It is clear that the current amplitude factors for each note are provided to the scaler 510 sequentially in a time-sharing manner. The amplitude factor for each note is varied as a function of time by the ADSR generator in a manner that is individually controlled for each note and each tone generator. The envelope waveform is generated by the data select circuit 407 and the scale select register 1.
35 is determined by the value of the constant H for a particular stop. The rate of amplitude change as a function of time is determined by the clock speed of the individual ADSR clock associated with each note when selected by change detector 131. Both the value of H and the clock speed may be set by the musician to produce the desired envelope waveform for each note selected in turn by the stop switch settings.

Individual formant control for each note of the multitone generator can be performed by the method shown in FIG. An effective sliding formant filter is disclosed in the above-mentioned U.S. Pat.
No. 52-27621), described in conjunction with FIG. 5 of the above-mentioned US patent. More specifically, a gain factor is applied to the output of sinusoidal function table 24 by formant multiplier 74, and the gain factor is derived from formant coefficient memory 73. The formant coefficient memory is addressed by the output of a comparator 72 which compares the output of ADSR generator 509' with the harmonic order derived from harmonic counter 20 through gate 22. T-control 76 to comparator 72
are used to operate the formant filter as a low pass filter or a high pass filter, all as described in U.S. Pat. No. 4,085,644.

of a particular sound, which is calculated if the low pass filter operation is set by T-control 76.
As long as the ADSR value is greater than the harmonic number, the gain factor applied to multiplier 74 is set to one. The harmonic order is
If it is greater than the ADSR value, the difference value is passed to comparator 72 as an address for reading the selected gain factor from formant coefficient memory 73.
is applied to the formant coefficient memory 73 by. Therefore, for every harmonic that exceeds the predetermined harmonic value determined by the ADSR generator, its amplitude is attenuated by the multiplier 74 according to the value of the gain factor read from the memory 73. be done. Therefore, the ADSR generator 509' output value varying as a function of time in the manner described above also shifts or slides the cutoff frequency of the formant filter as a function of time. Although the formant filter is shown as being controlled by an ADSR generator, sliding formant filters may be controlled by other well-known means, such as separate manual controls for each sound. I can do it. Any control that provides input to comparator 72
Similar to ADSR generator 509', it must be time-shared by different tones.

From the above description it will be seen that an arrangement is provided for generating multiple tone effects through a single tone generator. This is accomplished by calculating a single primary data set using multiple individual sets of harmonic coefficients, each associated with a different tone or stop. By scaling each set of harmonic coefficients separately as a function of time, the musical tones generated in response to the resulting master data set produce a polyphonic effect.

[Brief explanation of the drawing]

FIG. 1 is a schematic block diagram of one embodiment of the invention. FIG. 2 is a schematic block diagram of another embodiment of the invention. FIG. 3 is a schematic block diagram of an ADSR generator for providing multiple tones in a single tone generation channel. FIG. 4 is a schematic block diagram of yet another embodiment of the invention in which independent control of sliding formants is provided. In FIG. 1, 11 is an acoustic system, 12 is an instrument keyboard switch, 14 is a note detection/assignment circuit, 16 is an execution control circuit, 19 is a word counter, 20 is a harmonic counter, 22 is a gate, 21
is an adder-accumulator, 23 and 25 are memory address decoders, 24 is a sine wave function table, 28 is a multiplier, 26 and 27 are harmonic coefficient memories, 33 is an adder, 34 is a main register, 37 is a note clock, 35 is note register, 40 is note select, 47 is DAC, 509 is ADSR generator, 51
0 is scaler.

Claims (1)

[Claims] 1. An electronic musical instrument that calculates a main data set constituting a generated musical sound waveform, outputs the main data set in accordance with the frequency of the musical sound, converts it into analog, and produces sound using an acoustic system. harmonic coefficient storage means for storing a plurality of sets of harmonic coefficient values; and scale factors each changing over time in a time-sharing manner in association with a specific set of coefficients of the plurality of harmonic coefficient sets. scale factor generating means for generating; orthogonal function storage means for storing orthogonal function values; and scale factor storage means for storing orthogonal function values; a scale factor, and further multiplies the orthogonal function value by a coefficient of another set of harmonic coefficients and the scale factor corresponding to the other set of harmonic coefficients; Addition and accumulation means for adding and accumulating the values multiplied by the multiplication means to calculate a main data set; dataset storage means for storing the output data set transferred from the addition and accumulation means; and the data set storage. and frequency generating means for outputting the output data set of the means at a predetermined frequency. 2. The apparatus according to claim 1, further comprising sliding formant filter means scaled by a scale factor such that said scale factor generating means has sliding formant filter characteristics.