JP7526450B1 - Semiconductor wafer bonding apparatus and bonding method - Google Patents

Abstract

[Problem] To provide a semiconductor wafer bonding apparatus and bonding method that uses a simple configuration to prevent misalignment of semiconductor wafers when bonding the semiconductor wafers together in a semiconductor manufacturing process. [Solution] A pair of electrostatic chucks 80 are arranged at positions facing each other on stages 36, 38 that support the semiconductor wafers W1, W2, and the facing semiconductor wafers W1, W2 are bonded together while the semiconductor wafers W1, W2 are attracted to the electrostatic chucks 80. In particular, the electrostatic chuck 80 is a hyperbolic chuck to which positive and negative voltages can be applied, and the facing semiconductor wafers W1, W2 are bonded together while the facing semiconductor wafers W1, W2 are in a state of opposite polarity (positively and negatively charged state). [Selected Figure] Figure 12

Description

The present invention relates to a semiconductor wafer bonding apparatus and method for bonding semiconductor wafers together, for example, in a semiconductor manufacturing process.

Hybrid bonding, which is part of the conventional semiconductor manufacturing process, includes, for example, a plasma treatment step, a cleaning step, a drying step, and a bonding step.

For example, in the plasma treatment process, atmospheric pressure plasma or vacuum plasma is applied to the semiconductor wafer to activate the surface of the semiconductor wafer. In the cleaning process, for example, the semiconductor wafer is rotated around its central axis while a cleaning liquid (pure water or chemical liquid) is dropped onto it to clean the surface of the semiconductor wafer. In the drying process, the semiconductor wafer is rotated around its central axis at high speed while centrifugal force is used to disperse water droplets on the surface of the semiconductor wafer. In the bonding process, the upper and lower semiconductor wafers that have undergone the plasma treatment process and the drying process are placed facing each other and bonded by a bonding device.

Here, in conventional bonding devices, semiconductor wafers are placed on planar stages arranged opposite each other, and the center of one of the pair of opposing semiconductor wafers is pressed with a center push pin (rod) to bond the semiconductor wafers together (see Patent Document 1).

However, in the process of pressing the semiconductor wafer with the rod, stress concentration acts on the semiconductor wafer, causing it to bend, resulting in a technical problem of deterioration in the quality of the semiconductor wafer. In particular, because SiC wafers are hard and brittle, fatal quality degradation can occur when the SiC wafer bends.

In addition, a SiC wafer is a compound semiconductor material composed of silicon (Si) and carbon (C).

On the other hand, in the bonding process, for example, if a repulsive force occurs between one semiconductor wafer and the other, a positional misalignment occurs when the two wafers are bonded, which reduces the bonding accuracy of the semiconductor wafers.

Patent No. 7148197

In view of the above problems, the present invention aims to provide a wafer bonding apparatus and a wafer bonding method that have a simple configuration and prevents misalignment when bonding semiconductor wafers together in the semiconductor manufacturing process.

A first invention is a semiconductor wafer bonding apparatus that disposes a pair of electrostatic chucks at positions facing each other on a stage that supports semiconductor wafers, and bonds the facing semiconductor wafers together in a state in which the semiconductor wafers are attracted to the electrostatic chucks,
The electrostatic chuck is a hyperbolic type to which positive and negative voltages can be applied, and voltages of opposite polarities having different absolute values are applied to one side and the other side of the electrostatic chucks facing each other, thereby generating a potential difference in a state in which the semiconductor wafers facing each other have opposite polarities,
The semiconductor wafers held by the pair of electrostatic chucks are attracted to each other and joined by van der Waals force and Coulomb force in a vacuum environment without using a piston rod .

A second invention is a semiconductor wafer bonding apparatus that disposes a pair of electrostatic chucks at positions facing each other on a stage that supports semiconductor wafers, and bonds the facing semiconductor wafers together in a state in which the semiconductor wafers are attracted to the electrostatic chucks,
One of the electrostatic chucks is a bipolar type having a plurality of internal electrodes adjacent to each other, and voltages of opposite polarities, the absolute values of which are different from each other, are applied to the adjacent internal electrodes,
the other electrostatic chuck is a bipolar type having a plurality of mutually adjacent internal electrodes, and voltages of opposite polarities, the absolute values of which are different from each other, are applied to the adjacent internal electrodes, and a voltage of opposite polarity is applied to the internal electrodes of the one electrostatic chuck disposed opposite to each other;
A potential difference is generated in a state in which the semiconductor wafer held by one electrostatic chuck and the semiconductor wafer held by the other electrostatic chuck have opposite polarities ,
The semiconductor wafers held by the pair of electrostatic chucks are attracted to each other and joined by van der Waals force and Coulomb force in a vacuum environment without using a piston rod .

A third invention is a method for bonding semiconductor wafers, comprising: arranging a pair of electrostatic chucks at positions facing each other on a stage supporting semiconductor wafers; and bonding the semiconductor wafers facing each other in a state in which the semiconductor wafers are attracted to the electrostatic chucks,
The electrostatic chuck is a hyperbolic type to which positive and negative voltages can be applied, and voltages of opposite polarities having different absolute values are applied to one side and the other side of the electrostatic chucks facing each other, thereby generating a potential difference in a state in which the semiconductor wafers facing each other have opposite polarities,
The semiconductor wafers held by the pair of electrostatic chucks are attracted to each other and joined by van der Waals force and Coulomb force in a vacuum environment without using a piston rod .

A fourth invention is a method for bonding semiconductor wafers, comprising: arranging a pair of electrostatic chucks at positions facing each other on a stage supporting semiconductor wafers; and bonding the semiconductor wafers facing each other in a state in which the semiconductor wafers are attracted to the electrostatic chucks,
One of the electrostatic chucks is a bipolar type having a plurality of internal electrodes adjacent to each other, and voltages of opposite polarities, the absolute values of which are different from each other, are applied to the adjacent internal electrodes,
the other electrostatic chuck is a bipolar type having a plurality of mutually adjacent internal electrodes, and voltages of opposite polarities, the absolute values of which are different from each other, are applied to the adjacent internal electrodes, and a voltage of opposite polarity is applied to the internal electrodes of the one electrostatic chuck disposed opposite to each other;
A potential difference is generated in a state in which the semiconductor wafer held by one electrostatic chuck and the semiconductor wafer held by the other electrostatic chuck have opposite polarities,
The semiconductor wafers held by the pair of electrostatic chucks are attracted to each other and joined by van der Waals force and Coulomb force in a vacuum environment without using a piston rod .

In these cases, it is preferable to bond the semiconductor wafers held by the pair of electrostatic chucks in a small space with a separation distance of 10 μm or more and 50 μm or less, while maintaining the planar orientation of the semiconductor wafers.

The present invention has a simple configuration that can prevent misalignment of semiconductor wafers when they are bonded together in the semiconductor manufacturing process.

1 is a process diagram of a semiconductor manufacturing process according to a first embodiment of the present invention; 2 is an example of a plasma chamber used in the first embodiment of the present invention. 1 is an example of a cleaning machine according to a first embodiment of the present invention. 3A to 3C are diagrams illustrating a cleaning process, an argon gas supply process, and a drying process in the semiconductor manufacturing process according to the first embodiment of the present invention. 1 is a flow chart of a semiconductor manufacturing process according to a first embodiment of the present invention. 1 is a flow chart showing an improved process for a semiconductor manufacturing process according to a first embodiment of the present invention. FIG. 11 is a configuration diagram showing a transfer process and a pre-bonding process in a semiconductor wafer bonding apparatus according to a second embodiment of the present invention. FIG. 2 is a configuration diagram showing a pre-bonding process in the semiconductor wafer bonding apparatus according to the first embodiment of the present invention. FIG. 11 is a diagram showing a configuration of a stage of a semiconductor wafer bonding apparatus according to a second embodiment of the present invention. FIG. 1 is a diagram showing the structure of a monopolar electrostatic chuck. FIG. 1 is a diagram showing the structure of a bipolar electrostatic chuck. FIG. 13 is a configuration diagram showing a state in which semiconductor wafers are bonded together by a bipolar electrostatic chuck provided on a stage constituting a semiconductor wafer bonding apparatus according to a third embodiment of the present invention.

This section describes a method for removing electrostatic charges from a semiconductor wafer, which is applied to a semiconductor manufacturing process according to a first embodiment of the present invention. For example, this section describes an embodiment in which the method is applied to a semiconductor manufacturing process that employs hybrid bonding.

[Semiconductor manufacturing process]
1 and 5, the semiconductor manufacturing process includes, for example, a particle removal process P100, a plasma treatment process P200, an atmospheric exposure process P300, a cleaning process P400, a drying process P500, an alignment process P600, a bonding process P700, an inspection process P800, and an annealing process P900 for semiconductor wafers W1 and W2.

In the particle removal process P100, particles adhering to the semiconductor wafers W1 and W2 are removed stepwise or chemically.

In the plasma treatment process P200, the surfaces of the semiconductor wafers W1 and W2 are activated by vacuum plasma treatment or atmospheric pressure plasma treatment, etc.

Vacuum plasma treatment can be carried out using a known device. Vacuum plasma treatment methods include high-frequency induction, capacitively coupled electrode, corona discharge electrode-plasma jet, parallel plate, remote plasma, and ICP-type high-density plasma. Gases used in vacuum plasma treatment include oxygen gas, nitrogen gas, rare gas (argon gas, etc.), hydrogen gas, and ammonia gas, with rare gas or nitrogen gas being preferred. Gases may be used alone or in combination of two or more. For example, argon gas may be 100% by volume, or a mixed gas of hydrogen gas/nitrogen gas at 70/30 (volume ratio) or a mixed gas of hydrogen gas/nitrogen gas/argon gas at 35/15/50 (volume ratio).

The atmosphere for the vacuum plasma treatment is preferably an atmosphere with a volume fraction of rare gas or nitrogen gas of 50 volume % or more, more preferably an atmosphere with a volume fraction of 70 volume % or more, even more preferably an atmosphere with a volume fraction of 90 volume % or more, and particularly preferably an atmosphere with a volume fraction of 100 volume %. If the volume fraction of rare gas or nitrogen gas is equal to or greater than the lower limit of the above range, the surface of the treatment object can be sufficiently roughened.

The gas flow rate, degree of vacuum, and processing time in vacuum plasma treatment are appropriately selected depending on the composition of the inorganic layer to be surface-treated and the structure of the vacuum plasma processing device.

Atmospheric pressure plasma treatment can also be carried out using known equipment. In atmospheric pressure plasma treatment, a glow discharge is generated by discharging in an inert gas (argon gas, nitrogen gas, helium gas, etc.) at 0.8 to 1.2 atmospheres. A small amount of an active gas (oxygen gas, hydrogen gas, carbon dioxide gas, ethylene, tetrafluoroethylene, etc.) is mixed into the inert gas. A gas in which nitrogen gas is mixed with hydrogen gas is preferred, as this can sufficiently roughen the surface of the treatment target.

Figure 2 shows the plasma chamber. The gate valve 12 of the plasma chamber 10 is opened, and the semiconductor wafers W1 and W2 are transported into the chamber 14 by a robot and placed on the stage 16. The gate valve 12 is then closed to seal the inside of the chamber 14. The inside of the chamber 14 is then evacuated. Plasma processing is performed on the semiconductor wafers W1 and W2 to activate the surfaces of the semiconductor wafers W1 and W2.

Here, it is preferable to further include an atmospheric exposure process P300 after the plasma treatment process P200, in which the semiconductor wafers W1 and W2 are placed in an atmospheric environment.

In the atmosphere opening process P300, the gate valve 12 of the plasma chamber 10 may be opened to expose the inside of the chamber 10 to the atmosphere, or an atmosphere opening chamber (not shown) may be provided separate from the plasma chamber 10 and the semiconductor wafers W1 and W2 may be transported to the atmosphere opening chamber and then placed in an atmospheric environment.

In the atmospheric release process P300, argon gas 30 is supplied to the semiconductor wafers W1 and W2. It is preferable to supply the argon gas 30 by spraying it from the center of the plane of the semiconductor wafers W1 and W2 toward the radial outside (outer periphery) using a specified swing nozzle 32.

The reason why the argon gas 30 is supplied to the semiconductor wafers W1 and W2 in the atmospheric release process P300 is that, for example, when nitrogen (N ₂ ) is purged during atmospheric release as in the conventional method, the surfaces of the semiconductor wafers W1 and W2 are charged with static electricity due to friction between the semiconductor wafers W1 and W2 and the purge gas, and particles fly up due to pressure fluctuations during purging, and the particles are attracted to the static electricity and tend to adhere to the surfaces of the semiconductor wafers W1 and W2. In order to prevent this, in this embodiment, instead of nitrogen (N2) purging, argon gas 30 is sprayed onto the semiconductor wafers W1 and W2, thereby reducing the amount of static electricity on the surfaces of the semiconductor wafers W1 and W2. As a result, the particles adhering to the surfaces of the semiconductor wafers W1 and W2 can be reduced.

The interior of the chamber 14 may be filled with argon gas 30 to create an argon gas atmosphere, so that the semiconductor wafers W1 and W placed in the argon gas atmosphere are not charged with static electricity.

In the cleaning process P400, as shown in FIG. 4, for example, the semiconductor wafers W1 and W2 after plasma processing are placed on a turntable 20 and rotated at a predetermined speed while cleaning water 28 is dripped onto the surfaces of the semiconductor wafers W1 and W2. For example, pure water or a chemical solution can be used as the cleaning water 28.

Here, when supplying the cleaning water 28 to the semiconductor wafers W1 and W2, it is preferable to drip the cleaning water 28 onto the center of the plane of the rotating semiconductor wafers W1 and W2, and guide the cleaning water 28 radially outward by the centrifugal force of the rotating semiconductor wafers W1 and W2. This makes it possible to clean the entire surface of the semiconductor wafers W1 and W2, and prevents uneven cleaning of the cleaning water 28.

Figure 3 shows the cleaning machine. The cleaning machine 18 is used in the cleaning process P400. The cleaning machine 18 has a rotating table 20, a rotary motor 22 that rotates the rotating table 20, and a cleaning nozzle 24 that supplies cleaning water 28 (see Figure 4) to the semiconductor wafers W1 and W2. The cleaning nozzle 24 sprays the cleaning water 28 and is configured to be oscillated by driving the oscillating motor 26. As a result, while the semiconductor wafers W1 and W2 are placed on the rotating table and rotated by the rotary motor 22, the cleaning water 28 can be dropped from the cleaning nozzle 24 onto the center of the plane of the semiconductor wafers W1 and W2. As a result, the semiconductor wafers W1 and W2 are cleaned, and OH groups (hydroxyl groups) are attached to the surfaces of the semiconductor wafers W1 and W2.

Here, it is preferable to provide a drying process P500 after the cleaning process P400.

In the drying process P500, for example, the cleaning machine 18 is used as is. Specifically, the turntable 20 is rotated at a speed faster than that during the cleaning process, and argon gas 30 is sprayed toward the semiconductor wafers W1 and W2 from the cleaning nozzle 24 or another gas supply nozzle (not shown). In this case, as shown in FIG. 4, when argon gas 30 is supplied from the center of the plane of the rotating semiconductor wafers W1 and W2 toward the radially outward (outer periphery), the argon gas 30 spreads as if pushing the cleaning water 28 under the action of the centrifugal force of the rotating semiconductor wafers W1 and W2. In other words, the argon gas 30 is stirred by the centrifugal force of the rotating semiconductor wafers W1 and W2, and the cleaning water 28 attached to the surface of the semiconductor wafers W1 and W2 is peeled off from the surface of the semiconductor wafers W1 and W2. This allows the argon gas 30 to come into contact with the entire surface of the semiconductor wafers W1 and W2, preventing uneven contact of the argon gas 30.

Another reason for supplying argon gas 30 to the semiconductor wafers W1 and W2 in the drying process P500 is that when the cleaned semiconductor wafers W1 and W2 are rotated at high speed to dry, the surfaces of the semiconductor wafers W1 and W2 are charged with static electricity due to friction between the semiconductor wafers W1 and W2 and the air. Therefore, by exposing the surfaces of the semiconductor wafers W1 and W2 to argon gas 30 in the drying process P500, the amount of static electricity on the surfaces of the semiconductor wafers W1 and W2 can be reduced. As a result, the number of particles adhering to the surfaces of the semiconductor wafers W1 and W2 can be reduced.

As described above, by supplying argon gas 30 to the semiconductor wafers W1 and W2 in the drying process P500, the cleaning water 28 is removed from the surfaces of the semiconductor wafers W1 and W2, and the surfaces are dried, and the amount of static electricity on the surfaces of the semiconductor wafers W1 and W2 is reduced.

In addition, in the atmospheric release process P300, a mixed gas in which small amounts of hydrogen and oxygen are appropriately mixed with argon gas 30 may be supplied to the semiconductor wafers W1 and W2. For example, a mixed gas in which about 3 volume percent hydrogen is mixed with argon may be sprayed onto the surfaces of the semiconductor wafers W1 and W2 to remove static electricity and particles, and then oxygen gas may be sprayed onto the surfaces of the semiconductor wafers W1 and W2 to attach OH groups (hydroxyl groups) to the surfaces of the semiconductor wafers W1 and W2.

Here, in a configuration in which the semiconductor wafers W1 and W2 are rotatable, it is preferable to supply the mixed gas and oxygen gas from a swinging nozzle or the like from the planar center of the rotating semiconductor wafers W1 and W2 toward the radially outward direction. This causes the mixed gas and oxygen gas to be agitated by the centrifugal force acting on the rotating semiconductor wafers W1 and W2, so that the mixed gas and oxygen gas can be exposed evenly to the entire surface of the semiconductor wafers W1 and W2.

As a result, as shown in Figures 5 and 6, the cleaning step P400 and the drying step P500 can be omitted, improving the throughput of the semiconductor manufacturing process. In addition, it is possible to prevent microbubbles from being generated in the semiconductor wafers W1 and W2 after the annealing step P900. Furthermore, fusion bonding becomes possible by attaching OH groups (hydroxyl groups) to the surfaces of the semiconductor wafers W1 and W2 activated by the plasma treatment, and a dry process can be realized.

In the alignment process P600, two semiconductor wafers W1 and W2 facing each other are positioned.

In the bonding process P700, two semiconductor wafers W1 and W2 that have undergone the alignment process P600 are bonded together. At this time, because the semiconductor wafers W1 and W2 that contain few particles are bonded together, the size of the air bubbles that occur between the semiconductor wafers W1 and W2 becomes extremely small, which makes it possible to avoid quality defects in the semiconductor wafers W1 and W2 and prevent a decrease in the yield of the semiconductor manufacturing process.

In the inspection process P800, shape observation and defect inspection are performed on the bonded semiconductor wafers W1 and W2.

In the annealing process P900, the surfaces of the semiconductor wafers W1 and W2 are heated and then cooled to modify the material surface. For example, methods include heating in a furnace or lamp, and laser annealing.

As described above, according to the first embodiment, the amount of static electricity that is charged to the semiconductor wafers W1 and W2 in the semiconductor manufacturing process can be reduced. This makes it possible to reduce particles that are attracted by static electricity and adhere to the surfaces of the semiconductor wafers W1 and W2.

Furthermore, while removing the cleaning water 28 adhering to the surfaces of the semiconductor wafers W1 and W2, the semiconductor wafers W1 and W2 can be modified to have properties that make them less susceptible to static electricity.

Furthermore, fusion bonding of the semiconductor wafers W1 and W2 becomes possible, preventing the generation of microbubbles (air bubbles). As a result, defects in the semiconductor wafers W1 and W2 can be prevented.

Next, a semiconductor wafer bonding apparatus according to a second embodiment of the present invention will be described. This semiconductor wafer bonding apparatus is an alignment apparatus that can be used in the bonding process P700 in the semiconductor manufacturing process of the first embodiment. Note that the apparatus is not limited to being used as the bonding apparatus in the semiconductor manufacturing process of the first embodiment, but can be used as a general semiconductor wafer bonding apparatus.

As shown in FIG. 7, the semiconductor wafer bonding device 34 (hereinafter simply referred to as "bonding device 34") includes a first stage 36 located, for example, at the top, and a second stage 38 located, for example, at the bottom. The first stage 36 and the second stage 38 are disposed opposite each other and face each other. Note that "upper" and "lower" are examples of directions for explaining this embodiment and are not limiting. For example, "upper" and "lower" can be interchanged with "leftward" and "rightward".

For ease of explanation, the semiconductor wafer held on the first stage 36 is referred to as semiconductor wafer W1, and the semiconductor wafer held on the second stage 38 is referred to as semiconductor wafer W2.

The first stage 36 has a first horizontal surface 40 that supports the semiconductor wafer W1. A suction mechanism (not shown) is connected to the first stage 36, and the semiconductor wafer W1 can be held by a predetermined suction force. Similarly, the second stage 38 has a second horizontal surface 42 that supports the semiconductor wafer W2. A suction mechanism (not shown) is connected to the second stage 38, and the semiconductor wafer W2 can be held by a predetermined suction force. In particular, when the microspace SP described below is evacuated, each of the semiconductor wafers W1 and W2 is held by the respective stages 36 and 38.

The first stage 36 and the second stage 38 are preferably equipped with a temperature control mechanism (not shown) for controlling the temperature to a predetermined value. The temperature control mechanism is, for example, a heater.

The first stage 36 may be, for example, a vacuum chuck or an electrostatic chuck (ESC chuck). When using a vacuum chuck, a process that does not require wiring alignment such as an SOI wafer is desirable. An SOI wafer is a wafer that achieves high integration, low power consumption, high speed, and high reliability of semiconductor devices by forming an oxide film layer with high electrical insulation inside the wafer. If necessary, it is also possible to form a diffusion layer of arsenic (As) or antimony (Sb) in the active layer.

When the first stage 36 is configured with a vacuum chuck, it is preferable to narrow the bonding clearance (microscopic distance) as much as possible so that the pressure difference is such that the semiconductor wafer can be held before the vacuum control pressure becomes the same pressure. It is also preferable to install an edge guide (peripheral guide) or the like to prevent the semiconductor wafer W1 held on the upper first stage 36 from falling, or to avoid any problems if the semiconductor wafer W1 falls.

The second stage 38 is supported by a support base 44. A drive unit 46 capable of driving the second stage 38 in the vertical direction is connected to the second stage 38. Therefore, when the drive unit 46 is driven, the second stage 38 can move in the vertical direction while maintaining the horizontal position. The drive unit 46 can be, for example, a ball screw mechanism, a hydraulic cylinder, or a pneumatic cylinder, and the second stage 38 can move in a linear manner in the vertical direction in units of one micron.

The second stage 38 may be configured, for example, as a vacuum chuck or an electrostatic chuck (ESC chuck) in the same manner as the first stage 36.

The first stage 36 may also be connected to a drive unit (not shown) in a similar manner, and configured to be movable in the vertical direction in increments of 1 micron. In a configuration in which the drive unit 46 is attached to the second stage 38, the first stage 36 may be configured to be fixed by a support member (not shown) so as not to move in the vertical direction.

The support surface of the first stage 36 that supports the semiconductor wafer W1 is, for example, a first horizontal surface 40. Similarly, the support surface of the second stage 38 that supports the semiconductor wafer W2 is, for example, a second horizontal surface 42. However, as shown in FIG. 9, a protruding member 74 may be detachably provided on the first horizontal surface 40 that supports the semiconductor wafer W1 of the first stage 36, and the semiconductor wafer W1 may be supported at the tip of the protruding member 74. Similarly, a protruding member 76 may be detachably provided on the second horizontal surface 42 that supports the semiconductor wafer W2 of the second stage 38, and the semiconductor wafer W2 may be supported at the tip of the protruding member 76.

The first stage 36 is equipped with a load cell (not shown) that can measure the bonding pressure when bonding the semiconductor wafers W1 and W2 together. This allows the bonding pressure between the semiconductor wafers W1 and W2 to be measured in grams, and the bonding pressure of the semiconductor wafers can be controlled in grams by controlling the drive device 46 based on the measurement results of the load cell.

A seal member 48 is attached to either or both of the first stage 36 and the second stage 38. The seal member 48 is preferably disposed on the edge of the first stage 36 or the edge of the second stage 38. The seal member 48 is made of, for example, rubber, and is also called an airtight member. FIG. 7 shows a configuration in which the seal member 48 is provided only on the second stage 38, but this is one example. For example, as shown in FIG. 9, the seal member 48 may be provided at a position facing both the first stage 36 and the second stage 38 so as to be in contact with each other.

Here, the first stage 36 and the second stage 38 can be moved toward or away from each other by moving them up and down based on the drive of the drive unit 46 while facing each other so that their horizontal planes are parallel. When the first stage 36 and the second stage 38 approach each other, the first stage 36 and the seal member 48 eventually come into contact with each other. When the first stage 36 and the seal member 48 come into contact with each other, the movement of the first stage 36 and the second stage 38 is stopped. At this time, the separation distance between the semiconductor wafer W1 supported by the first stage 36 and the semiconductor wafer W2 supported by the second stage 38 is set to be a minute distance for forming a minute space (minimal space) SP. In this sense, the seal member 48 functions as a guide member or control member for forming a minute distance or minute space.

The horizontal length of the microspace SP is preferably set to the same as the diameter dimension of the semiconductor wafers W1 and W2, or to the diameter dimension of the semiconductor wafers W1 and W2 plus a spare dimension of about 10 to 20 percent of the diameter dimension.

In other words, the dimensions of the seal member 48 are set so that when the semiconductor wafers W1 and W2 are joined together by the vertical movement of the first stage 36 and the second stage 38, the space formed by each semiconductor wafer W1 and W2 is established as a minute space SP. That is, the dimension of the seal member 48, for example in the height direction, is controlled so that the minimal space in which the semiconductor wafers W1 and W2 are joined together becomes a predetermined minute space SP (or minute volume). Alternatively, the dimension of the seal member 48, for example in the height direction, has the function of controlling the distance between the semiconductor wafer W1 supported by the first stage 36 and the semiconductor wafer W2 supported by the second stage 38 to a desired minimum value.

The distance between the semiconductor wafer W1 supported by the first stage 36 and the semiconductor wafer W2 supported by the second stage 38 is preferably a microdistance of 10 μm or more and 50 μm or less.

The microspace SP is connected to a vacuum control device 50 (not shown in the Transfer position of FIG. 7) provided outside the bonding device 34 so that the vacuum control device 50 can communicate with the microspace SP. In detail, the volume of the vacuum control device 50 is set to be several thousand to several tens of thousands times larger than the volume of the microspace SP. The inlet of an orifice 52 (not shown in the Transfer position of FIG. 7) is connected to the microspace SP, and one end of a tubular member 54 is connected to the outlet of the orifice 52. The other end of the tubular member 54 is connected to the vacuum control device 50. A switching valve 56 (vacuum valve) is connected to the tubular member 54. By opening and closing the switching valve 56, the microspace SP and the vacuum control device 50 are in a state of communication. At this time, because the volume of the vacuum control device 50 is several thousand to several tens of thousands times larger than the volume of the microspace SP, the internal environment of the microspace SP becomes a vacuum environment that mimics the pressure environment of the internal space of the vacuum control device 50. In this way, the vacuum environment of the microspace SP is realized simply by connecting the small-volume microspace SP to the large-volume vacuum control device 50.

The internal environment of the vacuum control device 50 is controlled to an optimal pressure. This prevents the moisture in the microspace SP from freezing and generating bubbles similar to particles when the semiconductor wafers W1 and W2 are bonded together, and prevents the scattering of hydroxyl groups (OH groups) that can cause quality deterioration of the semiconductor wafers W1 and W2.

The vacuum control device 50 is one embodiment of the "vacuum control unit" of the present invention.

Here, the operation when the semiconductor wafers W1 and W2 are bonded together will be described. The distance between the semiconductor wafers W1 and W2 is small in the vacuum environment of the microspace SP, and the drive unit 46 drives the second stage 38 to move upward while maintaining a horizontal state. Eventually, the semiconductor wafer W1 held on the first stage 36 and the semiconductor wafer W2 held on the second stage 38 come into contact with each other at a predetermined pressure and are bonded together.

At this time, the semiconductor wafers W1 and W2 are not pressed using a center push pin (rod) or the like as in the conventional technology. In the conventional technology, when semiconductor wafers are bonded to each other, the center portion of one of the semiconductor wafers is pressed with a center push pin, which causes problems such as deterioration or damage due to bending of the semiconductor wafer and distortion caused by stress concentration. In this embodiment, to address this issue, the semiconductor wafers W1 and W2 are bonded to each other while maintaining a horizontal plane without using a center push pin, so that the semiconductor wafers W1 and W2 can be prevented from being deteriorated or damaged during bonding. This is particularly effective when the semiconductor wafers W1 and W2 are made of hard and brittle SiC wafers.

The bonding pressure between the semiconductor wafers W1 and W2 is, for example, a maximum of 15 kg. The bonding pressure can be measured by a load cell provided on the first stage 36. In addition, by feedback controlling the drive device 46 based on the measurement results from the load cell, it becomes possible to control the movement of the second stage 38 in micron units.

When bonding the semiconductor wafers W1 and W2 together, the distance between the semiconductor wafers W1 and W2 is very small, so misalignment between the semiconductor wafers can be suppressed and bonding accuracy can be improved.

It is also possible to provide a drive unit on the first stage 36 side and move the first stage 36 downward to bond the semiconductor wafers W1 and W2 together. Furthermore, it is also possible to provide drive units 46 on both the first stage 36 and the second stage 38 and move both the first stage 36 and the second stage 38 in the vertical direction.

Next, we will explain the operation of the semiconductor wafer bonding apparatus and bonding method of the second embodiment of the present invention.

[Current situation and issues]
It was difficult to make a sufficient amount of hydroxyl groups (OH groups) exist at the interface of a semiconductor wafer in vacuum plasma processing. Although it is possible to generate O radicals or H radicals in vacuum plasma processing, plasma electrons are attached to the surface of the semiconductor wafer at the same time, and the surface of the semiconductor wafer is activated by the action of the plasma electrons, so it was not possible to make a sufficient amount of hydroxyl groups (OH groups) remain at the interface of the semiconductor wafer.

Vacuum plasma processing is performed to activate the semiconductor wafer, but the process pressure for exciting the gas to form plasma and activating the surface of the semiconductor wafer with ions is 50 Ps or less in vacuum. In this state, gas exists at about 1/2000 of atmospheric pressure, so it is not possible to use high-density plasma and remote plasma to make hydroxyl groups (OH groups) remain at the interface of the semiconductor wafer and obtain the hydroxyl groups (OH groups) required for bonding.

Considering hydrophilic bonding of _SiO2 , water is less likely to dissociate from _SiO2 than from silicon, so there is a technical problem of a small number of hydroxyl groups (OH groups) and insufficient strength; if a large amount of water is applied to solve this technical problem, the water remains at the interface of the semiconductor wafer, causing an excess of hydroxyl groups (OH groups), which leads to the generation of voids.

For example, in the fusion bonding process, the conventional method is to plasma activate the semiconductor wafers, clean them to add hydroxyl groups (OH groups), and then use a center push pin to push up one of the semiconductor wafers, bending the semiconductor wafers while bonding them together. However, with the conventional method, damage occurs due to deformation of the semiconductor wafers themselves, giving rise to technical problems that lead to breakage of the semiconductor wafers.

In particular, all of the substrate materials used for semiconductor wafers are brittle materials, and are hard and brittle. Among these, SiC is second only to diamond in hardness and has strong chemical resistance, making it an extremely difficult material to physically process. For this reason, unlike regular silicon wafers (SI wafers), SiC wafers require a bonding process that does not use a center push pin (void removal bonding process).

In contrast, the wafer bonding apparatus and method of the second embodiment performs the bonding process of the semiconductor wafers W1 and W2 by controlling the pressure so that the hydroxyl groups (OH groups) required for bonding can remain in a small space (minimal space) and vacuum environment at a low vacuum.

The bonding process of the semiconductor wafers W1 and W2 is carried out in the microspace SP, so the microspace is vacuum-controlled at high speed in about one second, and the first stage 36 and the second stage 38 are temperature-controlled to a predetermined temperature, allowing an appropriate amount of hydroxyl groups (OH) to remain.

In this way, in the bonding process of semiconductor wafers, optimal bonding of semiconductor wafers W1 and W2 is possible by controlling the vacuum pressure, temperature, and time when bonding semiconductor wafers W1 and W2 in the smallest space known as a microspace.

In particular, because the microspace SP becomes a vacuum environment in a short time of about one second, a sufficient amount of hydroxyl groups (OH groups) can remain on the surfaces of the semiconductor wafers W1 and W2, improving the bonding strength between the semiconductor wafers W1 and W2.

In addition, in the pre-bonding space before the semiconductor wafers W1 and W2 are bonded together, the separation distance between the semiconductor wafers W1 and W2 is a minute distance (minimum distance) of 10 μm or more and 50 μm or less, and it is preferable to use piezoelectric control to adjust the inclination and alignment of the semiconductor wafers W1 and W2 as well as to control the pressure during bonding.

Next, examples of a semiconductor wafer bonding apparatus and method according to the second embodiment of the present invention will be described. Note that in the drawings of each example, the same reference numerals are used for overlapping configurations, and descriptions thereof will be omitted as appropriate.

Example 1
8, the first embodiment includes a vacuum control unit 58. The vacuum control unit 58 includes, for example, a vacuum control chamber 60, a pump unit 62 connected to the vacuum control chamber 60 by piping or the like, a gas unit 64 connected to the vacuum control chamber 60 by piping or the like, and a pressure gauge 66 such as a Pirani vacuum gauge for measuring the pressure inside the vacuum control chamber 60.

The vacuum control chamber 60 is one embodiment of the "vacuum control unit" of the present invention.

Bulkhead valves 68 are provided between the vacuum control chamber 60 and the pump unit 62, and between the vacuum control chamber 60 and the gas unit 64. Furthermore, the vacuum control chamber 60 is provided with a temperature adjustment mechanism 70 for controlling the temperature inside the vacuum control chamber 60. The temperature adjustment mechanism 70 is, for example, a heater. The temperature adjustment mechanism 70 makes it possible to degas the gas adhering to the inner wall of the vacuum control chamber 60 and to control the humidity. By driving the pump unit 62, the microspace SP that is in communication with the vacuum control chamber 60 is evacuated, realizing a vacuum environment.

According to the first embodiment, the bonding chamber side forming the minute space of the bonding device 34 is structured to control the pressure change rate with an orifice 52 such as a mass flow controller. The vacuum control chamber 60 is provided with, for example, a temperature control mechanism 70 and a gas unit 64 capable of supplying water vapor. This makes it possible to control the environment inside the vacuum control chamber, such as the temperature, humidity, and pressure.

The reason for interposing the vacuum control chamber 60 between the microspace SP of the bonding device 34 and the pump unit 62 is that if the microspace SP of the bonding device 34 is directly connected to the pump unit 62, the volume of the microspace SP is too small, making it difficult to control the pressure, and the sudden vacuum state that reaches the performance (ultimate vacuum) of the pump unit 62 causes the moisture and other liquids present in the microspace SP to rapidly evaporate, causing the temperature of the microspace SP to drop. As a result, vacuum freezing occurs in the semiconductor wafers W1 and W2 in the microspace SP. When vacuum freezing occurs, bubbles are generated in the same way as particles, which adversely affects the quality of the semiconductor wafers W1 and W2. In addition, the sudden vacuum state that reaches the performance (ultimate vacuum) of the pump unit 62 causes hydroxyl groups (OH groups) to volatilize, adversely affecting the quality of the semiconductor wafers W1 and W2.

The pressure at which vacuum freezing occurs depends on the properties of the material and the temperature. Generally, very low pressures are required for vacuum freezing to occur effectively. In most cases, vacuum freezing is performed under high vacuum conditions (10 ⁻³ Pa (pascals) or less). Pressure changes when creating a vacuum affect the freezing results. In a vacuum, materials tend to become gaseous, and as pressure decreases, they tend to evaporate. This reduces the temperature of the material, facilitating freezing. The lower the pressure, the easier it is for freezing to occur in a vacuum.

As a result of the above, the vacuum control chamber 60 is inserted, the inside of which is connected to the microspace SP with the temperature, humidity, and pressure optimally controlled, and the temperature of the first stage 36 and the second stage 38 is controlled, creating a vacuum environment in the microspace SP that prevents freezing, thereby preventing deterioration of the semiconductor wafers W1 and W2.

Example 2
As shown in Fig. 9, in the second embodiment, the first stage 36 is provided with a first protruding member 74 as a contact area reducing portion 72 for reducing the contact area with the semiconductor wafer W1. The second stage 38 is provided with a second protruding member 76 as a contact area reducing portion 72 for reducing the contact area with the semiconductor wafer W2. The first stage 36 and the second stage 38 each have horizontal surfaces 40, 42, and the semiconductor wafers W1, W2 are supported in surface contact on the horizontal surfaces 40, 42, respectively. In the second embodiment, however, the semiconductor wafers W1, W2 are supported by a plurality of protruding members 74, 76. Therefore, the total contact area between the semiconductor wafers W1, W2 and the stages 36, 38 is reduced. This reduces the amount of particles (foreign matter) such as dirt and dust that become interposed between the semiconductor wafers W1, W2 and the protruding members 74, 76, reduces stress concentration when the semiconductor wafers W1, W2 are bonded together, and suppresses deterioration in the quality of the completed product.

The tips of the multiple protruding members 74, 76 are preferably curved to reduce the contact area with the semiconductor wafers W1, W2. By making the tips of the protruding members 74, 76 curved, the amount of particles (foreign matter) such as dirt and dust adhering to the tips of the protruding members 74, 76 is reduced, and the contact area between the semiconductor wafers W1, W2 and the protruding members 74, 76 is further reduced. As a result, the amount of particles (foreign matter) such as dirt and dust interposed between the semiconductor wafers W1, W2 and the protruding members 74, 76 is significantly reduced, and deterioration of the quality of the product when the semiconductor wafers W1, W2 are bonded together to complete the product can be further suppressed.

As described above, according to Example 2, since the conventional stage is planar, particles adhering to the stage or the surface of the semiconductor wafer promote stress concentration when pressure is applied to bond the semiconductor wafers together, and technical problems such as damage to the semiconductor wafer or generation of air bubbles in the semiconductor wafer can be fundamentally solved.

In particular, in a configuration in which the semiconductor wafers W1, W2 are supported by a plurality of protruding members 74, 76, a gap is formed between each of the adjacent protruding members 74, 76. When the minute space SP is vacuum-suctioned, an airflow passes through the gap formed between each of the protruding members 74, 76 and heads toward the orifice 52. This allows the semiconductor wafers W1, W2 to be firmly supported by the plurality of protruding members 74, 76, enabling reliable positioning. As a result, highly accurate bonding of the semiconductor wafers W1, W2 can be achieved.

The protruding members 74, 76 may be projections, columnar members, or rod-shaped members. The protruding members 74, 76 may be members or constructions for forming unevenness on the horizontal surfaces 40, 42 of the first stage 36 and the second stage 38. The protruding members 74, 76 are not limited to being detachably provided on the horizontal surfaces 40, 42, but may be fixed on the horizontal surfaces 40, 42, or the surfaces of the horizontal surfaces 40, 42 may be processed into a protruding or projection shape.

In addition, both the first stage 36 and the second stage 38 are provided with a seal member 48 for maintaining a vacuum environment in the microspace SP when the semiconductor wafers W1 and W2 are bonded. The seal member 48 is, for example, rubber.

When the pair of stages 36, 38 approach each other, the seal members 48 come into contact with each other, adjusting the distance between the semiconductor wafers W1, W2. In other words, the thickness (height) of the seal member 48 is set to a dimension that allows the distance between the semiconductor wafers W1, W2 to be adjusted to the desired minute distance.

Next, we will explain the operation of the semiconductor wafer bonding apparatus and bonding method of the third embodiment of the present invention.

In the third embodiment, the semiconductor wafer bonding apparatus and bonding method in the second embodiment are configured such that electrostatic chucks 80 (see Figures 10 to 12) are disposed on the first stage 36 and the second stage 38 for holding the semiconductor wafers W1 and W2.

[Current situation and issues]
Conventionally, in a bonding process, for example, when bonding positively charged semiconductor wafers together or bonding negatively charged semiconductor wafers together, a repulsive force is generated between the semiconductor wafers, and when the semiconductor wafers are bonded together, the repulsive force causes a positional shift of one semiconductor wafer relative to the other semiconductor wafer, resulting in a problem of reduced bonding accuracy between the semiconductor wafers.
Therefore, the third embodiment has been invented to solve the above problems, and provides a wafer bonding apparatus and a wafer bonding method that have a simple configuration and prevent misalignment when semiconductor wafers are bonded together in a semiconductor manufacturing process.

Figures 10 and 11 show the structure of a monopolar electrostatic chuck 78 and a bipolar electrostatic chuck 80. The electrostatic chucks 78, 80 are made of insulating materials such as aluminum oxide (Al2O3) and aluminum nitride (AIN). The chucks have an electrode built into the insulator, and when a voltage is applied to the electrode, they attract objects 86, 92 such as semiconductor wafers W1, W2.

The monopolar electrostatic chuck 78 shown in FIG. 10 is a monopolar type, and has a base substrate 82 and an internal electrode (also called an electrode sheet or polyimide film electrode layer) 84 arranged on the base substrate 82. The base substrate 82 applies either a positive or negative voltage to the internal electrode 84. For example, when a positive voltage is applied to the internal electrode 84, a negative charge is transferred to the surface of the object to be attracted 86, and the object to be attracted 86 is attracted to the monopolar electrostatic chuck 78. When a negative voltage is applied to the internal electrode 84, a positive charge is transferred to the surface of the object to be attracted 86, and the object to be attracted 86 is attracted to the monopolar electrostatic chuck 78.

The electrostatic chuck 80 shown in FIG. 11 is a bipolar type, and has a base substrate 88 and an internal electrode (also called an electrode sheet or polyimide film electrode layer) 90 arranged on the base substrate 88. The base substrate 88 applies both positive and negative voltages to the internal electrode 90. For example, a negative charge moves to the surface of the object to be attracted 92 facing the internal electrode 90 to which a positive voltage is applied, and a positive charge moves to the surface of the object to be attracted 92 facing the internal electrode 90 to which a negative voltage is applied, so that the object to be attracted 92 is attracted to the bipolar electrostatic chuck 80.

In the third embodiment, an example in which a bipolar electrostatic chuck is used in a semiconductor wafer bonding device will be described. As shown in FIG. 12, the electrostatic chuck 80 is preferably built into each of the first stage 36 and the second stage 38. For convenience of explanation, the electrostatic chuck 80 built into the first stage 36 is referred to as the first electrostatic chuck 80A, and the electrostatic chuck 80 built into the second stage 38 is referred to as the second electrostatic chuck 80B. Each of the electrostatic chucks 80A and 80B is, for example, of a bipolar type. Since the first stage 36 and the second stage 38 are arranged opposite each other, the respective electrostatic chucks 80A and 80B are arranged in positions opposite each other, thereby forming a pair of electrostatic chucks.

The first electrostatic chuck 80A has a first base substrate 88A and a first internal electrode 90A arranged on the first base substrate 88A. The first internal electrode 90A is connected to earth. The first base substrate 88A controls the voltage applied to the first internal electrode 90A. The first internal electrode 90A is composed of two or more adjacent first unit electrodes 91A, and mutually inverted positive and negative voltages are applied to adjacent first unit electrodes 91A, respectively.

The second electrostatic chuck 80B is disposed at a position facing the first electrostatic chuck 80A. The second electrostatic chuck 80B has a second base substrate 88B and a second internal electrode 90B disposed on the second base substrate 88B, similar to the configuration of the first electrostatic chuck 80A. The second internal electrode 90B is connected to earth. The second base substrate 88B controls the voltage applied to the second internal electrode 90B. The second internal electrode 90B is composed of two or more adjacent second unit electrodes 91B, and mutually inverted positive and negative voltages are applied to the adjacent second unit electrodes 91B, respectively.

Here, the first unit electrode 91A on the first electrostatic chuck 80A side and the second unit electrode 91B on the second electrostatic chuck 80B side facing the first unit electrode 91A are controlled by the first base plate 88A and the second base plate 88B so that voltages of opposite polarity (positive and negative) are applied to them. Therefore, the first unit electrode 91A of the first internal electrode 90A of the first electrostatic chuck 80A, which is applied with a negative voltage, is positioned opposite the second unit electrode 91B of the second internal electrode 90B of the second electrostatic chuck 80B, which is applied with a positive voltage. Similarly, the first unit electrode 91A of the first internal electrode 90A of the first electrostatic chuck 80A, which is applied with a positive voltage, is positioned opposite the first unit electrode 91B of the second internal electrode 90B of the second electrostatic chuck 80B, which is applied with a negative voltage.

The general principle of the bipolar electrostatic chuck 80 is that, with a semiconductor wafer W1 placed on the first electrostatic chuck 80A and a semiconductor wafer W2 placed on the second electrostatic chuck 80B, positive and negative voltages are applied to the first internal electrode 90A and the second internal electrode 90B, respectively. This causes the positive and negative charges of the semiconductor wafers W1 and W2 to move toward the opposing internal electrodes 90A and 90B in such a way that they attract each other (dielectric polarization). As a result, an attraction force is generated between the first internal electrode 90A and the semiconductor wafer W1, and between the second internal electrode 90B and the semiconductor wafer W2, and the semiconductor wafers W1 and W2 are fixed in place.

As shown in FIG. 10, in a monopolar electrostatic chuck 78, a voltage is generally applied between an object to be attracted (such as a semiconductor wafer) 86 and an internal electrode 84 (also called a chuck or holding device), generating an electric charge on the surface of the object to be attracted (such as a semiconductor wafer) 86. Specifically, if the internal electrode 84 is positively charged, the surface of the object to be attracted (such as a semiconductor wafer) 86 facing it is negatively charged, and if the internal electrode 84 is negatively charged, the surface of the object to be attracted (such as a semiconductor wafer) 86 facing it is positively charged. This principle is also true for the bipolar electrostatic chuck 80 shown in FIG. 11.

Normally, the surfaces of the semiconductor wafers W1 and W2 are negatively (or positively) charged after being activated by plasma processing. For this reason, when attempting to bond semiconductor wafers W1 and W2 with mutually negative (or mutually positive) surfaces, they are electrically repelled. In this state, if the semiconductor wafers W1 and W2 are forcibly bonded together, they will repel each other, causing misalignment, resulting in a situation in which the bonding accuracy of the semiconductor wafers W1 and W2 is reduced.

In the third embodiment, as shown in FIG. 12, the surface of one of the opposing semiconductor wafers W1 is positively (negatively) charged, and the surface of the other semiconductor wafer W2 is negatively (positively) charged, intentionally creating a state in which the semiconductor wafers to be bonded are charged with opposite polarities. This makes use of both the van der Waals force (intermolecular force) and the Coulomb force (electrostatic force) that are generated between the two to improve the adhesion force, and assists in bonding the semiconductor wafers W1 and W2 together.

In general, when negatively charged objects (or positively charged objects) are brought together, they repel each other. This is one of the basic properties of static electricity; charges of the same sign (for example, both negative charges) repel each other, while charges of opposite polarity (for example, one positive and the other negative) attract each other. The third embodiment makes use of this property.

The semiconductor wafers W1 and W2, which are charged to opposite polarities, are controlled by a voltage between their surfaces that does not cause discharge, and when the positively charged semiconductor wafer W1 (or W2) comes into contact with the negatively charged semiconductor wafer W2 (or W1), electrons move from the positively charged object to the negatively charged object, neutralizing the charge. This weakens the effect of static electricity and at the same time increases the bonding adhesion force when the wafers are bonded together.

In a typical bipolar electrostatic chuck, the surface of the semiconductor wafer is kept in electrical equilibrium by applying voltages of the same magnitude (absolute value) to the positive and negative sides.

In contrast, in the third embodiment, instead of applying voltages of the same magnitude (absolute value) for positive and negative, voltages of different magnitudes are applied to intentionally disrupt the positive or negative balance. In other words, an imbalance is created between the positive and negative voltages in terms of the magnitude of the applied voltage.

As shown in FIG. 12, for example, a voltage of -400 volts is applied to the first unit electrode 91A on one side constituting the first internal electrode 90A of the first electrostatic chuck 80A, and a voltage of +500 volts is applied to the first unit electrode 91A on the other side. At the same time, a voltage of +400 volts is applied to the second unit electrode 91B on one side constituting the second internal electrode 90B of the second electrostatic chuck 80B, and a voltage of -500 volts is applied to the second unit electrode 91B on the other side.

Here, the first unit electrode 91A on one side of the first internal electrode 90A of the first electrostatic chuck 80A, to which a voltage of -400 volts is applied, and the second unit electrode 91B on one side of the second internal electrode 90B of the second electrostatic chuck 80B, to which a voltage of +400 volts is applied, are set to be positioned opposite each other. Although these have different polarities, positive and negative, voltages of the same absolute value are applied to them.

The first unit electrode 91A on the other side of the first internal electrode 90A of the first electrostatic chuck 80A to which a voltage of +500 volts is applied is set to face the second unit electrode 91B on the other side of the second internal electrode 90B of the second electrostatic chuck 80B to which a voltage of -500 volts is applied. Although these have different polarities (positive and negative), voltages of the same absolute value are applied to them.

As a result, the surface of the semiconductor wafer W1 facing the first electrostatic chuck 80A is charged with a charge of +100 volts, which is the difference between +500 volts and -400 volts of the first electrostatic chuck 80A. Similarly, the surface of the semiconductor wafer W2 facing the second electrostatic chuck 80B is charged with a charge of -100 volts, which is the difference between +400 volts and -500 volts of the second electrostatic chuck 80B.

At this time, floating charges are generated on the surfaces of the semiconductor wafers W1 and W2. As a result, by applying a reverse voltage to the mutually opposing internal electrodes 90A and 90B (or to the unit electrodes), the semiconductor wafers W1 and W2 are attracted to each other and bonded together by a strong Coulomb force. As a result, the generation of bubbles when the semiconductor wafers W1 and W2 are bonded together can be suppressed.

Here, the semiconductor wafers W1 and W2 held by the pair of electrostatic chucks 80A and 80B are preferably placed in a microspace SP (minimal space) environment with a separation distance between them of 10 μm or more and 50 μm or less. In the microspace SP, the semiconductor wafers W1 and W2 are bonded to each other while maintaining the planar orientation of the semiconductor wafers W1 and W2. The definition and effects of the microspace SP are as explained in the second embodiment.

In the microspace SP, with each semiconductor wafer W1, W2 attracted to each electrostatic chuck 80A, 80B, one or both of the first stage 36 and the second stage 38 are moved by the driving device 46 along the direction of gravity as necessary to bring the two closer together. At this time, the semiconductor wafers W1, W2 are charged with charges of opposite polarity, so that van der Waals force (intermolecular force) and Coulomb force (electrostatic force) are generated between them. By utilizing both of these forces, the attraction force between the semiconductor wafers W1, W2 placed in the microspace SP is improved, and the semiconductor wafers W1, W2 are attracted to each other and bonded in a vacuum environment without using, for example, a piston rod.

In particular, because the semiconductor wafers W1 and W2 each carry a positive charge and a negative charge, they attract each other and assist the van der Waals molecular bonds. This increases the adhesive force that occurs between the semiconductor wafers W1 and W2 when they are bonded together, preventing misalignment of the semiconductor wafers W1 and W2 when they are bonded together.

The bipolar electrostatic chuck 80 has electrodes arranged with different polarities (opposite polarities) on the first stage 36 located on the upper side and the second stage 38 located on the lower side, so that the voltage after bonding the semiconductor wafers W1 and W2 flows from the positive side to the negative side, assisting the van der Waals force of the OH groups (hydroxyl groups).

Van der Waals forces (intermolecular forces, intermolecular interaction forces) occur when a substance is in a liquid or solid state because atoms or molecules are very close to each other. Van der Waals forces play an important role in the cohesive state of substances and affect the contact or bonding between substances.

Furthermore, van der Waals forces and electrostatic forces are different forces that can simultaneously affect the interaction of materials. Van der Waals forces are forces that act between non-polar molecules and between non-polar and polar molecules, and are caused by the instantaneous distribution of electrons. In contrast, electrostatic forces are the mutual attraction or repulsion of electrically charged particles (usually electrons and protons).

When a substance is electrostatically charged, an electric field is formed that can affect surrounding molecules or atoms. This electric field can also affect van der Waals forces. Specifically, the molecules or atoms are arranged by electrostatic interactions, which can change the van der Waals forces or the relative polarity of the molecules, thereby enhancing the adhesive force when the semiconductor wafers W1 and W2 are bonded together.

Note that this embodiment and examples show one aspect of the present invention, and the present invention is not limited thereto. Differences in the degree of design changes to this embodiment and examples are naturally included within the scope of the technical concept of the present invention.

10 Plasma chamber 12 Gate valve 14 Chamber 16 Stage 18 Cleaning machine 20 Rotary table 22 Rotary motor 24 Cleaning nozzle 26 Swing motor 28 Cleaning water 30 Argon gas 32 Swing nozzle 34 Semiconductor wafer bonding device 36 First stage 38 Second stage 40 First horizontal surface 42 Second horizontal surface 44 Support base 46 Driving device 48 Seal member 50 Vacuum control device (vacuum control unit)
52 Orifice 54 Tubular member 56 Switching valve 58 Vacuum control unit 60 Vacuum control chamber (vacuum control section)
62 Pump unit 64 Gas unit 66 Pressure gauge 68 Bulkhead valve 70 Temperature adjustment mechanism 72 Contact area reduction section 74 First protruding member 76 Second protruding member 78 Monopolar electrostatic chuck 80 Bipolar electrostatic chuck 80A First electrostatic chuck 80B Second electrostatic chuck 82 Base substrate 84 Internal electrode 86 Adsorbed object 88 Base substrate 88A First base substrate 88B Second base substrate 90 Internal electrode 90A First internal electrode 90B Second internal electrode 91A First unit electrode 91B Second unit electrode 92 Adsorbed object SP Microspace (minimal space)
W1 Semiconductor wafer W2 Semiconductor wafer

Claims (6)

A semiconductor wafer bonding apparatus, comprising: a pair of electrostatic chucks disposed at positions facing each other on a stage supporting semiconductor wafers; and, in a state in which the semiconductor wafers are attracted to the electrostatic chucks, the semiconductor wafers facing each other are bonded to each other,
The electrostatic chuck is a hyperbolic type to which positive and negative voltages can be applied, and voltages of opposite polarities having different absolute values are applied to one side and the other side of the electrostatic chucks facing each other, thereby generating a potential difference in a state in which the semiconductor wafers facing each other have opposite polarities,
The semiconductor wafer bonding apparatus includes a pair of the electrostatic chucks, and the semiconductor wafers are bonded to each other by Van der Waals force and Coulomb force in a vacuum environment without using a piston rod . A semiconductor wafer bonding apparatus, comprising: a pair of electrostatic chucks disposed at positions facing each other on a stage supporting semiconductor wafers; and, in a state in which the semiconductor wafers are attracted to the electrostatic chucks, the semiconductor wafers facing each other are bonded to each other,
One of the electrostatic chucks is a bipolar type having a plurality of internal electrodes adjacent to each other, and voltages of opposite polarities, the absolute values of which are different from each other, are applied to the adjacent internal electrodes,
the other electrostatic chuck is a bipolar type having a plurality of mutually adjacent internal electrodes, and voltages of opposite polarities, the absolute values of which are different from each other, are applied to the adjacent internal electrodes, and a voltage of opposite polarity is applied to the internal electrodes of the one electrostatic chuck disposed opposite to each other;
A potential difference is generated in a state in which the semiconductor wafer held by one electrostatic chuck and the semiconductor wafer held by the other electrostatic chuck have opposite polarities ,
The semiconductor wafer bonding apparatus includes a pair of the electrostatic chucks, and the semiconductor wafers are bonded to each other by Van der Waals force and Coulomb force in a vacuum environment without using a piston rod . 3. The semiconductor wafer bonding apparatus according to claim 1, wherein the semiconductor wafers held by the pair of electrostatic chucks are bonded to each other while maintaining a planar orientation of the semiconductor wafers in a microspace in which a separation distance between the semiconductor wafers held by the pair of electrostatic chucks is set to 10 μm or more and 50 μm or less . A method for bonding semiconductor wafers, comprising: disposing a pair of electrostatic chucks at positions facing each other on a stage supporting semiconductor wafers; and bonding the semiconductor wafers facing each other in a state in which the semiconductor wafers are attracted to the electrostatic chucks, the method comprising the steps of:
The electrostatic chuck is a hyperbolic type to which positive and negative voltages can be applied, and voltages of opposite polarities having different absolute values are applied to one side and the other side of the electrostatic chucks facing each other, thereby generating a potential difference in a state in which the semiconductor wafers facing each other have opposite polarities,
The semiconductor wafer bonding method includes bonding the semiconductor wafers held by the pair of electrostatic chucks in a vacuum environment by mutual attraction and bonding using van der Waals force and Coulomb force without using a piston rod . A method for bonding semiconductor wafers, comprising: disposing a pair of electrostatic chucks at positions facing each other on a stage supporting semiconductor wafers; and bonding the semiconductor wafers facing each other in a state in which the semiconductor wafers are attracted to the electrostatic chucks, the method comprising the steps of:
One of the electrostatic chucks is a bipolar type having a plurality of internal electrodes adjacent to each other, and voltages of opposite polarities, the absolute values of which are different from each other, are applied to the adjacent internal electrodes,
the other electrostatic chuck is a bipolar type having a plurality of mutually adjacent internal electrodes, and voltages of opposite polarities, the absolute values of which are different from each other, are applied to the adjacent internal electrodes, and a voltage of opposite polarity is applied to the internal electrodes of the one electrostatic chuck disposed opposite to each other;
A potential difference is generated in a state in which the semiconductor wafer held by one electrostatic chuck and the semiconductor wafer held by the other electrostatic chuck have opposite polarities,
The semiconductor wafer bonding method includes bonding the semiconductor wafers held by the pair of electrostatic chucks in a vacuum environment by mutual attraction and bonding using van der Waals force and Coulomb force without using a piston rod . 6. The semiconductor wafer bonding method according to claim 4 or 5, wherein the semiconductor wafers held by the pair of electrostatic chucks are bonded to each other in a microspace having a separation distance of 10 μm or more and 50 μm or less, while maintaining a planar attitude of the semiconductor wafers .

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