JP7053291B2 - Power converter - Google Patents

Description

The present invention relates to a power converter and a snubber circuit.

Synchronous rectifier circuits used in power conversion devices such as DC-DC converters are generally configured to alternately control two field effect transistors (FETs) on and off. The DC power of a desired voltage can be stably output by the PWM signal input to each gate of one FET. In this synchronous rectifier circuit, a large surge voltage may be generated between the drain and the source at the time of switching in which each FET is controlled to be ON / OFF. A snubber circuit is widely known as a technique for reducing such a surge voltage, and a synchronous rectifier circuit including the snubber circuit is known (see, for example, Patent Document 1).

Among the snubber circuits, the active snubber circuit uses, for example, a switching circuit using a power semiconductor element, and the surge voltage can be absorbed by the capacitor at the timing when the surge voltage is generated. More specifically, for example, the prior art described in Patent Document 1 includes a bipolar transistor that operates with a gate signal obtained by differentiating the drive signal for the FET of the synchronous rectifier circuit, and the collector of the bipolar transistor and the drain of the FET are separated from each other. It is connected via a capacitor, and the emitter and ground of the bipolar transistor are connected via a resistor. As a result, in the prior art of Patent Document 1, the snubber circuit is operated only at the timing when the surge voltage is generated.

Japanese Unexamined Patent Publication No. 2016-192857

However, in the prior art described in Patent Document 1, the drain-source voltage of the FET is applied to the series circuit of the capacitor and the resistor at the timing when the snubber circuit operates. Therefore, in the conventional technique, a relatively large amount of electric power is consumed in the resistance, and there is a possibility that heat generation and electric power loss increase.

The present invention has been made in view of such a situation, and an object of the present invention is to provide a power conversion device and a snubber circuit capable of suppressing heat generation and power loss.

<First aspect of the present invention>
The first aspect of the present invention is a switching element, a transistor to which a collector is connected to one end side of the switching element via a first capacitor, and a first resistor connected between the emitter and ground of the transistor. A snubber circuit including a diode whose anode is connected to the collector of the transistor and a cathode which is connected to the ground, a second capacitor whose one end side is connected to the base of the transistor, and one end side of the second capacitor. A control that outputs a switch control signal for controlling the switching element and a differential circuit including a second resistor connected between the second capacitor and the ground, and outputs a snubber control signal to the other end side of the second capacitor. The transistor is a power conversion device comprising the device and discharging the charge of the first capacitor charged by the switching surge of the switching element.

The switching surge generated at the timing when the switching element is switched from ON to OFF is suppressed by charging the electric charge by the first capacitor of the snubber circuit. Therefore, the switching element is less likely to exceed the withstand voltage due to the switching surge. Here, the control device outputs a switching control signal for switching ON / OFF of the switching element, and also outputs a snubber control signal to the snubber circuit via the differentiating circuit. At this time, the transistor of the snubber circuit discharges the charge charged by the switching surge among the charges charged in the first capacitor. Therefore, the electric charge charged and discharged by the first capacitor is limited to the amount associated with the switching surge, so that the power consumed by the first resistor can be minimized. Thereby, according to the first aspect of the present invention, the effect of suppressing heat generation and power loss can be obtained.

<Second aspect of the present invention>
A second aspect of the present invention is the power conversion device in which the switch control signal and the snubber control signal are output from the control device by paths independent of each other in the first aspect of the present invention described above. ..

The control device controls the switching element by the switching control signal, and controls the snubber circuit by the snubber control signal. At this time, the switch control signal and the snubber control signal are output to the switching element and the snubber circuit, respectively, by paths independent of each other from the control device. As a result, according to the second aspect of the present invention, even if the timing and period of operation of the switching element and the snubber circuit are different from each other, they can be easily set without being influenced by each other. The action effect is obtained.

<Third aspect of the present invention>
A third aspect of the present invention is, in the first or second aspect of the present invention described above, in a power conversion device in which the transistor starts discharging the first capacitor after a surge generation period of the switching element. be.

The snubber circuit discharges the electric charge charged in the first capacitor while the transistor is ON. Here, the control device switches the snubber control signal so that the transistor is turned on after the surge generation period of the switching element. As a result, according to the third aspect of the present invention, the snubber circuit does not discharge the first capacitor during the surge generation period, and therefore, it is possible to reduce the possibility of discharging the electric charge more than necessary. Action effect is obtained.

<Fourth aspect of the present invention>
A fourth aspect of the present invention is, in any one of the first to third aspects of the present invention described above, the transistor terminates the discharge of the first capacitor before the switching element switches from OFF to ON. , A power converter.

When the switching element is switched from OFF to ON, the voltage across the switching element drops to a low level. Therefore, the snubber circuit turns off the transistor and ends the discharge of the first capacitor before the switching element is switched from OFF to ON. Thereby, according to the fourth aspect of the present invention, the first capacitor can be kept unconnected to the switching element during the period when the switching element is at a low level, and therefore, the charge is discharged more than necessary. It is possible to obtain an action effect that the possibility of the discharge can be reduced.

<Fifth aspect of the present invention>
A fifth aspect of the present invention is a snubber circuit that suppresses a switching surge of a switching element controlled by a control device, and a transistor to which a collector is connected to one end side of the switching element via a first capacitor. The transistor comprises a first resistor connected between the emitter and ground of the transistor and a diode having an anode connected to the collector of the transistor and a cathode connected to ground, wherein the transistor switches the switching element. It is a snubber circuit that discharges the charge of the first capacitor as much as it is charged by the surge.

According to the fifth aspect of the present invention, for the same reason as the first aspect described above, the electric charge charged and discharged by the first capacitor is limited to the amount associated with the switching surge, so that it is consumed in the first resistance. It is possible to minimize the amount of power generated, and therefore, it is possible to obtain the effect of suppressing heat generation and power loss.

According to the present invention, it is possible to provide a power conversion device and a snubber circuit capable of suppressing heat generation and power loss.

It is a circuit diagram of the power conversion apparatus which concerns on this invention. It is a circuit diagram of the snubber circuit and the differentiating circuit which concerns on this invention. It is a timing chart which shows the voltage waveform in each part of a synchronous rectifier circuit.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the contents described below, and can be arbitrarily modified and implemented without changing the gist thereof. In addition, the drawings used to explain the embodiments are all schematically showing the constituent members, and are partially emphasized, enlarged, reduced, or omitted in order to deepen the understanding of the constituent members. It may not accurately represent the scale or shape.

FIG. 1 is a circuit diagram of the power conversion device 1 according to the present invention. In the present embodiment, the power conversion device 1 is an isolated DC-DC converter having a full bridge system on the primary side, converts the input input voltage Vin into a stable desired voltage, and outputs the output voltage Vout. The power conversion device 1 includes an inverter circuit 10, an isolation transformer T, a synchronous rectifier circuit 20, and a drive control unit 30.

The inverter circuit 10 is a known full-bridge inverter circuit, and includes field effect transistors (FETs) Q11 to Q14, a coil L1, and a capacitor C11. In the present invention, the inverter circuit 10 is not limited to the full bridge system, and may be an inverter circuit of another system such as a half bridge, flyback, forward, or the like.

The field effect transistors Q11 to Q14 are semiconductor switching elements, and each gate is connected to a primary side driver 31, which will be described later. The drain of the field effect transistor Q11 is connected to the drain of the field effect transistor Q12. The source of the field effect transistor Q11 is connected to the drain of the field effect transistor Q13. The source of the field effect transistor Q12 is connected to the drain of the field effect transistor Q14. The source of the field effect transistor Q13 and the source of the field effect transistor Q14 are connected to the primary side ground GND1.

One end of the coil L1 is connected to the input terminal on the high potential side of the power conversion device 1, and the other end is connected to the connection point between the drain of the field effect transistor Q11 and the drain of the field effect transistor Q12. One end side of the capacitor C11 is connected to the other end side of the coil L1, and the other end side is connected to the primary side ground GND1.

The isolation transformer T is a known transformer that transmits electric power while insulating from the inverter circuit 10 on the primary side of the power conversion device 1 to the synchronous rectifying circuit 20 on the secondary side. Includes L22. The primary side coil L11 has a winding start end connected to the connection point between the field effect transistor Q12 and the field effect transistor Q14, and the winding end end connected to the connection point between the field effect transistor Q11 and the field effect transistor Q13. Further, in the isolation transformer T, the winding end end of the secondary coil L21 and the winding start end of the secondary coil L22 are connected at a connection point (center tap).

The synchronous rectifying circuit 20 includes a first switch Q1, a second switch Q2, resistors R21 to R24, a coil L2, a capacitor C21, a first snubber circuit 21, a first differentiating circuit 22, a second snubber circuit 23, and a second differentiating circuit. 24 is included. Here, in the present invention, the "switching element" corresponds to at least one of the first switch Q1 and the second switch Q2 in the present embodiment, and the "snubber circuit" corresponds to the first snubber circuit 21 and the second in the present embodiment. It corresponds to at least one of the snubber circuits 23, and the "differentiating circuit" corresponds to at least one of the first differentiating circuit 22 and the second differentiating circuit 24 in this embodiment.

The first switch Q1 and the second switch Q2 are semiconductor switching elements, for example, N-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistor). In the first switch Q1, the drain is connected to the winding start end of the secondary coil L21 of the isolation transformer T, and the source is connected to the secondary ground GND2. In the second switch Q2, the drain is connected to the winding end end of the secondary coil L22 of the isolation transformer T, and the source is connected to the secondary ground GND2.

The resistance R21 and the resistance R22 output the voltage of the switch control signal input from the secondary driver 32, which will be described later, to the gate of the first switch Q1. The resistor R21 contributes to the stable operation of the first switch Q1, and the resistor R22 lowers the gate-source voltage _VGS of the first switch Q1 in a state where no control signal is input from the secondary driver 32 to 0V.

The resistance R23 and the resistance R24 output the voltage of the switch control signal input from the secondary driver 32, which will be described later, to the gate of the second switch Q2. The resistor R23 contributes to the stable operation of the second switch Q2, and the resistor R24 lowers the gate-source voltage _VGS of the second switch Q2 in a state where no control signal is input from the secondary driver 32 to 0V.

One end of the coil L2 is connected to a connection point (center tap) between the secondary coil L21 and L22 of the isolation transformer T, and the other end is connected to the output Vout. The capacitor C21 is connected between the output Vout and the secondary ground GND2. As a result, the coil L2 and the capacitor C21 smooth the voltage between the center tap of the isolation transformer T and the secondary side ground GND2, and output a stable output voltage Vout as an output circuit.

The first snubber circuit 21 reduces the switching surge that occurs at the timing when the first switch Q1 switches from ON to OFF. The first differentiating circuit 22 adjusts the snubber control signal output from the control device 33, which will be described later, to a voltage suitable as the base voltage of the first snubber circuit 21 and outputs the snubber control signal. The second snubber circuit 23 reduces the switching surge that occurs at the timing when the second switch Q2 switches from ON to OFF. The second differentiating circuit 24 adjusts the snubber control signal output from the control device 33, which will be described later, to a voltage suitable as the base voltage of the second snubber circuit 23, and outputs the signal.

The drive control unit 30 is a control circuit for driving and controlling the power conversion device 1 according to the present invention, and includes a primary side driver 31, a secondary side driver 32, a control device 33, and an isolator 34.

The primary side driver 31 outputs a control signal to each gate of the field effect transistors Q11 to Q14, and controls ON / OFF so that the field effect transistors Q12 and Q13 are in opposite phase with respect to the field effect transistors Q11 and Q14. As a result, the inverter circuit 10 converts the DC input voltage Vin applied to the input terminal into AC power and outputs it to the synchronous rectifier circuit 20 via the isolation transformer T.

The secondary driver 32 controls ON / OFF of the first switch Q1 and the second switch Q2 by outputting switch control signals to the gates of the first switch Q1 and the second switch Q2. More specifically, the secondary driver 32 controls the first switch Q1 and the second switch Q2 to be turned ON / OFF alternately. As a result, the synchronous rectifier circuit 20 converts the AC power input from the isolation transformer T into DC power and outputs it as an output voltage Vout.

The control device 33 is a control IC that comprehensively controls the entire power conversion device 1 by outputting control signals to the primary side driver 31 and the secondary side driver 32, and is particularly the first differentiating circuit in the present embodiment. A circuit for outputting a snubber control signal for controlling the first snubber circuit 21 and the second snubber circuit 23, respectively, is configured via the 22 and the second differentiating circuit 24. Then, the control device 33 controls a switch control signal for controlling the first switch Q1 and the second switch Q2 via the secondary side driver 32, and controls the first snubber circuit 21 and the second snubber circuit 23. The snubber control signal is output by a path independent of each other.

The isolator 34 directly insulates the connection between the two in order to control the primary side driver 31 provided on the primary side from the control device 33 provided on the secondary side.

Next, the detailed configuration of the synchronous rectifier circuit 20 will be described with reference to FIG. FIG. 2 is a circuit diagram of the first snubber circuit 21, the first differentiating circuit 22, the second snubber circuit 23, and the second differentiating circuit 24 according to the present invention.

The first snubber circuit 21 includes a first transistor TR1, a first capacitor C1, a first resistor R1, and a first diode D1. The first transistor TR1 is a PNP type bipolar transistor, and the collector and the drain of the first switch Q1 are connected to each other via the first capacitor C1. Further, in the first transistor TR1, the emitter and the secondary side ground GND2 are connected via the first resistor R1. The first diode D1 is, for example, a Schottky barrier diode, the anode is connected to the collector of the first transistor TR1, and the cathode is connected to the secondary side ground GND2.

The first snubber circuit 21 functions as a protection circuit for preventing the drain-source voltage Vds of the first switch Q1 from exceeding the withstand voltage by absorbing the switching surge generated in the first switch Q1 by the first capacitor C1. Further, the first snubber circuit 21 discharges the electric charge of the first capacitor C1 charged by the switching surge while the first transistor TR1 is ON.

The first differentiating circuit 22 includes a second capacitor C2, a second resistor R2, and a third resistor R3. One end side of the second capacitor C2 is connected to the control device 33, and the other end side is connected to the base of the first transistor TR1 via the third resistor R3. One end of the second resistance R2 is connected to the connection point between the second capacitor C2 and the third resistance R3, and the other end is connected to the secondary ground GND2.

The first differentiating circuit 22 differentiates the rectangular wave of the snubber control signal output from the control device 33 by the differentiating circuit composed of the second capacitor C2 and the second resistor R2, and limits the current by the third resistor R3. While outputting to the base of the first transistor TR1. That is, the first differentiating circuit 22 controls the first transistor TR1 of the first snubber circuit 21 to be turned on at a predetermined timing and at a predetermined period based on the control signal of the control device 33.

The second snubber circuit 23 includes a second transistor TR2, a third capacitor C3, a fourth resistor R4, and a second diode D2. The second transistor TR2 is a PNP type bipolar transistor, and the collector and the drain of the second switch Q2 are connected via the third capacitor C3. Further, in the second transistor TR2, the emitter and the secondary side ground GND2 are connected via the fourth resistor R4. The second diode D2 is, for example, a Schottky barrier diode, the anode is connected to the collector of the second transistor TR2, and the cathode is connected to the secondary side ground GND2.

The second snubber circuit 23 functions as a protection circuit for preventing the drain-source voltage Vds of the second switch Q2 from exceeding the withstand voltage by absorbing the switching surge generated in the second switch Q2 by the third capacitor C3. Further, the second snubber circuit 23 discharges the electric charge of the third capacitor C3 charged by the switching surge while the second transistor TR2 is ON.

The second differentiating circuit 24 includes a fourth capacitor C4, a fifth resistor R5, and a sixth resistor R6. One end side of the fourth capacitor C4 is connected to the control device 33, and the other end side is connected to the base of the second transistor TR2 via the sixth resistor R6. One end of the fifth resistance R5 is connected to the connection point between the fourth capacitor C4 and the sixth resistance R6, and the other end is connected to the secondary ground GND2.

The second differentiating circuit 24 differentiates the rectangular wave of the snubber control signal output from the control device 33 by the differentiating circuit composed of the fourth capacitor C4 and the fifth resistor R5, and limits the current by the sixth resistor R6. While outputting to the base of the second transistor TR2. That is, the second differentiating circuit 24 controls the second transistor TR2 of the second snubber circuit 23 to be turned on at a predetermined timing and at a predetermined period based on the control signal of the control device 33.

Subsequently, the operation of the synchronous rectifier circuit 20 will be described with reference to FIG. FIG. 3 is a timing chart showing voltage waveforms in each part of the synchronous rectifier circuit 20. Here, the operation of the second snubber circuit 23 and the second differentiating circuit 24 for reducing the switching surge of the second switch Q2 is the operation of the first snubber circuit 21 and the first differentiating circuit 22 for reducing the switching surge of the first switch Q1. It is the same as the operation. Therefore, in the following, the operation of the first snubber circuit 21 and the first differentiating circuit 22 will be described in detail, and the detailed description of the operation of the second snubber circuit 23 and the second differentiating circuit 24 will be omitted.

The control device 33 outputs a PWM signal as a switch control signal via the secondary driver 32 so that the first switch Q1 and the second switch Q2 are alternately turned on / off. That is, as shown in FIG. 3, the gate-source voltage _VGS of the first switch Q1 is a rectangular wave in which high level and low level are alternately repeated.

In the first switch Q1, the drain-source voltage _VDS is at a low level during the ON state in which the gate-source voltage _VGS is at a high level. Then, the first switch Q1 switches the drain-source voltage _VDS from the low level to the high level at the timing T1 of switching from ON to OFF, that is, at the time when the gate-source voltage _VGS switches from the high level to the low level. At the same time, a switching surge occurs at the timing T1.

At this time, in the first switch Q1, a conductive path is formed from the drain to the secondary side ground GND2 via the first capacitor C1 and the first diode D1, so that the switching surge generated at the timing T1 is excessive. The electric charge is absorbed by the first capacitor C1 of the first snubber circuit 21, whereby the rapid increase in the drain-source voltage _VDS can be alleviated, and the possibility of exceeding the withstand voltage can be reduced. Then, the first capacitor _C1 is charged by the electric charge accompanying the switching surge, so that the voltage VC1 across the ends rises from the voltage V1 to the voltage V2 before and after the timing T1.

The drain-source voltage _VDS of the first switch Q1 reaches the maximum voltage exceeding the high level due to the switching surge at the timing T1 of switching from the low level to the high level, and is attenuated to the high level voltage during the surge generation period. At this time, the control device 33 switches the snubber control signal V _CONT output to the first differentiating circuit 22 from the high level to the low level at the timing T2 after the surge generation period. Here, for example, when the decay time of the switching surge is relatively long, the time when the drain-source voltage _VDS is attenuated to a voltage equal to or less than the withstand voltage limit of the first switch Q1, or the first 1 or 2 of the voltage. The timing T2 may be set by regarding the time after the peak as the completion time of the surge generation period.

When the snubber control signal V _CONT is switched from the high level to the low level at the timing T2, the snubber control signal V _CONT is differentiated by the first differentiating circuit 22, so that the base-emitter voltage V _BE of the first transistor TR1 is set. , As shown in FIG. 3, a negative voltage will be applied. Here, during the period when the base-emitter voltage VBE is lower than the operating voltage Vth (for example, _−0.7V ) of the first transistor TR1, the first transistor TR1 is turned on. Therefore, in the first snubber circuit 21, a discharge path is formed from the secondary side ground GND2 to the drain side of the first switch Q1 via the first resistor R1, the first transistor TR1, and the first capacitor C1. The electric charge charged in the first capacitor C1 is discharged by the discharge path. As a result, the voltage across the first capacitor _C1 VC1 gradually decreases from the voltage V2. The base-emitter voltage _VBE of the first transistor TR1 gradually attenuates toward 0V in the relaxation time associated with the characteristics of the second capacitor C2.

Then, at the timing T3 in which the voltage across the first capacitor _C1 VC1 drops to the voltage V1 before the switching surge occurs, the control device 33 changes the snubber control signal V _CONT output to the first differentiating circuit 22 from low level to high level. Switch to. As a result, as shown in FIG. 3, the base-emitter voltage _VBE of the first transistor TR1 is switched to a positive voltage, and the first transistor TR1 is turned off. Along with this, the first capacitor _C1 stops discharging by interrupting the discharge path, and maintains the voltage across VC1 at the voltage V1. Here, the control device 33 stops the discharge before the timing T4 when the first switch Q1 turns from OFF to ON again.

In this way, the control device 33 controls ON / OFF with respect to the first switch Q1, and the electric charge charged in the first capacitor C1 is charged in the period other than the surge generation period in the period when the first switch Q1 is OFF. The first snubber circuit 21 is controlled so as to be discharged. At this time, since the electric charge of the first capacitor C1 to be charged and discharged is only the amount associated with the switching surge of the first switch Q1, the power consumed by the first resistance R1 can be minimized. Similarly, in the second snubber circuit 23, the electric charge of the third capacitor C3 to be charged and discharged is only the amount associated with the switching surge of the second switch Q2, so that the power consumed by the fourth resistance R4 is consumed. Can be minimized.

As a result, according to the power conversion device 1 according to the present invention, it is possible to suppress heat generation and power loss due to power consumption in reducing switching surges in the first switch Q1 and the second switch Q2.

Further, the control device 33 controls a switch control signal for controlling the first switch Q1 and the second switch Q2 via the secondary driver 32, and controls the first snubber circuit 21 and the second snubber circuit 23. The snubber control signal is output by a path independent of each other. Therefore, the power conversion device 1 makes the charging / discharging timing and period of the first capacitor C1 and the second capacitor C2 independent of the timing and period of ON / OFF control of the first switch Q1 and the second switch Q2. Can be set. Therefore, according to the power conversion device 1 according to the present invention, the operation timing and period of the first snubber circuit 21 and the second snubber circuit 23 affect the operation timing and period of the first switch Q1 and the second switch Q2. It can be easily set without being used.

Further, the control device 33 starts discharging the electric charge of the first capacitor C1 due to the switching surge, for example, at the timing T2 after the surge generation period. As a result, in the first snubber circuit 21, the discharge path including the first resistor R1, the first capacitor C1, and the first transistor TR1 is not configured in the first switch Q1 during the surge generation period, so that the first switch Q1 is charged more than necessary. It is possible to reduce the risk of discharging. Therefore, according to the power conversion device 1 according to the present invention, it is possible to reliably suppress heat generation and power loss due to the above-mentioned power consumption.

Further, the control device 33 ends the discharge of the first capacitor C1 at the timing T3, for example, before the timing T4 when the first switch Q1 switches from OFF to ON. As a result, the first snubber circuit 21 does not form a discharge path for the first switch Q1 whose drain-source voltage _VDS has dropped to a low level, so that the charge of the first capacitor C1 is discharged more than necessary. It is possible to reduce the risk of the discharge. Therefore, according to the power conversion device 1 according to the present invention, it is possible to more reliably suppress heat generation and power loss due to the above-mentioned power consumption.

The waveform of the switching surge, the surge voltage, and the discharge speed of the first capacitor C1 are substantially constant with respect to the circuit characteristics of the power conversion device 1. Therefore, by acquiring the operation data of the power conversion device 1 in advance, it is possible to appropriately set the switching timing (T2 and T3) of the snubber control signal V _CONT output from the control device 33.

Although the description of the embodiment is completed above, the present invention is not limited to the above-described embodiment. For example, in the above embodiment, the synchronous rectifier circuit 20 is exemplified as the circuit configuration on the secondary side, but a circuit configuration using a full bridge or a half bridge may be adopted.

1 Power converter 10 Inverter circuit 20 Synchronous rectifier circuit 21 1st snubber circuit 22 1st differential circuit 23 2nd snubber circuit 24 2nd differential circuit 30 Drive control unit 31 Primary side driver 32 Secondary side driver 33 Control device 34 Isolator T Insulated transformers Q11 to Q14 Electric circuit effect transistors L1, L2 Coil C11, C21 Capacitors Q1 to Q2 1st to 2nd switches R21 to R24 Resistance TR1 to TR2 1st to 2nd transistors R1 to R6 1st to 6th resistors C1 to C4 1st to 4th capacitors D1 to D2 1st to 2nd diodes

Claims (3)

Switching element and
A transistor to which a collector is connected to one end side of the switching element via a first capacitor, a first resistor connected between the emitter and ground of the transistor, and an anode connected to the collector of the transistor to ground. With a diode connected to the cathode, and a snubber circuit, including
A differentiating circuit including a second capacitor whose one end side is connected to the base of the transistor and a second resistor connected between one end side of the second capacitor and ground.
A control device that outputs a switch control signal for controlling the switching element and outputs a snubber control signal to the other end side of the second capacitor is provided.
The transistor discharges the electric charge of the first capacitor as much as it is charged by the switching surge of the switching element.
The transistor is a power conversion device that starts discharging the first capacitor after a surge generation period of the switching element . The power conversion device according to claim 1, wherein the switch control signal and the snubber control signal are output from the control device by paths independent of each other. The power conversion device according to claim 1 or 2 , wherein the transistor ends the discharge of the first capacitor before the switching element is switched from OFF to ON.

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