JP6870353B2 - Electronic clock - Google Patents

Description

The present invention relates to an electronic clock having a pointer such as an analog clock.

Among analog electronic clocks that drive a pointer, an electronic clock having a pointer position detecting device for detecting the position of the pointer is known (for example, Patent Document 1).
The pointer position detecting device generally detects that the pointer is in a specific position.

At this time, in order to prevent erroneous detection by the pointer position detection device, it is preferable to perform position detection after the rotation of the rotor of the step motor that drives the pointer has stopped. Therefore, in Patent Document 1, the pointer position detection device is operated after a predetermined time t1 elapses after the motor drive pulse is output to the step motor (paragraph 0043 of Patent Document 1).

Japanese Unexamined Patent Publication No. 2006-284444

However, in order to realize such control, it is necessary to count the elapse of a predetermined time from the output of the immediately preceding motor drive pulse. In particular, in a CPU-type electronic clock that executes various processes by a CPU (central processing unit), the elapsed time after the output of the motor drive pulse is counted by the software process, so that a complicated software process is required.
Further, since the elapsed time is counted by software processing, it is difficult to easily change the predetermined time. For this reason, it is necessary to set the predetermined time to a relatively long time so as not to malfunction even under the worst conditions in consideration of variations among electronic clock products, environmental conditions, changes over time, etc., and the pointer position detection process is completed. There is also the problem that it takes a long time to do so.
Such a problem is not limited to the pointer position detection process, but is a common problem in the process of detecting and executing the rotation stop of the motor.

A first object of the present invention is to provide an electronic clock capable of shortening the time required to detect a stopped rotation state of a rotor of a motor.
A second object of the present invention is to provide an electronic clock capable of shortening the time required to detect a stopped rotation state of a rotor of a motor and simplifying software processing.

The electronic clock of the present invention generates a pointer, a motor that drives the pointer, a motor drive circuit that is connected to the coil of the motor and outputs a motor drive pulse, and a coil of the motor after the output of the motor drive pulse. A detection means that detects the reverse induced voltage and outputs a detection signal, and a rotation end notification means that outputs a rotation end notification signal when the detection signal is not continuously output for a predetermined period from the detection means. It is characterized by being prepared.

According to the present invention, the detection means detects the reverse induced voltage generated in the coil of the motor and outputs a detection signal. After applying the short brake by shorting the motor coil, the rotor damped and vibrates, so that the reverse induced voltage gradually decreases. Therefore, if the detecting means cannot continuously detect the reverse induced voltage of a predetermined level or higher for a predetermined period, that is, if the detecting means does not continuously output the detection signal for a predetermined period, the rotor is in the stopped state. The determination can be made, and the rotation end notification means outputs a rotation end notification signal.
Therefore, according to the present invention, it is possible to detect that the rotor is actually stopped by detecting the reverse induced voltage with the detecting means. Then, since the rotor stop state is actually detected, environmental conditions such as product variation and temperature, as in the case of determining the rotor stop state when a predetermined time has elapsed after the conventional motor drive pulse output. , It is not necessary to set the predetermined time longer in consideration of changes over time. Therefore, the stop of the motor can be detected in a short time without malfunction, and the processing performed after the rotor is stopped can be executed with the shortest waiting time.

In the electronic clock of the present invention, the motor drive circuit includes an output terminal connected to the coil, and the detection means alternately switches the output terminal between a short state and a high impedance state to amplify a reverse induced voltage. It is preferable to provide a chopper amplification means.

According to the present invention, since the chopper amplification means for alternately switching the output terminal of the motor drive circuit connected to the coil of the motor between the short state and the high impedance state is provided, the reverse induced voltage can be amplified. The detection accuracy of the detection means can be improved.

In the electronic clock of the present invention, it is preferable that the motor drive circuit includes a plurality of output terminals connected to the coil, and the detection means is provided at each of the plurality of output terminals.

The reverse induced voltage generated in the coil of the motor is generated in both forward and reverse directions due to the damped vibration when the rotor is stopped. Therefore, if detection means are provided at each of the plurality of output terminals of the motor drive circuit, all the reverse induced voltages generated in both the forward and reverse directions can be detected, so that the detection accuracy of the detection means can be improved.

The electronic clock of the present invention includes a CPU for controlling the electronic clock, and the rotation end notification means is preferably an interrupt generation circuit that outputs an interrupt signal, which is the rotation end notification signal, to the CPU. ..

The control CPU can detect that the rotation of the rotor has been completed by the interrupt signal from the rotation end notification means configured by the interrupt generation circuit, that is, that the rotor has been stopped. Therefore, the software processing of the CPU can be simplified and the load on the CPU can be reduced as compared with the case where the CPU counts the elapsed time after the output of the motor drive pulse.

The electronic clock of the present invention preferably includes a hand position detecting means for detecting the position of the pointer and a control means for operating the hand position detecting means after the output of the rotation end notification signal.

According to the present invention, since the needle position detection process can be executed by the needle position detecting means after the rotation end notification signal is output, the needle position can be detected after the rotor is surely stopped, and the needle position detection accuracy can be improved. Can be improved. Further, since the rotation stop state can be detected in a short time, the needle position detection process executed after the rotation stop can be executed with the shortest waiting time.

The electronic clock of the present invention includes a pointer, a motor for driving the pointer, a motor drive circuit connected to a coil of the motor to output a motor drive pulse, a CPU for controlling the electronic clock, and the motor drive pulse. The time lapse notification means for outputting the time lapse notification signal after the elapse of a predetermined time is provided, and the time lapse notification means is an interrupt for outputting the interrupt signal which is the time lapse notification signal to the CPU. It is characterized by being a generation circuit.

According to the present invention, the control CPU can detect that the rotation of the rotor has been stopped by the interrupt signal from the time lapse notification means configured by the interrupt generation circuit. Therefore, the software processing of the CPU can be simplified and the load on the CPU can be reduced as compared with the case where the CPU counts the elapsed time after the output of the motor drive pulse.
Further, it is not necessary to provide an analog circuit such as a comparator for detecting the reverse induced voltage, and the time lapse notification means includes a register for setting a predetermined time, a counter for which a count signal is input and up-counted, and a register and a counter. It can be easily configured only with a logic circuit such as a comparator that compares. Therefore, in the time lapse notification means, even when the predetermined time is changed, it can be easily set only by changing the set value of the register. Therefore, the predetermined time can be changed according to product variations, environmental conditions such as temperature, changes over time, and the time required to detect the rotation stop state of the rotor of the motor can be shortened.

In the electronic clock of the present invention, it is preferable to include a control means for changing the time until the time lapse notification means outputs the time lapse notification signal depending on the type or constant of the motor drive pulse.

According to the present invention, even if the motor drive method changes depending on the type of motor drive pulse or the constant (parameters such as duty) of the motor drive pulse changes, the control means responds to the time lapse notification signal. Since the time until the time lapse notification signal is output is changed, the waiting time until the time lapse notification means outputs the time lapse notification signal can be optimized.
For example, there are a plurality of types of motor drive pulses, such as a normal rectangular pulse and a comb tooth pulse for driving a chopper. In addition, there are a drive pulse that is output during normal drive and a correction pulse that is output during non-rotation during normal drive. Since the time until the rotation of the motor stops changes depending on the type of these motor drive pulses, if the time is changed according to the type of these pulses, the waiting time until the time lapse notification signal is output is optimized. it can. Similarly, if the constant of the motor drive pulse is different, the time until the motor stops also changes. Therefore, if the time is changed according to the constant, the waiting time until the time lapse notification signal is output can be optimized.

The electronic clock of the present invention is a control that changes the voltage detection circuit that detects the voltage of the power supply and the time until the time lapse notification means outputs the time lapse notification signal by the voltage value detected by the voltage detection circuit. It is preferable to provide means.

The time until the motor stops is affected by the voltage of the power supply because it also changes depending on the power of the motor drive pulse. According to the present invention, even if the voltage of the power supply fluctuates, the control means changes the time until the time elapse notification signal is output in response to the fluctuation of the voltage. The waiting time until the output can be optimized.

In the electronic clock of the present invention, it is preferable to include a hand position detecting means for detecting the position of the pointer and a control means for operating the hand position detecting means after the output of the time lapse notification signal.

According to the present invention, since the needle position detection process can be executed by the needle position detecting means after the rotation end notification signal is output, the needle position can be detected after the rotor is surely stopped, and the needle position detection accuracy can be improved. Can be improved. Further, since the rotation stop state can be detected in a short time, the needle position detection process executed after the rotation stop can be executed with the shortest waiting time.

The front view which shows the electronic clock of 1st Embodiment of this invention. The circuit diagram which shows the circuit structure of the electronic clock. The block diagram which shows the structure of IC of the electronic clock. The block diagram which shows the structure of the motor drive circuit, the rotation stop detection circuit, and the interrupt generation circuit of the electronic timepiece. The flowchart explaining the hand movement process of the electronic timepiece. A timing chart showing the operation of detecting the stop rotation of the electronic clock and detecting the position of the hands. The flowchart explaining the rotation stop interrupt process of the electronic timepiece. The block diagram which shows the structure of the IC of the electronic timepiece of the 2nd Embodiment of this invention. The block diagram which shows the structure of the motor drive circuit and the interrupt generation circuit of 2nd Embodiment. The flowchart explaining the hand movement process of 2nd Embodiment. A timing chart showing the operation of detecting the rotation stop and the operation of detecting the needle position according to the second embodiment. The flowchart explaining the rotation stop interrupt processing of 2nd Embodiment.

[First Embodiment]
Hereinafter, the electronic clock 1 according to the first embodiment of the present invention will be described with reference to the drawings.
The electronic clock 1 is a radio wave correction clock capable of receiving standard radio waves, acquiring time information, and correcting the display time. As shown in FIG. 1, the electronic watch 1 is a wristwatch worn on the wrist of a user, and is provided in an outer case 2, a disc-shaped dial 3, a movement (not shown), and inside the movement. It includes a second hand 5, a minute hand 6, an hour hand 7, which is a pointer driven by a motor, and a crown 8 and a button 9 which are operating members.

[Circuit configuration of electronic clock]
As shown in FIG. 2, the electronic watch 1 includes a crystal oscillator 11 as a signal source, a battery 12 as a power source, a switch S1 which is turned on and off in conjunction with the operation of a button 9, and a crown 8. It includes a switch S2 that is turned on and off in conjunction with a pull-out, a motor 13, a light emitting diode 14, a phototransistor 15, a resistor 16, a receiving IC 17, an antenna 18, and an IC 20 for a clock.
The IC 20 includes connection terminals OSC1 and OSC2 to which the crystal oscillator 11 is connected, input / output terminals P1 and P2 to which the switches S1 and S2 are connected, power supply terminals VDD and VSS to which the battery 12 is connected, and a motor 13. Output terminals O1 and O2 connected to the coil, input / output terminals P3, P4, P5 to which the light emitting diode 14, phototransistor 15, and resistor 16 are connected, and input / output terminals P6, P7, P8 to which the receiving IC 17 is connected. , P9.
In this embodiment, the positive electrode of the battery 12 is connected to the power supply terminal VDD on the high potential side, the negative electrode is connected to the power supply terminal VSS on the low potential side, and the power supply terminal VDD on the high potential side is grounded (reference). Potential) is set.

The crystal oscillator 11 is driven by an oscillation circuit 21 described later to generate an oscillation signal having a predetermined frequency (32768 Hz).
The battery 12 is composed of a primary battery or a secondary battery. In the case of a secondary battery, it is charged by a solar cell or the like (not shown).
The motor 13 is a two-pole step motor, and is driven by motor drive pulses (drive signals 1 and 2 described later) output from the IC 20.
Further, the second hand 5, the minute hand 6, and the hour hand 7 are interlocked with each other by a train wheel (not shown), and are driven by a motor 13 to display seconds, minutes, and hours. In the present embodiment, one motor 13 drives the second hand 5, the minute hand 6, and the hour hand 7. For example, a motor that drives the second hand 5 and a motor that drives the minute hand 6 and the hour hand 7. May be provided with a plurality of motors.

The switch S1 is input in conjunction with the button 9 at the 2 o'clock position of the electronic clock 1. For example, the switch S1 is turned on when the button 9 is pressed and turned off when the button 9 is not pressed. ..
The switch S2 is a slide switch linked to the drawer of the crown 8. In the present embodiment, the crown 8 is turned on when it is pulled out to the first stage, and is turned off when it is pulled out to the 0th stage.
In the present embodiment, when the crown 8 is pulled out to the first stage (switch S2 is on), functions such as manual time adjustment are executed, and the motor 13 is turned on by pressing the button 9 to turn on the switch S1. Is driven to correct the hand positions of the second hand 5, the minute hand 6, and the hour hand 7.

The light emitting diode 14 and the phototransistor 15 are a train wheel connecting the motor 13 and the second hand 5, the minute hand 6, and the hour hand 7 when the second hand 5, the minute hand 6, and the hour hand 7 are at the positions of 0:00:00. The light generated from the light emitting diode 14 is arranged so as to be received by the phototransistor 15 through the hole formed in the light emitting diode 14. Therefore, the light emitting diode 14, the phototransistor 15, and the resistor 16 constitute the needle position detecting means.

Since the receiving IC 17 and the antenna 18 are common in a radio wave correction clock that receives a predetermined standard radio wave such as JJY or WWVB and acquires time information, the description thereof will be omitted.

[IC circuit configuration]
As shown in FIG. 3, the IC 20 includes an oscillation circuit 21, a frequency dividing circuit 22, a CPU (Central Processing Unit) 23 for controlling the electronic clock 1, a ROM (Read Only Memory) 24, and the like. It includes a RAM (Random Access Memory) 25, an input / output circuit 26, a bus (BUS) 27, a motor drive circuit 30, a rotation stop detection circuit 40, and an interrupt generation circuit 50.

The oscillation circuit 21 oscillates the crystal oscillator 11 which is a reference signal source at high frequency, and outputs the oscillation signal of 32768 Hz generated by this high frequency oscillation to the frequency dividing circuit 22.
The frequency dividing circuit 22 divides the output of the oscillation circuit 21 and supplies a timing signal (clock signal) to the CPU 23.
The ROM 24 stores various programs executed by the CPU 23. In the present embodiment, the ROM 24 stores a program for realizing a basic clock function, a hand position detection function, a radio wave correction function, and the like.
The RAM 25 stores information necessary for executing a program on the CPU 23.
The CPU 23 executes the program stored in the ROM 24 and realizes each of the above functions.

The input / output circuit 26 outputs the states of the input / output terminals P1 to P9 to the bus 27.
The bus 27 is used for data transfer between the CPU 23, the RAM 25, the input / output circuit 26, the motor drive circuit 30, and the interrupt generation circuit 50.

The motor drive circuit 30 outputs a predetermined drive pulse by a command input from the CPU 23 through the bus 27.
The rotation stop detection circuit 40 detects the rotation state of the motor 13 and detects that the rotation of the motor 13 has ended (rotation has stopped).
When the interrupt generation circuit 50 determines that the rotation of the motor 13 has ended (rotation has stopped) by the output of the rotation stop detection circuit 40, the interrupt generation circuit 50 generates an interrupt signal which is a rotation end notification signal and outputs the interrupt signal to the CPU 23. Therefore, in the present embodiment, the rotation end notification means is composed of the interrupt generation circuit 50.

Next, a specific configuration of the motor drive circuit 30, the rotation stop detection circuit 40, and the interrupt generation circuit 50 will be described with reference to FIG.

[Motor drive circuit]
The motor drive circuit 30 includes a pulse generation circuit 31, four field effect transistors 321, 322, 323, 324, two NOT circuits 331, 332, and three OR circuits 341, 342, and 343. ..

The pulse generation circuit 31 alternately outputs a drive signal 1 and a drive signal 2 which are motor drive pulses by a command input from the CPU 23 via the bus 27. Further, when the rotation detection is permitted by the command from the CPU 23, the pulse generation circuit 31 interlocks the rotation detection signal 1, the rotation detection signal 2, and the count signal with the outputs of the drive signal 1 and the drive signal 2. And output.

The field-effect transistors 321 and 323 are P-channel transistors, and the field-effect transistors 322 and 324 are N-channel transistors.
The field effect transistors 321 and 322 are connected in series between the high potential (VDD) and the low potential (VSS), and the transistors 321 and 322 are connected to the output terminal O1.
Then, the rotation detection signal 1 is input to the NOT circuit 331, and the drive signal 1 and the output signal of the NOT circuit 331 are input to the OR circuit 341. The output of the OR circuit 341 is connected to the gate of the transistor 321. Further, the drive signal 1 is input to the gate of the field effect transistor 322.

The field effect transistors 323 and 324 are connected in series between the high potential (VDD) and the low potential (VSS), and the transistors 323 and 324 are connected to the output terminal O2.
Then, the rotation detection signal 2 is input to the NOT circuit 332, and the drive signal 2 and the output signal of the NOT circuit 332 are input to the OR circuit 342. The output of the OR circuit 342 is connected to the gate of the transistor 323. Further, the drive signal 2 is input to the gate of the field effect transistor 324.

The drive signal 1 and the drive signal 2 are input to the OR circuit 343, and the output signal of the OR circuit 343 is output to the interrupt generation circuit 50.

[Rotation stop detection circuit]
The rotation stop detection circuit 40 includes a reference voltage generation circuit 41, two field effect transistors 421 and 422, two resistors 431 and 432, two comparators 441 and 442, and one OR circuit 45. ing.
The reference voltage generation circuit 41 generates a reference voltage used for determining whether or not the rotation of the motor 13 has stopped. The reference voltage generation circuit 41 is connected to the positive terminals of the comparators 441 and 442.
In the field effect transistor 421, a rotation detection signal 1 output from the motor drive circuit 30 is input to the gate, and the rotation detection signal 1 turns on and off between the drain and the source. As a result, the field-effect transistor 421 functions as a chopper amplification means that alternately switches the output terminal O1 between a short state and a high impedance state by the rotation detection signal 1 and amplifies the reverse induced voltage generated at the output terminal O1. To do.
Similarly, in the field effect transistor 422, the rotation detection signal 2 is input to the gate from the motor drive circuit 30, and the drain and source are turned on and off by the rotation detection signal 2, so that the output terminal O2 is shorted and high. It functions as a chopper amplification means that amplifies the reverse induced voltage generated in the output terminal O2 by alternately switching to the impedance state.
The detection resistors 431 and 432 are provided to limit the value of the reverse induced voltage.

In the comparator 441, the reference voltage generation circuit 41 is connected to the + input terminal, and the output terminal O1 is connected to the − input terminal. Similarly, in the comparator 442, the reference voltage generation circuit 41 is connected to the + input terminal, and the output terminal O2 is connected to the − input terminal. Therefore, each of the comparators 441 and 442 compares the reverse induced voltage generated by the motor coil with the reference voltage, and outputs an H level signal when the reverse induced voltage exceeds the reference voltage.

The output signals of the comparators 441 and 442 are input to the OR circuit 45, and the output signals of the OR circuit 45 are input to the interrupt generation circuit 50. The output signal of the OR circuit 45 is a rotation detection result signal that becomes H level when the reverse induced voltage exceeds the reference voltage in any of the comparators 441 and 442.
Therefore, the rotation stop detection circuit 40 is a detection means that detects the reverse induced voltage generated in the coil of the motor 13 and outputs a detection signal (rotation detection result signal output from the OR circuit 45).

[Interrupt generator circuit]
The interrupt generation circuit 50 includes an OR circuit 51, a counter 52, a comparator 53, a register 54, and a differentiating circuit 55.
In the OR circuit 51, the output signal of the OR circuit 343 of the motor drive circuit 30 and the output signal of the OR circuit 45 of the rotation stop detection circuit 40 are input.
The count signal from the pulse generation circuit 31 is input to the clock input terminal CL of the counter 52, and the output signal of the OR circuit 51 is input to the reset terminal R.
A predetermined value (for example, "5") is set in the register 54 by an instruction from the CPU 23. The value set in the register 54 can be changed depending on the type of the motor 13, the second hand 5, the minute hand 6, the hour hand 7, and the like.

The comparator 53 compares the value of the counter 52 with the value of the register 54, and outputs a matching signal to the differentiating circuit 55 when they match.
When the matching signal is input, the differentiating circuit 55 outputs an interrupt signal to the CPU 23.

[Operation of electronic clock]
Next, the operation during normal hand movement in this embodiment will be described with reference to the flowchart of FIG.
When an interrupt of 1 Hz (every 1 second) occurs due to the output of the reference signal from the frequency dividing circuit 22, the CPU 23 sets the internal time to 0:00:00 when the hand position detection is executed, as shown in FIG. Check if there is any (step S1). The internal time is counted by a reference signal of 1 Hz, and when the time information is acquired by the receiving IC 17, the internal time is clocked by an internal time counter that is updated with the acquired time information.
Here, if the internal time is not 0:00:00, the CPU 23 determines NO in step S1 and instructs the pulse generation circuit 31 to output the motor drive pulse required for normal time display ( Step S2). As a result, the second hand 5, the minute hand 6, and the hour hand 7 move for one second, and the time of the internal time is indicated by the pointer.

On the other hand, if the internal time is 0:00:00, the CPU 23 sets the numerical value "5" in the register 54 of the interrupt generation circuit 50 (step S3). This value can also be changed according to the motor 13, the mechanism, and the like.
Next, the CPU 23 outputs a command to the pulse generation circuit 31, permits rotation stop detection (step S4), and outputs a motor drive pulse (step S5). As a result, the second hand 5, the minute hand 6, and the hour hand 7 move for 1 second to indicate 0:00:00.

The operation after the output of the motor drive pulse will be described with reference to the timing chart of FIG.
FIG. 6 is an example in which the pulse generation circuit 31 outputs an H level signal having a predetermined pulse width as the drive signal 1 in step S5.
In the motor drive circuit 30 and the rotation stop detection circuit 40 of the present embodiment, the drive signals 1 and 2 are normally L-level signals and H-level signals when the motor 13 is driven. Further, the motor 13 is a two-pole step motor, and the drive signals 1 and 2 alternately output H level signals every second. Therefore, FIG. 6 shows an example in which the drive signal 2 is output at the time of hand movement at 23:59:59 and then the hand is moved at 0:00:00.
The rotation detection signals 1 and 2 are normally at the H level, and are signals that become the L level when detecting the rotation stop. Further, the rotation detection result signal output from the OR circuit 45 is normally at the L level, and is a signal that becomes the H level when the rotation of the rotor of the motor 13 is detected.

Here, when the H-level drive signal 1 is output from the pulse generation circuit 31, the output signal of the OR circuit 343 becomes the H level, and the output signal of the OR circuit 51 also becomes the H level, so that the counter 52 is reset. The count value of the counter 52 is "0". Since the value of the register 54 is "5", when the counter value becomes "0", the counter value and the register value do not match, and the matching signal of the comparator 53 changes to the L level indicating the mismatch. In this case, no interrupt signal is output from the differentiating circuit 55.

When the H-level drive signal 1 is output, the drive signal 2 is at the L level, and the rotation detection signals 1 and 2 are maintained at the H level. Therefore, the output of the OR circuit 341 becomes the H level, and the OR circuit The output of 342 is maintained at the L level. Therefore, the gate inputs of the transistors 321 and 322 are at the H level, and the gate inputs of the transistors 323 and 324 are at the L level. Therefore, the transistors 321 and 324 are turned off, the transistors 322 and 323 are turned on, the output terminal O2 is connected to the VDD side to be H level, and the output terminal O1 is connected to the VSS side to be L level.

Then, when the drive signal 1 returns to the L level, the transistor 321 is switched from off to on, and the transistor 323 is switched from on to off. Therefore, the output terminals O1 and O2, that is, both ends of the motor coil are connected to the ground potential to be in a short-circuit state, and a short brake is applied to the rotor.

Next, the CPU 23 outputs a motor drive pulse in step S5, then outputs a command to the pulse generation circuit 31, and outputs a count signal and rotation detection signals 1 and 2 (step S6). The pulse generation circuit 31 outputs a count signal at regular time intervals. Since this count signal is input to the clock input terminal CL of the counter 52, the counter 52 is up-counted with the count signal until the H level signal is input to the reset terminal R.
The pulse generation circuit 31 alternately outputs L-level rotation detection signals 1 and 2. In the example of FIG. 6, since the drive signal 1 is output and the output terminal O2 becomes H level, the rotation detection signal 2 is output first, then the rotation detection signal 1 is output, and then alternately output. To. Further, the count signal is output at a timing between the rotation detection signal 1 and the rotation detection signal 2.

When the rotation detection signal 2 reaches the L level, the output of the NOT circuit 332 changes to the H level, and the output of the OR circuit 342 also changes to the H level. Therefore, the N-channel transistor 323 is turned off. The P-channel transistor 324 connected to the output terminal O2 is kept off because the drive signal 2 is at the L level, and the motor driving transistors 323 and 324 connected to the output terminal O2 are both turned off. ..
At the same time, the N-channel transistor 422 connected to the detection resistor 432 on the output terminal O2 side is turned on because the rotation detection signal 2 input to the gate becomes L level. Therefore, the output terminal O2 is in a high impedance state, and a detection voltage waveform in which the reverse induced voltage of the motor coil is chopper-amplified is generated at the output terminal O2.

Similarly, when the rotation detection signal 1 reaches the L level, the output of the NOT circuit 331 changes to the H level, and the output of the OR circuit 341 also changes to the H level. Therefore, the N-channel transistor 321 is turned off. The P-channel transistor 323 connected to the output terminal O1 is kept off because the drive signal 1 is at the L level, and the motor driving transistors 321 and 322 connected to the output terminal O1 are both. Turns off.
At the same time, the N-channel transistor 421 connected to the detection resistor 431 on the output terminal O1 side is turned on because the rotation detection signal 1 input to the gate becomes L level. Therefore, the output terminal O1 is in a high impedance state, and a detection voltage waveform in which the reverse induced voltage of the motor coil is chopper-amplified is generated at the output terminal O1.

The detection voltage waveforms generated at the output terminals O1 and O2 are input to the comparators 441 and 442, respectively, and are compared with the reference voltage of the reference voltage generation circuit 41. In this embodiment, since the VDD side is set to ground, the reference voltage is set to a voltage lower than the normal state, and when the detected voltage exceeds this reference voltage (when the voltage becomes lower). Outputs a rotation detection result signal (H level signal) indicating that rotation has been detected from the comparators 441 and 442. Therefore, the OR circuit 45 outputs an H-level rotation detection result signal indicating that the rotor is rotating when the detection voltage exceeds the reference voltage in either the comparators 441 or 442.

The outputs of the OR circuit 343 and the OR circuit 45 are input to the reset terminal R of the counter 52 via the OR circuit 51. Therefore, the counter 52 receives the H-level rotation detection result signal when either of the H-level drive signals 1 and 2 is output and when the detection voltage exceeds the reference voltage by either the comparators 441 or 442. If it is output, it will be reset.
Therefore, even if the rotation detection signal 1 or the rotation detection signal 2 is output, the state in which the detection voltage does not exceed the reference voltage continues five times in a row, that is, when the rotation detection result signal is not output continuously for a predetermined period. In addition, the counter value of the counter 52 becomes "5".
When the counter value of the counter 52 becomes “5”, it becomes the same value as the set value of the register 54, so that the H level matching signal is output from the comparator 53.
When the match signal is output, a differential pulse that becomes an interrupt signal is output to the CPU 23 through the differentiating circuit 55, and a rotation stop interrupt is generated in the CPU 23. Therefore, for example, if the count signal is 1024 Hz, the predetermined period until the counter value becomes "5" is 1000 ms x 5/1024 = about 5 ms, and the rotation detection result signal is not output for about 5 ms. In that case, a rotation stop interrupt is generated in the CPU 23.

Therefore, as shown in FIG. 5, the CPU 23 continues to output the count signal and the rotation detection signals 1 and 2 in step S6 until the counter value matches the register value (NO in step S7).
On the other hand, when the counter value matches the register value (YES in step S7), the CPU 23 can determine that the rotor of the motor 13 has stopped, and therefore executes the rotation stop interrupt process shown in FIG. 7 (step S10).

[Rotation stop interrupt processing]
Next, the process when the rotation stop interrupt in step S10 occurs will be described with reference to FIG. 7.
When the rotation stop interrupt occurs, the CPU 23 sets the input / output terminals P3 and P5 of the IC 20 to the L level, as shown in FIG. 6 (step S11).
By setting the input / output terminal P3 to the L level, a current flows through the light emitting diode 14 to emit light. At this time, if the hands of the second hand 5, the minute hand 6, and the hour hand 7 are at the position of 0:00:00, the light reaches the phototransistor 15 through the holes formed in the train wheel, so that the current reaches the phototransistor 15. Flows and the input / output terminal P4 becomes the same L level as P5.
On the other hand, when the light does not reach the phototransistor 15, no current flows through the phototransistor 15, so that the input / output terminal P4 does not reach the L level but is maintained at the H level.

Therefore, the CPU 23 determines whether or not the input / output terminal P4 is at the L level (step S12). Then, when the input / output terminal P4 is at the L level (YES in step S12), it can be determined that the hand position is at 0:00:00, so the CPU 23 prohibits the rotation stop detection (step S13). Rotation stop interrupt processing ends.

On the other hand, if the input / output terminal P4 is at H level, the pointer is not at the 0:00:00 position, so the CPU 23 does not prohibit rotation detection and further sends a motor drive pulse (drive signal 1 or drive signal 2). It outputs and drives the motor 13. After that, the CPU 23 outputs a count signal and a rotation detection signal (step S15), determines whether the counter value and the register value match (step S16), and steps S16, as in steps S6 and S7 of FIG. Then, steps S15 and S16 are repeated until the counter value and the register value match.
Then, when the counter value and the register value match, an interrupt signal is output from the interrupt generation circuit 50, so that the CPU 23 re-executes the rotation stop interrupt process from step S11. At this time, the output of the motor drive pulse in step S14 is repeated in a short time of about several tens of ms until it is determined to be YES in S12, and the pointer is fast-forwarded. Then, every time the pointer moves for one second, the rotation stop of the rotor is detected and the position detection process of the pointer is executed. Then, when the CPU 23 determines YES in step S12 and detects that the pointer has moved to the 0:00:00 position, the rotation stop interrupt process ends, and the process of FIG. 5 also ends.
As a result, the internal time measured by the internal time counter matches the time indicated by the second hand 5, the minute hand 6, and the hour hand 7, and the indicated time is automatically corrected.

[Effect of the first embodiment]
According to the first embodiment, by detecting the reverse induced voltage in the rotation stop detection circuit 40, the needle position can be detected immediately after the rotation of the motor 13 (rotor) is actually stopped, so that the needle position can be detected. Can be executed with the shortest waiting time.
Further, since the needle position detection is executed after the rotation of the motor 13 actually stops, the needle position detection is performed even if the time required for the motor 13 to stop changes due to a voltage change, a temperature change, a time change, or the like. The process is unaffected. Therefore, even if the time until the motor 13 stops due to a voltage change, a temperature change, a time change, or the like changes, it is possible to prevent erroneous detection of the needle position and improve the detection accuracy.

The output terminals O1 and O2 of the motor drive circuit 30 connected to the coil of the motor 13 are provided with transistors 421 and 422 and resistors 431 and 432 that function as chopper amplification means for alternately switching between a short state and a high impedance state. Therefore, the reverse induced voltage can be amplified, and the detection accuracy in the rotation stop detection circuit 40 can be improved.

Since the rotation stop detection circuit 40 is provided with a configuration for detecting the reverse induced voltage on both the output terminals O1 and O2, it is possible to detect all the reverse induced voltages generated in both the forward and reverse directions, and the rotation stop detection circuit 40. The detection accuracy at 40 can be improved.

Further, since the needle position detection process is executed by the CPU 23 by the interrupt signal from the interrupt generation circuit 50, the CPU 23 does not need to take timing by software, the software process is simplified, and the load on the CPU 23 can be reduced. ..

[Second Embodiment]
Next, the second embodiment of the present invention will be described with reference to FIGS. 8 to 12.
In the second embodiment, the rotation stop state is determined after a predetermined time has elapsed after the output of the motor drive pulse without detecting the rotation stop of the motor 13, and the timing at the time when the predetermined time has elapsed is determined by software. It is performed by generating an interrupt without performing processing.
Therefore, as shown in FIG. 8, the IC 20A of the second embodiment is provided with the power supply voltage detection circuit 60 without the rotation stop detection circuit 40 with respect to the IC 20 of the first embodiment. The configuration of the motor drive circuit 30A and the interrupt generation circuit 50A is different from that of the first embodiment. Since other configurations are the same as those in the first embodiment, the same reference numerals are given and the description thereof will be omitted or simplified.

That is, the IC 20A includes an oscillation circuit 21, a frequency dividing circuit 22, a CPU 23, a ROM 24, a RAM 25, an input / output circuit 26, a bus 27, a motor drive circuit 30A, an interrupt generation circuit 50A, and a power supply voltage detection circuit 60.
The oscillation circuit 21, the frequency dividing circuit 22, the CPU 23, the ROM 24, the RAM 25, the input / output circuit 26, and the bus 27 have the same configurations as those in the first embodiment.
The interrupt generation circuit 50A generates an interrupt signal when a predetermined time elapses after the output of the motor drive pulse.
The power supply voltage detection circuit 60 determines whether the power supply voltage is higher or lower than a predetermined value by a command from the CPU 23.

FIG. 9 shows a specific configuration of the motor drive circuit 30A and the interrupt generation circuit 50A. In the motor drive circuit 30A and the interrupt generation circuit 50A, the same components as those of the motor drive circuit 30 and the interrupt generation circuit 50 of the first embodiment are designated by the same reference numerals, and the description thereof will be omitted or simplified.

The motor drive circuit 30A includes a pulse generation circuit 31, N-channel transistors 321 and 323, P-channel transistors 322 and 324, and an OR circuit 343.
Similar to the first embodiment, the transistors 321 and 322 are connected to the output terminal O1, and the transistors 323 and 324 are connected to the output terminal O2.
The pulse generation circuit 31 alternately outputs the drive signal 1 and the drive signal 2 in response to a command input from the CPU 23. Further, when the output of the count signal is permitted by the command from the CPU 23, the pulse generation circuit 31 outputs the count signal in conjunction with the output of the drive signal 1 and the drive signal 2.

When the drive signal 1 is H level and the drive signal 2 is L level, the transistors 322 and 323 are turned on, the transistors 321 and 324 are turned off, the output terminal O2 is H level (ground potential), and the output terminal O1 is L level ( VSS). On the contrary, when the drive signal 1 is at the L level and the drive signal 2 is at the H level, the output terminal O1 is at the H level and the output terminal O2 is at the L level.
Further, the OR circuit 343 outputs an H level signal when the drive signal 1 or the drive signal 2 reaches the H level.

Like the interrupt generation circuit 50, the interrupt generation circuit 50A includes a counter 52, a comparator 53, a register 54, and a differentiating circuit 55.
A count signal is input from the pulse generation circuit 31 to the clock input terminal CL of the counter 52, and an output signal of the OR circuit 343 is input to the reset terminal R. Therefore, the counter 52 is reset when the drive signal 1 or the drive signal 2 is output, and then the count signal is counted up by being input to the clock input terminal CL.
The register 54 is set to a predetermined value by an instruction from the CPU 23. The CPU 23 sets the value of the register 54 to the first set value (for example, "29") when the power supply voltage VDD is larger than the predetermined value V1 in the power supply voltage detection circuit 60, and the second setting when the value is equal to or less than the predetermined value V1. Set to a value (eg "23").
The comparator 53 compares the value of the counter 52 with the value of the register 54, outputs a matching signal to the differentiating circuit 55 when they match, and the differentiating circuit 55 outputs an interrupt signal to the CPU 23 when the matching signal is input. Output to.
Therefore, the interrupt generation circuit 50A constitutes a time lapse notification means that outputs a time lapse notification signal after a lapse of a predetermined time after the output of the motor drive pulse. For example, if the count signal is 1024 Hz, the predetermined time until the counter value reaches the first set value (“29”) is 1000 ms × 29/1024 = about 28 ms, and the counter value is the second set value (“29”). The predetermined time until “23”) is 1000 ms × 23/1024 = about 22 ms, and the predetermined time can be set by the value of the register 54.
Further, the CPU 23 that changes the value of the register 54 constitutes a control means that changes the time until the time lapse notification signal is output according to the voltage value detected by the power supply voltage detection circuit 60.

Next, the operation during normal hand movement in the second embodiment will be described with reference to the flowchart of FIG.
When an interrupt of 1 Hz (every 1 second) occurs due to the output of the reference signal from the frequency dividing circuit 22, the CPU 23 determines whether the internal time is 0:00:00 when the hand position detection is executed, as shown in FIG. Confirm (step S21).
Here, if the internal time is not 0:00:00, the CPU 23 determines NO in step S21 and instructs the pulse generation circuit 31 to output a motor drive pulse having the same pulse width as the previous time (step). S22). As a result, the second hand 5, the minute hand 6, and the hour hand 7 move for one second, and the time of the internal time is indicated by the pointer.

On the other hand, if the internal time is 0:00:00, the CPU 23 determines YES in step S21 and executes the power supply voltage detection process by the power supply voltage detection circuit 60 (step S23).
The CPU 23 determines whether the power supply voltage VDD is larger than the predetermined value V1 (step S24). If YES is determined in step S24, the first set value (“29” in this embodiment) is set in the register 54 (step S25), and interrupt generation is permitted (step S26). Then, a command is output to the pulse generation circuit 31 to output a motor drive pulse (drive signal 1 or drive signal 2) having a pulse width t1 (step S27).

Further, when the power supply voltage VDD is equal to or less than the predetermined value V1 and the CPU 23 determines NO in step S24, the CPU 23 sets the second set value (“23” in this embodiment) in the register 54 (step S28). Allowing interrupt generation (step S29). Then, a command is output to the pulse generation circuit 31 to output a motor drive pulse (drive signal 1 or drive signal 2) having a pulse width t2 (step S30).

Here, when the power supply voltage VDD is higher than the predetermined value V1, the drive energy of the motor drive pulse is larger, the rotation speed of the rotor is higher, and the time until the stop is stopped than when the predetermined value V1 or less. become longer. Therefore, the time from the output of the drive signal to the execution of the rotation stop detection is also shorter in the case where the power supply voltage VDD is higher than the predetermined value V1 and in the case where the power supply voltage is V1 or less. Since the elapsed time after the drive signal is output is counted by the value of the counter 52, the elapsed time can be set longer by increasing the set value of the register 54. Therefore, the CPU 23 sets the first set value to a value larger than the second set value.

Next, the operation after the output of the motor drive pulse in steps S27 and S30 will be described with reference to the timing chart of FIG. Note that FIG. 11 shows an example in which YES is determined in step S24, and in step S27, the pulse generation circuit 31 outputs an H level signal having a pulse width t1 as the drive signal 1.
When the H level drive signal 1 is output from the pulse generation circuit 31, the output signal of the OR circuit 343 becomes the H level, so that the counter 52 is reset and the count value of the counter 52 becomes “0”. Since the value of the register 54 is "29", when the counter value becomes "0", the counter value and the register value do not match, and the matching signal of the comparator 53 changes to the L level indicating the mismatch. In this case, no interrupt signal is output from the differentiating circuit 55.

When the H-level drive signal 1 is output, the drive signal 2 is at the L level, so the transistors 321 and 324 are off, the transistors 322 and 323 are on, and the output terminal O2 is connected to the VDD side to reach the H level. Then, the output terminal O1 is connected to the VSS side to reach the L level.
When the drive signal 1 returns to the L level, the transistor 321 is switched from off to on, and the transistor 322 is switched from on to off. Therefore, the output terminals O1 and O2, that is, both ends of the motor coil are connected to the ground potential to be in a short-circuit state, and a short brake is applied to the rotor.

Next, the CPU 23 outputs a motor drive pulse in step S27, then outputs a command to the pulse generation circuit 31 to output a count signal (step S31). The pulse generation circuit 31 outputs a count signal at regular time intervals. Since this count signal is input to the clock input terminal CL of the counter 52, the counter 52 is up-counted with the count signal until the next drive signal is output and the H level signal is input to the reset terminal R. ..
Then, the counter value of the counter 52 and the register value of the register 54 are compared by the comparator 53 and it is determined whether or not they match (step S32).
The pulse generation circuit 31 continues to output the count signal until the counter value of the counter 52 becomes “29”.

On the other hand, when the counter value and the register value match (YES in step S32), the H level matching signal is output from the comparator 53, and the differential pulse serving as an interrupt signal is output to the CPU 23 through the differentiating circuit 55 and rotated to the CPU 23. A stop interrupt occurs (step S40).

FIG. 12 shows the rotation stop interrupt process in step S40.
In the rotation stop interrupt process in step S40, the CPU 23 sets the input / output terminals P3 and P5 of the IC 20 to the L level (step S41), and whether or not the input / output terminals P4 are at the L level, as in the first embodiment. (Step S42).

When the input / output terminal P4 is at H level, the pointer is not at the 0:00:00 position, so the CPU 23 does not prohibit the generation of interrupts and further outputs motor drive pulses (drive signal 1, drive signal 2). Drives the motor 13 (step S44). After that, the CPU 23 outputs a count signal (step S45), determines whether the counter value and the register value match (step S46), and if the counter value and the register value match in step S46, step S41. Return to, and determine whether the pointer is at the 0:00:00 position.

When the input / output terminal P4 is at the L level (YES in step S42), it can be detected that the hand position is at 0:00:00, so the CPU 23 prohibits interrupt generation (step S43) and stops rotation. The interrupt processing is terminated, and the processing of FIG. 10 is also terminated.
As a result, the internal time measured by the internal time counter matches the time indicated by the second hand 5, the minute hand 6, and the hour hand 7, and the indicated time is automatically corrected.

[Effect of the second embodiment]
According to the present embodiment, after the output of the motor drive pulse (drive signals 1 and 2), the timing for detecting whether the pointer is at the 0:00:00 position by the light emitting diode 14 and the phototransistor 15 is the interrupt generation circuit. Since the interrupt signal generated by the 50A can be set by inputting it to the CPU 23, it is not necessary to set the execution timing of the needle position detection process by the software running on the CPU 23. Therefore, the software processing is simplified and the load on the CPU 23 can be reduced.

Further, in the IC 20A of the second embodiment, it is not necessary to provide an analog circuit such as a comparator for detecting the reverse induced voltage, and the IC 20A can be easily configured only with a digital circuit. Therefore, the predetermined time until the interrupt generation circuit 50A, which is the time lapse notification means, generates the interrupt signal can be easily changed only by changing the value of the register 54. Therefore, the predetermined time can be changed according to product variations, environmental conditions such as temperature, changes over time, and the time required to detect the rotation stop state of the rotor of the motor 13 can be shortened.

Further, since the CPU 23 changes the set value of the register 54 according to the voltage value detected by the power supply voltage detection circuit 60, the execution timing of the needle position detection process can be appropriately set even if the power supply voltage VDD changes. .. Further, since the CPU 23 also changes the pulse width of the motor drive pulse according to the power supply voltage VDD, the rotor can be reliably rotated.

[Modification example]
The present invention is not limited to the above-described embodiment, and modifications, improvements, and the like within the range in which the object of the present invention can be achieved are included in the present invention.
For example, when the pointer is moving in fast forward, the hand position detection process of each of the above-described embodiments may not be executed even when the internal time reaches 0:00:00. For example, when the electronic clock 1 is used in an area where standard radio waves cannot be received, the pointer may be fast-forwarded by button operation or the like to correct the display time. When fast-forwarding the pointer, it is preferable to provide a means for generating an interrupt signal immediately after the output of the motor drive pulse in order to avoid overlapping of the motor drive pulses. Therefore, during normal hand movement, the means for executing the needle position detection process of each of the above-described embodiments is operated, and at the time of fast-forwarding of the pointer, the means for generating an interrupt signal immediately after the motor drive pulse output is switched and operated. Good.

Further, the process to be executed after detecting the rotation stop of the motor is not limited to the needle position detection process. For example, correction drive processing in a correction drive type motor that determines whether or not the rotor has rotated based on the reverse induced voltage of the motor and outputs a correction pulse with a large electric power to reliably rotate the rotor when it is not rotating. Good. That is, when the first motor of the correction drive system is arranged close to the second motor, if the correction drive is executed by the first motor before the rotation of the second motor is stopped, the second motor is used. Due to the magnetic field generated from the motor, the rotation result of the correction drive of the first motor may be erroneously detected. In order to prevent this, the present invention may be used to detect the rotation stop of the second motor and then execute the correction drive of the first motor.

In the interrupt generation circuit 50A of the second embodiment, the value of the register 54 is changed by the voltage value detected by the power supply voltage detection circuit 60, but the value of the register 54 is changed according to the type and constant of the motor drive pulse. May be changed.
Further, the motor 13 is not limited to the 2-pole step motor, and various motors that can be used for driving the pointer in the electronic clock 1 such as the 4-pole step motor can be used.
Further, in the above-described embodiment, one motor 13 drives the second hand 5, the minute hand 6, and the hour hand 7, but a motor for the second hand and a motor for the hour and minute hands may be provided in each motor. Correspondingly, motor drive circuits 30, 30A, detection means, rotation end notification means, time lapse notification means, and the like may be provided.

1 ... Electronic clock, 5 ... Second hand, 6 ... Minute hand, 7 ... Hour hand, 12 ... Battery, 13 ... Motor, 14 ... Light emitting diode, 15 ... Phototransistor, 16 ... Resistance, 21 ... Oscillation circuit, 23 ... CPU, 30 ... Motor drive circuit, 30A ... Motor drive circuit, 31 ... Pulse generation circuit, 321, 322, 323, 324 ... Electromagnetic effect type transistor, 40 ... Rotation stop detection circuit, 41 ... Reference voltage generation circuit, 421 ... Electric field effect type Transistor, 431, 432 ... Detection resistor, 441, 442 ... Comparator, 50 ... Interrupt generation circuit, 50A ... Interrupt generation circuit, 52 ... Counter, 53 ... Comparer, 54 ... Register, 55 ... Differentiation circuit, 60 ... Power supply Voltage detection circuit, O1, O2 ... Output terminal.

Claims (4)

Guidelines and
The motor that drives the pointer and
A motor drive circuit that is connected to the coil of the motor and outputs a motor drive pulse,
A detection means that detects the reverse induced voltage generated in the coil of the motor after the output of the motor drive pulse and outputs a detection signal.
When the detection signal is not continuously output from the detection means for a predetermined period, the rotation end notification means for outputting the rotation end notification signal and the rotation end notification means .
Needle position detecting means for detecting the position of the pointer and
An electronic timepiece including a control means for operating the hand position detecting means after the output of the rotation end notification signal. In the electronic clock according to claim 1,
The motor drive circuit includes an output terminal connected to the coil.
The detection means includes a chopper amplification means that amplifies the reverse induced voltage by alternately switching the output terminal between a short state and a high impedance state. In the electronic clock according to claim 1 or 2.
The motor drive circuit includes a plurality of output terminals connected to the coil.
An electronic clock characterized in that the detection means is provided at each of the plurality of output terminals. In the electronic clock according to any one of claims 1 to 3.
Equipped with a CPU for controlling an electronic clock
The electronic clock characterized in that the rotation end notification means is an interrupt generation circuit that outputs an interrupt signal, which is the rotation end notification signal, to the CPU.

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