JP6426164B2 - Stress control during processing of MEMS digital variable capacitor (DVC) - Google Patents

Description

  Embodiments of the present invention generally relate to micro-electro-mechanical system (MEMS) devices and methods for their manufacture.

A MEMS digital variable capacitor (DVC) device has a control electrode (ie, a pull-up or pull-off or PU electrode) above the movable MEMS plate, as schematically illustrated in FIG. 1, and the movable MEMS plate And a movable MEMS plate having a control electrode (i.e., a pull-in electrode or a pull-down electrode, that is, a PD electrode) below. These electrodes are coated with an upper dielectric layer and a lower dielectric layer. In addition, an RF electrode is present below the movable MEMS element. There is a modulated gap between the movable plate and the RF electrode due to the voltage to which either the PU or PD electrode is applied to the plate electrode. These voltages contact to supply a stable minimum or maximum capacitance to the RF electrode to create an electrostatic force that pulls up or down the MEMS element. Thus, the capacitance from the movable plate to the RF electrode is from the high capacitance state C _max (see FIG. 2) when pulled downwards to the low capacitance state C _min (see FIG. 3) when pulled upwards. Can vary.

FIG. 4 shows a more detailed cross-sectional view of the MEMS DVC device. The movable plate consists of two layers (i.e. lower and upper plates) connected to one another via a plurality of columns. This combination of plate and struts forms a semi-rigid plate that is resistant to flexing. Plate is secured to the substrate via a flexible leg structure for operating the DVC device in C _min state or C _max state at a relatively low operating voltage.

FIG. 5 illustrates a CMOS waveform controller that generates the required voltages Vpu and Vpd to be applied to the MEMS DVC device on PU and PD electrodes. The plate potential is CMOS ground so that the voltage applied on the PU and PD electrodes generates the electrostatic force needed to move the plate up or down to the C _min or C _max position. It needs to be referred to as the potential. In applications where the plate electrode needs to be RF-floating, this reference is made using the expensive resistor Rplate between the plate electrode and the CMOS ground (see FIG. 5).

  FIG. 6 illustrates a CMOS waveform controller in which the plate potential is referenced to the CMOS ground potential using a diode Dplate. In this application, the plate electrode is typically on RFGND. A combination of Rplate and Dplate is also used.

  These electrical connections between the movable plate and the CMOS ground are required for electrostatic actuation. However, these connections can also cause problems during the processing of two-layer plates. In particular, having the movable plate connected to CMOS ground during its processing can shift the operating voltage Vpu and the operating voltage Vpd from the specifications, which can cause stress in the movable plate, which significantly affects the wafer production affect.

  Therefore, there is a need in the art to provide a means for obtaining a more controlled operating voltage that avoids this problem.

  The present invention relates generally to MEMS DVCs and methods for their manufacture. The top and bottom plates of the movable plate in the MEMS DVC should have the same stress level to ensure proper operation of the MEMS DVC. The movable plate is separated from CMOS ground during fabrication to obtain the same stress level. After the plate is completely formed, the movable plate is only electrically coupled to the CMOS ground. Coupling occurs by using the layer that electrically couples the movable plate to the CMOS ground and the same layer that forms the pull-up electrode. The same layer couples the movable plate to the CMOS ground and provides pull-up electrodes to the MEMS DVC so that the deposition occurs in the same process step. By electrically coupling the moveable plate to CMOS ground after formation, the stresses in each of the layers of the moveable plate can be substantially identical.

  In one embodiment, a MEMS DVC comprises a movable plate disposed within a cavity formed on a substrate. A movable plate is disposed between the pull-in electrode and the pull-off electrode and coupled to the movable plate. The pull-off electrode is formed of a conductive layer, a plate ground electrode coupled to the movable plate electrode, and a CMOS ground electrode coupled to the plate ground electrode by the conductive layer.

  In another embodiment, a method of forming a MEMS DVC includes depositing a first conductive layer on a substrate, and patterning the first conductive layer to form a CMOS ground electrode, a plate ground electrode, a movable plate electrode, and a pull-in electrode. , Forming a dielectric layer on the substrate, CMOS ground electrode, plate ground electrode, movable plate electrode, pull-in electrode, and RF electrode, and forming an opening through the dielectric layer Exposing at least a portion of the CMOS ground electrode, the plate ground electrode, and the movable plate electrode; forming a movable plate in contact with the fixed element above the fixed element in contact with the movable plate electrode; On the movable plate and the fixed element formed in contact with the CMOS ground electrode and the plate ground electrode above the ground and the plate ground electrode To and depositing a second conductive layer.

It is a schematic sectional drawing of MEMSDVC in an independent state. 2 is a schematic cross-sectional view of the MEMS DVC of FIG. 1 in a C _max state. FIG. 3 is a schematic cross-sectional view of the MEMS DVC of FIG. 1 in a C _min state; FIG. 7 is a schematic cross-sectional view of a MEMS DVC according to another embodiment. FIG. 7 is a schematic diagram of a waveform controller in which the plate potential is connected to a MEMS DVC referenced as CMOS ground through a resistor Rplate. FIG. 7 is a schematic diagram of a waveform controller connected to a MEMS DVC whose plate potential is referenced to CMOS ground through a diode Dplate. FIG. 7 is a schematic cross-sectional view of the generation of a two-layer semi-rigid plate of MEMS DVC according to one embodiment. FIG. 7 is a schematic cross-sectional view of the generation of a two-layer semi-rigid plate of MEMS DVC according to one embodiment. FIG. 7 is a schematic cross-sectional view of the generation of a two-layer semi-rigid plate of MEMS DVC according to one embodiment. FIG. 6 is a schematic view of a structure used to disconnect plate electrodes from CMOS ground during formation of a movable plate according to one embodiment. FIG. 5 is a schematic cross-sectional view of a MEMS DVC at various stages of fabrication. FIG. 5 is a schematic cross-sectional view of a MEMS DVC at various stages of fabrication. FIG. 5 is a schematic cross-sectional view of a MEMS DVC at various stages of fabrication. FIG. 5 is a schematic cross-sectional view of a MEMS DVC at various stages of fabrication. FIG. 5 is a schematic cross-sectional view of a MEMS DVC at various stages of fabrication. FIG. 5 is a schematic cross-sectional view of a MEMS DVC at various stages of fabrication. FIG. 5 is a schematic cross-sectional view of a MEMS DVC at various stages of fabrication.

  The invention, briefly outlined above, will be more particularly described with reference to embodiments so that the above-mentioned features of the invention can be understood in detail. Some of the embodiments are illustrated in the accompanying drawings. However, the attached drawings show only typical embodiments of the present invention, and therefore, should not be considered as limiting the scope thereof, and the present invention includes other similarly effective embodiments. It should be noted that there is a possibility.

  For ease of understanding, where possible, the same reference numerals are used to indicate the same common components throughout the drawings. The components disclosed in one embodiment are intended to be usefully available in other embodiments not specifically mentioned.

  The present invention relates generally to MEMS DVCs and methods for their manufacture. The top and bottom plates of the movable plate in the MEMS DVC should have the same stress level to ensure proper operation of the MEMS DVC. During fabrication, the movable plate is separated from the CMOS ground to obtain the same stress level. After the plate is completely formed, the movable plate is only electrically coupled to the CMOS ground. Coupling occurs by using the layer that electrically couples the movable plate to the CMOS ground and the same layer that forms the pull-up electrode. The same layer couples the movable plate to the CMOS ground and provides pull-up electrodes to the MEMS DVC so that the deposition occurs in the same process step. By electrically coupling the moveable plate to CMOS ground after formation, the stresses in each of the layers of the moveable plate can be substantially identical.

The electrostatic actuation force to move the plate into the C _min or C _max position is scaled using (voltage / gap) ² . For precise control of the actuation voltage Vpu and the actuation voltage Vpd, it is required that the mobile plate after processing be flat and show no bending at all (ie the gap between the mobile plate and the PD and PU electrodes) Needs to be strictly controlled). In a two-layer semi-rigid plate configuration as in FIG. 4, this means that the absolute stresses of the lower and upper plates need to be matched.

  If the plate electrode is connected to CMOS ground (i.e. the substrate) during these processing steps, thermal and plasma effects can alter the stresses in the bottom and top plates during layer deposition and etching. it can. This change in stress substantially results in a non-flat beam structure that causes a shift in the operating voltage Vpd and the operating voltage Vpu and a reduction in wafer throughput.

  By electrically disconnecting the plate electrodes from the CMOS ground (i.e. the substrate) during the fabrication phase of the double layer plate, the stresses in the lower and upper plates are better controlled and the tightly controlled operating voltage Vpu and operation The voltage Vpd results. The top electrode as well as formed in the CMOS design to avoid antenna interference to further provide the CMOS ground electrical connection of the plate electrode during operation (required for electrostatic actuation). The layers are used to form an electrical connection. Thus, after the double layer beam is generated and the stresses in both layers are aligned, an electrical connection is formed.

  FIG. 8 illustrates a cross-sectional view of the structure used to disconnect the plate electrode from CMOS ground during fabrication of the dual layer plate. Both structure A and structure B are produced in the lower electrode layer (ie the layer used for the plate electrode, the PD electrode and the RF electrode). The structure A is connected to the plate electrode of the MEMS DVC, and the structure B is connected to the CMOS ground via Rplate (see FIG. 5) or Dplate (see FIG. 6).

  Structure A is connected to structure B after the top electrode layer (ie, the layer used for the PU electrode) is deposited by using the fixed layer and the top electrode layer also used in the DVC process. Prior to top electrode deposition, structure A is electrically disconnected from structure B and the plate electrode remains floating. This allows for stress control of the bottom and top plates during the manufacturing process, resulting in a well-controlled operating voltage Vpu and an operating voltage Vpd.

  9A-9G are schematic cross-sectional views of MEMS DVC device 900 at various stages of fabrication. As shown in FIG. 9A, a MEMS DVC is formed over a substrate 902 having one or more layers therein with one or more electrodes 904 formed therein. The electrode 904 may be coupled to Rplate and Dplate at a lower level of the substrate 902, as indicated by the arrow "C". Several electrodes 908, 910, 912, 914, 916, 918, 920 may be formed on the substrate 902. Electrodes 908, 910, 912, 914, 916, 918, 920 are formed by depositing conductive material on substrate 902 or patterning conductive material on substrate 902 having a mask thereon Or formed by blanket deposition following deposition.

  The formed CMOS ground electrode 908 (i.e., structure "B" in FIG. 8) is formed of one or more metals formed at a lower level of the substrate 902 through the vias 906 filled with conductive material. Coupled to conductor 904. As such, electrode 908 is grounded to substrate 902 via resistor Rplate and diode Dplate immediately after fabrication of electrode 908.

  Plate ground electrode 910 (i.e., structure "A" in FIG. 8) is separated from CMOS ground electrode 908 at this point in fabrication, but is formed in substrate 902 and filled with conductive metal conductor 922 and The movable plate electrodes 912 and 914 are connected via the vias 924, 926 and 928. Although not shown, pull down electrodes 916, 918 are coupled to other layers of substrate 902 via vias and trenches to form an electrical connection to a power supply separate from substrate 902. Similarly, the RF electrode 920 is coupled to the RF coupling pad at a position not shown in the drawing. The electrodes 908 910 912 914 916 918 920 are formed in the same manufacturing process.

Following the formation of the electrodes 908, 910, 912, 914, 916, 918, 920, the dielectric layer 930 is deposited on the electrodes 908, 910, 912, 914, 916, 918, 920 as illustrated in FIG. 9B. May be formed. Suitable materials that may be used for the dielectric layer 930 include silicon nitride, silicon oxide, silicon oxynitride and other electrically isolated materials. The dielectric layer 930 will ultimately pull the movable plate away from the RF electrode 920 when the movable plate is in the C _max position. The reason is that the movable plate will land (ie, contact) the dielectric layer 930 but will not land (ie, contact) the RF electrode 920.

  After the dielectric layer 930 is deposited, the dielectric layer 930 is patterned to form an opening 932 that passes through the dielectric layer 930 at selected locations to provide the CMOS ground electrode 908, the plate ground electrode 910, and the movable plate electrode 912. , 914 are exposed. Opening 932 may be formed by etching dielectric layer 930 using a suitable etchant (etchant).

  Next, as illustrated in FIG. 9D, a conductive material, such as, for example, titanium nitride, may be formed in the openings 932 above the portion of the dielectric layer 930 to form the anchoring structure 934. The anchoring structure 934 may be a blanket deposition of conductive material following etching or following etching of the mask above the dielectric layer 930 (a mask different from the mask used to form the openings 932) Alternatively, it may be formed by selectively depositing on the next exposed area. At this point in time, plate ground electrode 908 and hence moveable plate electrodes 912, 914 are electrically isolated from CMOS ground. The reason is that the plate ground electrode 910 is electrically isolated from the CMOS ground electrode 908.

  Following the formation of the fixed structure 934, the formation of the movable plate may continue. As illustrated in FIG. 9E, no additional deposition or layer is formed above the CMOS ground electrode 908 or plate ground electrode 910 while additional layers are above the other electrodes 912, 914, 916, 918, 920. Is formed. It should be understood that the non-conductive masking layer may be formed over the CMOS ground electrode 908 and the plate ground electrode 910 during the formation of the additional layer, but the non-permanent layer is the CMOS ground electrode 908 and the plate. It means that it is not formed above the ground electrode 910. Also, during the formation of the additional layers, no electrical connection is formed between the CMOS ground electrode 908 and the plate ground electrode 910. The additional layers to be formed, as illustrated in FIG. 9E, include a movable plate, a dielectric layer 930 of the movable plate, a lower layer 938 of the movable plate, an upper layer 940 of the movable plate, and two plates A post 942 connecting 938 and 940, an additional sacrificial material 944, and a sacrificial layer 936 for pulling away from the dielectric layer 946 are included.

  After the formation of the additional layers, it is to be noted that, among other things, after the movable plate, as illustrated in FIG. 9F, not only will a pull-up electrode be formed but also the CMOS ground electrode 908 and the plate ground electrode 910. A conductive layer 948 will be deposited which will also provide an electrical connection between them. Conductive layer 948 may be deposited by blanket deposition following an etching process to disconnect the pull-up electrode from the electrical connection between CMOS ground electrode 908 and plate ground electrode 910. Alternatively, the conductive layer 948 may be deposited by first forming a mask above the device and then selectively depositing in the openings. Suitable materials that may be used for the conductive layer include titanium nitride, aluminum, titanium aluminum, copper, titanium, tungsten, gold and other conductive materials.

Next, an opening 950 is formed through the conductive layer 948 on the additional layer. The openings 950 extend through the second dielectric layer 946 as well as the conductive layer 948 to expose the sacrificial material 944, 936. Thereafter, an etchant is introduced through the opening 950 to form a cavity 952 and remove the movable plate so that it can be freely moved into the cavity between the free standing C _max and the free standing C _min .

  Following release of the movable plate in cavity 952, a passivation or dielectric roof 954 may be deposited to seal cavity 952, as illustrated in FIG. 9G. Suitable materials that may be used for passivation layer 954 include silicon oxide, silicon nitride, silicon oxynitride, and other insulating materials. As illustrated in FIGS. 9A-9G, the movable beam is electrically isolated from the CMOS substrate 902 until the formation of pull-up electrodes. Therefore, each layer of movable beam will have substantially the same stress.

  By electrically disconnecting the MEMS device from the CMOS ground (i.e., the substrate) during the dual layer plate fabrication process, thermal and plasma induced stress changes in the plate layer are avoided. By removing the electrical connection, the MEMS device is also more thermally separated from the substrate, which also helps to improve the stress control of the plate layer. Also, it is intended that the top electrode layer be used to form an electrical connection between the MEMS device and the CMOS ground so that the electrical connection is made after the double layer beam is created, as the MEMS device is intended It is still an effective way to ensure that it works. By electrically cutting the moveable plate during plate formation, wafer production is improved and the process window is wider, as opposed to double layer plate generation.

  While embodiments of the invention have been described above, other embodiments and alternate embodiments of the invention may be practiced without departing from the basic scope of the invention. The scope of the present invention is determined by the appended claims.

Claims (10)

MEMSDVC, where
A movable plate is disposed in a cavity formed on the substrate, wherein the movable plate is disposed between the pull-in electrode and the pull-off electrode and coupled to the movable plate electrode, the pull-off electrode being from the conductive layer Formed
The above MEMSDVC is
A plate ground electrode coupled to the movable plate electrode;
A CMOS ground electrode coupled to the plate ground electrode by the conductive layer;
The movable plate comprises a plurality of layers coupled together by one or more struts,
A MEMS DVC in which each layer of the plurality of layers has substantially the same stress. A first fixing structure coupled to the plate ground electrode on a surface facing the substrate;
A second fixing structure coupled to the CMOS ground electrode on the surface facing the substrate;
The MEMS DVC according to claim 1, wherein the conductive layer is coupled to the first fixing structure and the second fixing structure.   The MEMS DVC according to claim 2, wherein the movable plate electrode is coupled to the plate ground electrode via one or more vias or trenches filled with a conductive material and a metal conductor formed in the substrate.   The MEMS DVC according to claim 3, wherein the CMOS ground electrode is coupled to one or more metal conductors disposed in the substrate.   The MEMS DVC according to claim 4, further comprising a dielectric layer formed at least partially on the pull-in electrode, the plate ground electrode, and the CMOS ground electrode.   The MEMS DVC according to claim 1, wherein the movable plate electrode is coupled to the plate ground electrode via one or more vias or trenches filled with a conductive material and a metal conductor formed in the substrate.   The MEMS DVC according to claim 1, wherein the CMOS ground electrode is coupled to one or more metal conductors disposed in the substrate.   The MEMS DVC according to claim 1, further comprising a dielectric layer formed at least partially on the pull-in electrode, the plate ground electrode, and the CMOS ground electrode. A method of forming a MEMS DVC, said method comprising
Forming a first conductive layer on the substrate;
Patterning the first conductive layer to form a CMOS ground electrode, a plate ground electrode, a movable plate electrode, a pull-in electrode, and an RF electrode;
Depositing a dielectric layer on the substrate, the CMOS ground electrode, the plate ground electrode, the movable plate electrode, the pull-in electrode and the RF electrode;
Forming an opening through the dielectric layer to expose at least a portion of the CMOS ground electrode, the plate ground electrode, and the movable plate electrode;
Forming a fixed element in contact with the CMOS ground electrode, the plate ground electrode, and the movable plate electrode on the dielectric layer;
Forming a movable plate in contact with the fixed element on the fixed element in contact with the movable plate electrode;
Depositing a second conductive layer on the movable plate and the fixed element formed in contact with the CMOS ground electrode and the plate ground electrode on the CMOS ground electrode and the plate ground electrode;
After the patterning, the plate ground electrode is electrically coupled to the movable plate electrode through a conductive material formed in the substrate,
After patterning and during formation of the movable plate, the CMOS ground electrode and the plate ground electrode are electrically isolated from one another,
After depositing the second conductive layer, the CMOS ground electrode and the plate ground electrode are electrically coupled together ,
The step of forming the movable plate is
Including forming multiple layers coupled together by one or more struts,
Wherein each layer of the plurality of layers has substantially the same stress, and the movable plate electrode is electrically coupled to the plate ground electrode during formation of the movable plate . 10. The method of claim 9 , further comprising the steps of forming a cavity and removing sacrificial material from the cavity to allow free movement of the movable plate into the cavity.

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