JP6179951B2 - Harmonic suppression power supply and control circuit thereof - Google Patents

Description

  The present invention relates to a harmonic suppression power source for suppressing harmonics and a control circuit thereof.

  Since harmonics included in the distorted wave alternating current adversely affect the electric circuit and connected devices, electrical devices that are likely to generate harmonics need to suppress harmonics with a harmonic suppression power source. For example, a chopper circuit having a multiplier is widely used as a harmonic suppression power source because it is advantageous in that the harmonic distortion is small in a wide load region. However, there is a problem that the output voltage is likely to increase at a light load, and the configuration of the control circuit is complicated.

  On the other hand, a critical type chopper circuit with on-time width control that does not have a multiplier does not have a complicated control circuit configuration and does not easily generate an output voltage at a light load. There was a problem that wave distortion became significant.

  In order to solve the above problem, in Patent Document 1, the input voltage is sensed using the voltage induced in the secondary winding of the inductor, and the conduction period of the switch is adjusted by the sensed input voltage. A power factor correction circuit that compensates for distortion is disclosed.

JP 2006-94697 A

  However, in the critical chopper circuit with on-time width control, feedback control corresponding to load fluctuation is performed by detecting the output voltage, and the switch conduction period is greatly changed (for example, several hundred ns at light load, at heavy load) (Several tens of μs). In such a critical chopper circuit with on-time width control in which the switch conduction period is controlled by a large amount of change, the switch conduction period is corrected only by voltage information induced in the secondary winding of the inductor. Even in this case, it is actually difficult to adjust the switch conduction period appropriately in response to a wide range of load fluctuations, and the input current may be distorted by the above correction. In order to suppress the harmonics, it is necessary to take another method.

  In addition, as a method other than Patent Document 1, the switching off width is detected by detecting the negative current of the inductor current flowing through the inductor of the power factor correction circuit, and the input voltage is detected based on the off width information detected thereby. A method is also conceivable in which the ON width of switching corresponding to the phase is adjusted. However, such a method also has an extremely short switching off width under a light load condition or the like in a critical type chopper circuit. Therefore, the on width of the switching element in the next operation cycle is adjusted with high accuracy according to the detected off width. This is actually difficult, and it becomes difficult to suppress harmonics at light loads. Also, the negative current detection of the inductor current is likely to make the control circuit complex, and if the method of detecting the switching off width by detecting the negative current of the inductor current is applied to the interleave circuit of the multiphase control, the control circuit is controlled in a multiphase manner. Each circuit needs to detect a negative current of the inductor current, which makes it more difficult to apply to an interleave circuit.

  This invention is made | formed in view of the said subject, and it aims at providing the harmonic suppression power supply and its control circuit which suppress a harmonic.

  The present invention proposes the following matters in order to solve the above problems.

A boost chopper circuit having a main switch;
An input capacitor connected to the input side of the step-up chopper circuit to suppress ripple caused by the switching operation of the main switch;
A control circuit for controlling the switching operation of the main switch;
A harmonic suppression power source comprising:
The control circuit proposes a harmonic suppression power supply having a first capacity reduction circuit unit that reduces the capacity of the input capacitor at a light load when the output power of the boost chopper circuit is equal to or lower than a predetermined load power. Yes.

A boost chopper circuit having a main switch;
An input capacitor connected to the input side of the step-up chopper circuit to suppress ripple caused by the switching operation of the main switch;
A control circuit for controlling the switching operation of the main switch;
A harmonic suppression power source comprising:
The control circuit
An input phase detector for detecting the input voltage phase of the boost chopper circuit;
A second capacitance reduction circuit unit that reduces the capacitance of the input capacitor based on the input phase information of the input voltage phase detected by the input phase detection unit;
The harmonic suppression power supply characterized by having is proposed.

  The boost chopper circuit has proposed a harmonic suppression power supply characterized by being a multi-phase control type interleave circuit of two or more phases in which the main switch performs switching operation with a predetermined phase difference from each other.

  The main switch has proposed the harmonic suppression power supply characterized by being a high electron mobility transistor.

  The high-electron mobility transistor has proposed a harmonic suppression power supply characterized by using gallium nitride as a channel.

Used in a harmonic suppression power supply comprising a boost chopper circuit having a main switch and an input capacitor connected to the input side of the boost chopper circuit to suppress ripple caused by the switching operation of the main switch, and controls the switching operation of the main switch A control circuit,
There has been proposed a control circuit having a first capacity lowering circuit section for reducing the capacity of an input capacitor at a light load when the output power of the boost chopper circuit is equal to or lower than a predetermined load power.

Used in a harmonic suppression power supply comprising a boost chopper circuit having a main switch and an input capacitor connected to the input side of the boost chopper circuit to suppress ripple caused by the switching operation of the main switch, and controls the switching operation of the main switch A control circuit,
An input phase detector for detecting the input voltage phase of the boost chopper circuit;
A second capacitance reduction circuit unit that reduces the capacitance of the input capacitor based on the input phase information of the input voltage phase detected by the input phase detection unit;
A control circuit characterized by having:

  According to the present invention, the first capacitance reduction circuit unit of the control circuit reduces the capacitance of the input capacitor at the time of light load where the output power of the boost chopper circuit is equal to or lower than the predetermined load power. Distortion can be suppressed.

  According to the present invention, the input phase detector of the control circuit detects the input voltage phase of the boost chopper circuit, and based on the input phase information of the input voltage phase detected by the input phase detector, the second capacitor of the control circuit Since the reduction circuit unit reduces the capacitance of the input capacitor, harmonic distortion in a wide load range can be appropriately suppressed.

  According to the present invention, the step-up chopper circuit is a multi-phase control type interleave circuit of two or more phases that perform switching operations with a predetermined phase difference from each other. Therefore, even in a large-capacity power supply designed with a large input capacitor. The harmonic distortion can be appropriately suppressed.

  According to the present invention, since the main switch is a high electron mobility transistor, harmonic distortion can be appropriately suppressed even in a large-capacity power supply with a high switching frequency and a small size.

  According to the present invention, since the high electron mobility transistor uses gallium nitride for the channel, harmonic distortion can be appropriately suppressed even in a large-capacity power supply that is miniaturized by high-frequency switching.

  According to the present invention, the first capacitance reduction circuit unit of the control circuit reduces the capacitance of the input capacitor at the time of light load where the output power of the boost chopper circuit is equal to or lower than the predetermined load power. Distortion can be suppressed.

  According to the present invention, the input phase detector of the control circuit detects the input voltage phase of the boost chopper circuit, and based on the input phase information of the input voltage phase detected by the input phase detector, the second capacitor of the control circuit Since the reduction circuit unit reduces the capacitance of the input capacitor, harmonic distortion in a wide load range can be appropriately suppressed.

It is a circuit diagram which shows the structure of the harmonic suppression power supply 1 which concerns on embodiment of this invention. 1 is a circuit diagram showing a configuration of a control circuit 30 according to a first embodiment of the present invention. FIG. 3 is a circuit diagram illustrating a configuration of a first capacity lowering circuit unit 301 in FIG. 2. It is a waveform diagram of the input voltage VAC and the input current Iin of the harmonic suppression power supply according to the first embodiment of the present invention. It is a wave form diagram of input voltage VAC and input current Iin of the conventional harmonic suppression power supply. It is a circuit diagram which shows the structure of the control circuit 30 which concerns on the 2nd Embodiment of this invention. It is a circuit diagram which shows the structure of the input phase detection part 302 of FIG. FIG. 7 is a circuit diagram illustrating a configuration of a second capacitance lowering circuit unit 303 in FIG. 6. It is a wave form diagram of ZC terminal voltage VZC, input voltage VAC, and input current Iin of harmonic suppression power supply 1 concerning a 2nd embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. It should be noted that the constituent elements in the present embodiment can be appropriately replaced with existing constituent elements and the like, and various variations in combination with other existing constituent elements are possible. Therefore, the description of the present embodiment does not limit the contents of the invention described in the claims.

(First embodiment)
FIG. 1 is a circuit diagram showing a configuration of a harmonic suppression power supply 1 according to an embodiment of the present invention. FIG. 2 is a circuit diagram showing a configuration of the control circuit 30 according to the first embodiment of the present invention.

  As shown in FIG. 1 and FIG. 2, the harmonic suppression power source 1 according to this embodiment is connected to a bridge diode 50 that converts alternating current into direct current, and a direct current output terminal of the bridge diode 50. A boost chopper circuit 10 for boosting and a control circuit 30 for controlling the switching operation are provided.

  The step-up chopper circuit 10 includes an inductor 3, a diode 5, and a main switch 7 (for example, a field effect transistor MOSFET). The connection configuration of the inductor 3, the diode 5 and the main switch 7 is the same as that of a general boost chopper circuit, and is well known to those having ordinary knowledge in the technical field according to the present invention. Omit. The harmonic suppression power supply 1 includes an input capacitor 20 that is connected to the input side of the step-up chopper circuit 10 and suppresses switching ripple. Both ends of the input capacitor 20 are connected to the input terminals of the boost chopper circuit 10. The harmonic suppression power supply 1 has resistors 70 and 71 for detecting the output voltage by dividing the voltage output from the boost chopper circuit 10, and a load 80 is connected to the output of the boost chopper circuit 10. .

  The control circuit 30 controls the switching operation of the main switch 7. In addition, the control circuit 30 includes a first capacitance reduction circuit unit 301 that reduces the capacitance of the input capacitor 20 at a light load when the output power of the boost chopper circuit 10 is equal to or less than a predetermined load power.

  The harmonic suppression power source 1 according to the present embodiment is an example of a power source that operates in a critical current mode under rated conditions. The critical current mode is a well-known technique for those who have ordinary knowledge in the technical field according to the present invention, and will not be described here. Note that, in the switching operation of the main switch 7, for example, a resonance operation occurs during a part of the OFF period of the switching operation of the main switch 7. This resonance operation is a phenomenon that occurs immediately after the current of the diode 5 finishes flowing in the circuit including the inductor 3, the parasitic capacitor 8 parasitic on the internal structure of the main switch 7, the snubber capacitor 9, and the like. is there.

  The input capacitor 20 needs to be set to a sufficient capacitance value for the energy stored in the inductor 3 under the condition that the on-period of the main switch 7 is maximized (minimum input voltage and maximum load power). For example, if the on-duty of the main switch 7 is 50%, the maximum capacitance value C20 (max) of the input capacitor 20 is set based on the equation (1).

C20 (max) ≧ 2 × L × Po (max) ² / Vin (min) ⁴ (1)
Here, Po (max) is the maximum output power of the harmonic suppression power supply 1, Vin (min) is the minimum input voltage, and L is the inductance value of the inductor 3.

  For example, the input capacitor 20 is preferably configured by connecting a first capacitor 21 and a second capacitor 22 in parallel. In such a configuration, when the first capacitor 21 is opened by the switch 23 at a light load, the input capacitor 20 becomes the capacitance value of the second capacitor 22, and the capacitance of the input capacitor 20 can be reduced. When the load is heavy, the first capacitor 21 can be short-circuited by the switch 23, and the input capacitor 20 can be set to a combined capacitance value in which the first capacitor 21 and the second capacitor 22 are connected in parallel.

  The boost chopper circuit 10 is preferably configured as a multiphase control type interleave circuit of two or more phases that perform switching operations with a predetermined phase difference from each other. For example, even in a large-capacity power supply designed by increasing the capacity of the input capacitor 20, harmonic distortion can be appropriately suppressed.

  The main switch 7 is preferably a high electron mobility transistor. In particular, the high electron mobility transistor preferably uses gallium nitride as a channel. When such a high electron mobility transistor is used, harmonic distortion can be appropriately suppressed even in a large-capacity power source that has a high frequency switching and is miniaturized.

  FIG. 3 is a circuit diagram showing a configuration of the first capacitance lowering circuit unit 301 of FIG. The first capacity reduction circuit unit 301 includes a comparator 31, and the inverting input terminal of the comparator 31 is connected to the COMP terminal of the control circuit 30. The COMP terminal is connected to the output of the gm amplifier 35 provided in the control circuit 30.

  The gm amplifier 35 is a voltage input / current output type amplifier excellent in noise resistance, detects the voltage at the FB terminal of the control circuit 30 as an input, and outputs a current corresponding to the voltage at the FB terminal. Since the voltage between the FB terminal and the GND terminal (the voltage of the resistor 71 in FIG. 1) increases at a light load, the output current of the gm amplifier 35 decreases at a light load, and the potential at the COMP terminal decreases. As a result, the output of the comparator 31 becomes High.

  Thus, since the output of the comparator 31 becomes High at light load, the first capacity reduction circuit unit 301 turns on the switch 24 and turns off the switch 23 at light load. As a result, the first capacitance lowering circuit unit 301 sets the input capacitor 20 to have the capacitance value of the second capacitor 22. As described above, the first capacity reduction circuit unit 301 of the control circuit 30 operates to reduce the capacity of the input capacitor 20 at the time of a light load in which the output power of the boost chopper circuit 10 is equal to or less than a predetermined load power.

  Next, operations and effects of the first exemplary embodiment of the present invention will be described with reference to FIGS. 4 and 5. FIG. 4 is a waveform diagram of the input voltage VAC and the input current Iin of the harmonic suppression power supply according to the first embodiment of the present invention. FIG. 5 is a waveform diagram of the input voltage VAC and the input current Iin of the conventional harmonic suppression power supply.

  4 and 5, an AC voltage AC120V having a commercial frequency of 50 Hz is applied to the input side INPUT (AC) of the harmonic suppression power source, and a DC load (LOAD) is applied to the output side OUTPUT (DC400V) of the harmonic suppression power source. The operation waveform in the case of DC0.1A condition (light load condition) is shown. The waveform diagram of FIG. 5 is an example when the capacitance C21 of the first capacitor 21 is 2.2 μF and the capacitance C21 of the second capacitor 22 is 0.47 μF.

  In the harmonic suppression power source 1 according to the embodiment of the present invention, it can be seen that the conduction angle of the input current is widened and the harmonic distortion at light load can be improved as compared with the conventional harmonic suppression power source. When comparing the total harmonic distortion Total Harmonic Distortion (hereinafter referred to as THD) under the conditions of FIG. 4 and FIG. 5 as a simulation value, the harmonic suppression power source 1 according to the first embodiment is a conventional harmonic suppression power source. It has been confirmed that 2.36% improvement can be achieved.

  As described above, according to the harmonic suppression power supply 1 and the control circuit 30 thereof according to the first embodiment, the first capacity reduction circuit unit 301 of the control circuit 30 has a predetermined output power of the boost chopper circuit 10. Since the capacity of the input capacitor 20 is reduced at a light load that is equal to or lower than the load power, harmonic distortion at the time of the light load can be suppressed.

  Next, a second embodiment of the present invention will be described with reference to the drawings. In the description of the second embodiment, the description of the parts common to the first embodiment is omitted.

(Second Embodiment)
FIG. 6 is a circuit diagram showing a configuration of the control circuit 30 according to the second embodiment of the present invention. FIG. 7 is a circuit diagram showing a configuration of the input phase detector 302 of FIG. FIG. 8 is a circuit diagram showing a configuration of the second capacitance lowering circuit unit 303 of FIG. FIG. 9 is a waveform diagram of the ZC terminal voltage VZC, the input voltage VAC, and the input current Iin of the harmonic suppression power supply 1 according to the second embodiment. The waveform diagram of FIG. 9 is an example in which the capacitance C21 of the first capacitor 21 is 0.47 μF and the capacitance C21 of the second capacitor 22 is 0.01 μF, and the input side INPUT ( AC) AC voltage AC120V with a commercial frequency of 50 Hz is applied to the output side OUTPUT (DC400V) of the harmonic suppression power supply, and the operation waveform is shown with a DC load (LOAD) of DC 0.1A (light load condition). It is a thing.

  In the second embodiment, the control circuit 30 includes an input phase detector 302 that detects the input voltage phase of the boost chopper circuit 10, and an input capacitor based on the input phase information of the input voltage phase detected by the input phase detector 302. And a second capacitance lowering circuit portion 303 that reduces the capacitance of the power supply 20. The input phase detection unit 302 is connected to the control winding 3c of the inductor 3 via the ZC terminal of the control circuit 30, and detects the input voltage phase as input phase information based on the voltage of the control winding 3c of the inductor 3. To do. As shown in FIG. 9, the ZC terminal connected to the control winding 3c includes input phase information.

  The input phase detection unit 302 includes a comparator 32, and the output of the comparator 32 is connected to the inverting input terminal of the comparator 33 of the second capacitance reduction circuit unit 303. The input phase detection unit 302 detects the input phase information by detecting the value of the envelope of the signal input to the ZC terminal at the input phase information detection point (point A) shown in FIG. The detection of the input phase information is performed by comparing the value of the envelope of the signal input to the ZC terminal of the control circuit 30 with a predetermined threshold value VTH by the comparator 32 provided in the input phase detection unit 302. By setting the threshold value VTH to an appropriate value, it is detected that the phase angle of the AC input is around 0 degrees and 180 degrees.

  The second capacity lowering circuit unit 303 includes a comparator 33, and the output of the comparator 33 is connected to the CONT terminal of the control circuit 30. When the input phase detection unit 302 detects that the phase angle of the AC input is around 0 degrees and 180 degrees, the second capacity reduction circuit unit 303 turns on the switch 24 and turns off the switch 23. As a result, the second capacity lowering circuit unit 303 sets the input capacitor 20 to have the capacitance value of the second capacitor 22. As a result, as shown in FIG. 9, the conduction angle of the input current is widened, and harmonic distortion can be suppressed.

  Comparing the THD in the first embodiment and the second embodiment by simulation, it is confirmed that the second embodiment can improve 1.96% compared to the first embodiment. Therefore, if the operation of the first embodiment and the operation of the second embodiment are sequentially combined, the THD of the waveform shown in FIG. 5 can be improved by 4.36%.

  In the second embodiment, when the input phase detection unit 302 detects the input voltage phase, the second capacitance lowering circuit unit 303 immediately reduces the capacitance of the input capacitor 20 when the input voltage phase is detected. 9, distortion of the input current waveform is observed in the period B, but this distortion can be eliminated as follows. For example, in FIG. 1, if a resistance component having an appropriate resistance value is connected in series between the first capacitor 21 and the switch 23, the capacity reduction operation of the input capacitor 20 can be appropriately slowed down. The distortion of the input current waveform during period B can be eliminated.

  The boost chopper circuit 10 is preferably arranged and applied to a multiphase control type interleave circuit of two or more phases that perform switching operations with a predetermined phase difference from each other.

  The main switch 7 is preferably a high electron mobility transistor. In particular, the high electron mobility transistor preferably uses gallium nitride for the channel.

  As described above, according to the harmonic suppression power supply 1 and the control circuit 30 thereof according to the second embodiment, the input phase detection unit 302 of the control circuit 30 detects the input voltage phase of the boost chopper circuit 10, Based on the input phase information of the input voltage phase detected by the input phase detection unit 302, the second capacitance reduction circuit unit 303 of the control circuit 30 reduces the capacitance of the input capacitor 20. Therefore, harmonic distortion in a wide load region is reduced. It can be suppressed appropriately.

  According to the harmonic suppression power source 1 and its control circuit 30 according to the second embodiment, the boost chopper circuit is arranged into a multiphase control type interleave circuit of two or more phases that perform switching operations with a predetermined phase difference from each other. If applied, harmonic distortion can be appropriately suppressed even in a large-capacity power supply designed by increasing the capacity of the input capacitor.

  According to the harmonic suppression power supply 1 and its control circuit 30 according to the second embodiment, if the main switch is a high electron mobility transistor, even in a large-capacity power supply with a high switching frequency and a small size, Distortion can be suppressed appropriately.

  According to the harmonic suppression power supply 1 and its control circuit 30 according to the second embodiment, if the high electron mobility transistor is made of gallium nitride for the channel, the switching frequency is increased and the capacity is reduced. Even in the power supply, harmonic distortion can be appropriately suppressed.

  As mentioned above, although embodiment of this invention was described, this invention is not limited to embodiment mentioned above, A various deformation | transformation and application are possible within the range which does not deviate from the summary of this invention.

1: Harmonic suppression power supply 3: Inductor 3c: Control winding 5: Diode 7: Main switch 8: Parasitic capacitor 9: Snubber capacitor 10: Boost chopper circuit 20: Input capacitor 21: First capacitor 22: Second capacitor 23: Switch 24: Switch 30: Control circuit 31: Comparator 32: Comparator 33: Comparator 301: First capacitance reduction circuit unit 302: Input phase detection unit 303: Second capacitance reduction circuit unit 70: Resistor 71: Resistor

Claims (7)

A boost chopper circuit having a main switch;
An input capacitor connected to the input side of the step-up chopper circuit to suppress ripples due to the switching operation of the main switch;
A control circuit for controlling the switching operation of the main switch;
A harmonic suppression power source comprising:
The control circuit includes:
An input phase detector for detecting an input voltage phase of the boost chopper circuit;
A capacitance reduction circuit unit that reduces the capacitance of the input capacitor based on input phase information of the input voltage phase detected by the input phase detection unit;
Harmonic suppression power supply characterized by having. The capacity lowering circuit section is
  2. The harmonic suppression power supply according to claim 1, wherein the capacity of the input capacitor is reduced at a light load when an output power of the boost chopper circuit is equal to or lower than a predetermined load power.   3. The harmonic suppression according to claim 1, wherein the step-up chopper circuit is a multi-phase control type interleave circuit of two or more phases in which the main switch performs a switching operation with a predetermined phase difference from each other. Power supply.   The harmonic suppression power supply according to any one of claims 1 to 3, wherein the main switch is a high electron mobility transistor.   The harmonic suppression power supply according to claim 4, wherein the high electron mobility transistor uses gallium nitride as a channel. A step-up chopper circuit having a main switch, and an input capacitor connected to the input side of the step-up chopper circuit and suppressing a ripple caused by the switching operation of the main switch, are used in a harmonic suppression power supply, and the switching operation of the main switch A control circuit for controlling
An input phase detector for detecting an input voltage phase of the boost chopper circuit;
A capacitance reduction circuit unit that reduces the capacitance of the input capacitor based on input phase information of the input voltage phase detected by the input phase detection unit;
A control circuit comprising: The capacity lowering circuit section is
The control circuit according to claim 6, wherein the capacity of the input capacitor is reduced at a light load when the output power of the boost chopper circuit is equal to or lower than a predetermined load power.

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