JP6017994B2 - Electronic device mounting substrate and electronic device - Google Patents

Description

  The present invention relates to an electronic element mounting substrate and an electronic device.

  For example, an electronic apparatus such as an imaging device includes an electronic element mounting substrate and an electronic element (for example, an imaging element such as a CMOS) mounted on the electronic element mounting substrate. The substrate for mounting an electronic element includes an insulating base including a frame portion, a plurality of connection terminals provided on the upper surface of the frame portion, and provided vertically in the frame portion and electrically connected to the plurality of connection terminals. And a plurality of via conductors connected to each other (see Patent Document 1 below). With downsizing of electronic devices, a structure in which a plurality of via conductors are exposed from an insulating base on the wall surface of a frame portion has been proposed.

JP 2006-201427

  In the future, for example, in an electronic device such as an imaging device, it is required to reduce the overall size while securing the holding force of a plurality of via conductors partially exposed from the insulating base on the wall surface of the frame portion. .

According to one aspect of the present invention, the electronic element mounting substrate is provided in the vertical direction in the frame portion, the insulating base including the frame portion, the plurality of connection terminals provided on the upper surface of the frame portion, and the frame portion. A plurality of via conductors. The plurality of via conductors are electrically connected to the plurality of connection terminals, and are exposed from the insulating base on the wall surface of the frame portion. Furthermore, the interval between the wall surfaces of adjacent via conductors among the plurality of via conductors is provided according to the exposed width of the adjacent via conductor, and the interval between the adjacent wall surfaces of the via conductors is the adjacent via conductor. It is a dimension more than the sum total of the exposure width of .

  According to another aspect of the present invention, an electronic device includes an electronic element mounting substrate having the above-described configuration, and an electronic element mounted on the electronic element mounting substrate and electrically connected to a plurality of connection terminals. Contains.

  In the electronic element mounting substrate according to one aspect of the present invention, the interval between the wall surfaces of adjacent via conductors among the plurality of via conductors is provided according to the exposed width of the adjacent via conductors, thereby depending on the insulating base. A downsized electronic device can be realized while sufficiently securing the holding force of the plurality of via conductors.

(A) has shown the top view of the electronic device in the 1st Embodiment of this invention, (b) has shown the longitudinal cross-sectional view in AA of the electronic device shown by (a). 1A is a plan view of an electronic element mounting substrate in the electronic apparatus shown in FIG. 1A, and FIG. 1B is a cross-sectional view taken along line AA of the electronic element mounting substrate shown in FIG. A longitudinal sectional view is shown. (A) has shown the modification of the electronic device shown by Fig.1 (a), (b) has shown the longitudinal cross-sectional view in AA of the electronic device shown by (a). (A) is a top view which shows one example of arrangement | positioning of the several via conductor in the electronic device of the 2nd Embodiment of this invention, (b) is a top view which shows the other example of arrangement | positioning of a several via conductor. is there. It is a top view which shows the other structural example of a some via conductor. (A) has shown the top view of the board | substrate for electronic element mounting in the electronic device of the 3rd Embodiment of this invention, (b) is in AA of the board | substrate for electronic element mounting shown to (a). A longitudinal sectional view is shown.

  Hereinafter, some embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
As shown in FIG. 1, an electronic device according to a first embodiment of the present invention includes an electronic element mounting substrate 1 (hereinafter also referred to as a substrate 1) and an electronic element 2 mounted on the substrate 1. Contains.

  As shown in FIG. 2, the substrate 1 includes an insulating base 11, a plurality of connection terminals 12 provided on the upper surface of the insulating base 11, and a part of the insulating base 11 provided in the insulating base 11. And a plurality of via conductors 13 exposed to the surface. The substrate 1 may further include a wiring conductor (not shown) provided on the inside and the surface of the insulating base 11.

  The insulating base 11 includes a flat base portion 11a and a frame portion 11b provided on the base portion 11a. The base portion 11a and the frame portion 11b may be integrally formed, for example.

  The insulating substrate 11 is an electrical insulator such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, a silicon nitride sintered body, or a glass ceramic sintered body. Or a resin (plastics) such as an epoxy resin, a polyimide resin, an acrylic resin, a phenol resin, a polyester resin, or a fluororesin such as a tetrafluoroethylene resin. The insulating base 11 has, for example, a structure in which a plurality of substantially rectangular insulating layers made of the above-described materials are stacked one above the other.

  The plurality of connection terminals 12 are provided on the upper surface of the frame portion 11b, and are arranged, for example, along the inner edge of the upper surface of the frame portion 11b. The plurality of connection terminals 12 are electrically connected to the plurality of electrodes of the electronic element 2 by bonding wires or the like.

  The plurality of connection terminals 12 are made of a metal material such as tungsten (W), molybdenum (Mo), manganese (Mn), silver (Ag), or copper (Cu) when the insulating base 11 is made of electrically insulating ceramics. For example, it comprises a metallized layer formed integrally with the insulating substrate 11 by firing.

  Further, when the insulating base 11 is made of resin, the plurality of connection terminals 12 are made of copper (Cu), gold (Au), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), It consists of metal materials, such as titanium (T) or those alloys.

  The plurality of via conductors 13 are provided in the vertical direction in the frame portion 11 b and are electrically connected to the plurality of connection terminals 12. The plurality of via conductors 13 have, for example, a shape having a partial region of a circular virtual reference shape in a plan view, for example, a semicircular shape. The plurality of via conductors 13 are partially exposed from the insulating base 11 on the wall surface of the frame portion 11b. In the drawing, a structure in which a plurality of via conductors 13 are exposed on the inner wall surface of the frame portion 11b is shown, but a structure in which a plurality of via conductors 13 are exposed on the outer wall surface of the frame portion 11b may be used. .

  The plurality of via conductors 13 are made of the same metal material (metallized layer) as that of the connection terminals 12 when the insulating base 11 is made of electrically insulating ceramics. Further, the plurality of via conductors 13 are made of the same metal material as that of the connection terminal 12 even when the insulating base 11 is made of resin.

  The plurality of via conductors 13 have different exposure widths. The exposed width here refers to the width in the lateral direction of the region exposed from the insulating base 11 of the via conductor 13 provided in the vertical direction, and is indicated by the symbols W1 and W2 in FIG. ing.

  The plurality of via conductors 13 include a plurality of first via conductors 13a having a first exposed width W1 and a plurality of second via conductors 13b having a second exposed width W2 smaller than the first exposed width W1. Including. In the present embodiment, for example, the plurality of first via conductors 13a are arranged so as to sandwich the plurality of second via conductors 13b.

  Of the plurality of connection terminals 12, the connection terminal 12 connected to the first via conductor 13a is referred to as a first connection terminal 12a, and the connection terminal 12 connected to the second via conductor 13b is a second connection terminal 12. Also referred to as a connection terminal 12b.

  The interval between the wall surfaces of adjacent via conductors 13 among the plurality of via conductors 13 is provided according to the exposed width of adjacent via conductors 13. The interval between the wall surfaces here refers to the distance in the lateral direction between the regions exposed from the insulating base 11 of the adjacent via conductors 13, and is indicated by reference numerals D1 and D2 in FIG. .

  With respect to the first via conductor 13a having the larger exposed width W1, the insulating base 11 secures the thickness T1 of the insulator necessary for holding the first via conductor 13a having the exposed width W1. Need to be provided. In FIG.2 (b), the insulator part of thickness T1 is virtually shown with the dashed-two dotted line. Further, with respect to the second via conductor 13b having the smaller exposed width W2, the insulating base 11 is provided so as to have an insulator portion having a thickness T2 smaller than the thickness T1 so that the size can be reduced as much as possible. ing. In FIG. 2B, the insulator portion having the thickness T2 is virtually indicated by a two-dot chain line.

  Thus, by setting the thicknesses T1 and T2 of the insulator portion, the distance D1 in the wall surface between the via conductor 13a and the via conductor 13b among the plurality of via conductors 13 is set to the adjacent via conductor 13a and the via conductor. It is set according to the exposure widths W1 and W2 with 13b. Further, the distance D2 between the via conductors 13b and the other via conductors 13b among the plurality of via conductors 13 is set according to the exposed width W2 of the adjacent via conductors 13b. For example, the distance D1 between the via conductors 13a and 13b among the plurality of via conductors 13 is at least equal to or greater than the sum of the thicknesses T1 and T2 of the insulating base. And the distance D2 between the wall surfaces of the other via conductors 13b is at least equal to or greater than the sum of the thicknesses T2 and T2 of the insulating base.

  If the plurality of connection terminals 12 have a larger width dimension than the plurality of via conductors 13, the area in contact with the insulating base 11 increases and the bonding strength with the insulating base 11 is improved. Further, if the plurality of connection terminals 12 have a width dimension larger than that of the plurality of via conductors 13, the area that can be connected to the bonding wire is increased, and the reliability of electrical connection with the bonding wire is improved. .

Further, in the example shown in FIGS. 2A and 2B, the connection terminal 12 has a width dimension corresponding to the exposed width of the via conductor 13, but a plurality of connection terminals 12 are provided. However, a structure having the same width irrespective of the exposed width of the via conductor 13 is also conceivable. However, as shown in FIG. 2A, FIG. 2B, etc., the structure in which the connection terminal 12 has a width dimension corresponding to the exposed width of the via conductor 13 is more suitable for the substrate 1. Easy to miniaturize.

  The electronic element 2 is, for example, an imaging element such as a CMOS type or a CCD type, a semiconductor integrated circuit element, a light emitting element such as an LED. The plurality of electrodes of the electronic element 2 are electrically connected to the plurality of connection terminals 12 of the substrate 1 by bonding members such as bonding wires, gold bumps or solder. In the configuration shown in FIGS. 1A and 1B, the plurality of electrodes of the electronic element 2 are electrically connected to the plurality of connection terminals 12 of the substrate 1 by bonding wires.

  Next, a method for manufacturing the electronic element mounting substrate 1 of the present embodiment will be described.

When the insulating base 11 is made of an aluminum oxide sintered body whose main component is aluminum oxide (Al ₂ O ₃ ), silica (SiO ₂ ), magnesia (MgO) as a sintering aid is added to the Al ₂ O ₃ powder. Alternatively, powder such as calcia (CaO) is added, and an appropriate binder, solvent, and plasticizer are added, and then the mixture is kneaded to form a slurry. Thereafter, a ceramic green sheet for multi-piece production is obtained by a conventionally known forming method such as a doctor blade method or a calender roll method.

  Using such a ceramic green sheet, the electronic element mounting substrate 1 is manufactured by the following steps (1) to (6).

(1) After forming a through hole for the via conductor 13 in the ceramic green sheet, printing application of a metal paste for forming a via conductor 13 (which is a via hole conductor) formed on a portion to be a wall surface of the frame portion 11b Process.
(2) A punching process or a laser processing process in which a through hole is formed in the ceramic green sheet so that the metal paste to be the via conductor 13 is formed so as to be exposed from the ceramic green sheet to be the frame portion 11b.
(3) An application step of printing the metal paste that becomes the connection terminal 12 on the upper surface of the ceramic green sheet that becomes the frame portion 11b so as to cover the upper surface of the metal paste that becomes the via conductor 13.
(4) A step of laminating a plurality of ceramic green sheets to produce a ceramic green sheet laminate.
(5) A ceramic green sheet laminate is fired at a temperature of about 1500 to 1800 ° C., and a plurality of wiring board regions that are the substrate 1 having the wall surface of the frame portion 11b, the connection terminals 12, and the via conductors 13 are arranged. A process of obtaining a single-piece wiring board.
(6) Dividing grooves are formed in the multi-cavity wiring board obtained by firing along the portion that becomes the outer edge of the substrate 1, and the substrate 1 is divided by a method of dividing along the dividing grooves, a slicing method, or the like. The process of cutting along the location used as an outer edge.

  Note that either the step (2) or the step (3) may be first.

  Further, when the conductor that penetrates the ceramic green sheet in the thickness direction is a via hole conductor, the via conductor 13 has a through hole formed in the ceramic green sheet by printing a metal paste for the via conductor 13 by a screen printing method or the like. Filling and forming the through hole for the frame portion 11b so that the via-hole conductor is exposed at the time of the above-described punching or laser processing, and firing it simultaneously with the ceramic green sheet. The metal paste for the via conductor 13 is produced by the same material and method as the metal paste used for the connection terminal 12. The via conductor 13 may be a through-hole conductor or a metal layer formed by printing a metal paste on a ceramic green sheet.

  In the step (2) described above, in order to form the insulating substrate 11 including the frame portion 11b, a through hole for the frame portion 11b is formed in some of the ceramic green sheets for the insulating substrate 11 by a die and punching. It may be formed by punching or laser processing.

  In the step (3) described above, the connection terminal 12 is formed by printing a metal paste on a ceramic green sheet for the insulating substrate 11 in a predetermined shape by a screen printing method using a mask, etc. By firing at the same time as the sheet, each of the plurality of insulating bases 11 is formed at a predetermined position. Such a metal paste is prepared by adjusting an appropriate viscosity by adding an appropriate solvent and binder to a metal powder such as tungsten, molybdenum, manganese, silver or copper and kneading them. The metal paste may contain glass or ceramics in order to increase the bonding strength with the insulating substrate 11.

  In the step (6) described above, the dividing groove can be formed by cutting the multi-cavity wiring board smaller than the thickness of the multi-cavity wiring board with a slicing device after firing. You may form by pressing or notching smaller than the thickness of a laminated body with a slicing apparatus.

  When the insulating base 11 is made of, for example, a resin, it can be formed by molding by a transfer molding method or an injection molding method using a mold that can be molded into a predetermined shape. Moreover, what impregnated resin to the base material which consists of glass fiber like glass epoxy resin, for example may be used. In such a case, it can be formed by impregnating a substrate made of glass fiber with an epoxy resin precursor and thermally curing the epoxy resin precursor at a predetermined temperature.

  Further, the connection terminal 12 and the via conductor 13 are made of a metal material such as copper, gold, aluminum, nickel, chromium, molybdenum, titanium, or an alloy thereof when the insulating base 11 is made of resin. For example, the copper foil processed into the shape of the wiring conductor is transferred onto a resin sheet made of glass epoxy resin, and the resin sheet on which the copper foil is transferred is laminated and bonded with an adhesive. Further, it is formed by integrating a metal foil or a metal column with an insulating base made of resin, or by depositing the insulating base 11 using a sputtering method, a vapor deposition method, a plating method or the like. Further, the via conductor 13 may be formed on the inner surface of the through hole formed in the resin sheet by printing or plating a metal paste, or may be formed by filling the through hole.

  In order to protect the connection terminals 12 and via conductors 13 and prevent oxidation, the exposed surfaces of the connection terminals 12 and via conductors 13 have a Ni plating layer having a thickness of 0.5 to 10 μm and gold (Au having a thickness of 0.5 to 3 μm). ) A plating layer composed of a plating layer may be sequentially deposited.

  An electronic device having the electronic device mounting board 1 formed in this way and the electronic device 2 mounted on the base portion 11a located inside the frame portion 11b of the electronic device mounting board 1 is used as an external circuit board. By mounting, the electronic element 2 is electrically connected to the external circuit board via the connection terminal 12 and the via conductor 13. The electronic element 2 is, for example, a CCD type imaging element or a CMOS type imaging element, a semiconductor element, a light emitting element such as an LED, or the like. Each electrode of the electronic element 2 is electrically connected to the connection terminal 12 of the electronic element mounting substrate 1 by a connection member 3 such as a bonding wire.

  As described above, in the substrate 1 in this embodiment, the plurality of via conductors 13a and 13b have different exposed widths W1 and W2, and the distance D1 between adjacent via conductors according to the exposed widths W1 and W2. Since D2 and D2 are different, it is possible to reduce the size while sufficiently securing the holding force of the plurality of via conductors 13 by the insulating base 11.

  In order to sufficiently secure the holding force of the plurality of via conductors 13a and 13b by the insulating base 11, the interval between the adjacent via conductors 13a and 13b is the sum of the exposed widths of the adjacent via conductors 13a and 13b. The above dimensions are preferable.

  For example, in a portion where the via conductors 13a and 13b are adjacent to each other, the distance D1 between the via conductor 13a and the via conductor 13b is a dimension that is equal to or larger than the total W1 + W2 of the exposed widths W1 and W2 of the via conductors 13a and 13b. Preferably there is. Further, in a portion where the plurality of via conductors 13b are adjacent to each other, the interval D2 between the plurality of via conductors 13b is preferably a dimension equal to or larger than the total W2 + W2 of the exposed width W2 of the via conductor 13b.

  When the insulating base 11 is made of a ceramic material, the via conductor 13 is not limited to the metal material from the viewpoint of the thermal expansion difference between the via conductor 13 and the insulating base 11 or the bonding strength between the via conductor 13 and the insulating base 11. A ceramic material may be contained.

  If the via conductor 13a having the larger exposed width has a higher content of ceramic material than the via conductor 13b having the smaller exposed width, the via conductor 13b having the smaller exposed width is constituted by a via conductor having a smaller diameter. In this case, it is possible to increase the resistance of the via conductor 13a and bring it close to the resistance of the via conductor 13b. As a result, the attenuation due to the resistance of the signal can be made equal, which makes it difficult to cause a malfunction, which is desirable. Here, the via conductor 13a and the via conductor 13b are preferably different from each other by a difference of 0.5 mass% to 5 mass%.

Further, when the insulating base 11 is made of a ceramic material, and the via conductor 13b having the smaller exposed width has a higher ceramic material content (mass%) than the via conductor 13a having the larger exposed width, the exposed width is small. In order to compensate for the lack of bonding strength of the via conductor 13b with respect to the insulating base 11, it becomes easy to realize a downsized electronic device while sufficiently securing the holding force of the via conductor 13b with the smaller exposed width. Here, the via conductor 13a and the via conductor 13b are within a range of 1.0% by mass to 10% within the above range.
It is preferable to vary the difference by mass%.

  When the plurality of via conductors 13 have different exposure widths, the via conductor 13 having the larger exposure width may be used for signal transmission. When the signal to be transmitted is a high-frequency signal, the via conductor 13a having the larger exposure width due to the skin effect can pass the signal with less waveform deterioration.

  The electronic device of this embodiment has been described with reference to FIGS. 1A and 1B in which the electronic element 2 is provided in the recess of the electronic element mounting substrate 1. A structure in which the electronic element 2 is mounted on the upper surface of the electronic element mounting substrate 1 as shown in a) and FIG. In the structure shown in FIGS. 3A and 3B, the cavity (recess) may contain a passive component such as a capacitor. In the drawing, a structure having both the base portion 11a and the frame portion 11b is shown, but a structure having only the frame portion 11b may be used.

(Second Embodiment)
An electronic device according to a second embodiment of the present invention will be described with reference to FIGS. 4 (a) and 4 (b). The electronic device of the second embodiment is different from the electronic device shown in FIG. 1A or the like in the arrangement of a plurality of via conductors 13 in plan view. Other configurations of the electronic device of the second embodiment are the same as those of the electronic device of the first embodiment.

As shown in FIG. 4A, in the second embodiment, the plurality of via conductors 13 have a shape having a partial region of a circular virtual reference shape in plan view, and the plurality of via conductors. The center of the virtual reference shape of the via conductor 13b having the smaller exposed width of 13 is provided outside or inside the wall surface of the frame portion 11b. In FIG. 4A, the center of the virtual reference shape of the via conductor 13b is provided outside the wall surface of the frame portion 11b.

  By providing the center of the virtual reference shape of the via conductor 13b having the smaller exposed width outside or inside the wall surface of the frame portion 11b, the exposed width of the via conductor 13b can be reduced, thereby reducing the size. Can be planned.

  Further, as shown in FIG. 4B, the center of the virtual reference shape of the via conductor 13a having the larger exposed width may be provided outside or inside the wall surface of the frame portion 11b. In the configuration shown in FIG. 4B, the center of the virtual reference shape of the via conductor 13a is provided inside the wall surface of the frame portion 11b.

  By providing the center of the virtual reference shape of the via conductor 13a having the larger exposed width outside or inside the wall surface of the frame portion 11b, the exposed width of the via conductor 13a can be reduced, and further miniaturization can be achieved. Can be achieved.

  In the above embodiment, via conductors having different exposure widths are formed by shifting the virtual reference shapes having different sizes, but the virtual reference shapes are the same as shown in FIG. The via conductors having different exposure widths may be formed by shifting.

(Third embodiment)
An electronic device according to a third embodiment of the present invention will be described with reference to FIGS. 6 (a) and 6 (b). The electronic device according to the third embodiment is different from the electronic device shown in FIG. 2B or the like in the arrangement of a plurality of via conductors 13. Other configurations of the electronic device of the third embodiment are the same as those of the electronic device of the first embodiment.

  In the electronic device of the third embodiment, the plurality of via conductors include a plurality of first via conductors 13a and a plurality of second via conductors 13b having different exposure widths, and the plurality of first via conductors. The conductors 13a and the plurality of second via conductors 13b are alternately arranged.

  By arranging the plurality of first via conductors 13a and the plurality of second via conductors 13b alternately, it is possible to balance the plurality of via conductors 13 on the wall surface of the frame portion 11b. It is possible to reduce the peeling of the via conductor 13 during the manufacturing process of the substrate 1 or the electronic device and during the operation of the electronic device. Further, by balancing the plurality of via conductors 13, deformation during the manufacturing process of the electronic element mounting substrate 1 or during operation of the electronic device can be suppressed.

1 Electronic device mounting board
11 Insulating substrate
11a base
11b Frame
12 Connection terminal
13 Via conductor 2 Electronic element

Claims (7)

An insulating substrate including a frame;
A plurality of connection terminals provided on an upper surface of the frame portion;
In the frame portion is provided in the vertical direction, is electrically connected to the plurality of connection terminals, and includes a plurality of via conductors exposed from the insulating base on the wall surface of the frame portion,
An interval between the wall surfaces of adjacent via conductors among the plurality of via conductors is provided according to an exposed width of the adjacent via conductor, and an interval between the wall surfaces of the adjacent via conductors is adjacent to the via. A board for mounting an electronic element, characterized in that the dimension is equal to or greater than the total exposed width of the conductor . In a plan view, the plurality of via conductors has a shape having a partial region of a circular virtual reference shape, and the center of the virtual reference shape of at least a part of the via conductors of the plurality of via conductors is from the wall surface of the frame portion. 2. The electronic element mounting board according to claim 1, wherein the electronic element mounting board is provided on an outer side or an inner side.   The plurality of via conductors include a plurality of first via conductors and a plurality of second via conductors having different exposure widths, and the plurality of first via conductors and the plurality of second via conductors. The substrate for mounting an electronic device according to claim 1, wherein the substrates are alternately arranged.   The electronic element mounting substrate according to claim 1, wherein the plurality of via conductors have different resistivities depending on an exposed width. The insulating substrate is made of a ceramic material;
2. The electronic element mounting substrate according to claim 1, wherein the via conductor having the smaller exposed width has a lower content of the ceramic material than the via conductor having the larger exposed width. The insulating substrate is made of a ceramic material;
2. The electronic element mounting substrate according to claim 1, wherein the via conductor having the smaller exposed width has a higher content of the ceramic material than the via conductor having the larger exposed width. The electronic element mounting substrate according to claim 1;
An electronic device comprising: an electronic device mounted on the electronic device mounting board and electrically connected to the plurality of connection terminals.

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