JP5635661B1 - イメージセンサの2段階封止方法 - Google Patents
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- JP5635661B1 JP5635661B1 JP2013168639A JP2013168639A JP5635661B1 JP 5635661 B1 JP5635661 B1 JP 5635661B1 JP 2013168639 A JP2013168639 A JP 2013168639A JP 2013168639 A JP2013168639 A JP 2013168639A JP 5635661 B1 JP5635661 B1 JP 5635661B1
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- H—ELECTRICITY
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- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
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- H10F39/12—Image sensors
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- H—ELECTRICITY
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- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/50—Encapsulations or containers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
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- H—ELECTRICITY
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- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/804—Containers or encapsulations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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Abstract
Description
11 第1表面
12 第2表面
13 導電ピン
20 センサチップ
21 検出領域
30 透明板体
40 中間物
41 接着剤
50 密閉空間
H 密閉空間の高さ
60 リード
61 端子
70 第1の封止樹脂層
80 第2の封止樹脂層
Claims (9)
- 基板を準備するステップと、前記基板にセンサチップを固定するステップと、前記センサチップに透明板体を固定するステップと、前記基板と前記センサチップとを電気的に接続するステップと、第1の封止樹脂層を形成するステップと、第2の封止樹脂層を形成するステップと、を含むイメージセンサの2段階封止方法であって、
前記基板を準備するステップにおいて、前記基板は、第1表面と、前記第1表面と反対側の第2表面と、を有し、
前記基板にセンサチップを固定するステップにおいて、前記センサチップは、前記第1表面に固定し、前記センサチップは、検出領域を有し、
前記センサチップに透明板体を固定するステップにおいて、前記透明板体は、中間物を介して前記センサチップに結合し、前記透明板体と前記センサチップとの間には、密閉空間が形成され、前記中間物は、前記検出領域の外側を包囲すると共に、前記検出領域を前記密閉空間中に位置させ、
前記基板とセンサチップとを電気的に接続するステップにおいて、複数のリードを介して前記基板と前記センサチップとを電気的に接続し、前記複数のリードは、中間物の外側に位置し、
前記第1の封止樹脂層を形成するステップにおいて、第1の封止樹脂体により、前記複数のリードと、前記中間物外側の前記センサチップ上表面と、前記センサチップの位置以外の前記第1表面と、を被覆し、前記第1の封止樹脂体を硬化することによって第1の封止樹脂層を形成し、前記第1の封止樹脂層は、前記透明板体側面の一部まで被覆し、前記第1の封止樹脂層の上表面の高さは、前記透明板体の上表面の高さより低く、
前記第2の封止樹脂層を形成するステップにおいて、第2の封止樹脂体によって前記第1の封止樹脂層を被覆するほか、前記第2の封止樹脂体を硬化することによって第2の封止樹脂層を形成し、前記第2の封止樹脂層は、前記透明板体側面の残りの部分を被覆し、前記第2の封止樹脂層の上表面は、前記透明板体の上表面と同一の高さであり、共平面であることを特徴とするイメージセンサの2段階封止方法。 - 前記基板は、プラスチック基板又はセラミック基板であり、前記基板の第2表面に固定される複数の導電ピンを有することを特徴とする請求項1に記載のイメージセンサの2段階封止方法。
- 前記センサチップは、CMOSセンサチップ又はCMOSセンサチップが電子回路に結合して形成されるチップであることを特徴とする請求項1に記載のイメージセンサの2段階封止方法。
- 前記中間物の材質は、ガラス又はプラスチックであり、前記中間物の上下両端には、接着剤を介し、前記センサチップと前記透明板体とが密着されることを特徴とする請求項1に記載のイメージセンサの2段階封止方法。
- 前記中間物は、液晶ポリマー材料が金型成形されて形成され、前記中間物の上下両端には、接着剤を介し、前記センサチップと前記透明板体とが密着されることを特徴とする請求項1に記載のイメージセンサの2段階封止方法。
- 前記中間物は、熱硬化接着剤、紫外線硬化接着剤、接着性を有するポリイミド又は接着性を有するアミド樹脂であり、前記中間物を硬化する工程により、前記透明板体は、前記センサチップに接着されることを特徴とする請求項1に記載のイメージセンサの2段階封止方法。
- 前記密閉空間の高さは、100μm〜500μmの間であることを特徴とする請求項4〜6のいずれか1つに記載のイメージセンサの2段階封止方法。
- 前記第1の封止樹脂体は、エポキシ樹脂(Epoxy)であることを特徴とする請求項1に記載のイメージセンサの2段階封止方法。
- 前記第2の封止樹脂体は、熱硬化樹脂であることを特徴とする請求項1に記載のイメージセンサの2段階封止方法。
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW102124442 | 2013-07-08 | ||
| TW102124442A TW201503334A (zh) | 2013-07-08 | 2013-07-08 | 影像感測器二階段封裝方法 |
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| Publication Number | Publication Date |
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| JP5635661B1 true JP5635661B1 (ja) | 2014-12-03 |
| JP2015019031A JP2015019031A (ja) | 2015-01-29 |
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| JP2013168639A Active JP5635661B1 (ja) | 2013-07-08 | 2013-08-14 | イメージセンサの2段階封止方法 |
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| Country | Link |
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| US (1) | US8969120B2 (ja) |
| JP (1) | JP5635661B1 (ja) |
| KR (1) | KR101467699B1 (ja) |
| CN (2) | CN107742630B (ja) |
| TW (1) | TW201503334A (ja) |
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- 2013-07-23 CN CN201310311466.9A patent/CN104282698B/zh active Active
- 2013-08-14 JP JP2013168639A patent/JP5635661B1/ja active Active
- 2013-08-16 KR KR20130097306A patent/KR101467699B1/ko active Active
- 2013-10-15 US US14/053,743 patent/US8969120B2/en active Active
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Also Published As
| Publication number | Publication date |
|---|---|
| CN104282698B (zh) | 2017-10-20 |
| CN107742630B (zh) | 2020-05-19 |
| TW201503334A (zh) | 2015-01-16 |
| CN104282698A (zh) | 2015-01-14 |
| US20150011038A1 (en) | 2015-01-08 |
| JP2015019031A (ja) | 2015-01-29 |
| KR101467699B1 (ko) | 2014-12-01 |
| CN107742630A (zh) | 2018-02-27 |
| US8969120B2 (en) | 2015-03-03 |
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