JP5192661B2 - Method for manufacturing silicon carbide semiconductor element - Google Patents

Description

  The present invention relates to a method for manufacturing a silicon carbide semiconductor element from a silicon carbide single crystal wafer for manufacturing a semiconductor element in which an epitaxial film is formed on a silicon carbide single crystal substrate. More specifically, the present invention manufactures a silicon carbide semiconductor element that does not affect element characteristics due to crystal defects based on positional information of crystal defects such as dislocations and stacking faults included in the epitaxial film in the wafer surface. Therefore, the present invention relates to an improvement in a method for improving the reliability of an element.

  Silicon carbide (SiC) is a semiconductor that has excellent physical properties such as a band gap of about 3 times, a saturation drift velocity of about 2 times, and a breakdown electric field strength of about 10 times that of Si, and a large thermal conductivity. Therefore, it is expected as a material for realizing a next-generation high-voltage / low-loss semiconductor element that greatly exceeds the performance of the currently used Si single crystal semiconductor.

  Currently, commercially available SiC single crystals are often manufactured using a sublimation method. In the sublimation method, the raw material SiC powder is usually placed in a crucible, and an SiC seed crystal is placed on the inner upper surface of the crucible so as to face the SiC powder. At this time, a SiC powder is sublimated by heating a crucible to about 2200-2400 degreeC. The sublimated SiC powder is recrystallized on the facing SiC seed crystal, and a new SiC single crystal is grown on the seed crystal.

In addition, a gas containing Si such as SiH ₄ as a raw material and C ₃ H ₈ or C ₂ H ₂ or the like
A so-called HTCVD method for producing a new SiC single crystal on a seed crystal in the same manner as in the sublimation method using a gas containing hydrogen has also been reported.

  After obtaining a cylindrical bulk single crystal by the method as described above, a SiC single crystal substrate is manufactured by slicing the single crystal into a thickness of about 300 to 400 microns. When manufacturing a semiconductor element using this SiC single crystal substrate, a single crystal layer having a required film thickness and carrier concentration based on required specifications such as withstand voltage of the semiconductor element may be epitaxially grown from the substrate surface. Many.

  An SiC single crystal substrate does not have a liquid phase at normal pressure and is manufactured by the method as described above. However, since the sublimation temperature is extremely high, it does not include crystal defects such as dislocations and stacking faults. Quality crystal growth is difficult. For this reason, a dislocation-free and large-diameter single-crystal manufacturing technique that has been commercialized for Si single crystal growth has not been realized.

The SiC single crystal substrate that is currently marketed, 10 ³ cm ^-2 order of screw dislocations that propagate along the c-axis of the edge dislocations propagating to 10 ² to 10 ⁴ cm ^-2 order of the c-axis direction, 10 ² There are dislocations (basal plane dislocations) propagating in the direction perpendicular to the c-axis of about 10 ⁴ cm ⁻² . These dislocation densities vary greatly depending on the quality of the substrate.

  These dislocations also propagate in the epitaxial film. At this time, it is known that some dislocations may change their directions. On the other hand, it is also known that new dislocation loops and stacking faults (8H type, 3C type, etc.) are generated when an epitaxial film is grown on a substrate. Therefore, the epitaxial film includes dislocations and stacking faults introduced during epitaxial growth in addition to dislocations and stacking faults propagated from the substrate. Further, dislocations and stacking faults may be newly formed even in the process of fabricating a semiconductor device using a single crystal substrate with an SiC epitaxial film. These dislocations and stacking faults lower the withstand voltage and reliability of a semiconductor element formed using the epitaxial film.

  Recently, technological development has been advanced to reduce the dislocation density in the substrate and the dislocation generation density during epitaxial growth. However, it is difficult to realize a cost and a substrate diameter that can reduce the crystal defect density such as dislocations and stacking faults in the epitaxial film to zero and can be industrialized. For this reason, when manufacturing a semiconductor element using a single crystal substrate with a SiC epitaxial film, these semiconductor elements may contain some crystal defects.

  Some crystal defects significantly deteriorate the initial characteristics of the semiconductor element, but some deteriorate the long-term reliability of the element without affecting the initial characteristics. In particular, the latter semiconductor element including a crystal defect that deteriorates long-term reliability may exhibit performance that is not different from a normal element in initial characteristics, and is extremely difficult to discriminate from the initial characteristics.

So far, long-term reliability degradation of SiC Schottky barrier diodes and MOS (Metal-Oxide-Semiconductor) gate structures due to dislocations and stacking faults contained in the SiC single crystal substrate with an epitaxial film has been reported. For example, when such a semiconductor element that does not have long-term reliability is incorporated in an application device such as an inverter, the reliability of the application device is significantly reduced. For this reason, establishment of a discriminating method for screening a semiconductor element containing a crystal defect that degrades long-term reliability is desired.

  In order to establish a method for discriminating and screening semiconductor elements containing crystal defects as described above, crystal defects such as dislocations and stacking faults contained in an SiC single crystal substrate with an epitaxial film are detected at high speed and with high accuracy. It is necessary to obtain position information in the substrate surface. That is, by obtaining positional information of crystal defects such as dislocations and stacking faults contained in the SiC single crystal substrate with the epitaxial film before or during the formation process of the semiconductor element, the crystal defect positional information after the element is completed. Depending on the situation, it is conceivable to perform a screening process by discriminating a semiconductor element containing a crystal defect.

  Non-destructive detection of crystal defects such as dislocations and stacking faults contained in an SiC single crystal substrate with an epitaxial film includes a photoluminescence method (Patent Document 1), a cathode luminescence method, and an electroluminescence method (Non-Patent Document 1). 2), and the topographic method has been reported. By mapping measurement using these methods, it is possible to obtain position information of dislocations and stacking faults in the SiC single crystal substrate with an epitaxial film.

  In Non-Patent Document 3, it has been reported that a large crystal defect called a micropipe is reflected in an element formation pattern by obtaining positional information in advance.

Patent Document 1 describes that position information of basal plane dislocations is detected by a photoluminescence method and reflected in element formation.
JP 2004-289023 A Materials Science Forum Vols 389-393 2002 1297-1300 Materials Science Forum Vols 433-436 2003 901-906 Materials Science Forum Vols 338-342 2000, pages 1423-1426

However, in the above-mentioned conventional method, it is difficult to obtain position information in the SiC single crystal substrate with an epitaxial film for various dislocations and stacking faults other than large crystal defects such as micropipes at high speed and with high accuracy. For this reason, it is practically impossible to obtain positional information on dislocations and stacking faults in advance for all substrates used for element formation at a practical level.

  Therefore, after completing the element formation, it is difficult to determine which semiconductor element contains a crystal defect that degrades long-term reliability without obtaining information on which element contains which kind of crystal defect. there were. For this reason, it has been desired to develop a screening technique for a semiconductor element having no long-term reliability.

  And since it was virtually impossible to obtain in advance information on dislocations and stacking faults for all the substrates used for element formation in this way, dislocations and stacking faults in the SiC single crystal substrate with an epitaxial film were not possible. A method for forming a semiconductor element in a non-existing region or a method for forming a semiconductor element by changing the element structure corresponding to the position of dislocation or stacking fault has not been realized.

For example, in the conventional method using the photoluminescence (PL) method, as shown in FIG. 14, a laser is used as an excitation light source, and laser light 101 is condensed on the wafer surface of the silicon carbide single crystal wafer 31. Irradiate the measurement spot S. The collected light including the PL light 102 from the measurement spot S is passed through a spectroscope 103 as a light selection means or a band pass filter to extract light in the wavelength region of the PL light, and a photomultiplier tube, a CCD, etc. The PL signal at the measurement spot S is detected using the photodetector 104. By scanning the laser beam 101 in the wafer surface, light emission information in the wafer surface for each measurement spot S is recorded, and two-dimensional information on crystal defect positions on the wafer surface is obtained.

  However, with this conventional method, in order to obtain crystal defect information with high two-dimensional resolution that can detect various dislocations and stacking faults other than large crystal defects such as micropipes with sufficient accuracy, laser spot diameter or light detection is used. It is necessary to reduce the diameter and increase the number of measurement spots. In recent years, the diameter of a SiC single crystal wafer has been increased, and for example, it is assumed that a wafer having a size of up to 6 inches is inspected. In order to obtain high resolution crystal defect information for such a large diameter substrate. Requires a very large number of measurement spots, and a long measurement time has been a problem.

  When manufacturing a silicon carbide semiconductor element from a silicon carbide single crystal wafer for manufacturing a semiconductor element in which an epitaxial film is formed on a silicon carbide single crystal substrate, the present invention includes a crystal defect included in the epitaxial film in the wafer surface, Specifically, the location and type of crystal defects such as dislocations and stacking faults that are not large crystal defects such as micropipes are identified, and based on this, silicon carbide has no effect on device characteristics due to crystal defects The object is to manufacture a semiconductor device.

  In addition, the present invention detects the position and type of the crystal defect at high speed and with high accuracy, thereby enabling the crystal to be crystallized at high speed and accurately to a practically sufficient level for all substrates used for element formation. An object of the present invention is to manufacture a silicon carbide semiconductor element that does not affect element characteristics due to defects.

A method for manufacturing a silicon carbide semiconductor device according to the first aspect of the present invention is a method for manufacturing a silicon carbide semiconductor device from a silicon carbide single crystal wafer for manufacturing a semiconductor device in which an epitaxial film is formed on a silicon carbide single crystal substrate. There,
Before the semiconductor element formation or in the semiconductor element formation process,
From the measurement position in the wafer surface, light emission is caused by excitation light irradiation or voltage excitation,
The light detector detects the light emission from the measurement position in a batch with an area of 1 mm ² or more ,
The operation to detect the light emission is performed for all measurement positions in the wafer surface by scanning each measurement position in the wafer surface,
Information on the position and type of dislocations and / or stacking faults obtained on the basis of the mapping data relating to light emission of the entire inspection target area in the wafer surface obtained in this way, and formation in the wafer surface To obtain information on the type and density of dislocations and / or stacking faults contained in the formation region of each semiconductor element
After completing the formation of the semiconductor element, each semiconductor element is cut and separated from the wafer,
The semiconductor element cut and separated is screened based on information on the type and density of the dislocations and / or stacking faults contained in the formation region of each semiconductor element, which is obtained in advance.

  According to the first aspect of the invention, the dislocations and stacking fault positions included in the epitaxial film in the wafer surface and the type of the defects are specified, and based on this, the semiconductor elements cut and separated are screened. A silicon carbide semiconductor element that does not affect element characteristics due to crystal defects can be obtained. As a result, the reliability of applied equipment such as an inverter incorporating the element can be improved.

A method for manufacturing a silicon carbide semiconductor device according to a second aspect of the present invention is a method for manufacturing a silicon carbide semiconductor device from a silicon carbide single crystal wafer for manufacturing a semiconductor device in which an epitaxial film is formed on a silicon carbide single crystal substrate. There,
From the measurement position in the wafer surface, light emission is caused by excitation light irradiation or voltage excitation,
The light detector detects the light emission from the measurement position in a batch with an area of 1 mm ² or more ,
The operation to detect the light emission is performed for all measurement positions in the wafer surface by scanning each measurement position in the wafer surface,
Based on the position information of specific dislocations and / or stacking faults in the wafer surface obtained based on the mapping data relating to the light emission of the entire inspection target region in the wafer surface obtained in this way, Determine the formation position of each semiconductor element,
Forming a semiconductor element at the determined formation position;
After the formation of the semiconductor elements is completed, each semiconductor element is cut and separated from the wafer.

  According to the second aspect of the invention, the position of a specific type of dislocations and stacking faults according to conditions contained in the epitaxial film in the wafer surface is specified, and based on this, long-term reliability in the wafer surface, etc. Since the semiconductor element is formed in a region where there is no crystal defect that adversely affects the element characteristics, a silicon carbide semiconductor element that does not affect the element characteristics due to the crystal defect can be obtained, and a specific crystal defect is included. The number of semiconductor elements to be reduced can be reduced. As a result, the reliability of applied equipment such as an inverter incorporating an element can be improved.

A method for manufacturing a silicon carbide semiconductor device according to a third aspect of the present invention is a method for manufacturing a silicon carbide semiconductor device from a silicon carbide single crystal wafer for manufacturing a semiconductor device in which an epitaxial film is formed on a silicon carbide single crystal substrate. There,
Before the semiconductor element formation or in the semiconductor element formation process,
From the measurement position in the wafer surface, light emission is caused by excitation light irradiation or voltage excitation,
The light detector detects the light emission from the measurement position in a batch with an area of 1 mm ² or more ,
The operation to detect the light emission is performed for all measurement positions in the wafer surface by scanning each measurement position in the wafer surface,
Formation of a semiconductor element based on positional information of specific dislocations and / or stacking faults in the wafer surface obtained based on the mapping data relating to the light emission of the entire inspection target region in the wafer surface thus obtained After the completion of the process or in the process of forming the semiconductor element, a structure for inactivating the part is added to the part where the dislocation and / or stacking fault is present in order to reduce the influence on the element characteristic of the part. Deactivate it,
Thereafter, each semiconductor element is cut and separated from the wafer.

In a preferred aspect of the third invention, the semiconductor element is a Schottky junction semiconductor element,
For the portion where dislocations or stacking faults exist in the epitaxial film at the position where the Schottky junction is formed, as the deactivation treatment, the surface portion of the epitaxial film is opposite to the conductivity type of the epitaxial film. A conductive type region is locally formed.

In another preferred aspect of the third invention, the semiconductor element is a MOS gate type semiconductor element,
As the deactivation treatment, the MOS gate structure formed on the surface of the portion where the transition exists in the epitaxial film is removed.

  According to the third aspect of the invention, the position of a specific type of dislocations and stacking faults depending on conditions contained in the epitaxial film in the wafer surface is specified, and based on this, long-term reliability in the wafer surface, etc. Since a new process that does not adversely affect the device characteristics is applied to the portion where the crystal defects that adversely affect the device characteristics exist, the crystal defects are deactivated. A silicon carbide semiconductor element that is not affected by the above can be obtained. As a result, the reliability of applied equipment such as an inverter incorporating the element can be improved.

In a particularly preferred aspect of the first to third aspects of the invention, a collective measurement area in the wafer surface where emission images are collectively detected by a two-dimensional CCD array is used as the measurement position, and excitation light is emitted from the collective measurement area. Causes light emission by irradiation or excitation by voltage application,
Light emission from the collective measurement region is detected by a two-dimensional CCD array, thereby obtaining two-dimensional information relating to light emission from each position corresponding to the array in the collective measurement region,
The operation for acquiring the two-dimensional information at once is performed for all the batch measurement regions in the wafer surface by scanning each batch measurement region in the wafer surface,
Thereby, mapping data relating to the light emission of the entire inspection target region in the wafer surface is obtained.

  According to this aspect, the light from the light source is spot-irradiated on the wafer surface and light emission from the wafer surface is not detected for each measurement spot, but a large collective measurement region is excited and the two-dimensional CCD array collectively Since the two-dimensional emission information of the measurement area is acquired in a batch and scanned for each batch measurement area, the measurement time can be greatly shortened while maintaining sufficient resolution to identify the positions of dislocations and stacking faults. Can do.

  Therefore, it is possible to manufacture a silicon carbide semiconductor element that does not affect the element characteristics due to crystal defects accurately and at a high speed that is practically sufficient for all the substrates used for element formation.

In one of the specific aspects in the first to third inventions, by irradiating the measurement position in the wafer surface with excitation light, photoluminescence light is generated from the measurement position,
Detect photoluminescence light from the measurement position by a photodetector,
The operation for detecting the photoluminescence light is performed for all measurement positions in the wafer surface by scanning each measurement position in the wafer surface,
Thereby, mapping data relating to the photoluminescence light of the entire inspection target region in the wafer surface is obtained.

In another specific aspect in the first to third inventions, by applying a voltage to the measurement position in the wafer surface, electroluminescence light is generated from the measurement position,
Detecting the electroluminescence light from the measurement position by a photodetector;
The operation of detecting the electroluminescence light is performed for all measurement positions in the wafer surface by scanning each measurement position in the wafer surface,
Thereby, mapping data relating to the electroluminescence light of the entire inspection target region in the wafer surface is obtained.

  According to the present invention, the position and type of dislocations and stacking faults included in the epitaxial film in the wafer surface are specified, and based on this, a silicon carbide semiconductor device that does not affect the device characteristics due to crystal defects is manufactured. be able to.

  Further, according to the present invention, the position and type of dislocations and stacking faults are detected at high speed and with high accuracy, and thereby, at a high speed that is practically sufficient for all substrates used for element formation, and A silicon carbide semiconductor element that does not affect the element characteristics due to crystal defects can be manufactured accurately.

Semiconductor devices that can be manufactured by the method of the present invention include Schottky barrier diodes (S
BD), junction field effect transistor (J-FET), metal / oxide film / semiconductor field effect transistor (MOS-FET) and other unipolar elements, and pn diode, bipolar junction transistor (BJT), thyristor, GTO thyristor, insulated gate Bipolar elements such as type bipolar transistors (IGBT) are included.

The types of crystal defects to be detected in the crystal defect position information acquisition step in the manufacturing method of the present invention include various types of dislocations such as screw dislocations, edge dislocations, basal plane dislocations, and single layer stacking. Defect (Single Shockley Stacking Fault), In-grown Stacking Fault, Multilayer Stacking Fault (
Various types of stacking faults such as Double Shockley Stacking Fault) are included. It is not excluded to detect the position of the micropipe together with these.
[Example 1]
Hereinafter, embodiments of the present invention will be described in the order of steps with reference to the drawings.
(1-1) Preparation of Epitaxial Silicon Carbide Single Crystal Wafer First, a silicon carbide single crystal wafer obtained by growing an epitaxial film of the same crystal type as the substrate on a silicon carbide single crystal substrate is prepared. As described above, various methods have already been developed, put into practical use, and are commercially available as methods for producing an ingot for cutting a wafer-like silicon carbide single crystal substrate and methods for growing an epitaxial film.

The epitaxial film and substrate crystal type, crystal plane, off-angle, etc. of the silicon carbide single crystal wafer to be inspected are not particularly limited. For example, an n-type 4H-SiC film is epitaxially grown on an n-type 4H-SiC substrate. Various objects such as those obtained by p-type layer formation by ion implantation on the n-type 4H—SiC epitaxial film are the inspection targets. In addition, those in which an insulating film such as an oxide film and a nitride film is formed on the epitaxial film, and those in which the surface of the epitaxial film is etched are also inspected.
(1-2) Acquisition of Position Information of Element Forming Region As shown in FIG. 1, the semiconductor elements to be formed on the wafer surface 31A on the epitaxial film side of the silicon carbide single crystal wafer 31 prepared in (1-1) When the crystal defect position is electronically stored in the computer, a minute marker 41 serving as a reference for specifying the position in the wafer surface 31A is formed.

  The marker 41 can be formed by making irregularities on the surface of the wafer surface 31A using a technique such as reactive ion etching, and many of the markers 41 are usually formed in the wafer surface 31A (in FIG. 1). For simplicity, only four are shown).

  After forming the marker 41, the computer of the crystal defect inspection apparatus described later calculates the position coordinates of the semiconductor element to be formed on the basis of this and stores it in the storage unit. In this way, position information of the element formation regions D1, D2,... Of the semiconductor elements formed in the wafer surface is acquired.

The element formation regions D1, D2,... Are separated from each other in order to finally cut and separate the elements from the wafer. In many cases, a large number of semiconductor elements of 1 mm ² to several cm ² are formed in a silicon carbide single crystal wafer 31 having a diameter of several inches, for example, 2 to 6 inches.

After acquiring the position information of the element formation regions D1, D2,..., A step of detecting the positions of various crystal defects such as dislocations and stacking faults in the wafer surface 31A is performed. Some may do.
(1-3) Acquisition of Crystal Defect Position Information Next, using an inspection apparatus described below, information on crystal defect positions 51 in the wafer surface 31A is acquired as shown in FIG. As a crystal defect inspection apparatus, a photoluminescence light mapping measurement apparatus as shown in FIG. 3 and an electroluminescence light mapping measurement apparatus as shown in FIG. 6 are used.

  FIG. 3 is a top view showing a schematic configuration of an inspection apparatus for detecting the position of a crystal defect in the wafer surface by mapping measurement of photoluminescence light from a silicon carbide single crystal wafer, and FIG. 4 is based on this inspection apparatus. It is the figure which showed the measuring method notionally. The inspection apparatus 1a in the figure includes an LED array 2 as an excitation light source.

The inspection apparatus 1a also includes a reflection / transmission mirror 3 and an X-direction moving stage that constitute an optical system for excitation light for guiding the excitation light 33 from the LED array 2 to a measurement position within the wafer surface of the silicon carbide single crystal wafer 31. 4, a reflecting mirror 7 fixed to the Y-direction moving stage 6, and an objective lens 8. The excitation light 33 from the LED array 2 is reflected by the reflecting / transmitting mirror 3. Thereafter, the light is reflected by the reflecting mirror 5 and travels in the Y direction, and then is reflected downward by the reflecting mirror 7 and is collected by the objective lens 8 therebelow and irradiated to the measurement position within the wafer surface of the silicon carbide single crystal wafer 31. Is done. As shown in FIG. 4, this measurement position is not a spot but a wide area, for example, a collective measurement area A of 1 to 10 mm ² , and the excitation light 33 is uniformly irradiated to the entire collective measurement area A.

Photoluminescence light (PL light 34) emitted from the silicon carbide single crystal wafer 31 by irradiating the collective measurement region A with excitation light is detected by the two-dimensional CCD array 9 and corresponds to the array in the collective measurement region A. Two-dimensional information related to the PL light 34 from each position is acquired collectively.

As shown in FIG. 1, the LED array 2 is used as a light source, or means such as expanding the beam diameter of the emitted light from the laser beam with a beam expander is used to form the silicon carbide single crystal wafer 31 on the wafer surface. It is possible to irradiate excitation light with uniform intensity over a wide area. The area of the collective measurement region A is preferably about 1 to 10 mm ² or more.

In order to obtain information dislocations and stacking faults in the epitaxial layer of silicon carbide single crystal wafer 31 with high accuracy, but two-dimensional resolution of about 1 to 20 microns is required, of 1 to 10 mm ² in such a resolution In order to realize collective information acquisition, it is necessary to use a two-dimensional CCD array 9 of about 1000 × 1000 pixels / cm ² .

  The objective lens 8, the reflecting mirror 7, the reflecting mirror 5, and the reflecting / transmitting mirror 3 constituting the excitation light optical system simultaneously serve as a detecting optical system that guides the PL image from the collective measurement area A to the two-dimensional CCD array 9. The PL light 34 from the collective measurement area A reaches the reflection / transmission mirror 3 through the same path as the excitation light 33, then passes through the reflection / transmission mirror 3 and is detected by the two-dimensional CCD array 9. Is done.

  In order to increase the emission intensity from the stacking fault, it is preferable to measure the silicon carbide single crystal wafer 31 while cooling it using a cooling device and maintaining it at a low temperature. In order to maximize the light emission intensity from stacking faults, the cooling temperature of the silicon carbide single crystal wafer 31 is preferably about 80 to 150K, and about 150 to 250K in terms of simple cooling. preferable.

  The operation of each component of the inspection apparatus 1a at the time of measurement is comprehensively controlled by the computer 10, and the electric signal from the two-dimensional CCD array 9 is amplified and A / D converted and then taken into the computer 10.

Using the inspection apparatus 1a having the above-described configuration, measurement for detecting the position of a crystal defect in the wafer surface of the silicon carbide single crystal wafer 31 is performed as follows. As shown in FIG. 5 (a), the marker 41 is formed on the wafer surface 31A of the silicon carbide single crystal wafer 31 as described above in (1-2). Position information of the element formation regions D1, D2,... Is stored in advance.

  Further, position information of the collective measurement areas A (x1, y1), A (x2, y1)... Among the many element formation areas D1, D2. Similarly, the position information corresponding to the pixels of the inside two-dimensional CCD array 9 can be specified using the marker 41 as a reference.

  By moving the X direction moving stage 4 and the Y direction moving stage 6 in FIG. 3 by a controller (not shown), the measurement position in the wafer surface 31A of the silicon carbide single crystal wafer 31 is changed to the element formation region D1 in FIG. By irradiating the wafer surface 31A with excitation light in accordance with the collective measurement area A (x1, y1), the two-dimensional CCD array 9 is moved from each position corresponding to the array in the collective measurement area A (x1, y1). Collects two-dimensional information related to PL light.

After two-dimensional information of PL light in the collective measurement region A (x1, y1) is acquired by the two-dimensional CCD array 9, the wafer surface of the silicon carbide single crystal wafer 31 is moved by moving the X-direction moving stage 4 in FIG. The measurement position in 31A is moved to the collective measurement area A (x2, y1). In the same manner as described above, the two-dimensional information of the PL light is collectively acquired by the two-dimensional CCD array 9.

  Thus, by scanning all the collective measurement areas A (x1, y1), A (x2, y1)... In the element forming area D1, information on the PL light for the entire element forming area D1 is obtained. To be acquired.

  .. Are measured for all element forming regions D1, D2,... In the wafer surface 31A, that is, inspection target regions in the wafer surface 31A. Mapping data relating to the entire PL light is acquired.

  The computer 10 analyzes this mapping data based on the pixels of the two-dimensional CCD array 9 by an arithmetic processing unit, and calculates the type of crystal defects such as dislocations and stacking faults and position information thereof.

The presence or absence of crystal defects can be determined by the intensity of PL light. For example, by using a color CCD (3-CCD), a band-pass filter switching type CCD, or the like as the two-dimensional CCD array 9, It is possible to selectively detect light in a wavelength region in which the emission intensity varies greatly depending on the presence or absence. The emission wavelength of the basal plane dislocation is about 420 nm, the emission wavelength of single layer stacking fault (Single Shockley Stacking Fault) is about 420 nm, the emission wavelength of in-grown stacking fault during growth Is about 470 nm
The emission wavelength of a double layer stacking fault (double shockley stacking fault) is about 510 nm, and the presence or absence of a crystal defect can be determined based on the intensity of such a light emission wavelength.

  For example, the emission spectrum of a silicon carbide single crystal wafer having no crystal defects is measured in advance before starting the inspection and stored in the storage unit of the computer 10, and the light intensity obtained by measuring the wafer is used as the reference emission spectrum. And the presence or absence of crystal defects is determined.

Also, the type of crystal defects such as dislocations and stacking faults can be determined by image analysis of the defect shape grasped as contrast or the like.
In this way, as shown in FIG. 5B, the crystal defect position 51 and its type at each measurement position such as the collective measurement area A (x1, y1), that is, the entire detection target area in the wafer surface 31A. The crystal defect position 51 and its type are acquired and stored in the computer 10.

  In the PL measurement as described above, specific examples of means that can apply wide-area irradiation to the collective measurement region include a method of using a light source in which a plurality of LEDs are combined in addition to a method of using an LED array as a light source. And a method of expanding the beam diameter of the emitted light from the laser light by using a beam expander or the like, a method of using a light source combining a plurality of lasers, and the like. When the inspection target is an SiC single crystal substrate with an epitaxial film, a light source having an emission wavelength of 380 nm or less, which is equal to or less than the wavelength corresponding to the band gap of the SiC single crystal, is used. In addition, a film having an irradiation intensity that can sufficiently detect crystal defects existing in the film is used according to the film thickness of the epitaxial film.

In this embodiment, the silicon carbide single crystal wafer is fixed and scanning is performed by moving the X direction stage and the Y direction stage. However, in the present invention, the wafer surface and the excitation constituting the measurement optical system are used. The optical position of the optical system and at least a part of the optical system for detection may be relatively moved to sequentially move the measurement position in the wafer surface. For example, it is used for conventional mapping measurement on a wafer. A method of scanning the wafer surface by moving the wafer while fixing the measurement optical system may be applied.

  FIG. 6 is a diagram showing a schematic configuration of an inspection apparatus that detects the position of a crystal defect in the wafer surface by performing mapping measurement of electroluminescence light from a silicon carbide single crystal wafer, and FIG. FIG. 7B is a diagram showing an element formation region arranged in the plane of a silicon carbide single crystal wafer which is a target for crystal defect inspection by the apparatus, and a collective measurement region by a two-dimensional CCD array arranged therein. These are the figures which expanded and showed the collective measurement area | region.

  In the inspection apparatus 1b of the same figure, an electrode is formed on the epitaxial film 31b of the silicon carbide single crystal wafer 31 to be inspected that is fixed on the movable stage 24 that can be moved in the XY direction by a controller (not shown). A transparent vapor-deposited thin film electrode 22 is formed. On the other hand, a back electrode 23 is formed by vapor deposition on the entire back surface of the wafer, and the silicon carbide single crystal wafer 31 is placed so that the back electrode 23 is in contact with the ground plate 25.

  When a voltage is applied by the power source 21 between the transparent vapor-deposited thin film electrode 22 and the grounded back electrode 23, EL light 35 is generated from a measurement position immediately below the transparent vapor-deposited thin film electrode 22 in the wafer surface. This EL light 35 is detected by the two-dimensional CCD array 9.

  Between the two-dimensional CCD array 9 and the silicon carbide single crystal wafer 31, although not shown in particular with reference numerals, for example, 2 EL lights 35 from a measurement position such as a collimating lens or a reflecting mirror are supplied. A detection optical system leading to the two-dimensional CCD array 9 is installed as necessary.

  The transparent vapor-deposited thin film electrode 22 is formed by vapor-depositing a metal such as Al or Ni by resistance vapor deposition, sputtering or the like with a thickness thinner than the wavelength in the detection wavelength region of the EL light 35, and preferably, SiC It has a film thickness of 380 nm or less corresponding to the band gap of the semiconductor.

As shown in FIGS. 6 and 7B, a large number of transparent vapor-deposited thin-film electrodes 22 are formed separately for each batch measurement region A by the two-dimensional CCD array 9 corresponding to one measurement position. The areas of the transparent vapor-deposited thin film electrode 22 and the collective measurement region A are preferably about 1 to 10 mm ² or more.

  The EL light 35 emitted from the collective measurement area A by applying a voltage from the power source 21 to the transparent vapor-deposited thin film electrode 22 immediately above the collective measurement area A of the measurement position is detected by the two-dimensional CCD array 9, and the collective measurement area Two-dimensional information related to the EL light 35 from each position corresponding to the array in A is acquired at once.

The voltage applied to the transparent vapor-deposited thin film electrode 22 is usually ± several V to several hundreds V.
In order to obtain information on dislocations and stacking faults in the epitaxial film 31b of the silicon carbide single crystal wafer 31 with high accuracy, a two-dimensional resolution of about 1 to 20 microns is required. ^{In order} to achieve ² collective information acquisition, it is necessary to use a two-dimensional CCD array 9 of about 1000 × 1000 pixels / cm ² .

  For mapping measurement using the movable stage 24, for example, an automatic or semi-automatic probing station can be used. For example, voltage application to the transparent vapor-deposited thin film electrode 22 at the measurement position is performed at the probing station. The probe pins 26 connected to each other can be automatically brought into contact with the transparent deposition thin film electrode 22.

  The temperature of silicon carbide single crystal wafer 31 at the time of measurement is preferably room temperature or about 80 to 300 K at which the emission intensity from stacking faults increases. When measuring at room temperature or lower, a cooling device is installed to cool silicon carbide single crystal wafer 31, and measurement is performed while maintaining the temperature low.

  The operation of each component of the inspection apparatus 1b at the time of measurement is comprehensively controlled by the computer 10 in FIG. 6, and the electric signal from the two-dimensional CCD array 9 is amplified and A / D converted and then taken into the computer 10. .

Using the inspection apparatus 1b having the above-described configuration, measurement for detecting the position of the crystal defect in the wafer surface of the silicon carbide single crystal wafer 31 is performed as follows. As shown in FIG. 7A, the marker 41 is formed on the wafer surface 31A of the silicon carbide single crystal wafer 31 as described above in (1-2). Position information of the element formation regions D1, D2,... Is stored in advance.

  Further, position information of the collective measurement areas A (x1, y1), A (x2, y1)... Among the many element formation areas D1, D2. Similarly, the position information corresponding to the pixels of the inside two-dimensional CCD array 9 can be specified using the marker 41 as a reference.

  By moving the movable stage 24 in FIG. 6, the measurement position in the wafer surface 31A is aligned with the collective measurement region A (x1, y1) of the element formation region W1 in FIG. The probe pin 26 is brought into contact with 22 and a voltage is applied from the power source 21 to excite the collective measurement region A (x1, y1) to emit light, and the two-dimensional CCD array 9 is configured to collect the collective measurement region A (x1, y1). The two-dimensional information regarding the EL light 35 from each position corresponding to the array in FIG.

  After the two-dimensional information of the EL light in the collective measurement region A (x1, y1) is collectively obtained by the two-dimensional CCD array 9, the movable stage 24 in FIG. 6 is moved to move within the wafer surface 31A of the silicon carbide single crystal wafer 31. The measurement position at is moved to the collective measurement area A (x2, y1). In the same manner as described above, the two-dimensional information of the EL light is collectively acquired by the two-dimensional CCD array 9.

  Thus, by scanning all the collective measurement areas A (x1, y1), A (x2, y1)... In the element forming area D1, information regarding the EL light for the entire element forming area D1 is obtained. To be acquired.

  .. Are measured for all element forming regions D1, D2,... In the wafer surface 31A, that is, inspection target regions in the wafer surface 31A. Mapping data related to the EL light is obtained for the whole.

  The computer 10 analyzes this mapping data based on the pixels of the two-dimensional CCD array 9 by an arithmetic processing unit, and calculates the type of crystal defects such as dislocations and stacking faults and position information thereof.

  The presence or absence of crystal defects can be determined by the intensity of EL light. For example, by using a color CCD (3-CCD), a band-pass filter switching type CCD or the like as the two-dimensional CCD array 9, It is possible to selectively detect light in a wavelength region in which the emission intensity varies greatly depending on the presence or absence.

  For example, an emission spectrum of a silicon carbide single crystal wafer having no crystal defects is measured in advance before starting the inspection and stored in the storage unit of the computer 10, and the light intensity obtained by measuring the sample is used as the reference emission spectrum. And the presence or absence of crystal defects is determined.

Also, the type of crystal defects such as dislocations and stacking faults can be determined by image analysis of the defect shape grasped as contrast or the like.
In this way, as shown in FIG. 7B, the crystal defect position 51 and its type in each measurement position such as the collective measurement area A (x1, y1), that is, the entire detection target area in the wafer surface 31A. The crystal defect position 51 and its type are acquired and stored in the computer 10.

  The transparent vapor deposition thin film electrode 22 covers the entire wafer surface on the epitaxial side of the silicon carbide single crystal wafer 31 in addition to a mode in which the transparent vapor deposition thin film electrode 22 is spaced apart for each batch measurement region A as shown in FIG. A voltage may be applied to the entire inspection region at once.

  Further, instead of the transparent vapor-deposited thin film electrode 22, a transparent conductive film that is independent of the wafer surface and that can be contacted to and separated from the wafer surface is used as an electrode, and this transparent conductive film is brought into contact with the wafer surface to generate voltage. May be applied to cause the collective measurement region A to emit light, and the EL light may be detected from the wafer surface side through the transparent conductive film.

  Further, in the case where the wafer surface is scanned for each batch measurement region A by the two-dimensional CCD array 9, light emission may be detected from the back surface of the wafer. For example, in the example shown in FIG. 8, a tube is formed on the upper side of the epitaxial film 31b of the silicon carbide single crystal wafer 31 to be inspected, which is fixed on the movable stage 24 movable in the XY direction by a controller (not shown). An electrode structure 29 containing a liquid metal 27 is disposed inside the member 28 so that the liquid metal 27 can be pushed out from the tip portion.

  On the other hand, a back electrode 23 is formed by vapor deposition on the peripheral surface of the wafer back surface, and the silicon carbide single crystal wafer 31 is placed so that the back electrode 23 is in contact with the ground plate 9. .

The electrode structure 29 has a liquid metal 27 such as mercury inside a tube member 28 made of metal having an inner diameter of a size corresponding to the collective measurement area A by the two-dimensional CCD array 3 corresponding to one measurement position. Contained structure. The contact area of the liquid metal 27 to the measurement position and the area of the collective measurement region A at the time of measurement are preferably about 1 to 10 mm ² or more.

  The liquid metal 27 can protrude in a meniscus shape from the distal end portion of the tube member 28 by an unillustrated push-out control mechanism for pushing out the liquid metal 29 from the proximal end side of the tube member 28. The electrode structure 29 is electrically connected to the power source 21.

  The electrode structure 29 is disposed on the epitaxial film 31b in the collective measurement region A in the silicon carbide single crystal wafer 31, and the liquid metal 27 is pushed out from the tip of the tube member 28 to thereby epitaxial film in the collective measurement region A. A voltage is applied by the power source 21 between the liquid metal 27 and the grounded back electrode 23 in contact with the liquid metal 27 and the EL from the collective measurement region A immediately below the electrode structure 29 in the wafer surface. Light 35 is generated. The EL light 35 is detected by the two-dimensional CCD array 9 from the back side of the wafer, and two-dimensional information related to the EL light 35 from each position corresponding to the array in the collective measurement region A is acquired at once.

Further, instead of the electrode structure 29, a conductive film that is independent of the wafer surface and can be contacted to and separated from the wafer surface is used as an electrode. May be applied to cause the collective measurement region A to emit light, and the EL light may be detected from the back side of the wafer.
(1-4) Element Selection for Screening Information on the position and type of crystal defects in the wafer surface obtained as described above is obtained by the computer 10 by means of the computer 10 in the element formation region D1 of the semiconductor element in the wafer surface. The information on the type and density of crystal defects included in the formation region of each semiconductor element is obtained by collating with the position information of D2.

The information is compared with a reference set in the computer 10 in advance, and a non-defective product and a defective product are selected.
(1-5) Element formation, cutting / separation, and screening Each element formation region before or during the element formation process after information on the type and density of crystal defects contained in each semiconductor element formation region is obtained To complete the formation of the semiconductor element. Thereafter, each formed semiconductor element is cut and separated from the wafer.

Then, each semiconductor element cut and separated is screened according to the selection result as to whether it is a non-defective product or a defective product obtained in advance in (1-4) above.
[Example 2]
Hereinafter, another embodiment of the present invention will be described in the order of steps with reference to the drawings. Note that the same components as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.
(2-1) Preparation of Silicon Carbide Single Crystal Wafer with Epitaxial Film A silicon carbide single crystal wafer with an epitaxial film is prepared in the same manner as (1-1) described above.
(2-2) Acquisition of position information of crystal defects According to the procedure described in (1-2) and (1-3) described above, as shown in FIG. 9, in wafer surface 31 </ b> A of silicon carbide single crystal wafer 31. The position 51 of the crystal defect is acquired. If necessary, the types of crystal defects are simultaneously identified as described above. In this embodiment, the position information of the element formation region is not acquired at this stage, but the position coordinates of the crystal defect are calculated with reference to the marker 51 and stored in the storage unit of the computer.
(2-3) Determination of semiconductor element formation position Next, the formation position of each semiconductor element in the wafer surface is determined based on the acquired position information of the crystal defects in the wafer surface. In the above (2-2), the positional information on the specific types of crystal defects included in the epitaxial film in the wafer surface, for example, basal plane dislocations that cause a deterioration in the long-term reliability of the device, Has been acquired. Based on this, as shown in FIG. 10, the element formation regions D1, D2,... Are formed so as to avoid the position 51 where the crystal defect exists and to form the semiconductor element only in the region where the crystal defect does not exist in the wafer surface.・ Determine.

The element formation regions D1, D2,... Are determined according to a program in which an algorithm for avoiding the crystal defect existence position is defined based on the crystal defect existence position, the size of the wafer and the element formation region, and the like. The position information of the element formation regions D1, D2,... Determined in this way is stored in the storage unit of the computer.
(2-4) Element formation and cutting / separation After obtaining the position information of the element formation regions D1, D2,..., Processing is performed to form semiconductor elements in the respective element formation regions in the state before the element formation. The element formation is completed. Thereafter, each formed semiconductor element is cut and separated from the wafer.
[Example 3]
Hereinafter, another embodiment of the present invention will be described in the order of steps with reference to the drawings. Note that the same components as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.
(3-1) Preparation of Silicon Carbide Single Crystal Wafer with Epitaxial Film In the same manner as (1-1) described above, a silicon carbide single crystal wafer with an epitaxial film is prepared.
(3-2) Acquisition of position information of element formation region In the same manner as (1-2) described above, position information of the element formation region is acquired. That is, FIG.
As shown in FIG. 4, after the marker 41 is formed, the position coordinates of the semiconductor element to be formed are calculated based on the marker 41 and stored in the storage unit of the computer. In this way, position information of the element formation regions D1, D2,... Of the semiconductor elements formed in the wafer surface is acquired.

After obtaining the position information of the element formation regions D1, D2,..., A part of the element formation process is performed before performing the process of detecting the position of various crystal defects such as dislocations and stacking faults in the wafer surface 31A. May be.
(3-3) Acquisition of Crystal Defect Position Information According to the procedure described in (1-2) and (1-3) described above, as shown in FIG. The position 51 of the crystal defect is acquired. If necessary, the types of crystal defects are simultaneously identified as described above.
(3-4) Element formation, deactivation processing, and cutting / separation After obtaining the position of the crystal defect in the wafer surface, the element formation regions D1, D2,... Previously obtained in (3-2) above. The semiconductor element 61 is formed according to the positional information.

After that, based on the position information of the crystal defect obtained in advance in (3-3) above, the part is inactive in order to reduce the influence of the part on the device characteristics. An inactivation process for adding a structure to be converted is performed. As a result, as shown in FIG. 11, an inactivation processing unit 62 is formed for each portion in the semiconductor element 61 where crystal defects exist.

In this manner, after inactivating each portion where crystal defects exist, each semiconductor element is cut and separated from the wafer.
Hereinafter, a preferred specific example to which the inactivation process is applied will be described.
[Example 3-1]
In this embodiment, the deactivation process is performed by using a Schottky junction semiconductor element such as a Schottky barrier diode, that is, a silicon carbide semiconductor using a rectifying action of a Schottky barrier between a SiC single crystal and a metal or a different semiconductor. It is applied to a surface portion of a device where dislocations and stacking faults that adversely affect device characteristics such as long-term reliability are present.

  Such a Schottky junction type semiconductor device has a problem that the long-term reliability of the Schottky interface characteristic is deteriorated due to dislocation in the epitaxial film or local Schottky barrier height reduction or instability in the stacking fault portion. Therefore, improvement in the stability of the Schottky interface characteristics at the dislocations and stacking faults and long-term reliability have been problems.

  Specifically, as the inactivation treatment, the surface of the epitaxial film is electrically connected to the surface of the epitaxial film with respect to the portion where the dislocation or stacking fault exists in the epitaxial film at the position where the Schottky junction is formed. A region having a conductivity type opposite to the mold is locally formed.

For example, when the element to be formed is a Schottky barrier diode, it becomes p-type when using an n-type epitaxial film and n-type when using a p-type epitaxial film with respect to a site where dislocations and stacking faults exist in the element. Such ion implantation is performed locally. At this time, in the active region of the Schottky barrier diode, a highly stable pn junction is formed without forming a Schottky junction at the crystal defect portion that may destabilize the Schottky interface characteristics. Long-term reliability of device characteristics is maintained.

  FIG. 12 is a cross-sectional view schematically showing a Schottky barrier diode subjected to the inactivation process. In the figure, a Schottky barrier diode 71 has a silicon carbide single crystal substrate 31 in which an epitaxial film 31b is grown from the surface of an n-type silicon carbide single crystal substrate 31a. Schottky electrode 72 is formed on the surface of epitaxial film 31b of silicon carbide single crystal substrate 31, and ohmic electrode 73 is formed on the back surface on the side of silicon carbide single crystal substrate 31a. Reference numeral 74 denotes a guard ring structure formed at the peripheral edge of the Schottky electrode 72 by ion implantation of a p-type dopant.

  Dislocation lines 75 are included in the epitaxial film 31b of the Schottky barrier diode 71. The dislocation lines 75 are detected in accordance with the procedure of the third embodiment and stored in the computer in advance.

  In accordance with the position information of the dislocation line 75, before the device is cut and separated from the wafer, the surface of the epitaxial film 31b at the position of the dislocation line 75 is subjected to an inactivation treatment in which p-type dopant is ion-implanted. An injection layer 76 is formed, thereby forming a pn junction near the interface with the Schottky electrode 72.

In the Schottky barrier diode 71 in which the position of the dislocation line 75 is thus deactivated, the instability of the Schottky interface characteristic is suppressed, and the long-term reliability of the element characteristic is maintained.
[Example 3-2]
In this embodiment, the deactivation process is performed by dislocations and stacking faults that adversely affect device characteristics such as long-term reliability in silicon carbide semiconductor devices having MOS (Metal-Oxide-Semiconductor) gate structures such as MOSFETs and IGBTs. Is applied to the surface site where

  In such a MOS gate type silicon carbide semiconductor device, the long-term reliability of the MOS gate characteristics due to the dislocation in the epitaxial film and the local breakdown or instability of the dielectric breakdown field of the MOS gate oxide film at the stacking fault portion. As a result, there has been a problem of improving the stability of MOS gate characteristics at dislocations and stacking faults and ensuring long-term reliability.

  In this embodiment, as the deactivation process, after forming the element in the wafer and before cutting and separating the element, the crystal defect in the epitaxial film is determined based on the positional information of the crystal defect obtained in advance. A process of removing the MOS gate structure formed on the surface of the existing portion is performed.

  Specifically, for example, a gate electrode is formed so that a MOS gate structure is not formed on a surface portion where dislocations or stacking faults that adversely affect device characteristics such as long-term reliability of the gate oxide film exist. The gate structure pattern is locally changed by a method such as removing locally.

  As a result, the MOS gate structure is not formed in the crystal defect portion that may destabilize the insulating performance of the oxide film in the MOS gate structure, and the stability of the device is improved. In other words, although dislocations and stacking faults significantly reduce the long-term reliability of the insulating properties of the oxide film in the MOS gate structure, the influence on the long-term reliability is small for other parts of the MOS gate structure element. A highly reliable MOS gate element can be obtained.

FIG. 13 is a cross-sectional view schematically showing a MOSFET that has been subjected to the inactivation process. In the figure, MOSFET 81 has a silicon carbide single crystal substrate 31 in which an n type epitaxial film 31b is grown from the surface of an n type silicon carbide single crystal substrate 31a. A gate oxide film 85 is formed on the surface of epitaxial film 31b of silicon carbide single crystal substrate 31, and gate electrode 82 is formed thereon.

  In the epitaxial film 31b, a well region 87 by ion implantation of p-type dopant and a contact region 86 by ion implantation of n-type dopant are formed. A source electrode 83 is formed on contact region 86, and a drain electrode 84 is formed on the back surface of silicon carbide single crystal substrate 31.

  Dislocation lines 88 are included in the epitaxial film 31b of the MOSFET 81, the position of which is detected according to the procedure of the third embodiment and stored in advance in a computer.

  In accordance with the position information of the dislocation line 88, the gate electrode 82 on the gate oxide film 85 at the position of the dislocation line 88 is removed by etching or the like before the device is cut and separated from the wafer. The MOSFET 81 in which the position of the dislocation line 88 is deactivated by performing the inactivation process for locally removing the gate electrode in this way is in a state where no MOS gate structure is formed in the dislocation line 88 portion. Improves stability.

The present invention has been described above based on the embodiments. However, the present invention is not limited to these embodiments, and various modifications and changes can be made without departing from the scope of the present invention.
For example, in each of the above embodiments, the PL light or EL light from each point corresponding to the array is collectively detected as a two-dimensional image for each collective measurement region A using the two-dimensional CCD array 9, but the two-dimensional CCD is used. Instead of the array 9, a photodetector such as a photomultiplier tube and wavelength selecting means such as a spectroscope and a filter are used to convert the spot light from the measurement spot S into an objective lens or the like as shown in FIG. The mapping measurement may be performed by detecting with a photodetector through the detection optical system and scanning for each measurement spot S.

It is the figure which showed the marker and element formation area which were formed in the wafer surface. It is the figure which showed the position of the crystal defect detected in the wafer surface of FIG. It is the top view which showed schematic structure of the inspection apparatus which detects the position of the crystal defect in a wafer surface by mapping measurement of PL light from a silicon carbide single crystal wafer. It is the figure which showed notionally the measuring method by the inspection apparatus of FIG. FIG. 5A shows an element formation region arranged in a plane of a silicon carbide single crystal wafer which is an object of crystal defect inspection by the inspection apparatus of FIG. 5 and collective measurement using a two-dimensional CCD array arranged in the element formation region. FIG. 6B is a diagram illustrating the region, and FIG. 6B is an enlarged view of the collective measurement region. It is the figure which showed schematic structure of the inspection apparatus which detects the position of the crystal defect in a wafer surface by carrying out mapping measurement of the EL light from a silicon carbide single crystal wafer. FIG. 7A shows an element formation region arranged in a plane of a silicon carbide single crystal wafer which is an object of crystal defect inspection by the inspection apparatus of FIG. 6 and collective measurement using a two-dimensional CCD array arranged therein. FIG. 7B is a diagram illustrating the region, and FIG. 7B is an enlarged view of the collective measurement region. It is the figure which showed schematic structure in the other example of the inspection apparatus which detects the position of the crystal defect in a wafer surface by carrying out mapping measurement of the EL light from a silicon carbide single crystal wafer. It is the figure which showed the position of the crystal defect detected in the wafer surface. It is the figure which showed the state which determined the element formation area | region in the area | region where the crystal defect in a wafer surface does not exist avoiding the position where a crystal defect exists. It is the figure which showed the state which formed the inactivation process part with respect to each part in which the crystal defect exists in the semiconductor element formed in the wafer. It is sectional drawing which showed typically the Schottky barrier diode to which the inactivation process was performed. It is sectional drawing which showed typically the MOSFET by which the inactivation process was performed. It is the figure which showed schematic structure of the conventional apparatus which carries out mapping measurement of PL light from a silicon carbide single crystal wafer.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1a, 1b Inspection apparatus 2 LED array 3 Reflection / transmission mirror 4 X direction moving stage 5 Reflecting mirror 6 Y direction moving stage 7 Reflecting mirror 8 Objective lens 9 Two-dimensional CCD array 10 Computer 21 Power supply 22 Transparent vapor deposition thin film electrode 23 Back surface electrode 24 Movable stage 25 Ground plate 26 Probe pin 27 Liquid electrode 28 Tube member 29 Electrode structure 31 Silicon carbide single crystal wafer 31a Silicon carbide single crystal substrate 31b Epitaxial film 31A Wafer surface 33 Excitation light 34 PL light 35 EL light 41 Marker 51 Crystal defect Position 61 silicon carbide semiconductor element 62 deactivation processing portion 71 Schottky barrier diode 72 Schottky electrode 73 ohmic electrode 74 guard ring structure 75 dislocation line 76 p-type ion implantation layer 81 MOSFET
82 Gate electrode 83 Source electrode 84 Drain electrode 85 Gate oxide film 86 Contact region 87 Well region 88 Dislocation line A Collective measurement region D Element formation region

Claims (7)

A method of manufacturing a silicon carbide semiconductor element from a silicon carbide single crystal wafer for manufacturing a semiconductor element in which an epitaxial film is formed on a silicon carbide single crystal substrate,
Before the semiconductor element formation or in the semiconductor element formation process,
By bringing a conductive film into contact with the wafer surface as an electrode, and applying a voltage to the measurement position in the wafer surface using the conductive film, electroluminescence light is generated from the measurement position ,
The electroluminescence light from the measurement position is collectively detected by an optical detector at an area of 1 mm ² or more,
The operation of detecting the electroluminescence light is performed for all measurement positions in the wafer surface by scanning each measurement position in the wafer surface,
Information on the position and type of dislocations and / or stacking faults in the wafer surface, obtained based on the mapping data related to the electroluminescence light of the entire inspection target region in the wafer surface, and the wafer surface To obtain information on the type and density of dislocations and / or stacking faults included in the formation region of each semiconductor element, by collating with the position information of the semiconductor element formed in
After completing the formation of the semiconductor element, each semiconductor element is cut and separated from the wafer,
A silicon carbide semiconductor characterized by screening a semiconductor element cut and separated based on information on the type and density of the dislocations and / or stacking faults contained in the formation region of each semiconductor element, which has been obtained in advance. Device manufacturing method. A method of manufacturing a silicon carbide semiconductor element from a silicon carbide single crystal wafer for manufacturing a semiconductor element in which an epitaxial film is formed on a silicon carbide single crystal substrate,
By bringing a conductive film into contact with the wafer surface as an electrode, and applying a voltage to the measurement position in the wafer surface using the conductive film, electroluminescence light is generated from the measurement position ,
The electroluminescence light from the measurement position is collectively detected by an optical detector at an area of 1 mm ² or more,
The operation of detecting the electroluminescence light is performed for all measurement positions in the wafer surface by scanning each measurement position in the wafer surface,
Based on the position information of specific dislocations and / or stacking faults in the wafer surface obtained based on the mapping data relating to the electroluminescence light of the entire inspection target region in the wafer surface thus obtained, the wafer surface Determine the formation position of each semiconductor element in the
Forming a semiconductor element at the determined formation position;
A method of manufacturing a silicon carbide semiconductor device, comprising: cutting and separating each semiconductor device from the wafer after the formation of the semiconductor device is completed. A method of manufacturing a silicon carbide semiconductor element from a silicon carbide single crystal wafer for manufacturing a semiconductor element in which an epitaxial film is formed on a silicon carbide single crystal substrate,
Before the semiconductor element formation or in the semiconductor element formation process,
By bringing a conductive film into contact with the wafer surface as an electrode, and applying a voltage to the measurement position in the wafer surface using the conductive film, electroluminescence light is generated from the measurement position ,
The electroluminescence light from the measurement position is collectively detected by an optical detector at an area of 1 mm ² or more,
The operation of detecting the electroluminescence light is performed for all measurement positions in the wafer surface by scanning each measurement position in the wafer surface,
Based on the position information of the specific dislocations and / or stacking faults in the wafer surface obtained based on the mapping data relating to the electroluminescence light of the entire inspection target region in the wafer surface thus obtained, the semiconductor element After the formation of the semiconductor device or in the process of forming the semiconductor element, a structure that inactivates the part in which the dislocation and / or stacking fault is present in order to reduce the influence on the element characteristics of the part. Perform additional deactivation treatment,
Thereafter, each semiconductor element is cut and separated from the wafer. A method for manufacturing a silicon carbide semiconductor element is provided. The semiconductor element is a Schottky junction type semiconductor element,
For the portion where dislocations or stacking faults exist in the epitaxial film at the position where the Schottky junction is formed, as the deactivation treatment, the surface portion of the epitaxial film is opposite to the conductivity type of the epitaxial film. 4. The method for manufacturing a silicon carbide semiconductor element according to claim 3, wherein the conductive type region is locally formed. The semiconductor element is a MOS gate type semiconductor element,
4. The method for manufacturing a silicon carbide semiconductor device according to claim 3, wherein the MOS gate structure formed on the surface of the portion where the transition exists in the epitaxial film is removed as the inactivation treatment. In the wafer surface, a batch measurement region in which emission images are collectively detected by a two-dimensional CCD array is set as the measurement position, and light emission is generated from the batch measurement region by excitation light irradiation or voltage excitation,
Light emission from the collective measurement region is detected by a two-dimensional CCD array, thereby obtaining two-dimensional information relating to light emission from each position corresponding to the array in the collective measurement region,
The operation for acquiring the two-dimensional information at once is performed for all the batch measurement regions in the wafer surface by scanning each batch measurement region in the wafer surface,
Thereby, the mapping data regarding the said light emission of the whole test | inspection area | region in a wafer surface is obtained, The manufacturing method of the silicon carbide semiconductor element in any one of Claims 1-5 characterized by the above-mentioned. When the photodetector detects a basal plane dislocation of the silicon carbide single crystal substrate, it detects an emission wavelength of about 420 nm, and a single layer stacking fault (Single Shockley Stacking Fault). When detecting an emission wavelength of about 420 nm, and detecting an in-grown stacking fault during growth, an emission wavelength of about 470 nm is detected and a multi-layer stacking fault (multi-layer stacking fault) is detected. The method for manufacturing a silicon carbide semiconductor device according to any one of claims 1 to 6 , wherein an emission wavelength of about 510 nm is detected when detecting a Double Shockley Stacking Fault (Double Shockley Stacking Fault). .

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