JP5098617B2 - Pre-emphasis circuit - Google Patents

Description

  The present invention relates to a pre-emphasis circuit that increases the amplitude at a signal change point, and more particularly to a pre-emphasis circuit that can generate a pre-emphasis signal with a simple configuration.

  Prior art documents related to a pre-emphasis circuit in which the amplitude is increased at the signal change point are as follows.

JP 05-344026 A JP 2000-068816 A JP 2002-368600 A JP-T-2002-525977 JP 2004-088693 A JP 2004-31614 A

  FIG. 7 is an explanatory diagram for explaining transmission / reception of a signal in a transmission line having a loss. In FIG. 7, 1 is a transmitter for transmitting a signal, 2 is a receiver for receiving a signal, and 3 is a transmission line having a loss. is there. The transmitter 1 is connected to one end of the transmission line 3, and the receiver 2 is connected to the other end of the transmission line 3.

  Here, transmission and reception of signals in the transmission line shown in FIG. 7 will be described. When the transmitter 1 transmits a rectangular wave signal as shown in FIG. 7A as a transmission signal to the transmission line 3, the signal change point is rounded due to the loss of the transmission line 3. A received signal as shown in 7 (b) is received.

  On the other hand, when the transmitter 1 transmits a pre-emphasis signal whose amplitude is increased at the signal change point as shown in FIG. 7C to the transmission line 3 as a transmission signal, the signal enhancement portion is caused by the loss of the transmission line 3. Is rounded, and the receiver 2 receives a clean rectangular wave signal as shown in FIG.

  FIG. 8 is a block diagram showing an example of a conventional pre-emphasis circuit described in “Patent Document 5”. In FIG. 8, 4 and 6 are driver circuits that output differential signals to the subsequent stage, 5 is a delay circuit that delays the inputted differential signals, and 7 is a subtracted two differential signals and outputs them as differential signals. Subtraction circuits, 100 and 101 are differential input signals, and 102 and 103 are differential output signals.

  The differential input signals 100 and 101 are respectively applied to the differential input terminals of the driver circuit 4 and the delay circuit 5, and the differential outputs of the delay circuit 5 are connected to the differential input terminals of the driver circuit 6, respectively.

  The differential outputs of the driver circuit 4 and the driver circuit 6 are connected to the two differential input terminals of the subtractor circuit 7, respectively, and differential output signals 102 and 103 are output from the differential output terminal of the subtractor circuit 7, respectively. The

  Here, the operation of the conventional example shown in FIG. 8 will be described with reference to FIG. FIG. 9 is a timing chart for explaining the operation of the conventional pre-emphasis circuit.

  The differential input signals 100 and 101 are applied to the subtraction circuit 7 through the driver circuit 4, while the differential input signals 100 and 101 delayed by the delay circuit 5 are applied to the subtraction circuit 7 through the driver circuit 6. The difference is output as the differential output signals 102 and 103.

  For example, when the output signal of the driver circuit 4 and the output signal of the driver circuit 6 have the timing shown in FIGS. 9A and 9B, the amplitude is increased at the signal change point as shown in FIG. 9C. The pre-emphasis signal thus output is output as an output signal of the subtraction circuit 7.

  As a result, the pre-emphasis signal can be generated by dividing the differential input signal into two and delaying one differential input signal to obtain the difference between the two.

  However, the conventional example shown in FIG. 8 has a problem that the chip area increases because a delay circuit having a large number of elements and a complicated configuration is used as a component.

Also, when changing the pre-emphasis intensity, it can be handled by adjusting the ratio of mixing (subtracting) the differential input signal and the delayed differential input signal, but the DC level is caused by the mixing ratio. There was a problem that it would change.
Therefore, the problem to be solved by the present invention is to realize a pre-emphasis circuit capable of generating a pre-emphasis signal with a simple configuration.

In order to achieve such a problem, the invention according to claim 1 of the present invention is:
In the pre-emphasis circuit that increases the amplitude at the signal change point,
A first transconductance amplifier that converts a differential input signal into a differential current output, a high-pass filter circuit, and a second transconductance that converts the differential input signal through the high-pass filter circuit into a differential current output An amplifier, first and second resistors for voltage conversion by adding the two differential current outputs, DC level adjusting means for outputting an output current to the first and second resistors, and the second Pre-emphasis intensity adjusting means for distributing and supplying a constant current to the transconductance amplifier and the DC level adjusting means,
The pre-emphasis intensity adjusting means is
Two transistors each having a control signal applied to a base and emitters connected to each other and outputting current from the respective collectors to the second transconductance amplifier and the DC level adjusting means;
Since it is composed of a constant current source connected to the emitters of these transistors, it is possible to generate a pre-emphasis signal with a variable pre-emphasis intensity without changing the DC level with a simple configuration.

The invention according to claim 2
In the pre-emphasis circuit according to the invention of claim 1 ,
The high-pass filter circuit is
Two capacitors each connected to one end of the differential input signal, two resistors each having the other end connected to one end, and a constant voltage source having both ends connected to the other end Thus, it is possible to generate a pre-emphasis signal with a variable pre-emphasis intensity without changing the DC level with a simple configuration.

The invention described in claim 3
In the pre-emphasis circuit according to the invention of claim 1 ,
The high-pass filter circuit is
By using a high-pass filter circuit with variable frequency characteristics, it is possible to generate a pre-emphasis signal with a variable pre-emphasis time.

The invention according to claim 4
In the pre-emphasis circuit as claimed in claim 3 ,
The high-pass filter circuit is
Two capacitors each connected to one end of the differential input signal, two resistors each having the other end connected to one end, and a constant voltage source having both ends connected to the other end And one or more capacitors provided in each of the two capacitors and connected / disconnected in parallel by a switch circuit, thereby generating a pre-emphasis signal having a variable pre-emphasis time. It becomes possible.

The present invention has the following effects.
According to the first and second aspects of the present invention, the differential input signal is divided into two, one differential input signal is converted into a differential current output by the first transconductance amplifier, and the other differential input is converted. The signal is converted into a differential current output by a second transconductance amplifier via a high-pass filter circuit, the two differential current outputs are added to convert the voltage, and the pre-emphasis intensity adjusting means converts the constant current to the second transformer. By distributing to the conductance amplifier and the DC level adjusting means, it is possible to generate a pre-emphasis signal having a variable pre-emphasis intensity without changing the DC level with a simple configuration.

According to the third and fourth aspects of the present invention, the differential input signal is divided into two parts, one differential input signal is converted into a differential current output by the first transconductance amplifier, and the difference between the other input signals is converted. A high-pass that converts a dynamic input signal into a differential current output through a high-pass filter circuit by a second transconductance amplifier, adds two differential current outputs, converts the voltage, and has variable frequency characteristics (cut-off frequency) By using the filter circuit, a pre-emphasis signal having a variable pre-emphasis time can be generated.

  Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing a pre-emphasis circuit according to an embodiment of the present invention.

  In FIG. 1, 8 and 10 are differential input / output transconductance amplifiers, 9 is a differential input / output high-pass filter circuit, and 11 and 12 are voltage conversions by adding differential current outputs from two transconductance amplifiers, respectively. Resistors 104 and 105 are differential input signals, and 106 and 107 are differential output signals.

The differential input signals 104 and 105 are respectively applied to the differential input terminals of the transconductance amplifier 8 and the high-pass filter circuit 9, and the differential outputs of the high-pass filter circuit 9 are connected to the differential input terminals of the transconductance amplifier 10, respectively. .

  The differential current outputs of the transconductance amplifier 8 and the transconductance amplifier 10 are connected to one ends of the resistors 11 and 12, respectively, and output as differential output signals 106 and 107. Finally, the other ends of the resistors 11 and 12 are connected to a positive voltage source.

  FIG. 2 is a circuit for explaining a specific example of the embodiment shown in FIG. In FIG. 2, 11, 12, 104, 105, 106 and 107 are assigned the same reference numerals as in FIG. 1, 13, 14, 21 and 22 are transistors, 15 and 23 are constant current sources, and 16 and 17 are capacitors. , 18 and 19 are resistors, and 20 is a constant voltage source.

  The transistors 13 and 14, the constant current source 15 are the transconductance amplifier 50, the capacitors 16 and 17, the resistors 18 and 19, the constant voltage source 20 are the high-pass filter circuit 51, the transistors 21 and 22, and the constant current source 23 are the transformer. Each conductance amplifier 52 is configured.

  The differential input signal 104 is applied to the base of the transistor 13 and one end of the capacitor 16, and the differential input signal 105 is applied to the base of the transistor 14 and one end of the capacitor 17, respectively. The emitter of the transistor 13 is connected to the emitter of the transistor 14 and one end of the constant current source 15.

  The other end of the capacitor 16 is connected to the base of the transistor 21 and one end of the resistor 18, and the other end of the capacitor 17 is connected to the base of the transistor 22 and one end of the resistor 19, respectively. The other end of the resistor 18 is connected to the other end of the resistor 19 and one end of the constant voltage source 20.

  The emitter of the transistor 21 is connected to the emitter of the transistor 22 and one end of the constant current source 23, respectively.

  Further, the collector of the transistor 13 is connected to the collector of the transistor 21 and one end of the resistor 11 and output as a differential output signal 106, and the collector of the transistor 14 is connected to the collector of the transistor 22 and one end of the resistor 12, respectively. At the same time, it is output as a differential output signal 107.

  Finally, the other ends of the resistors 11 and 12 are connected to a positive voltage source, respectively, and the other ends of the constant current sources 15 and 23 and the other end of the constant voltage source 20 are grounded.

  The operation of the embodiment shown in FIG. 1 will be described with reference to FIGS. FIG. 3 is a timing chart for explaining the operation of the embodiment shown in FIG.

  The differential input signals 104 and 105 are input to the transconductance amplifier 8 and output as a differential current output, while the differential input signals 104 and 105 input to the high-pass filter circuit 9 have low frequency components removed. Thereafter, it is input to the transconductance amplifier 10 and output as a differential current output.

  That is, in FIG. 2, differential input signals 104 and 105 are input to a transconductance amplifier 50 including transistors 13 and 14 and a constant current source 15 and output as a differential current output.

  Similarly, in FIG. 2, differential input signals 104 and 105 are converted into transistors 21 and 22 and a constant current source 23 via a high-pass filter circuit 51 including capacitors 16 and 17, resistors 18 and 19, and a constant voltage source 20. And output as a differential current output.

  For example, when a differential input signal as shown in FIG. 3A is input to the transconductance amplifier 8, the differential current output of the transconductance amplifier 8 is as shown in FIG.

  On the other hand, for example, when a differential input signal as shown in FIG. 3A is input to the transconductance amplifier 10 via the high-pass filter circuit 9, the differential current output of the transconductance amplifier 10 is as shown in FIG. As shown in FIG. 4, a pulse-like output is obtained when the differential input signal rises or falls.

The differential current outputs of the two transconductance amplifiers 8 and 10 are added and converted by the resistors 11 and 12 , respectively, and output as differential output signals 106 and 107.

  That is, in FIG. 2, the differential current outputs of the two transconductance amplifiers 50 and 52 are added and converted by the resistors 11 and 12, respectively, and output as differential output signals 106 and 107.

  For example, in the resistors 11 and 12, the differential current outputs shown in FIG. 3B and FIG. 3C are added and voltage-converted, respectively, so that the differential output signal is shown in FIG. As shown. That is, it is possible to obtain a pre-emphasis signal in which the amplitude at the change point of the differential input signal is increased.

  Incidentally, the high-pass filter circuit has a simpler configuration than the delay circuit used in the conventional example, so that the problem that the chip area becomes large can be improved.

  As a result, the differential input signal is divided into two, one differential input signal is converted into a differential current output by the first transconductance amplifier, and the other differential input signal is converted to the second through the high-pass filter circuit. It is possible to generate a pre-emphasis signal with a simple configuration by converting to a differential current output by a transconductance amplifier and adding two differential current outputs to perform voltage conversion.

  In the embodiment shown in FIGS. 1 and 2, the pre-emphasis intensity as shown by “PE01” in FIG. 3 cannot be changed. FIG. 4 is a block diagram showing another embodiment of the present invention, which is a pre-emphasis circuit capable of changing the pre-emphasis intensity.

  4, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 50, 51, 104, and 105 are assigned the same reference numerals as in FIG. 2, and 24 and 25 are two transformers. Resistors for adding and converting differential current outputs from conductance amplifiers, transistors 26, 27, 28 and 29, transistors 30; constant current sources; 106a and 107a differential output signals; and 108 and 109 pre-emphasis intensity Control signal.

  The transistors 21 and 22 constitute a transconductance amplifier 52a, the transistors 26 and 27 constitute a DC level adjusting means 53, and the transistors 28 and 29 and the constant current source 30 constitute a pre-emphasis intensity adjusting means 54, respectively.

  The differential input signal 104 is applied to the base of the transistor 13 and one end of the capacitor 16, and the differential input signal 105 is applied to the base of the transistor 14 and one end of the capacitor 17, respectively. The emitter of the transistor 13 is connected to the emitter of the transistor 14 and one end of the constant current source 15.

  The other end of the capacitor 16 is connected to the base of the transistor 21 and one end of the resistor 18, and the other end of the capacitor 17 is connected to the base of the transistor 22 and one end of the resistor 19, respectively. The other end of the resistor 18 is connected to the other end of the resistor 19, one end of the constant voltage source 20, and the bases of the transistors 26 and 27, respectively.

  The emitter of transistor 21 is connected to the emitter of transistor 22 and the collector of transistor 28, respectively, and the emitter of transistor 26 is connected to the emitter of transistor 27 and the collector of transistor 29, respectively. The emitter of the transistor 28 is connected to the emitter of the transistor 29 and one end of the constant current source 30, respectively.

  Further, the collector of the transistor 13 is connected to the collectors of the transistors 21 and 26 and one end of the resistor 24 and output as a differential output signal 106a. The collector of the transistor 14 is connected to the collectors of the transistors 22 and 27 and one end of the resistor 25. Each is connected and output as a differential output signal 107a.

  Finally, the other ends of the resistors 24 and 25 are connected to a positive voltage source, respectively, and the other ends of the constant current sources 15 and 30 and the other end of the constant voltage source 20 are grounded. Also, pre-emphasis intensity control signals 108 and 109 are applied to the bases of the transistors 28 and 29, respectively.

  Here, the operation of the embodiment shown in FIG. 4 will be described. However, description of operations similar to those in the embodiment shown in FIG. 2 is omitted.

  In the pre-emphasis intensity adjusting means 54, the constant current flowing through the constant current source 30 is distributed to the transconductance amplifier 52 a and the DC level adjusting means 53 by the transistors 28 and 29. The output voltage of the constant voltage source 20 is applied as a bias voltage to the differential input terminal of the DC level adjusting means 53.

  Therefore, by adjusting the control signals 108 and 109, the current flowing through the transconductance amplifier 52a is increased, and the current flowing through the DC level adjusting means 53 is decreased, whereby the pre-emphasis intensity indicated by “PE01” in FIG. Can be bigger.

  On the other hand, the control signals 108 and 109 are adjusted to decrease the current flowing through the transconductance amplifier 52a and increase the current flowing through the DC level adjusting means 53, thereby reducing the pre-emphasis intensity indicated by “PE01” in FIG. can do.

  In either case of increasing the pre-emphasis intensity or decreasing the pre-emphasis intensity, the sum of the currents supplied to the resistors 24 and 25 flows to the transconductance amplifier 52a and the DC level adjusting means 53. The sum of the currents, in other words, the output current of the constant current source 30, and the DC level does not change.

  As a result, the differential input signal is divided into two, one differential input signal is converted into a differential current output by the first transconductance amplifier, and the other differential input signal is converted to the second through the high-pass filter circuit. Is converted into a differential current output by the transconductance amplifier, and the two differential current outputs are added to each other for voltage conversion, and the pre-emphasis intensity adjusting means converts the constant current to the second transconductance amplifier and the DC level adjusting means. By distributing, it is possible to generate a pre-emphasis signal with a variable pre-emphasis intensity without changing the DC level with a simple configuration.

  FIG. 5 is a block diagram showing the configuration of another embodiment according to the present invention, which is a pre-emphasis circuit capable of changing the pre-emphasis time (pre-emphasis time).

  In FIG. 5, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 24, 25, 26, 27, 28, 29, 30, 50, 52a, 53, 54, 104, 105, Reference numerals 108 and 109 are assigned the same reference numerals as in FIG. 4, 31 and 32 are switch circuits, 33 and 34 are capacitors, and 106b and 107b are differential output signals.

  The capacitors 16, 17, 33 and 34, the resistors 18 and 19, the constant voltage source 20, and the switch circuits 31 and 32 constitute a high-pass filter circuit 55 whose frequency characteristics (cut-off frequency) are variable.

  Here, the operation of the embodiment shown in FIG. 5 will be described with reference to FIG. FIG. 6 is a timing chart for explaining the operation of the embodiment shown in FIG. However, the description of the same operation as that of the embodiment shown in FIG. 2 or FIG. 4 is omitted.

  The switch circuits 31 and 32 are controlled to be “ON / OFF” by a control signal (not shown). When the switch circuits 31 and 32 are “OFF”, the high-pass filter circuit 55 includes the capacitor 16 and the resistor 18 and the capacitor 17 and the resistor 17. Each high-pass filter is constituted by 19.

  On the other hand, when the switch circuits 31 and 32 are “ON”, the high-pass filter circuit 55 includes the parallel circuit and the resistor 18 of the capacitor 16 and the capacitor 33, and the individual high-pass filter by the parallel circuit and the resistor 19 of the capacitor 17 and the capacitor 34. Will be configured.

  When the switch circuits 31 and 32 are “ON”, the capacity is larger than when the switch circuits 31 and 32 are “OFF”, and the frequency characteristics (cut-off frequency) change to increase the pre-emphasis time. be able to.

  For example, FIG. 6A shows the differential output signal when the switch circuits 31 and 32 are “OFF” (small capacity), and FIG. 6B shows the case where the switch circuits 31 and 32 are “ON”. A (large capacity) differential output signal is shown.

The pre-emphasis time indicated by “PE12” in FIG. 6 is longer than the pre-emphasis time indicated by “PE11” in FIG. 6, in other words, the high-pass filter circuit 55 having a variable frequency characteristic (cutoff frequency) is used. This makes the pre-emphasis time variable.

  As a result, the differential input signal is divided into two, one differential input signal is converted into a differential current output by the first transconductance amplifier, and the other differential input signal is converted to the second through the high-pass filter circuit. The pre-emphasis time is converted into a differential current output by a transconductance amplifier, and the two differential current outputs are summed and converted into a voltage, and a high-pass filter circuit having a variable frequency characteristic (cut-off frequency) is used. It is possible to generate a pre-emphasis signal that is variable.

  In the description of the embodiment shown in FIG. 1 and the like, a transistor (precisely, a bipolar transistor) is used as a specific example, but of course, a MOS (Metal Oxide Semiconductor) transistor may be used. .

  In the pre-emphasis intensity adjusting means 54 of the embodiment shown in FIGS. 4 and 5, the control signal is applied to the bases, the emitters are connected to each other, and the second transconductance amplifier and the DC level adjusting means are connected to each collector. In order to improve linearity, a resistor is connected between the emitter of the two transistors and one end of the constant current source. Each may be provided.

  Similarly, a configuration in which a resistor is provided between the emitters of the two transistors and two constant current sources each having one end connected to the emitters of the two transistors may be provided.

  In the embodiment shown in FIG. 5, the high-pass filter circuit having a variable frequency characteristic (cut-off frequency) is applied to the embodiment shown in FIG. 4, but the embodiment shown in FIG. 2 (the pre-emphasis intensity is fixed). Of course, a high-pass filter circuit having a variable frequency characteristic (cut-off frequency) may be applied to the emphasis circuit.

  In the embodiment shown in FIG. 5, one capacitor is connected / disconnected in parallel by the switch circuit to each of the two capacitors 16 and 17 constituting the high-pass filter circuit. Of course, the number of capacitors connected / disconnected in parallel may be two or more.

1 is a configuration block diagram showing an embodiment of a pre-emphasis circuit according to the present invention. FIG. It is a circuit explaining the specific example of an Example. It is a timing diagram explaining operation | movement of an Example. It is a block diagram which shows the other Example which concerns on this invention. It is a block diagram which shows the other Example which concerns on this invention. It is a timing diagram explaining operation | movement of an Example. It is explanatory drawing explaining transmission / reception of the signal in the transmission line which has a loss. It is a block diagram showing an example of a conventional pre-emphasis circuit. It is a timing diagram explaining operation | movement of the conventional pre-emphasis circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Transmitter 2 Receiver 3 Transmission line 4,6 Driver circuit 5 Delay circuit 7 Subtraction circuit 8, 10, 50, 52, 52a Transconductance amplifier 9, 51, 55 High-pass filter circuit 11, 12, 18, 19, 24, 25 Resistor 13, 14, 21, 22, 26, 27, 28, 29 Transistor 15, 23, 30 Constant current source 16, 17, 33, 34 Capacitance 20 Constant voltage source 31, 32 Switch circuit 53 DC level adjusting means 54 Pre Emphasis intensity adjusting means 100, 101, 104, 105 Differential input signal 102, 103, 106, 106a, 106b, 107, 107a, 107b Differential output signal 108, 109 Control signal

Claims (4)

In the pre-emphasis circuit that increases the amplitude at the signal change point,
A first transconductance amplifier that converts a differential input signal into a differential current output, a high-pass filter circuit, and a second transconductance that converts the differential input signal through the high-pass filter circuit into a differential current output An amplifier, first and second resistors for voltage conversion by adding the two differential current outputs, DC level adjusting means for outputting an output current to the first and second resistors, and the second Pre-emphasis intensity adjusting means for distributing and supplying a constant current to the transconductance amplifier and the DC level adjusting means,
The pre-emphasis intensity adjusting means is
Two transistors each having a control signal applied to a base and emitters connected to each other and outputting current from the respective collectors to the second transconductance amplifier and the DC level adjusting means;
A pre-emphasis circuit comprising a constant current source connected to the emitters of these transistors . The high-pass filter circuit is
Two capacitors each connected to one end of the differential input signal;
Two resistors each having the other end of the capacitor connected to one end;
2. The pre-emphasis circuit according to claim 1 , wherein both of the other ends of the resistors are constituted by a constant voltage source connected to one end . The high-pass filter circuit is
A high-pass filter circuit with variable frequency characteristics
The pre-emphasis circuit according to claim 1 . The high-pass filter circuit is
Two capacitors each connected to one end of the differential input signal;
Two resistors each having the other end of the capacitor connected to one end;
A constant voltage source in which both ends of these resistors are connected to one end;
4. The pre-emphasis circuit according to claim 3, wherein the pre-emphasis circuit includes one or more capacitors provided in each of the two capacitors and connected / disconnected in parallel by a switch circuit.

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