JP3817533B2 - Active matrix organic EL panel drive circuit and organic EL display device - Google Patents

Description

  The present invention relates to a drive circuit for an active matrix organic EL panel and an organic EL display device. More specifically, the mounting area of a driver for an active matrix organic EL panel in a device such as a mobile phone or PHS can be reduced. The present invention relates to an active matrix organic EL display device suitable for high luminance color display capable of improving luminance.

The organic EL display device is capable of high-luminance display by self-light emission, and is therefore suitable for display on a small screen. Is currently attracting attention. When this organic EL display device is driven by voltage like a liquid crystal display device, the luminance variation increases, and there is a difference in sensitivity between R (red), G (green), and B (blue). There is a problem that becomes difficult.
Therefore, recently, an organic EL display device using a current-driven driver has been proposed. For example, Japanese Patent Application Laid-Open No. 10-112391 describes a technique for solving the problem of luminance variation by current driving.

An organic EL display panel of an organic EL display device for mobile phones and PHS has been proposed in which the number of column lines is 396 (132 × 3) terminal pins and the row line has 162 terminal pins. The terminal pins of the low line tend to increase more than this.
The output stage of the current drive circuit of such an organic EL display panel is provided with a drive circuit of a current source, for example, an output circuit using a current mirror circuit, corresponding to a terminal pin, regardless of whether it is an active matrix type or a simple matrix type.

In the active matrix type, a pixel circuit including a capacitor and a current-driven transistor is provided for a display cell (pixel), and the transistor is driven according to the voltage stored in the capacitor, and the organic EL element is passed through the transistor. (Hereinafter referred to as OEL element) is current driven. As the driving method, there are digital driving for controlling the OEL element by binary ON / OFF and analog driving for controlling the driving current of the OEL element by analog input data. In the case of digital driving, the display area is controlled by providing sub-pixels in the pixel, or the gradation of the display pixel is controlled according to the driving time difference by time-dividing the light emission time. In the case of analog drive, there are voltage specification type (voltage programming method) and current specification type (current programming method). In the case of voltage specification type, the capacitor terminal voltage of each pixel circuit is set by voltage signal, In the case of the current designation type, the terminal voltage of the capacitor is set by a current signal. By the way, Patent Document 1 discloses a driving circuit for an OEL element that drives an OEL element arranged in a matrix shape and resets the anode and cathode of the OEL element to ground. Further, Patent Document 2 discloses a technique for driving an OEL element with low power consumption using a DC-DC converter.

Japanese Patent Application Laid-Open No. 9-232074 JP 2001-143867 A

By the way, the current drive circuit of the simple matrix type organic EL display panel uses a drive current having a peak current to initially charge an OEL element having a characteristic that becomes a capacitive load to emit light early and suppress luminance unevenness. It is done. In this regard, the active matrix type temporarily writes and stores a voltage value corresponding to the drive current value in the capacitor of the pixel circuit, and then generates a drive current value corresponding to the stored voltage value. Therefore, the active matrix type OEL element is not driven by the peak current. The OEL element is driven in the order of writing of the drive current value and light emission, and the write period is required before the light emission period. As a result, the active matrix type has the disadvantage that the OEL element cannot emit light earlier than the simple matrix type, and the emission period is shorter than that of the simple matrix type.
The drive current value is written by charging the capacitor of the pixel circuit of several hundred pF with a current of about 0.1 μA to 10 μA. Therefore, the write time to the capacitor of the pixel circuit is 10% of the entire scanning period. It occupies a relatively large proportion of about or above. Accordingly, the light emission period is shortened and the luminance is lowered. In particular, when the number of display pixels becomes high, such as VGA, SVGA, XGA, etc., the current programming circuit needs to perform timing control within a limited time. It becomes a problem.

Further, when an active matrix type OEL element is driven by current by providing a drive circuit outside the organic EL display panel, when the high luminance color display and high density such as VGA, SVGA, XGA, etc., R, Since a large number of drive circuits corresponding to G and B are provided in the periphery of the organic EL display panel, there is a disadvantage that the mounting area of the driver is increased.
In order to reduce the mounting area of the driver, in a liquid crystal display device or the like, one drive circuit is provided corresponding to three pixels of R, G, and B, and R, G, and B pixel circuits are provided in a time division manner. There is something to drive. This is voltage driven by selecting one of the three pixels R, G, and B by time division driving through an analog switch (transmission gate). Even if this analog switch method is applied to current drive of an active matrix type OEL element, there is a problem that a voltage drop at the analog switch becomes large and a drive current with high accuracy cannot be generated.
An object of the present invention is to solve such a problem of the prior art, and it is possible to reduce the mounting area of the driver for the active matrix organic EL panel and to improve the luminance of the OEL element. An object of the present invention is to provide an active matrix organic EL panel drive circuit and an organic EL display device suitable for luminance color display.

In order to achieve such an object, the drive circuit and the organic EL display device of the active matrix type organic EL panel according to the present invention are characterized in that a drive current corresponding to each of R, G, and B is determined in response to an RGB switching signal. Drive current generating circuit for generating the first and second output terminals, receiving the drive current and the RGB switching signal, and receiving the driving current and the RGB switching signal according to the RGB switching signal. 2. A current switching circuit that selects one of the third output terminals, generates a current for charging the capacitors of the R, G, and B pixel circuits according to the drive current and outputs the current to the output terminal Further, the current switching circuit includes first, second, and second circuits provided corresponding to R, G, and B that receive drive currents corresponding to R, G, and B, respectively. Has a third current switching circuit The RGB switching signal includes first, second, and third control signals generated in a predetermined order. The first current switching circuit receives the first control signal and performs a current switching operation. Then, a current corresponding to the drive current received from the drive current generating circuit is output as a charging current to the first output terminal, and the second current switching circuit receives the second control signal and performs a current switching operation. Then, a current corresponding to the drive current received from the drive current generating circuit is output as a charging current to the second output terminal, and the third current switching circuit receives the third control signal and performs a current switching operation. Then, a current corresponding to the drive current received from the drive current generating circuit is output to the third output terminal as a charging current, and the first, second and third current switching circuits are respectively connected to the first current mirror. Circuit and input side transition of this first current mirror A first transistor provided in parallel with the first transistor, receiving a drive current in the input side transistor and the first transistor, and depending on ON / OFF of the first transistor, the input side transistor and the first transistor The current is switched between the two.

As described above, according to the present invention, the current switching circuit receives the driving current from one driving current generating circuit and stores the driving current value, and the charging current to the capacitors of the R, G, B pixel circuits is converted into RGB. Since it is generated in a time-sharing manner according to the switching signal, the current drive circuit can be substantially reduced to 1/3. In addition, since the charging current is generated by the current switching circuit, it is not necessary to generate a voltage drop like the analog switch (transmission gate), and it is possible to generate a charging current having a highly accurate current value.
Further, since the driving current values of R, G, and B can be sequentially written sequentially without taking the order of writing of the driving current values and light emission of R, G, and B individually, R, G, B The light emission periods can be overlapped, and the light emission drive periods of the R, G, and B OEL elements can be extended. Also, R, G, and B can be written together at high speed, and the total write time for R, G, and B can be shortened. Accordingly, the light emission period can be lengthened.
As a result, the present invention can realize an active matrix organic EL panel drive circuit and an organic EL display device that can reduce the mounting area of the driver with respect to the organic EL panel and improve the luminance of the OEL element.

FIG. 1 is a block diagram of an embodiment to which an active matrix type organic EL display device of the present invention is applied. FIG. 2 is an explanatory diagram of drive timings of R, G, B in an R / G / B current switching output circuit. FIG. 3 is an explanatory diagram of drive timings in which writing of drive current values of R, G, B in the R / G / B current switching output circuit is performed twice for one line of horizontal scanning, and FIG. It is explanatory drawing of the switching circuit which implements the drive timing in FIG.
In FIG. 1, reference numeral 1 denotes an organic EL panel of an active matrix type organic EL display device, which includes a data electrode driver 2, an R / G / B switching control circuit 3, a pixel circuit 4, a control circuit 5, and a low-side scan. The circuit 6 and the MPU 7 are configured.
Note that a large number of pixel circuits 4 are provided corresponding to the intersections of the X and Y matrix wirings. In the figure, one R, G and B are designated as pixel circuits 4G1, 4R1 and 4B1, respectively. The internal circuit is shown. The pixel circuits 4G2, 4R2, 4B2,... Are pixel circuits that follow the pixel circuits 4G1, 4R1, 4B1 constituting the horizontal line, but the internal circuits thereof are the same and are omitted.
Hereinafter, the pixel circuits 4G1, 4R1, and 4B1 will be mainly described. However, the pixel circuits in the horizontal direction are provided corresponding to the display pixels in the horizontal directions of R, G, and B, respectively.

XG1, XR1, XB1,... Are part of data lines (or lines connected to each column pin, the same applies hereinafter) provided for display pixels in the horizontal direction (column direction) of R, G, B respectively. Of these, XG1, XR1, and XB1 are data lines connected to the pixel circuits 4G1, 4R1, and 4B1. In addition to the pixel circuits 4G1, 4R1, and 4B1, a large number of pixel circuits arranged in the vertical direction (low direction) are commonly connected to the data lines XG1, XR1, and XB1. Reference numeral 4a denotes an OEL element provided in each pixel circuit.
The data electrode driver 2 includes R, G, B current drive circuits 10-1, 10-2,. The R, G, B current drive circuits 10-1, 10-2,... Are column drivers (drivers in the horizontal scanning direction) of the so-called organic EL drive circuit, and are composed of three data lines R, G, B. Are commonly provided in units of three pixels each consisting of one pixel in the horizontal direction of R, G, and B. Therefore, the number of R, G, B current drive circuits 10-1, 10-2,... Is one third of the total number of data lines including R, G, B, and each has the same configuration. In other words, one pixel is provided in common for each pixel of R, G, and B, and a number corresponding to the number of pixels in the horizontal scanning direction of each of R, G, and B is provided.

The relationship between the pixel circuits 4G1, 4R1, and 4B1 and the R, G, B current driving circuit 10-1 will be described below as a representative of the pixel circuit and the R, G, B current driving circuit. Each pixel circuit 4G1, 4R1, 4B1 includes a driving P-channel MOS transistor Tr having a source-drain connected between the anode side of the OEL element 4a and the power supply line + Vcc, and a gate and a source ( And a capacitor C for storing the drive current value connected to the power supply line + Vcc as a voltage value, and the gates of the transistors Tr of the pixel circuits 4G1, 4R1, and 4B1 correspond to the corresponding data of R, G, and B, respectively. The lines are connected to lines XG1, XR1, and XB1, respectively.
The data lines XG1, XR1, and XB1 are connected to input terminals IG1, IR1, and IB1, and the input terminals IG1, IR1, and IB1 are output terminals OG1 of the G, R, and B current switching output circuits 11, respectively. , OR1, and OB1.

The cathode side of the OEL elements 4 a for one horizontal line is connected in common to the switch circuit 6 a of the low-side scanning circuit 6 via the low-side line 8. The low-side scanning circuit 6 has a switch circuit 6a to which the cathode side of the OEL element 4a of one line in the horizontal scanning direction is connected after the driving current value is written in the capacitor C of each pixel circuit for one horizontal line. Set to ON. Thus, the OEL elements 4a for one line in the horizontal scanning direction are simultaneously driven with a current value determined by the voltage value written in each capacitor C.
A large number of switch circuits 6a are provided corresponding to the number of scanning lines in the vertical direction in the low-side scanning circuit 6, and the switch circuit 6a connected to the preceding low-side line is turned off in accordance with the vertical scanning, and the current scanning is performed. When the switch circuit 6a connected to the low-side line to be subjected to is turned on, the switch circuit 6a is sequentially turned on / off corresponding to the low-side scanning (vertical scanning).

The R / G / B current drive circuit 10-1 includes an R / G / B current switching output circuit 11 and a drive current generation circuit 12. The R, G, B current switching output circuit 11 includes an input stage current mirror circuit 11a composed of P-channel MOS transistors Tr1, Tr2, Tr3, Tr4, and output stage current switching circuits 11g, 11r, 11b.
The transistor Tr1 of the current mirror circuit 11a is an input side transistor, and the transistors Tr2, Tr3, Tr4 are output side transistors provided corresponding to R, G, B. The source side of these transistors is connected to the power supply line + Vcc, and the drain of the input side transistor Tr1 receives the drive current from the drive current generation circuit 12 via the input terminal IN of the R / G / B current switching output circuit 11. Driven. The current mirror circuit 11a generates a mirror current equal to the drive current at the drains of the output side transistors Tr2, Tr3, Tr4, and is provided corresponding to R, G, B, and corresponding current switching circuits. 11g, 11r, and 11b.

  Each of the current switching circuits 11g, 11r, and 11b has the same configuration, and includes a current mirror output circuit including N-channel MOS transistors Tr5 and Tr6, and a transistor Tr7 provided in parallel with the input-side transistor Tr5. The sources of the transistors Tr5 to Tr7 are grounded. The gate width ratio of the transistor Tr5 and the transistor Tr6 is N: 1 (where N is a positive number of 2 or more), and the output currents to the output terminals OG1, OR1, OB1 of R, G, B are as follows: Here, it is set to 1 / N. As a result, noise can be reduced and a highly accurate output current can be generated. In this current switching circuit, the drains of the input side transistor Tr5 and the transistor Tr7 are connected in common, and both these transistors receive a drive current. When the transistor Tr7 is turned on, the input side transistor Tr5 is turned off, and the drive current flowing through the input side transistor Tr5 is switched to the transistor Tr7. When the transistor Tr7 is turned off, the transistor Tr5 is turned on and reverse current switching is performed. Is called.

In the current switching circuit 11g, the drains of the transistors Tr5 and Tr7 connected in common are connected to the drain of the transistor Tr2 of the current mirror circuit 11a, and receive a drive current from the transistor Tr2. The drain of the transistor Tr6 of the current switching circuit 11g is connected to the output terminal OG1, and charging current (sinking current) is input to the input terminal IN of the capacitor C of the pixel circuit 4G1 corresponding to G to this terminal OG1. Output according to the drive current at that time.
Similarly, in the current switching circuit 11r, the drains connected in common to the transistors Tr5 and Tr7 are connected to the drain of the transistor Tr3 of the current mirror circuit 11a and receive a drive current from the transistor Tr3. The drain of the transistor Tr6 of the current switching circuit 11r is connected to the output terminal OR1, and charging current (sinking current) is input to the input terminal IN of the capacitor C of the pixel circuit 4R1 corresponding to R at this terminal. Output according to the drive current at that time.
Further, in the current switching circuit 11b, the drains of the transistors Tr5 and Tr7 connected in common are connected to the drain of the transistor Tr4 of the current mirror circuit 11a, and receive a drive current from the transistor Tr4. The drain of the transistor Tr6 of the current switching circuit 11b is connected to the output terminal OB1, and charging current (sinking current) is input to the input terminal IN of the capacitor C of the pixel circuit 4B1 corresponding to B to this terminal OB1. Output according to the drive current at that time.

The transistor Tr7 of each of the current switching circuits 11g, 11r, and 11b has switching control signals Sg, Sr, and Sb from the R, G, and B switching control circuit 3 at its gates, respectively, and inverters 3g, 3r, and 3b, and control lines 13g, 13r, Receive via 13b. In each current switching circuit 11g, 11r, 11b, when the switching control signals Sg, Sr, Sbr are at a high level (hereinafter “H”), “L” is applied to the gate of the transistor Tr7 by the inverter, so that the transistor Tr7 is turned off. On the other hand, at the low level (hereinafter, “L”), “H” is applied to the gate of the transistor Tr7, so that the transistor Tr7 is turned on.
Therefore, in each current switching circuit 11g, 11r, 11b, when the switching control signals Sg, Sr, Sb are "L", the transistor Tr7 is turned on and the input side of the current mirror output circuit of the current switching circuits 11g, 11r, 11b. The current flowing through the transistor Tr5 is switched to the transistor Tr7, so that no current flows through the transistor Tr5, and no output current is generated in the output-side transistor Tr6 connected to the transistor Tr5 in a current mirror. Conversely, when the switching control signals Sg, Sr, and Sb are “H”, the transistor Tr7 is turned OFF and the output side transistor Tr6 outputs a charging current.

As shown in FIG. 2, the switching control signals Sg, Sr, and Sb are control signals that become “H” in a predetermined order according to the drive timings of R, G, and B. Here, G, R, and B
It becomes “H” for a certain period in this order. Each of the current switching circuits 11g, 11r, and 11b has an output current appearing at the output side transistor Tr6 of the current switching circuits 11g, 11r, and 11b when the switching control signals Sg, Sr, and Sb are set to “H”, respectively. Output to the specified output terminal. This output current is a charging current for the capacitor C of each of the R, G, and B pixel circuits.
Here, the switching control signals Sg, Sr, and Sb are G pixel circuits and R pixels that constitute display pixels for one horizontal line arranged in the horizontal scanning direction via control lines 13g, 13r, and 13b, respectively. The driving current value is written to the capacitor C of the R, G, B pixel circuit simultaneously for one horizontal line. The R / G / B switching control circuit 3 is controlled by the control circuit 5 and generates switching control signals Sg, Sr, Sb.

The output currents of the current switching circuits 11g, 11r, and 11b are determined by the driving current input from the driving current generation circuit 12 to the input terminal IN of the R / G / B current switching output circuit 11. The drive current generation circuit 12 includes a D / A conversion circuit 12a, a reference current generation circuit 12b, a display data register 12c, and a data selection circuit 12d.
The D / A conversion circuit 12a is driven by receiving the reference current Iref from the reference current generating circuit 12b, receives display data from the display data register 12c, and generates a drive current corresponding to the display data value based on the reference current Iref. . The generated drive current is input to the input terminal IN.
The display data register 12c has storage areas DR, DG, and DB corresponding to R, G, and B, respectively, and each data includes switching control signals Sg, Sr, and Sb and inverters 3g, 3r, and 3b. Is selected by the data selection circuit 12d. The data selection circuit 12d selects one of the R, G, and B data corresponding to the “H” control signal when any of the switching control signals Sg, Sr, and Sb is “H”, and D / A conversion circuit 12a.

Therefore, the drive current generation circuit 12 adjusts R in accordance with the timing when any of the switching control signals Sg, Sr, Sb becomes “H” (timing when the input signal to the data selection circuit 12d becomes “L”). , G, B display data is selected, and the D / A conversion circuit 12a generates drive currents corresponding to the R, G, B display data according to the respective timings. • Input to the input terminal IN of the B current switching output circuit 11. As a result, R, G, B output terminals OG1, OR1, OB1 are connected to R, G, and R output terminals OG1, OR1, OB1 in accordance with the drive timing of R, G, B when any one of the switching control signals Sg, Sr, Sb becomes “H”. , B respectively generate output currents.
When the switching control signals Sg, Sr, Sb are all “L”, the input value of the D / A conversion circuit 12a is “0”, and the drive current value generated by the D / A conversion circuit 12a is “0”. It becomes. As a result, the current generated in the current switching circuits 11g, 11r, and 11b also becomes “0”, so that useless power consumption does not substantially occur.

FIG. 2 is an explanatory diagram of drive timings of R, G, and B in the R / G / B current switching output circuit.
The switching control signals Sg, Sr, and Sb are set to “H” during the writing period T to the capacitor C in order of G, R, and B in the order shown in FIGS. 2 (a), (b), and (c). Become. Therefore, charge currents are generated simultaneously for the number of pixels in the horizontal direction in the order of G, R, and B in the order of G, R, and B from the current switching circuits 11g, 11r, 11b,..., Respectively, and the pixel circuits 4G1, 4R1, 4B1 The driving current value is stored as a voltage value in each of the capacitors C. Next, in the display period D, the low-side switch circuit 6a to be scanned is turned ON, and as shown in FIG. 2 (d), R, G, B OEL elements 4a for one horizontal line. Is driven, and the G, R, and B OEL elements 4a for one horizontal line of the pixel circuits 4G1, 4R1, 4B1, 4G2, 4R2, 4B2,. In addition, before the writing period T, there is a line switching period (shaded portion) of the low-side scanning.

In this way, the pixel circuit 4 is provided for each of R, G, and B by storing the drive current value in a time-division manner in each capacitor C in one horizontal line portion of R, G, and B for one horizontal scanning line. Since the drive current value writing period T and the light emission period D provided in are separated from each other, the drive current value can be stored in the capacitor C at high speed. Here, the writing period of each drive current value of G, R, and B is T / 3, but these periods of G, R, and B may not be equal.
In this embodiment, the time division writing control is performed for the writing of the drive current value in this way. Specifically, the current drive circuit of the pixel circuit is divided in time division with respect to R, G, B corresponding to the display pixel. By performing the switching operation, the current driving circuit can be substantially reduced to ３, and the mounting area of the driver with respect to the organic EL panel of the current driving circuit can be reduced.

In the present invention, when the drive current values are stored in the time-division manner in the R, G, and B capacitors C of the pixel circuit, the display circuit unit of R, G, and B is not used simultaneously for one horizontal line. The drive current value may be written sequentially for each pixel circuit and stored as a voltage value so that the R, G, and B pixels emit light simultaneously. Even in such a case, the present invention can sequentially write R, G, and B sequentially in units of display pixels, so that the light emission periods of R, G, and B can be extended in units of pixels. . Further, since the driving current values of R, G, and B can be written continuously, the writing period becomes shorter and faster than when writing periods are individually provided for R, G, and B, respectively. This also makes it possible to lengthen the light emission period.
Further, in the embodiment, the driving current values are stored in the R, G, B capacitors C for one line of horizontal scanning in a time-sharing manner, but the present invention is for one screen of R, G, B. Control may be performed so that the drive current value is sequentially written in the pixel circuit capacitor C in a time-division manner, and then each of the R, G, and B screens emits light simultaneously.
FIG. 2E shows a driving example in which the writing period is n times as large as in such a case.
If the total number of pixel circuits for one screen including R, G, and B is n, writing of n capacitors C and light emission of n OEL elements are separated. As a result, as shown in FIG. 2E, the writing period T is n × T and the light emission period D is n × D.

FIG. 3 shows an example of drive timing in which writing of drive current values of R, G, B in the R / G / B current switching output circuit is performed twice for one line of horizontal scanning.
In this embodiment, the horizontal scanning line is divided into two parts in the front-rear direction, and the driving current value is written to the capacitor C of the R, G, B pixel circuit in the first half of the horizontal scanning line. To do. Then, the driving current value is written to the capacitor C of the R, G, B pixel circuit in the latter half of the horizontal scanning line in the latter half of the writing period T. FIG. 4 shows a switching circuit for this purpose.

  In FIG. 4, each changeover switch of the changeover circuit 9 is provided corresponding to each output terminal, and the output terminals OG1 to OBi correspond to the output terminals in the first half of one horizontal line, and the output terminal OGi + 1. Up to OBn correspond to the output terminals of the second half of one horizontal line. As shown in FIG. 3E, during the period of the pulse P which is “L” in the first half of the writing period T, the switches from the output terminals OG1 to OBi are ON as shown in the figure. The output terminals OG1 to OBi are connected to the input terminals IG1 to IOBi, respectively. At this time, the switches from the latter half of the output terminals OGi + 1 to OBn are OFF, and the output terminals OGi + 1 to OBn are not connected to the input terminals IGi + 1 to IBn. In the latter half of the writing period T, the pulse P becomes “H”. During this period, the ON / OFF state of the switch is reversed, and the output terminals OGi + 1 to OBn are connected to the input terminals IGi + 1 to IBn. OG1 to OBi are not connected to the input terminals IG1 to IOBi.

In this embodiment, a switching circuit 9 shown in FIG. 4 is added to FIG. 4 is provided between the output terminals OG1, OR1, OB1,... Of R, G, B and the input terminals IG1, IR1, IB1,. The switching circuit 9 connects the output terminals of the first half of the horizontal 1 line to the capacitors C of the R, G, B pixel circuits of the first half of the horizontal 1 line at the timing of the first half of the writing period T. At the latter half of the writing period T, each output terminal in the second half of the horizontal 1 line is connected to the capacitor C of each R, G, B pixel circuit in the second half of the horizontal one line. The switching circuit 9 receives the pulse P rising from the R / G / B switching control circuit 3 at the latter half of the writing period T shown in FIG.
On the other hand, as shown in FIGS. 3A, 3B, and 3C, the switching control signals Sg, Sr, and Sb have a period T / 2 and a pulse width T / 6 of “H”. The pulse is generated twice during the writing period T.
As a result, as shown in FIG. 3 (d), the entire drive timing is driven after the writing of drive current values to the R, G, B OEL elements 4a for one horizontal line. The OEL elements 4a of G, R, and B for one horizontal line of the pixel circuits 4G1, 4R1, 4B1, 4G2, 4R2, 4B2,.
In FIG. 4, the writing is performed twice in the writing period T separately for the first-half output terminal and the second-half output terminal to be subjected to horizontal scanning. Of course, the entire output terminal may be divided into m (m is an integer of 2 or more), and writing may be performed m times in the writing period T.

As described above, in the current switching circuit according to the embodiment, the N-channel input transistor Tr5 and the N-channel transistor Tr7 have a drain connected in common, and both these transistors receive a drive current. The present invention is not limited to such a current switching circuit. For example, current switching may be performed by coupling sources of P-channel transistors. Bipolar transistors may also be used. The present invention may be any switching circuit in which a current switching operation is performed in accordance with ON / OFF of a transistor or a diode.
Moreover, although the current switching circuits 11g, 11r, and 11b of the embodiment are provided outside the pixel circuit of the organic EL panel 1, they may be integrated in the organic EL panel similarly to the pixel circuit.
In the embodiment, the MOSFET transistor is mainly used, but it is needless to say that the bipolar transistor may be mainly used. In addition, the N-channel transistor (or npn-type) in the embodiment can be replaced with a P-channel (or pnp-type) transistor, and the P-channel transistor can be replaced with an N-channel (or npn-type) transistor. In this case, the power supply voltage is negative, and the transistor provided upstream is provided downstream.

FIG. 1 is a block diagram of an embodiment to which an active matrix type organic EL display device of the present invention is applied. FIG. 2 is an explanatory diagram of drive timings of R, G, and B in the R / G / B current switching output circuit. FIG. 3 is an explanatory diagram of drive timings for writing drive current values of R, G, and B twice for one line of horizontal scanning in the R / G / B current switching output circuit. FIG. 4 is an explanatory diagram of a switching circuit that implements the drive timing in FIG.

Explanation of symbols

1 ... Organic EL panel,
2 ... Data electrode driver, 3 ... R / G / B switching control circuit,
4, 4G1, 4R1, 4B1, ... pixel circuit,
4a ... Organic EL element, 4b ... Inverter,
5 ... Control circuit,
6 ... Low side scanning circuit,
7 ... MPU, 9 ... switching circuit,
10, 10a-1 ... R, G, B current drive circuit,
11 ... R / G / B current switching output circuit,
11g, 11r, 11b ... current switching output circuit,
12 ... Driving current generation circuit,
12a ... D / A conversion circuit,
12b: reference current generating circuit,
12c: display data register,
12d: Data selection circuit,
C: Capacitor,
Tr1 to Tr7: Transistors.

Claims (13)

A pixel circuit having an organic EL element, a capacitor for storing a voltage value corresponding to a current value of a driving current of the organic EL element, and a transistor for outputting the driving current to the organic EL element according to the voltage value In an active matrix organic EL panel drive circuit for current driving an active matrix organic EL panel provided corresponding to each of R, G, and B display colors,
A drive current generation circuit that receives RGB switching signals and generates drive currents corresponding to R, G, and B in a predetermined order;
The first, second, and third output terminals having the first, second, and third output terminals, receiving the drive current and the RGB switching signal, and in the predetermined order according to the RGB switching signal And a current switching circuit that generates a current for charging the capacitor of each of the pixel circuits of R, G, and B according to the drive current and outputs the current to the output terminal. ,
The current switching circuit includes first, second, and third current switching circuits provided corresponding to the R, G, and B respectively receiving the driving currents corresponding to the R, G, and B, respectively. The RGB switching signal includes first, second, and third control signals generated in the predetermined order, and the first current switching circuit receives the first control signal and performs current switching. A current corresponding to the drive current received from the drive current generation circuit is output as the charging current to the first output terminal, and the second current switching circuit outputs the second control signal. In response to the current switching operation, a current corresponding to the driving current received from the driving current generating circuit is output to the second output terminal as the charging current, and the third current switching circuit includes the third current switching circuit. In response to the control signal of Outputs a current corresponding to the driving current received from the generator as the charging current to the third output terminal,
Each of the first, second, and third current switching circuits includes a first current mirror circuit and a first transistor provided in parallel with an input side transistor of the first current mirror, and the drive An active matrix organic EL that receives current between the input-side transistor and the first transistor and switches current between the input-side transistor and the first transistor in accordance with ON / OFF of the first transistor. Panel drive circuit. 2. The drive circuit for an active matrix organic EL panel according to claim 1 , wherein the RGB switching signal is generated in a writing period for storing the voltage value in the capacitor. The current for charging the capacitor is a current drawn from the pixel circuit to the selected output terminal, and a drive circuit including the drive current generation circuit and the current switching circuit is provided for each of R, G, and B. 3. The drive circuit for an active matrix organic EL panel according to claim 2 , wherein one common pixel is provided corresponding to the number of R, G, B pixels in the horizontal scanning direction. The drive current generation circuit stores data for generating the drive current corresponding to the R, G, and B, and outputs from the register according to the first, second, and third control signals. A D / A conversion circuit that receives the data corresponding to R, G, and B, and D / A converts the received data to generate the drive current in the predetermined order; 3. The drive circuit for an active matrix organic EL panel according to claim 2 , wherein the second and third current switching circuits are connected to the pixel circuit via data electrodes, respectively. The drive current generation circuit further includes a data selection circuit, which corresponds to the R, G, and B from the register according to the first, second, and third control signals, respectively. And the first, second, and third current switching circuits receive the first, second, and third control signals, respectively, and receive the first, second, and third control signals. 5. The drive circuit for an active matrix organic EL panel according to claim 4 , wherein the transistor is turned on or off. The current switching circuit further includes a second current mirror circuit having output transistors corresponding to the R, G, and B with respect to the input side transistor, and the second current mirror circuit includes the input side transistor. Receiving the drive current from the D / A conversion circuit and supplying the drive current to the first current mirror circuits of the first, second, and third current switching circuits via the output transistors, respectively. The drive circuit of the active matrix type organic EL panel according to claim 5, which is sent out. And a switching control circuit that generates the first, second, and third control signals, and the current for charging the capacitor is equal to the number of pixels in the horizontal scanning direction of each of R, G, and B. The drive circuit of the active matrix type organic EL panel according to claim 4, which is generated at the same time. 5. The active matrix organic EL panel according to claim 4 , wherein the entire number of the output terminals subject to horizontal scanning are divided into m (m is an integer of 2 or more) and writing is performed m times in the writing period. Driving circuit.   In accordance with the RGB switching signal, the current switching circuit sends one of the drive currents R, G, B and one of the first, second, and third output terminals in a predetermined order in the predetermined order. 2. A current for charging the capacitor of each of the pixel circuits of R, G, B according to the drive current is generated and output to the selected output terminal. A drive circuit for the active matrix organic EL panel described. The current switching circuit includes first, second, and third current switching circuits provided corresponding to the R, G, and B respectively receiving the driving currents corresponding to the R, G, and B, respectively. The RGB switching signal includes first, second, and third control signals generated in the predetermined order, and the first current switching circuit receives the first control signal and performs current switching. A current corresponding to the drive current received from the drive current generation circuit is output as the charging current to the first output terminal, and the second current switching circuit outputs the second control signal. In response to the current switching operation, a current corresponding to the driving current received from the driving current generating circuit is output to the second output terminal as the charging current, and the third current switching circuit includes the third current switching circuit. In response to the control signal of Driving circuit of an active matrix type organic EL panel according to claim 9, wherein outputting a current corresponding to the driving current received from the generator as the charging current to the third output terminal. 11. The drive circuit for an active matrix organic EL panel according to claim 10 , wherein the RGB switching signal is generated in a writing period for storing the voltage value in the capacitor.   An organic EL display device having a drive circuit for an active matrix organic EL panel according to any one of claims 1 to 11. 13. The organic EL display device according to claim 12 , further comprising a switching signal generating circuit for generating the RGB switching signal, the organic EL panel, and a controller, wherein the switching signal generating circuit is controlled by the controller.

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