JP3436160B2 - Clock recovery device and clock recovery method - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clock reproducing apparatus for reproducing a clock of a transmission source at a reception side by using clock information transmitted from the transmission source in a communication or broadcasting apparatus.

[0002]

2. Description of the Related Art FIG. 11 shows, for example, ITU-T White Book, audiovisual / multimedia related (H
Series) Recommendation H. Recommendation (February 18, 1995, published by Japan ITU Association) 222.0 (182-1)
FIG. 8 is a block diagram showing the conventional clock regenerator shown in page 84). In the figure, 11 is a voltage controlled oscillator, 12 is a counter operated by the regenerated clock output from the voltage oscillator 11, 13 is a subtractor, and 14 is a subtractor. Is a low-pass filter and a gain control circuit.

In this recommendation, the clock information sent from the transmission source is referred to as reception clock information (PCR) (program
clock reference), the clock information reproduced on the receiving side is called reproduction clock information (STC) (system time clock), and the reception clock information (PCR) is the counter value of the counter operating with the clock used at the transmission source, reproduction The clock information (STC) is the counter value of the counter 12 which operates with the clock reproduced on the receiving side. Also, 1
5 is the received clock information (PC
R) and the reproduced clock information (STC), 16 is a control voltage output from the low pass filter and gain control circuit 14 to the voltage controlled oscillator 11.

Next, the operation will be described. When the clock of the transmission source is recovered on the receiving side, the P that arrives first
The CR 100 is loaded into the counter 12. Counter 12
Performs a counting operation by the reproduced clock output from the voltage controlled oscillator 11. Here, when the second PCR 100 arrives, the STC output from the counter 12 at this point
101 is input to the subtractor 13 and arrives at the second PC
Difference 15 from R100 is obtained.

The PCR 100 is the value of a counter that operates on the clock of the transmitting device, and the recovered clock information (STC).
Is the value of the counter that operates with the clock of the receiving device, so the difference between the PCR 100 and the STC 101 indicates the amount due to the difference in frequency between the clock of the transmitting device and the clock of the receiving device. For example, if the clock frequency of the transmitting device is 20 Hz higher than the clock frequency of the receiving device, the increment of the count value of the PCR 100 in one second is STC10.
The value is 20 larger than the increment of the count value of 1. Therefore, if the difference 15 between the PCR 100 and the STC 101 has the same value in the previous time and this time, the numbers counted at the same time are the same, which means that the frequencies are the same.

If this difference becomes the same every time the PCR 100 arrives, it means that the progress of the counter on the transmitting and receiving side becomes the same, that is, the source frequency and the reproduction frequency at the receiving device are the same. Show. The difference 15 output from the subtractor 13 is converted into a control voltage 16 by the low pass filter and gain control circuit 14, and the voltage controlled oscillator 11
Changes, the output of the counter 12 changes accordingly, and the changing amount of the difference 15 between the PCR 100 and the STC 101 gradually decreases.

The above operation is repeated each time the PCR 100 arrives, and the voltage is controlled so that the difference 15 of the output of the subtractor 13 becomes constant, that is, the value counted up at the same time becomes equal to the transmission source. By controlling the frequency of the oscillator 13, the clock having the same frequency as the transmission source is reproduced.

It should be noted that, in a state where the clock having the same frequency as that of the transmission source is reproduced and is stable, the difference between the PCR 100 and the STC 101 normally maintains a constant value (offset). Since the PCR 100 is initially loaded into the counter 12, there is no offset at this point, but the transmission source frequency and the reproduction frequency deviate, and the PCR 100 and the counter value gradually deviate, and the difference becomes constant with the reproduction operation. Since the reproduction frequency is controlled so as to satisfy the above condition, it has an offset in a stable state.

Further, when a network is used for communication, for example, when data of a plurality of communication devices is multiplexed in an ATM network and data transmission is requested by a plurality of devices at the same time, the network simultaneously transmits the data. Therefore, the data are sequentially transmitted. As a result, the transmission data of the transmission terminal temporarily stays in the network, and the transmission interval of the data transmitted from the transmission device is not retained in the reception terminal.
It is said that this situation has fluctuations in the transmission line (network).

When there is fluctuation in the transmission line, fluctuations in the transmission line also fluctuate the reception timing of the reception clock information (PCR), and further fluctuate up to a difference of 15, and as a result, normal clock reproduction cannot be performed. Therefore, the low-pass filter and the gain control circuit 14 suppress the fluctuation of the difference 15 and enable stable clock reproduction.

[0011]

However, the conventional clock regenerator simply uses the difference between the received clock information (PCR) and the regenerated clock information (STC) as an indication of the difference in frequency between transmission and reception, and the difference between them. Since the gain is controlled by the method, there is a problem that the difference between the transmission and reception clock values becomes large when the frequency difference is large.

Therefore, when the decoding timing of media data such as video and audio is determined based on the reproduction clock information (STC), the timing of reading from the receiving buffer for decoding is the timing requested by the transmission source. Therefore, underflow or overflow of the receiving buffer may occur.

Further, since the low-pass filter is applied to the difference between the counter values, fluctuations in the transmission path can be eliminated, but conversely, the correction processing of the reproduction clock frequency is slow, that is, the reproduction clock follows slowly. There is a problem that it takes time to reproduce the normal clock.

The present invention has been made in order to solve the above-mentioned problems, and makes the counter values of the clocks coincide with each other on the transmitting and receiving sides, eliminates fluctuations in the transmission path, and speeds up the follow-up of the reproduced clock. It is an object of the present invention to provide a clock reproducing device capable of realizing the above.

[0015]

In order to solve the above problems, the present invention provides a clock regenerator which receives clock information indicating a count value of a source clock and outputs a regenerated clock based on the received clock information. Clock reproducing means for outputting a reproduced clock; counting means for counting the reproduced clock outputted by the clock reproducing means; count value of the source clock; count value of the reproduced clock counted by the counting means; Clock control means for controlling the frequency of the reproduction clock output from the clock reproduction means based on the reception interval of the reception clock information.

Further, in the following invention, the clock control means controls the frequency of the reproduction clock output from the clock reproduction means so that the count value of the transmission source clock and the count value of the reproduction clock match. It is characterized by

Further, in the following invention, the clock control means outputs from the clock regenerating means so that the count value of the transmission source clock and the count value of the regenerated clock coincide with each other after the maximum reception interval of the reception clock information. It is characterized in that the frequency of the reproduced clock generated is controlled.

Further, in the following invention, the clock control means outputs from the clock regenerating means such that the count value of the transmission source clock and the count of the regenerated clock match before the maximum reception interval of the reception clock information. It is characterized in that the frequency of the reproduced clock generated is controlled.

Further, the following invention further comprises a reception interval predicting means for predicting a reception interval until the next clock information is received and notifying it to the clock control means, wherein the clock control means further comprises the reception. The frequency of the reproduction clock output from the clock reproduction means is controlled based on the reception interval prediction from the interval prediction means.

Further, the following invention is characterized in that the reception interval prediction means uses a preset time as the predicted reception interval.

Further, in the next invention, the reception interval predicting means sets the reception interval of the previous clock information as the predicted reception interval.

Further, in the next invention, the reception interval predicting means sets the average reception interval of the clock information up to the previous time as the predicted reception interval.

Further, in the following invention, the clock control means determines the magnitude of the difference between the count value of the source clock after the maximum reception interval of the reception clock information and the count value of the recovered clock as the predicted reception interval. It is characterized in that it is small when the distance is close to the maximum interval and large when the distance is far.

Further, the following invention is characterized by further comprising counter correction means for correcting the transmission source counter value so as to remove the fluctuation of the reception timing of the reception clock information.

Further, in the following invention, the counter correction means obtains a straight line showing a time change of the counter with which the sum of squares of the differences from the plurality of received counter values becomes the minimum, and the newly received counter value is calculated as the straight line. It is characterized in that the counter value is corrected so as to be located on a straight line.

Further, in the following invention, a straight line showing the time change of the counter, which minimizes the sum of squares of the differences from the received plurality of counter values, is further obtained so as to remove the fluctuation of the reception timing of the reception clock information, A counter correction unit that corrects the transmission source counter value so that the newly received counter value is located on the straight line is provided, and the clock control unit, when the reception interval predicted by the reception interval prediction unit has passed, A request is made for the counter correction means to transmit clock information, and the counter correction means outputs to the clock control means an expected current counter value predicted from the corrected counter value in response to the request. And

[0027]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1. 1 is a block diagram showing a first embodiment of a clock recovery device according to the present invention. In the figure, 1 is a clock regenerating means such as a voltage controlled oscillator capable of varying the frequency of the regenerating clock by a control voltage or the like, 2 is counting means for counting the regenerating clock of this clock regenerating means 1, and 3 is counting by this counting means Reproduction clock information (STC) 101 indicating the counter value of the reproduced clock thus generated, reception clock information (PCR) 100 indicating the counter value of the transmission source clock,
It is a clock control means for controlling the frequency of the clock reproducing means 1 by control information 6 such as a control voltage based on the reception interval of the reception clock information (PCR) 100.

Next, the operation will be described. First, in the clock reproducing device on the receiving device side according to the first embodiment, when the transmitting device transmits the received clock information (PCR) 100, it receives and inputs it to the clock control means 3 and the counting means 2. . At that time, the counting unit 2 loads the count value, which is the first received clock information (PCR) 100, into the counter, while the clock control unit 3 loads the first received clock information (PCR) 10.
Only two counter values of 0 and the reproduction clock information (STC) 101 are recorded, and control is not performed. Therefore, the clock reproduction means 1 outputs the reproduction clock at the default frequency.

Here, the counting means 2 increments the counter one by one in synchronization with the frequency of the reproduction clock sent from the clock reproduction means 1.

Thereafter, the count value of the reception clock information 100 received after the second clock is PCR1, the counter value of the count means 2 at that time is STC1, and the time at that time is T1. Further, the counter value of the clock information 100 at the time of receiving the previous clock information 100 is PCR0, the counter value of the counting means 2 at that time is STC0, and the time at that time is T0. Using these values, the control information (information about increase / decrease in frequency) 6 such as the control voltage to be output to the clock recovery means 1 is determined.

Frequency of PCR between T0 and T1 = (PCR1-PCR0) / (T1-T0) Frequency of STC between T0 and T1 = (STC1-STC0) / (T1-T0) Frequency difference between T0 and T1 = ((STC1-STC0)-(PCR1-PCR0)) / (T1-T0) When the control information 6 corresponding to the value obtained by reversing the positive and negative of the frequency difference is set in the clock reproduction means 1, the received clock information (PCR) 100 and reproduction clock information (ST
C) The difference between the counter values of 101 is constant.

Further, at time T2, the reception clock information (PC
In order to make the counter values of the R) 100 and the reproduced clock information (STC) 101 coincide with each other, it is necessary to perform control such that the frequency differences are coincident with each other and are brought closer to each other. Counter value difference at T1 = STC1-PCR1 To set this value to 0 in (T2-T1) time, fluctuation frequency between T1 and T2 = (STC1-PCR1) /
(T2-T1)

Therefore, at time T2, the received clock information (PCR) 100 and the recovered clock information (STC) 101
In order to make the counter values of 1) coincide with each other, it is necessary to change the frequency set by the clock reproducing means 1 at the time T1 by the following frequency. Frequency change amount at T1 =-(STC1-PCR1) /
(T2-T1)-((STC1-STC0)-(PCR
1-PCR0)) / (T1-T0) Here, when STCn-PCRn = GAPn is set, the frequency change amount at T1 = -GAP1 / (T2-T1)-
It becomes (GAP1-GAP0) / (T1-T0), and by changing the setting of the control amount corresponding to the frequency indicated by this value to the clock reproducing means 1, the time T2 is reached.
The received clock information (PCR) 100 and the reproduced clock information (STC) 101 have the same counter value.

The clock reproduction means 1 outputs a clock having a requested frequency according to the frequency information 6 from the clock control means 3.

FIG. 2 shows the reception clock information (PCR) 10
FIG. 6 is an explanatory diagram illustrating a time change of 0 and a counter value of the reproduced clock information (STC) 101. In FIG. 2, reception clock information (PCR) 100 at times T1 and T0,
From each value of the reproduction clock information (STC) 101,
A locus of the reproduction clock information (STC) 101 at which the counter values of the reception clock information (PCR) 100 and the reproduction clock information (STC) 101 match at time T2 is shown.

Reception clock information (PCR) 1 at time T2
00 coincides with the reproduction clock information (STC) 101, but thereafter, the counter value difference becomes wider with time. Therefore, when the counter values match,
It is necessary to adjust the clock reproduction means 1 so that the frequency of the reception clock information (PCR) 100 and the reproduction clock information (STC) 101 have the same frequency.

However, the reception clock information (PCR) 10
Only when 0 is received, the recovered clock information (STC) 10
1 and the frequency of the recovered clock of the clock recovery means 1 can be controlled. Therefore, considering the reception timing of the reception clock information (PCR) 100,
It is necessary to set the time T2 so that the clock can be converged even if the reception timing is predicted incorrectly.

As a method of setting T2, when the maximum value of the reception interval of the reception clock information (PCR) 100 is fixed,
The time when the value is added to T1 is T2.

In this case, taking the time of the maximum reception interval,
The recovered clock information (STC) 101 approaches the received clock information (PCR) 100. Even if the reception clock information (PCR) 100 is received within a time shorter than the maximum reception interval, the reproduction clock information (ST
C) 101 steadily approaches the received clock information (PCR) 100, and by repeating this operation, the recovered clock information (STC) 101 steadily receives the received clock information (P).
(CR) 100 will be approached.

FIG. 3 is an explanatory diagram for explaining the time change of the counter values of the reception clock information (PCR) 100 and the reproduction clock information (STC) 101 under the control of the clock control means 3 of the first embodiment. 3, a thick line A indicates a locus of the received clock information (PCR) 100, a thick line B indicates a locus of the reproduced clock information (STC) 101, and a thin line C indicates an extended line of the locus of the reproduced clock information (STC) 101. Specifically, the clock control means 3 receives the reception clock information (PCR) 100 after the maximum reception interval of the reception clock information (PCR) 100 at the reception timing of the reception clock information (PCR) 100 in the direction indicated by the thin line C. The frequency of the clock reproduction means 1 is controlled so that the counter values of the reproduction clock information (STC) 101 match.

However, the reception clock information (PCR) 10
Before the maximum reception interval of 0 elapses, for example, T2 or T3
New received clock information (PCR) 10 at the timing of
Since 0 is received, the recovered clock information (STC) 101
Is again in the direction indicated by the loci B and C from the point at which the new reception clock information (PCR) 100 is received, and again after the maximum reception interval of the reception clock information (PCR) 100, the next new reception clock information (PCR). With such a slope as to match 100, the next new reception clock information (P
CR). Thus, the recovered clock information (STC) 101 is the received clock information (PCR) 10
Steadily approaching zero.

In FIG. 3, the reproduction clock information (STC) 1
01 is steadily approaching the reception clock information (PCR) 100, but is faster than the reception clock information (PCR) 1
Receive clock information (PCR) 1 in order to approach 00
Before the maximum reception interval of 00, the recovered clock information (ST
The C) 101 and the reception clock information (PCR) 100 may match. That is, the reception clock information (P
After the maximum reception interval of the CR) 100, the recovered clock information (STC) 101 and the received clock information (PCR) 10
The difference from 0 is such that the positive and negative values are reversed and the value is small.

In this case, the reception clock information (PCR) 1
Clock information (STC) 1 after the maximum reception interval of 00
01 and the received clock information (PCR) 100 have a smaller value than the initial difference, so that the received clock information (PCR) 100 and the recovered clock information (STC) are always received when the received clock information (PCR) 100 is received. ) 1
The difference with 01 becomes small.

Actual reception clock information (PCR) 100
Is smaller than the maximum reception interval, the difference between the reception clock information (PCR) 100 and the recovered clock information (STC) 101 is smaller than in the case where the trajectory is such that the difference becomes 0 after the maximum reception interval. ing. However, when the reception interval of the actual reception clock information (PCR) 100 is close to the maximum reception interval, conversely, when the trajectory becomes such that the difference becomes 0 after the maximum reception interval, the reception clock information (PCR) 100 becomes Reproduction clock information (ST
C) The difference of 101 becomes small.

FIG. 4 is an explanatory view for explaining another example of the time change of the counter values of the reception clock information (PCR) 100 and the reproduction clock information (STC) 101 under the control of the clock control means 3 of the first embodiment. is there. Specifically, in this figure, the clock control means 3 is, as indicated by a thin line C,
After the maximum reception interval of the reception clock information (PCR) 100, the difference between the counter values of the reception clock information (PCR) 100 and the reproduction clock information (STC) 101 is positive / negative reversed, and becomes smaller than the current difference. It controls the frequency.

Therefore, the reception clock information (PCR) 1
When new reception clock information (PCR) 100 is received before the maximum reception interval of 00 has elapsed, the locus of the reproduction clock information (STC) 101 is as shown by the thick line B:
From that point, receive clock information (PCR) 10 again
Received clock information (PCR) before the maximum reception interval of 0
It approaches the thick line A, which is the locus of the received clock information (PCR) 100, with an inclination that matches 100.

As described above, according to the clock reproducing apparatus of the first embodiment, the received clock information (PCR) 100
Since the frequency of the reproduction clock is determined in consideration of the difference between the counter value of the reproduction clock information (STC) 101 and the frequency difference, the reception clock information (PCR)
There is an effect that the counter values of 100 and the reproduction clock information (STC) 101 can be matched.

Embodiment 2. In the first embodiment described above,
The reproduction clock information (STC) 101 is made to match the reception clock information (PCR) 100.
In the second embodiment, an example in which the matching time is shortened will be described.

FIG. 5 is a block diagram showing a clock reproducing apparatus according to the second embodiment. In the figure, 5 is a reception interval predicting means for predicting the reception interval of the next reception clock information (PCR) 100. 5, the same reference numerals as those in FIG. 1 are the same or equivalent elements as those in FIG. 1, and thus detailed description thereof will be omitted.

Next, the operation will be described. The reception interval prediction means 5 receives the reception clock information (PCR) 1 to be received next.
The reception interval of 00 is predicted and notified to the clock control means 3. The clock control means 3 determines the reproduction frequency of the clock reproduction means 1 based on the prediction information of the reception interval, and controls by the control information 6 such as the control voltage.

In order to quickly match the reproduction clock information (STC) 101 and the reception clock information (PCR) 100, the next reception timing of the reception clock information (PCR) 100 is predicted, and the reproduction clock information (ST
The inclination of the reproduced clock information (STC) 101 may be controlled so that the values of C) 101 and the received clock information (PCR) 100 match.

That is, the magnitude of the difference between the count value of the source clock and the count value of the recovered clock after the maximum interval of the received clock information is small when the predicted reception interval is close to the maximum interval, and is smaller than the maximum interval. If they are far apart, increase the reception clock information (PCR) 100.
The reproduced clock information (STC) 101 can be quickly matched with each other.

The control by the clock control means 3 of the second embodiment will be described with reference to FIG. 4 described in the first embodiment.

In FIG. 4, when the target difference is increased,
The time when the reproduction clock information (STC) 101 and the reception clock information (PCR) 100 intersect becomes short. That is, for example, when the reception interval between the reception clock information (PCR) 100 such as between T1 and T2 is short, the target difference is increased to reproduce the reproduction clock information (STC) 1.
01 can be quickly matched with the reception clock information (PCR) 100.

Similarly, when the target difference is reduced in FIG. 4, the time at which the recovered clock information (STC) 101 and the received clock information (PCR) 100 cross is delayed. That is, for example, when the reception interval between the reception clock information (PCR) 100 such as between T1 and T2 is long, the reproduction clock information (STC) can be quickly received by reducing the target difference. Can be matched to.

Next, an example of a method of predicting the reception interval of the next reception clock information (PCR) 100 by the reception interval prediction means 5 will be shown. A first method is to use a previously predicted reception interval (for example, always fixed) as the prediction time. The fixed reception interval to be predicted in advance can be predicted with higher accuracy by using the transmission interval of a general transmission device, the transmission interval of the transmission device with the largest number of connections, and the like.

The second prediction method is to start the communication and predict the reception intervals of the third time and thereafter, so that the reception interval immediately before that is used as the prediction time as the reception intervals of the third time and thereafter.

The third prediction method is to use the average of the reception intervals up to that point as the prediction time for the next reception interval.

However, if the received clock information (PCR)
When the interval of the reception timing of 100 is the maximum reception interval contrary to the prediction, the reception clock information (P
The difference between the CR) 100 and the recovered clock information (STC) 101 needs to be smaller than the initial difference. Otherwise, each time this control is repeated, the difference becomes larger and larger, and the difference diverges.

Therefore, in this second embodiment, when the prediction of the reception timing of the next reception clock information (PCR) 100 is shorter than 1/2 of the maximum reception interval, the reception clock information (PCR) 100 and the reproduction are reproduced. Clock information (S
The time when TC) 101 matches is set as a time later than half the maximum reception interval. By doing so, the difference prediction value between the reception clock information (PCR) 100 and the reproduction clock information (STC) 101 after the maximum reception interval becomes smaller than the current difference.

As described above, according to the clock reproducing apparatus of the second embodiment, the next received clock information (PCR)
100 reception timing and reception clock information (PCR)
Considering the maximum reception interval of 100, the reception clock information (PCR) 101 and the reproduction clock information (STC) 100
Are determined, the received clock information (PCR) 100 and the recovered clock information (ST
C) There is an effect that the difference between the counter values of 101 can be reduced quickly and continuously.

Embodiment 3. In the above first and second embodiments, the recovered clock information (STC) 101 is made to match the received clock information (PCR) 100, but in the third embodiment, the received clock information (PCR) is transmitted at the time of transmission. ) In the case where a fluctuation occurs in the reception timing of 100), an example in which the fluctuation is removed will be described.

FIG. 6 is a block diagram showing a clock reproducing apparatus according to the third embodiment. In the figure, reference numeral 4 is a counter correction means for correcting the counter of the reception clock information (PCR) 200 in order to remove the fluctuation of the reception timing of the reception clock information (PCR) 200 generated by the transmission path or the like. In FIG. 6, the same reference numerals as those in FIG.
Since it is the same as or equivalent to 1, it will not be described in detail.

Next, the operation will be described. The count value of the reception clock information (PCR) 200 received via the transmission path or the like arrives at the counter correction means 4 with a transmission delay. The counter correction means 4 accumulates the counter value and the reception time, corrects the counter value received this time based on the past counter value and the reception time, and uses the clock control means as the reception clock information (PCR) 100. Output to 3.

That is, since the relationship between the counter value originally added by the transmission source and the sending time is linear, the relationship between the counter value corrected by the counter correcting means 4 and the receiving time is also linear. Try to be. Here, it is possible to make the relationship between the two linear by adjusting the reception time or the counter value, but since it is easier to change the counter value, a method of changing the counter value will be described below. .

FIG. 7 is an explanatory diagram showing the change over time of the counter value in the third embodiment. The counter that continuously changes at the transmission source increases at a constant rate of increase with time, as indicated by the solid line D. Then, as indicated by the black dots on the solid line D, the value of the counter is transmitted at an arbitrary timing.

Then, on the receiving side, as indicated by the black dots near the dotted line E, the counter value is received with a delay time. At this time, the counter value on the reception side is the same as the counter value on the transmission / reception side, and the timing on the transmission / reception side differs by the delay time delayed by the transmission path or the like.

In the counter correction means 4, the locus showing the relationship between the received counter value and the reception time is parallel to the locus between the counter value of the transmission source and the transmission time.
That is, in FIG. 7, the counter value on the receiving side is corrected so that the solid line D and the dotted line E are parallel to each other.

More specifically, the counter correction means 4 receives a plurality of pieces of reception clock information (PC
R) Predict from the counter value of 200. Then, when there is an error between the predicted trajectory indicated by the dotted line E and the actual counter value indicated by the black dot, the counter value is moved in the vertical axis direction, for example, by moving the actual counter value indicated by the black dot, Correct so that it is located on the dotted line E.
The counter value at this time is output to the clock control means 3 as the corrected counter value, that is, the corrected reception clock information (PCR) 100.

As a result, the corrected reception clock information (P
The locus of (CR) 100 is shifted from the solid line D by the transmission delay time in the time axis direction as shown by the dotted line E in FIG.

An example of a method of actually correcting the counter value will be described. FIG. 8 is an explanatory diagram showing a locus in which the counter value of the reception clock information (PCR) 200 according to the third embodiment is corrected. The counter values of the reception clock information (PCR) 200 actually received at times t0, t1, t2, ... Are C0, C1, C2 ,. At that time, the difference between the corrected counter value and the trajectory is D0, D1, and
D2, D3 ...

In order to find the straight line of the locus, the least square method is used so that the distance between the received clock information (PCR) 200 and the straight line becomes the minimum. That is, the approximate straight line is obtained by the regression line.

As a result, the locus (straight line) of the corrected received clock information (PCR) 100 is obtained, and the difference D between the value and the actual received clock information (PCR) 200 is obtained again from this straight line and corrected. Received clock information (PC
(R) 100 value (Cn-Dn) is output to the clock control means 3.

As described above, according to the clock reproducing apparatus of the third embodiment, the received reception clock information (PC
R) 200 counter value Cn and its reception timing tn
By using, it is possible to obtain the locus of the counter value of the reception clock information (PCR) 100 in which the fluctuation component at the time of transmission is eliminated, and use this locus to obtain the counter value of the reception clock information (PCR) 200 actually received. By the correction, the fluctuation component at the time of transmission can be eliminated, and there is an effect that accurate clock reproduction can be performed.

Fourth Embodiment In the second embodiment described above,
A means for predicting the reception interval of the reception clock information (PCR) 100 and making the reproduction clock information (STC) 101 and the reception clock information (PCR) 100 coincide with each other, and in the third embodiment, in order to eliminate the fluctuation of the transmission path. Although the means for correcting the counter value of the reception clock information (PCR) 200 has been described in the above, in the fourth embodiment, an example using both of these two means will be described.

FIG. 9 is a block diagram showing a clock reproducing apparatus according to the fourth embodiment. In FIG. 9, FIG. 5 or FIG.
The same reference numerals as are the same or equivalent elements as in FIG. 5 or FIG. 6, and thus detailed description will be omitted.

Next, the operation will be described. The count value of the reception clock information (PCR) 200 received via the transmission path or the like arrives at the counter correction means 4 with a transmission delay. The counter correction means 4 accumulates the counter value and the reception time, corrects the counter value of the reception clock information (PCR) 200 received this time based on the past counter value and the reception time, and the clock control means. Output to 3.

On the other hand, the reception interval predicting means 5 predicts the reception interval up to the reception clock information (PCR) 200 to be received next, and notifies the clock control means 3 of it.

The clock control means 3 determines the reproduction frequency of the clock reproduction means 1 based on the reception interval prediction information, and controls the reproduction clock frequency of the clock reproduction means 1 by the control information 6.

As described above, according to the clock reproducing apparatus of the fourth embodiment, the next received clock information (PCR) 20
Reception timing of 0 and reception clock information (PCR) 20
In consideration of the reception interval of 0, the corrected reception clock information (PCR) 100 and reproduction clock information (STC) 101
Is determined, the difference between the corrected reception clock information (PCR) 100 and the recovered clock information (STC) 101 counter value can be reduced quickly and continuously. The effect is that you can do it.

Further, in the clock regenerator of the fourth embodiment, the reception clock information (PCR) 100 in which the fluctuation component at the time of transmission is eliminated by the counter value and the reception timing of the received reception clock information (PCR) 200. The trajectory of the counter value can be obtained, and by correcting the counter value of the reception clock information (PCR) 200 actually received by using this trajectory, it is possible to eliminate the fluctuation component at the time of transmission and obtain an accurate clock. There is an effect that reproduction can be performed.

Embodiment 5. Embodiments 1 and 2 above
In No. 4, the clock control means calculates an appropriate reproduction frequency at the reception timing of the reception clock information (PCR), but in the fifth embodiment, the clock control means makes an appropriate reproduction at any timing. An example of calculating the frequency will be described.

FIG. 10 is a block diagram showing a clock reproducing apparatus according to the fifth embodiment. In the figure, reference numeral 23 is the count value of the reproduction clock counted by the counting means 2 which is the reproduction clock information (STC) 101, the count value of the transmission source clock which is the reception clock information (PCR) 200, and the reception clock information (PCR). The clock control means controls the frequency of the reproduction clock output from the clock reproduction means 1 based on the reception interval of 200. Two
Reference numeral 4 indicates reception clock information (PC
R) to remove the fluctuation of the reception timing of 200,
It is a counter correction means for correcting the counter value of the reception clock information (PCR) 200. Further, the counter correction means 24 uses the clock information request 2 from the clock control means 23.
01, the reception clock information (PCR) 102 is generated by itself and output to the clock control means 23. Incidentally, FIG.
9, the same reference numerals as those in FIG. 9 are the same or equivalent elements as those in FIG. 9, and thus detailed description thereof will be omitted.

Next, the operation will be described. The count value of the reception clock information (PCR) 200 received via the transmission path or the like arrives at the counter correction unit 24 with a transmission delay. The counter correction means 24 corrects the counter value by the method described in the second embodiment and outputs it to the clock control means 23.

The clock control means 23, as described in the first embodiment, receives the next received clock information (PCR) 200.
Reception time information (PCR) 2
00 and the reproduction clock information (STC) 101 are controlled so that the frequency of the clock reproduction means 1 is controlled.

The difference between the values of the reception clock information (PCR) 200 and the reproduction clock information (STC) 101 gradually becomes smaller, and a certain reception clock information (PCR) 20.
It becomes 0 at the predicted reception time of 0, and becomes larger on the contrary when the time further elapses. Therefore, it is necessary to correct the frequency of the clock reproduction means 1 at the predicted reception time of the specific reception clock information (PCR) 200.

Clock control means 2 in the fifth embodiment
3 is the actual reception clock information (PCR) 10 before the predicted reception time of the next reception clock information (PCR) 100.
When 0 is not received, the clock information request 201 is transmitted to the counter correction means 24.

The counter correction means 24 predicts the counter value of the reception clock information (PCR) 200 at the current time from the clock information received so far and outputs it as the reception clock information 100 to the clock control means 23.
In the method of predicting the counter value, the expected locus (straight line of slope K) of the reception clock information (PCR) is obtained in the second embodiment, and it is used to predict the counter value at the current time. The counter value CX at time TX is CX = K (TX-T0) + (C0-D0)

In the clock control means 23, the first embodiment is adopted.
By the operation as shown in, the received clock information (PC
The frequency of the clock recovery means 1 is controlled so that the R) 100 and the recovered clock information (STC) 101 match.

As described above, according to the clock reproducing apparatus of the fifth embodiment, the next received clock information (PCR)
When the reception time of 100 is incorrect, the counter correction means 24 predicts and generates the reception clock information (PCR) 100. Therefore, the difference between the reception clock information (PCR) 100 and the reproduction clock information (STC) 101 is increased. Without this, there is an effect that a stable clock reproduction can be performed.

[0091]

As described above, according to the clock recovery device of the present invention, the frequency of the recovered clock is determined in consideration of the difference between the counter values of the received clock information and the recovered clock information and the frequency difference. Therefore, the counter values of the received clock information and the recovered clock information can be matched.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing a first embodiment of a clock recovery device according to the present invention.

FIG. 2 is an explanatory diagram illustrating a time change of counter values of received clock information (PCR) 100 and reproduced clock information (STC) 101.

FIG. 3 is an explanatory diagram for explaining the time change of the counter values of the reception clock information (PCR) 100 and the reproduction clock information (STC) 101 under the control of the clock control means 3 of the first embodiment.

FIG. 4 is an explanatory diagram illustrating another example of the time change of the counter values of the reception clock information (PCR) 100 and the reproduction clock information (STC) 101 under the control of the clock control means 3 of the first embodiment.

FIG. 5 is a configuration diagram showing a clock recovery device according to a second embodiment.

FIG. 6 is a configuration diagram showing a clock recovery device according to a third embodiment.

FIG. 7 is an explanatory diagram showing a change over time of a counter value according to the third embodiment.

FIG. 8 shows reception clock information (P
FIG. 7 is an explanatory diagram showing a trajectory in which a counter value of (CR) 200 is corrected.

FIG. 9 is a configuration diagram showing a clock recovery device according to a fourth embodiment.

FIG. 10 is a configuration diagram showing a clock recovery device according to a fifth embodiment.

FIG. 11 is a configuration diagram showing a conventional clock recovery device.

[Explanation of symbols]

1 clock reproducing means, 2 counting means, 3, 23
Clock control means, 4, 24 Counter correction means, 5
Reception interval prediction means, 100,200 Reception clock information (PCR), 101 Reproduction clock information (STC), 2
01 Clock information request.

─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-10-276431 (JP, A) JP-A-9-247135 (JP, A) JP-A-10-41915 (JP, A) JP-A-10- 51496 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H04L 7/04 H04L 12/28 H04Q 3/00

Claims (12)

(57) [Claims] 1. A clock regenerator that receives clock information indicating a count value of a source clock and outputs a regenerated clock based on the received clock information, and a clock regenerator that outputs a regenerated clock, and the clock regenerator. Counting means for counting the reproduced clock output from the source clock, the count value of the source clock, the count value of the reproduced clock counted by the counting means, and the reception interval of the received clock information When controlling the frequency of the recovered clock output from the
The clock count value and the recovered clock count value
Are output from the clock recovery means so that
A clock reproduction device comprising: a clock control unit that controls the frequency of the raw clock . 2. A clock regenerator that receives clock information indicating a count value of a source clock and outputs a regenerated clock based on the received clock information, a clock regenerator that outputs a regenerated clock, and the clock regenerator. Counting means for counting the reproduced clock output from the source clock, the count value of the source clock, the count value of the reproduced clock counted by the counting means, and the reception interval of the received clock information When controlling the frequency of the recovered clock output from the
The count value of the clock and the count of the recovered clock are
Replay output from the clock replay means to match
A clock reproduction device comprising: a clock control unit that controls a clock frequency . 3. A reception interval predicting unit for predicting a reception interval until the next clock information is received and notifying the clock control unit, wherein the clock control unit further includes a reception interval predicting unit. 3. The clock recovery device according to claim 1 , wherein the frequency of the recovery clock output from the clock recovery means is controlled based on the predicted reception interval. 4. The clock regenerator according to claim 3 , wherein said reception interval prediction means uses a preset time as a predicted reception interval. 5. The clock regenerator according to claim 3 , wherein the reception interval prediction means sets a reception interval of the previous clock information as a predicted reception interval. 6. The clock regenerator according to claim 3 , wherein the reception interval predicting means sets an average reception interval of the clock information up to the previous time as the predicted reception interval. 7. The clock control means sets the magnitude of the difference between the count value of the source clock after the maximum reception interval of the reception clock information and the count value of the recovered clock so that the predicted reception interval is close to the maximum interval. The clock regenerator according to any one of claims 3 to 5 , wherein the case is small and the case is large when the distance is large. 8. The counter correction means for correcting the transmission source counter value so as to remove the fluctuation of the reception timing of the reception clock information, according to any one of claims 1 to 7 . Clock reproduction device. 9. The counter correction means obtains a straight line showing a time change of the counter having a minimum sum of squares of differences from a plurality of received counter values, and positions the newly received counter value on the straight line. 9. The clock recovery device according to claim 8 , wherein the counter value is corrected as described above. 10. Further, in order to eliminate fluctuations in the reception timing of the reception clock information, a straight line showing the time change of the counter having the minimum sum of squares of the differences from the plurality of received counter values is obtained, and the newly received counter is obtained. A counter correction unit that corrects the transmission source counter value so that the value is located on the straight line is provided, and the clock control unit, when the reception interval predicted by the reception interval prediction unit has passed, Te requests transmission of clock information, the counter correction unit, to the request, according to claim 3, characterized in that the output expected counter value at the present time predicted from the corrected counter value to the clock control means The clock reproduction device described. 11. A clock indicating a counter value of a transmission source clock.
Receives lock information and based on the received clock information
How to recover the clock when outputting the recovered clock
The received clock information counter value and its reception time.
Take the total, predict the slope of the received clock information,
The reception clock information of the reception clock information is calculated based on the predicted slope.
Supplement the source counter value to remove the fluctuation of the imming.
A clock recovery method characterized by correctness. 12. Receiving when correcting a transmission source counter value
The minimum sum of squares of the differences between the
A straight line showing the time change of the
Counter value so that the counter value is located on the straight line.
Clock recovery according to claim 11, characterized in that
Method.