JP2957920B2 - Display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device.

[0002]

2. Description of the Related Art In recent years, thin film transistors (TFTs) have been developed.
Active matrix liquid crystal display (LCD; Liquid Crystal Displ) using Film Transistor
ay) has attracted attention as a high-quality display device. This display device is an active matrix type TFT-LCD
Called.

In the active matrix system, a switch element (pixel control element) and a signal storage element (pixel capacitance) are integrated in each pixel arranged in a matrix, and each pixel performs a kind of storage operation to prepare a liquid crystal. This is a static drive method. That is, a video signal (data signal) sent from the outside is supplied to a driving circuit (data driver).
Is transferred to the wiring (data line) inside the LCD.
The switch element functions as a switch whose on / off state is switched by a scanning signal. Then, the video signal is transmitted to the pixel via the switch element in the ON state, and the liquid crystal is driven. Thereafter, when the switch element is turned off, the data signal applied to the pixel is stored in the signal storage element in a state of electric charge, and the liquid crystal is continuously driven until the switch element is turned on next. Therefore, even if the number of scanning lines increases and the driving time allocated to one pixel decreases, the driving of the liquid crystal is not affected and the gradation does not decrease.

The active matrix system includes a TFT type using a TFT as a switch element and a diode type using a diode. The TFT type has a complicated manufacturing process as compared with the diode type, but can easily obtain a high gradation and halftone, and has a high quality LC comparable to a CRT.
D can be realized.

[0005] In a TFT, a semiconductor thin film formed on an insulating substrate is used as an active layer. Generally, amorphous silicon or polysilicon is used as the active layer. TFT using amorphous silicon as active layer
Is called an amorphous silicon TFT, and a TFT using polysilicon is called a polysilicon TFT. Polysilicon TFTs are compared to amorphous silicon TFTs.
High process temperature limits substrate materials (quartz glass, high heat-resistant glass) and film-forming equipment, making it difficult to increase the area. On the other hand, the transistor driving capability is high and the self-aligned structure is suitable for miniaturization. The circuits (data driver and gate driver) are connected to an LC display unit LC
The feature is that it can be formed on the same substrate as the D pixel portion (LCD panel). A device in which at least one of the data driver and the gate driver is formed on the same substrate as the LCD pixel portion is generally called a built-in driver type (integrated driver type or driver monolithic type).

Here, a method of writing a video signal to each pixel (that is, a driving method (scanning method) of a TFT-LCD) includes line-sequential driving (line-sequential scanning) and point-sequential driving (point-sequential scanning). is there. The line-sequential driving is a method in which a video signal is written in parallel to each pixel of one scanning line (one gate wiring) every one horizontal period. On the other hand, the point-sequential driving is a method in which a video signal is serially written in one pixel unit. In the built-in driver type, dot sequential driving is generally used.

FIG. 1 shows a block configuration of a general active-matrix TFT-LCD with a built-in driver. Active matrix TFT with built-in driver
The LCD comprises an LCD pixel section (pixel cell array) 1, a gate driver 2, and an analog data driver (drain driver) 3. The LCD pixel unit 1, gate driver 2, and data driver 3 are formed on the same substrate (one chip).

The LCD pixel section 1 is provided with scanning lines (gate wirings) G1 to Gn and data lines (drain wirings) D1 to Dn which are orthogonal to each other. Each scanning line G1
Pixel cells GC using TFTs are provided at intersections between .about.Gn and the respective data lines D1 to Dn. Each pixel cell GC is composed of an auxiliary capacitance (storage capacitance) CS, a TFT, and a liquid crystal cell LC. That is, each TF is applied to each of the scanning lines G1 to Gn.
The gate electrode of T is connected, and the drain electrode of each TFT is connected to each data line D1 to Dn. The display electrode (pixel electrode) of the liquid crystal cell LC and the storage capacitor CS are connected to the source electrode of each TFT. The liquid crystal cell LC and the storage capacitor CS constitute the signal storage element. The voltage Vcom is applied to the common electrode (the electrode on the opposite side of the display electrode) of the liquid crystal cell LC. On the other hand, an electrode (storage electrode) on the side connected to the source of the TFT in the auxiliary capacitance CS.
A constant voltage VR is applied to the opposite electrode (opposite electrode). The common electrode of the liquid crystal cell LC is an electrode which is literally common to all the pixel cells GC. Then, a capacitance is formed between the display electrode and the common electrode of the liquid crystal cell LC. The counter electrode of the auxiliary capacitance CS is
In some cases, it is connected to an adjacent scanning line. Each pixel cell GC having such a structure assembles to form the LCD pixel unit 1. In FIG. 1, only the pixel cells GC provided at the intersections of the scanning lines G1 and the data lines D1 are shown in order to prevent the figure from being complicated and difficult to see.

Each of the scanning lines G1 to Gn is connected to a gate driver 2 so that a scanning signal (gate signal) is applied. On the other hand, the data lines D1 to Dn are connected to the data driver 3.

The analog data driver 3 comprises an analog switch (sampling transistor group) 4, a shift register 5 for controlling the analog switch 4 on / off, and a video line VL. Then, a video signal sent from the outside via the video line VL is applied to each of the data lines D1 to Dn via the analog switch 4 which is turned on by the shift register 5.

The data driver 3 has an analog system and a digital system. In the analog system, since the analog video signal transmitted via the video line VL is directly transferred to each of the data lines D1 to Dn, the gradation characteristics are continuous and suitable for full color, but the power consumption is large. There are drawbacks. On the other hand, in the digital system, a plurality of gray scale power supplies externally supplied are selected by an analog switch 4 in accordance with a digital video signal, and the selected gray scale power is applied to each of the data lines D1 to Dn. ing. For this reason, the digital method has a drawback that although the power consumption is small, only the number of gradations corresponding to the number of gradation power supplies can be obtained and the gradation characteristic is discontinuous. Therefore, the analog system is mainly used for displaying images on televisions and the like, and the digital system is mainly used for displaying displays on personal computers and the like.

The voltage applied to the liquid crystal cell LC must be an AC voltage. This is because, when a DC voltage is continuously applied to the liquid crystal cell LC, ionic impurities contained in the liquid crystal gather at the electrodes (display electrode, common electrode) and cause seizure, so that a correct voltage cannot be applied to the liquid crystal and the liquid crystal functions as a display. It is because it disappears. Therefore, it is necessary to invert the polarity of the data signal. There are a dot inversion method and a frame inversion method. In the dot inversion method, the polarity of a data signal is inverted for each of the data lines D1 to Dn, so that pixel cells adjacent in the horizontal direction in FIG.
This is a method of applying a data signal whose polarity is inverted for each GC. On the other hand, the frame inversion method is a method of inverting the polarity of a data signal for each screen (frame).

The LCD includes a monochrome LCD and a full color LCD. In the full-color LCD, three pixel cells GC adjacent in the horizontal direction in FIG.
R (Red), G (Green), B (Blue) by B color system
By corresponding to the three primary colors, one pixel unit by color is configured.

FIG. 2 shows a main circuit of an analog frame inversion type data driver 3 in an NTSC monochrome LCD. Analog switch 4 is an NMO
Each sampling transistor t composed of an S transistor
1 to tn. The sources of the sampling transistors t1 to tn are connected to one video line VL, and the drains of the sampling transistors t1 to tn are connected to the data lines D1 to Dn. And
The gates of the sampling transistors t1 to tn are
Each output P1 to Pn of the shift register 5 is applied.

Active matrix type TFT-LC with built-in driver constructed as shown in FIGS. 1 and 2
The dot sequential driving of D is performed as follows. First, only one of the scanning lines G1 to Gn is selected by the gate driver 2, and a scanning signal is applied to activate it.
The period during which the one scanning line G1 to Gn is raised is one horizontal period.

In one horizontal period, the shift register 5 performs a shift operation and sequentially outputs the respective outputs P1 to Pn. The sampling transistors t1 to tn are sequentially turned on in accordance with the outputs P1 to Pn, and the data lines D1 to Dn are sequentially selected one by one.

Then, the video signal from the video line VL is sent to the selected data line D1 to Dn via the turned on sampling transistor t1 to tn. Therefore, the selected scanning lines G1 to Gn and the data lines D1 to Dn
A video signal is written to the pixel cell GC at the intersection with. As a result, in one horizontal period, a video signal is sequentially written to each of the pixel cells GC connected to the selected one of the scanning lines G1 to Gn.

For example, when the scanning line Gn is set to a positive voltage and the TFT
When a positive voltage is applied to the gate electrode, the TFT is turned on. Then, the capacitance of the liquid crystal cell LC and the auxiliary capacitance CS are charged by the video signal applied to the data line Dn. Conversely, when the scanning line Gn is set to a negative voltage and a negative voltage is applied to the gate electrode of the TFT, the TFT is turned off, and the voltage applied to the data line Dn at that time is changed to the liquid crystal cell.
It is held by the capacitance of the LC and the auxiliary capacitance CS. In this manner, by supplying a video signal to be written to the pixel cell GC to the data line and controlling the voltage of the scanning line, the pixel cell GC can hold an arbitrary video signal. The transmittance of the liquid crystal cell LC changes according to the video signal held by the pixel cell GC, and an image is displayed.

FIG. 3 shows a full color LCD of the NTSC system.
2 shows a main circuit of the data driver 3 of the analog method and the dot inversion method in FIG. Analog switch 4 is an NMO
Each sampling transistor t composed of an S transistor
1 to tn. In FIG. 3, only the sampling transistors t1 to t6 are shown.

The drains of the sampling transistors t1 to tn are connected to the data lines D1 to Dn. Each pixel cell GC connected to each data line D1 to Dn is shown in FIG.
, Each of three pixel cells GC adjacent in the horizontal direction corresponds to the three primary colors of R, G, and B in the RGB color system. That is, the pixel cell GC connected to the data lines D1 and D4 corresponds to R, the pixel cell GC connected to the data lines D2 and D5 corresponds to G, and the pixel cell GC connected to the data lines D3 and D6. Corresponds to B. Then, any one of the scanning lines G1 to Gn and each of the data lines D1 to D3
One pixel unit of color is constituted by three pixel cells GC connected to the intersection with. Similarly, any one of the scanning lines G1 to Gn and each of the data lines D4 to D6.
One pixel unit of color is constituted by three pixel cells GC connected to the intersection with.

The video lines VL have six video lines VR.
+ To VB-. Each video line VR +, VR-
Is inverted, and a video signal corresponding to R in the RGB color system is transmitted. Each video line VG +, VG-
Are inverted, and a video signal corresponding to G is sent. The polarity of each video line VB +, VB- is inverted, and a video signal corresponding to B is sent. And
The sources of the sampling transistors t1 to t6 are connected to the respective video lines VR +, VR-, VG +, VG-, VB +, VB-.

The output P1 of the shift register 5 is applied to the gate of each sampling transistor t1 to t3, and the output P2 of the shift register 5 is applied to the gate of each sampling transistor t4 to t6.

In the dot inversion method in the monochrome LCD, as described above, the polarity of the data signal is inverted for each of the data lines D1 to Dn, so that the polarity is inverted for each of the horizontally adjacent pixel cells GC in FIG. The applied data signal is applied. On the other hand, in the dot inversion method in a full-color LCD, it is necessary to apply a data signal whose polarity is inverted for each of three horizontally adjacent pixel cells GC in FIG. 1 (that is, for each pixel unit by color). There is. A video line VL is composed of video lines VR + to VB-, and each sampling transistor t1 to t3, t4
That is why the outputs P1 and P2 are applied to the gates from .about.t6.

The active-matrix TFT with a built-in driver constructed as shown in FIG. 1 and FIG.
The dot-sequential driving of the LCD is the same as that of the active-matrix TFT-LCD with a built-in driver configured as shown in FIGS. 1 and 2, and a description thereof will be omitted.

In recent years, high-definition television (HDT)
V) is under development. There are three HDTV broadcasting systems: Japanese, American and European. The Japanese system is the Japan Broadcasting Corporation (NH
K) is the “High Definition” proposed by K). Also, the development of the "Hi-Vision Museum System" for appreciating paintings using high-definition still images using Hi-Vision is being promoted. In order to truly enjoy high-definition video, a large-screen video of 40 inches or more is required. However, in the active matrix type TFT-LCD, it is difficult to prepare a large substrate of 40 inches or more due to the restriction of the substrate material as described above, and at present, a large screen cannot be realized by the direct-view type. .

Therefore, commercialization of LCD projectors is expected. An LCD projector can realize a large screen by enlarging and projecting an image displayed on an LCD pixel portion (LCD panel) onto a screen. The LCD pixel portion used in the LCD projector is called a light valve. Full-color LCD projectors include a three-panel type and a single-panel type. The three-panel type uses three monochrome LCDs (LCD pixel units) corresponding to three primary colors, and combines images displayed on each LCD with a dichroic mirror or a dichroic prism.
This is a method for performing full-color display. On the other hand, the single plate type
In this method, full-color display is performed using one full-color LCD. In HDTV, display performance (resolution,
A three-plate type having excellent screen illuminance, color purity, etc.) is used.

FIG. 4 shows a three-plate type L compatible with HDTV.
An example of a main circuit of an analog dot inversion data driver 3 in a monochrome LCD used in a CD projector is shown.

The analog switch 4 comprises sampling transistors t1 to tn each composed of an NMOS transistor. FIG. 4 shows only the sampling transistors t1 to t10.

The video line VL has eight video lines V1.
~ V8, and as described later, each video line V1
A signal obtained by parallelizing the video signal is sent to .about.V8. The sources of the sampling transistors t1 to t8 are connected to the video lines V1 to V8, and the sources of the sampling transistors t9 to t16 (not shown) are connected to the video lines V1 to V8. The drain of each sampling transistor t1 to tn is connected to each data line D1.
To Dn. The output P1 of the shift register 5 is applied to the gates of the sampling transistors t1 to t8.
The output P2 of the shift register 5 is applied to the gates from t16 to t16.

FIG. 5 shows an example of a circuit for parallelizing a video signal (hereinafter referred to as a parallel processing circuit). The parallel processing circuit 10 includes an A / D converter 11,
Shift register 12, latch 13, D / A converter 1
4 to 21.

The A / D converter 11 converts a video signal sent from the outside to, for example, 56 MHz according to the clock CK1.
At a sampling frequency of about 18 nsec (= 1/56 MHz).

The 8-bit shift register 12 has eight D bits.
(Data) flip-flops 31-38. The latch 13 has eight D flip-flops 41 to 48
It is composed of D flip-flops 41 to 48
Latches the respective outputs of the shift register 12 (the outputs of the respective D flip-flops 31 to 38), and divides the latched signals by about 143nse in accordance with the 56/8 MHz clock CK2.
Output all at once for each c (= 8 / 56MHz).

Each of the D / A converters 14 to 21 D / A converts the output of each of the D flip-flops 41 to 48 to generate a signal obtained by parallelizing a video signal, and converts the signal into each of the video lines V1 to V8. Send to

As described above, by parallelizing the video signal into eight, the frequency of the signal sent to each of the video lines V1 to V8 is changed to the sampling frequency of the video signal (= 56 MHz).
Can be reduced to 1/8. As a result, to the sampling transistors t1 to t8, eight video signals having phases shifted by about 18 nsec are sent via the video lines V1 to V8. Then, according to the output P1, the sampling transistors t1 to t8 are simultaneously turned on to sample the video signal. Similarly, to the sampling transistors t9 to t16, eight video signals having phases shifted by about 18 nsec are sent via video lines V1 to V8. Then, according to the output P2, each sampling transistor t9
.About.t16 are simultaneously turned on to sample the video signal.

The high definition LCD pixel section 1 having 1280 or 1440 pixels in the horizontal direction has been put to practical use. It goes without saying that a clearer image can be obtained as the number of pixels is larger. That is, 1280 (or 1440)
Sampling transistors t1 to t1280 (or t1
To t1440). Also, the number of scanning lines for Hi-Vision is 1125 and the field frequency is 60 Hz. Therefore,
During one horizontal period, all sampling transistors t1 to t1
In order to turn on n sequentially, it is necessary to sample each of the sampling transistors t1 to tn at 50 MHz or more. However, it is difficult to sample each of the sampling transistors t1 to tn at such a high speed. Therefore, as described above, the video signal is parallelized to, for example, eight, and the frequency of the signal sent to each of the video lines V1 to V8 is reduced to 1/8. That is, if the frequency of the signal sent to each of the video lines V1 to V8 is reduced to 1/8, the sampling frequency of each sampling transistor t1 to tn can be reduced to 1/8. As a result, all the sampling transistors t1 to tn can be sequentially turned on in one horizontal period.

The active-matrix TFT with a built-in driver shown in FIGS.
The dot-sequential driving of the LCD is the same as that of the active-matrix TFT-LCD with a built-in driver configured as shown in FIGS. 1 and 2, and a description thereof will be omitted.

When a plurality of sampling transistors t1 to tn connected to one video line V1 to V8 are turned on at the same time, a heavy load is applied to the video lines V1 to V8. For example, three sampling transistors t1, t9,
When t17 is turned on at the same time, a large load is applied to the video line V1. As a result, the signal voltage of the video line V1 decreases, and an accurate video signal cannot be sent to the data lines D1, D9, and D17.

Therefore, there is a method in which each of the video lines V1 to V8 is constituted by a plurality of wirings arranged in parallel, and the sampling transistors t1 to tn which are turned on at the same time are respectively connected to separate wirings. For example, as shown in FIG. 6, each of the video lines V1 to V8 is composed of three wirings Va to Vc arranged in parallel. The sources of the sampling transistors t1 to t8 are connected to the wiring Va, the sources of the sampling transistors t9 to t16 are connected to the wiring Vb, the sources of the sampling transistors t17 to t24 (not shown) are connected to the wiring Vc, and the sources of the sampling transistors t25 to t25 are connected. Sources at t32 (not shown) are respectively connected to the wiring Va. By doing so, each sampling transistor t1, t9, t
Even if 17 are turned on at the same time, the load is distributed to the wirings Va to Vc, so that the load applied to the entire video line V1 is reduced. As a result, the signal voltage of the video line V1 does not easily decrease, and an accurate video signal can be sent to each of the data lines D1, D9, and D17. Similarly, each video line V2
Since the load is also reduced for .about.V8, the signal voltage is less likely to decrease, and accurate video signals can be sent to the data lines D2 to Dn.

[0039]

As shown in FIGS. 2, 3 and 4, in an active matrix type TFT-LCD with a built-in driver, video lines VL (VR + to VB-, V1
To V8) and the data lines D1 to Dn intersect. Therefore, the data lines D1 to Dn are formed by polycide wiring, and the video lines VL (VR + to VB-, V1 to V8) are formed by metal wiring such as aluminum. Needless to say, it is better to form the data lines D1 to Dn by low-resistance metal wiring in order to reduce the wiring resistance. However, it is difficult to form a metal wiring over two layers in terms of process. Therefore, the video lines VL (VR + ~
VB-, V1 to V8), the data lines D1 to Dn, which do not require a lower resistance, are formed by polycide wiring. The data lines D1 to D1
When n is formed by polycide wiring, the source of each sampling transistor t1 to tn and the video line VL
(VR + to VB-, V1 to V8) and the respective wirings L1 to Ln
Is also formed by the polycide wiring.

In the data driver 3 shown in FIG. 2, since there is only one video line VL, each of the wirings L1 to L
All n have the same length. However, in the data driver 3 shown in FIG. 3, the video line VL has six video lines.
VR + to VB-, each wiring L1 to Ln
Will have different lengths. In the data driver 3 shown in FIG. 4, the video line VL has eight video lines.
Since the wirings are constituted by V1 to V8, the lengths of the wirings L1 to Ln are different. Therefore, in the data driver 3 shown in FIGS. 2 and 3, when the widths of the wirings L1 to Ln are the same, the wiring resistances of the wirings L1 to Ln are different.

FIG. 7 shows video lines VL (VR + to VB-, V1
To V8), wirings L1 to Ln, sampling transistor t
1 to tn show equivalent circuits of the pixel cell GC. Each wiring L1 ~
Ln has an impedance composed of a wiring resistance r and a load capacitance c.

Incidentally, the sheet resistance of a general polycide wiring using tungsten silicide is 10 to 15 Ω / □.
It is. Therefore, when a polycide wiring using tungsten silicide is used in the data driver 3 shown in FIG. 3, when the width of each wiring L1 to Ln is 5 μm and the interval between each video line VR + to VB− is 10 μm, the longest wiring L6
Has a wiring resistance r of 120 to 180 Ω. When a polycide wiring using tungsten silicide is used in the data driver 3 shown in FIG. 4, when the width of each wiring L1 to Ln is 5 μm and the interval between each video line V1 to V8 is 10 μm, the longest wiring L8 The wiring resistance r becomes 160 to 240 Ω. In the data driver 3 shown in FIG. 4, when each of the video lines V1 to V8 is composed of three wirings Va to Vc as shown in FIG. 6, if the polycide wiring using tungsten silicide is used, When the width of L1 to Ln is 5 μm and the interval between the video lines V1 to V8 is 10 μm, the wiring resistance r of the longest wiring L8 is 480 to 720Ω. However, when the polycide wiring using tungsten silicide is used in the data driver 3 shown in FIGS. 3 and 4, when the width of each wiring L1 to Ln is 5 μm and the interval between the video lines V1 to V8 is 10 μm, the shortest is obtained. The wiring resistance r of the wiring L1 is about 10Ω.

As described above, when there is a large difference between the wiring resistances r of the wirings L1 to Ln, a large difference also occurs in the impedances of the wirings L1 to Ln. Then, each of the wirings L1 to Ln
Causes a difference between the voltages of the video signals sent to the data lines D1 to Dn via the sampling transistors t1 to tn. As a result, a difference occurs in the voltage of the video signal written to each pixel cell GC connected to each of the data lines D1 to Dn, and the difference in the voltage causes a difference in the gradation of each pixel cell GC. It appears as color unevenness in the lateral direction of the part 1. The color unevenness can be identified even when the voltage difference of the video signal written to each pixel cell GC is several tens mV. In addition, the color unevenness is a three-plate LC compatible with Hi-Vision.
When displaying a single color on a large screen with a D projector (for example,
This is particularly noticeable when displaying a blue screen.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a high-quality display device without color unevenness.

[0045]

Means for Solving the Problems The invention according to claim 1
In a display device having an analog dot inversion type data driver in an active matrix type full color liquid crystal display, the data driver is composed of six video lines, a sampling transistor group, and a shift register. The gist is that the ratio of the wiring length to the wiring width of each wiring connecting each sampling transistor is equalized.

According to a second aspect of the present invention, in a display device having an analog data driver in an active matrix type liquid crystal display, the data driver includes a plurality of parallel video lines, a sampling transistor group, and a shift circuit. The gist is that the ratio of the wiring length to the wiring width of each wiring connecting the video line and each sampling transistor is equalized.

According to a third aspect of the present invention, in the display device according to the fifth or sixth aspect, each of the wirings is made of one material selected from the group consisting of metal, polycide, silicide, and polysilicon. That is the gist.

According to the invention described in claim 1 or 2,
Then, by equalizing the ratio between the wiring length and the wiring width of each wiring, the wiring resistance value of each wiring can be made uniform. Therefore, there is no difference in the voltage of the video signal written to each pixel from each video line via each wiring, and the gradation of each pixel becomes uniform and color unevenness does not occur.

According to the first aspect of the present invention, an active matrix type full-color liquid crystal display can be obtained. According to the second aspect of the invention, since a plurality of parallel video lines are provided, the sampling frequency of the video signal sent to each video line can be reduced. Therefore, HDT
V. Further, if the present invention is applied to a three-panel LCD projector, it is possible to perform display on a large screen without color unevenness.

According to the third aspect of the present invention, even if each wiring is formed of the above-mentioned material having a high resistance value other than metal, the gradation of each pixel becomes uniform and color unevenness does not occur.

[0051]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. In the present embodiment, the same components as those of the conventional example shown in FIGS. 1 to 7 are denoted by the same reference numerals, and detailed description thereof will be omitted.

The present embodiment is different from the conventional example in that
The ratio of the wiring length l of each of the wirings L1 to Ln to the wiring width w (= l /
The only difference is that the wiring resistance r of each of the wirings L1 to Ln is made uniform by equalizing w). That is, each wiring L
In 1 to Ln, the wiring width w is increased for a wiring having a long wiring length l (for example, wiring Ln), and the wiring width w is reduced for a wiring having a short wiring length l (for example, wiring L1).

Therefore, in this embodiment, each wiring L
The wiring resistances r of the wirings L1 to Ln are made uniform, and the wirings L1 to Ln
Is also made uniform. Then, each wiring L1
~ Ln via the sampling transistors t1 -tn to the data lines D1 -Dn no longer produces a difference in the voltage of the video signal. Therefore, each of the data lines D1 to Dn
No difference occurs in the voltage of the video signal written to each pixel cell GC connected to the pixel cell GC, and the gradation of each pixel cell GC becomes uniform. As a result, it is possible to prevent color unevenness in the LCD pixel portion 1 from occurring in the horizontal direction.

As described above, when the present embodiment having no color unevenness of the LCD pixel portion 1 is used, when a single color is displayed on a large screen by a three-panel LCD projector compatible with Hi-Vision (for example, when displaying a blue screen) This is particularly effective. In addition, since a high-definition still image without color unevenness can be displayed, a high-performance high-definition art museum system can be realized.

The above embodiment may be modified as follows, and the same operation and effect can be obtained in such a case. (1) Line-sequentially driven active matrix TFT
-Applies to LCDs.

(2) The present invention is applied to the digital data driver 3. In this case, the effect becomes particularly effective as the number of gradation power supplies increases. (3) The present invention is applied to the data driver 3 of the analog frame inversion type in the NTSC type full color LCD.

(4) The present invention is applied to a full-color LCD used in a single-panel LCD projector. (5) The present invention is applied to an analog frame inversion type data driver 3 in a monochrome LCD used in a three-panel LCD projector compatible with high definition.

(6) The present invention is applied to an active matrix type TFT-LCD which does not have a built-in driver. In particular, an active matrix type TFT in which the LCD pixel portion 1 and the data driver 3 are formed on the same substrate and the gate driver 2 is externally provided.
Applies to FT-LCD.

(7) In the above embodiment, when each of the wirings L 1 to Ln is regarded as a part of each of the data lines D 1 to Dn, each of the wirings L 1 to Ln
To make the wiring resistance r of n uniform, the data lines D1 to Dn
Is to make the overall wiring resistance uniform. Therefore, the uniformity of the wiring resistance of each of the scanning lines G1 to Gn can also eliminate color unevenness in the LCD pixel portion 1 in the vertical direction.

(8) In the data driver 3 shown in FIG. 4, the video lines VL are not divided into eight lines but arranged in an appropriate number (for example, four lines).
System). (9) The wirings L1 to Ln are formed by silicide wiring or doped polysilicon wiring. Since the wiring resistance of the silicide wiring or the doped polysilicon wiring is higher than that of the polycide wiring, color unevenness of the LCD pixel portion 1 is likely to occur. However, according to the present invention, color unevenness can be surely prevented.

(10) The present invention is applied to a diode type active matrix type LCD using a diode as a switch element. (11) TN (Twisted Nematic)-LCD or ST
The present invention is applied to a simple matrix type LCD such as N (Super Twisted Nematic) -LCD. (12) ECB (Electrically Controlled Birefringe)
nce) type LCD. (13) Applicable to ferroelectric type LCD.

Although the present embodiment has been described above, technical ideas other than the claims that can be grasped from the present embodiment will be described below together with their effects. (A) The display device according to claim 1 or 2, wherein the data driver is a digital type.

In this way, even when the number of gradation power supplies is large, the wiring resistance of each wiring can be made uniform. (B) The display device according to claim 2, wherein the data driver is a dot inversion method.

This makes it possible to prevent burn-in of pixels. (C) The display device according to any one of claims 1 to 3, wherein the active matrix type liquid crystal display uses a thin film transistor having amorphous silicon as an active layer as a switch element.

In this way, it is possible to obtain an active matrix type liquid crystal display having the characteristics of a thin film transistor using amorphous silicon as an active layer. (D) The display device according to any one of claims 1 to 3, wherein the active matrix type liquid crystal display uses a diode as a switch element.

In this way, an active matrix type liquid crystal display having the characteristics of a diode can be obtained. By the way, in this specification, the members according to the configuration of the present invention are defined as follows.

(A) The display device includes not only an active matrix type liquid crystal display but also a simple matrix type, ECB type, ferroelectric type or the like liquid crystal display.

(B) The switching element is a polysilicon T
It includes not only FT but also amorphous silicon TFT, diode and the like.

[0069]

As described in detail above, according to the present invention, it is possible to provide a high-quality display device without color unevenness.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment and a conventional example.

FIG. 2 is a main part circuit diagram of one embodiment and a conventional example.

FIG. 3 is a main part circuit diagram of an embodiment and a conventional example.

FIG. 4 is a main part circuit diagram of one embodiment and a conventional example.

FIG. 5 is a main part circuit diagram of one embodiment and a conventional example.

FIG. 6 is a main part circuit diagram of one embodiment and a conventional example.

FIG. 7 is an equivalent circuit diagram of a main part of an embodiment and a conventional example.

[Description of Signs] 1 ... LCD pixel section 2 ... Gate driver 3 ... Data driver D1 to Dn ... Data line GC ... Pixel cell VL, VR + to VB-, V1 to V8 ... Video line 4 ... Analog switch (sampling transistor group) t1 to tn: sampling transistor 5: shift register L1 to Ln: wiring

Continued on the front page (72) Inventor Masayuki Furukawa 2-5-5 Keihanhondori, Moriguchi-shi, Osaka Sanyo Electric Co., Ltd. (72) Inventor Kiyoshi Yoneda 2-5-2-5 Keihanhondori, Moriguchi-shi, Osaka Sanyo (56) References JP-A-2-287433 (JP, A) JP-A-58-4180 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) G02F 1 / 136 500 G02F 1/1345

Claims (3)

(57) [Claims] 1. An active matrix full color system.
-Dot inversion by analog method in liquid crystal display
Display device equipped with a
The data driver has six video lines and sampling traces.
Each video consists of a transistor group and a shift register.
Each connection between the line and each sampling transistor
A display device in which the ratio of the line length to the line width is equalized. 2. An active matrix type liquid crystal display.
Equipped with analog data driver for spray
In a display device, the data driver is parallelized.
Video lines and sampling transistors
Data lines and a shift register.
Wiring for connecting the
A display device in which the ratio between the line length and the line width is equalized. 3. The display device according to claim 1 or claim 2.
Wherein each of the wirings is made of metal, polycide, silicide,
One selected from the group consisting of
A display device made of a material.