JP2011060815A - Solid-state imaging element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize highly accurate AF in a solid-state imaging device including an imaging pixel and a focus detection pixel.
A solid-state imaging device receives an image pickup pixel that picks up an image of a subject and generates an image signal, and a light beam that passes through different partial areas of the pupil of an optical system at each pixel, and determines the position of the subject image. A pair of focus detection pixels for acquiring phase difference information. The focus detection pixel includes a photoelectric conversion region that generates a signal charge according to the amount of incident light at a position on the light receiving surface corresponding to the first range used for generating phase difference information in the pupil. Further, the focus detection pixel includes a discharge area for discharging charges at a position on the light receiving surface corresponding to the second range of the pupil that does not overlap with the first range.
[Selection] Figure 1

Description

  The present invention relates to a solid-state imaging device.

  Conventionally, in order to realize imaging and AF with one solid-state imaging device, a solid-state imaging device having an imaging pixel and a phase difference detection type focus detection pixel has been proposed. As an example, Patent Document 1 discloses a configuration in which pupil division is performed by arranging light shielding films having different opening positions on the upper surfaces of a pair of focus detection pixels.

JP 2009-109623 A

  By the way, when pupil division is performed with the light shielding film as described above, the accuracy of autofocus (AF) is degraded unless the light collection position of the microlens of the focus detection pixel is aligned with the light shielding film. On the other hand, a pixel (imaging pixel) that captures an image of a subject in a solid-state imaging device is designed so that the condensing position of the microlens matches the photoelectric conversion region on the substrate.

  Therefore, in a solid-state imaging device including a focus detection pixel that performs pupil division with a light shielding film, it is necessary to change the configuration of the microlens between the imaging pixel and the focus detection pixel in order to perform highly accurate AF. Has been pointed out.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a solid-state imaging device that can realize highly accurate AF in an imaging device including an imaging pixel and a focus detection pixel.

  The solid-state imaging device according to one aspect receives an imaging pixel that captures an image of a subject and generates an image signal, and a light beam that passes through different partial areas of the pupil of the optical system, and obtains phase difference information of the subject image. A pair of focus detection pixels to be acquired. The focus detection pixel includes a photoelectric conversion region that generates a signal charge according to the amount of incident light at a position on the light receiving surface corresponding to the first range used for generating phase difference information in the pupil. Further, the focus detection pixel includes a discharge region for discharging charges at a position on the light receiving surface corresponding to the second range of the pupil that does not overlap with the first range.

  In the one aspect described above, the discharge region may be connected to a power source or a reset control line of the focus detection pixel.

  The solid-state imaging device according to the one aspect described above may further include a potential adjusting unit that adjusts the potential of the discharge region.

  In the above aspect, the focus detection pixel further includes a floating diffusion region that accumulates the signal charge generated in the photoelectric conversion region, and a transfer transistor that transfers the signal charge from the photoelectric conversion region to the floating diffusion region. May be. Further, the floating diffusion region and the transfer transistor of each pixel may be alternately arranged opposite to each other between two adjacent photoelectric conversion regions in the focus detection pixel.

  In the above aspect, the focus detection pixel further includes a floating diffusion region that accumulates the signal charge generated in the photoelectric conversion region, and a transfer transistor that transfers the signal charge from the photoelectric conversion region to the floating diffusion region. May be. Further, the floating diffusion region and the transfer transistor may be arranged on the boundary side between the first range and the second range for one of the pair of focus detection pixels.

  In addition, the imaging device provided with the solid-state imaging device of each aspect described above is also effective as a specific aspect of the present invention.

  According to the solid-state imaging device of one aspect, highly accurate AF can be realized.

The figure which shows the schematic structural example of the solid-state image sensor in 1st Embodiment. The figure which shows the pixel arrangement example of the solid-state image sensor in 1st Embodiment. Partial enlarged view of the pixel array of FIG. The figure which shows the example of the planar structure of the imaging pixel and focus detection pixel in 1st Embodiment The figure which shows the circuit structural example of an imaging pixel and a focus detection pixel Schematic diagram showing a cross section of a focus detection pixel in the first embodiment The figure which shows the example of the planar structure of the imaging pixel in 2nd Embodiment, and a focus detection pixel The figure which shows the modification of the planar structure of an imaging pixel and a focus detection pixel The figure which shows the modification of the planar structure of an imaging pixel and a focus detection pixel The figure which shows the modification of the planar structure of an imaging pixel and a focus detection pixel

<Description of First Embodiment>
FIG. 1 is a diagram illustrating a schematic configuration example of a solid-state imaging device according to the first embodiment. In addition, the solid-state image sensor of 1st Embodiment is integrated in imaging devices, such as a digital still camera, a video camera, and a camera module of a mobile telephone, for example.

  The solid-state imaging device of the first embodiment is formed as a CMOS solid-state imaging device using a CMOS (complementary metal oxide semiconductor) process on a silicon substrate. The solid-state imaging device has a pixel array in which two types of pixels, an imaging pixel and a focus detection pixel, are arranged.

  Here, the imaging pixel is a pixel that captures an image of a subject and generates an image signal. The focus detection pixels receive light beams that pass through different partial areas of the pupil of an optical system (such as a photographing lens) (not shown) with a pair of pixels, and acquire phase difference information of an object image during AF. . Since the principle of phase difference AF for obtaining the defocus amount of the optical system using the phase difference information of the subject image is well known, detailed description thereof will be omitted.

  FIG. 2 is a diagram illustrating an arrangement example of imaging pixels and focus detection pixels in the pixel array of the solid-state imaging device according to the first embodiment. In the first embodiment, on the light receiving surface of the solid-state imaging device, the array of focus detection pixels extending in the horizontal direction (row direction) is arranged at nine locations in a 3 × 3 square lattice pattern. In addition, on the light receiving surface, imaging pixels are arranged in other portions excluding the focus detection pixel array.

  FIG. 3 is a partially enlarged view of the pixel array of FIG. The charge accumulation region (photodiode) of the imaging pixel is formed in a substantially square shape. In addition, the charge accumulation region of each focus detection pixel is formed in a vertically long rectangular shape smaller than the charge accumulation region of the imaging pixel. Further, in the pixel array of the focus detection pixels, in order to perform pupil division using a pair of focus detection pixels, a focus detection pixel that acquires an image of the right half of the exit pupil and an image of the left half of the exit pupil are acquired. The focus detection pixels are alternately arranged in the horizontal direction. The position of the charge accumulation region of each focus detection pixel is arranged eccentrically on either the right side or the left side of the pixel center depending on the range of photoelectric conversion of the exit pupil image.

  Returning to FIG. 1, the circuit configuration of the solid-state imaging device will be described. In the following description, the imaging pixel and the focus detection pixel may be collectively referred to as a pixel PX.

  The solid-state imaging device includes a plurality of pixels PX arranged in a matrix, a vertical scanning unit 11, a signal storage unit 12, a horizontal scanning unit 13, and a vertical output line 14 provided for each column of pixels PX. The constant current source 15 is connected to each vertical output line 14, and a pair of transfer gates 16 a and 16 b for connecting each vertical output line 14 to the signal storage unit 12. In FIG. 1, only 3 × 2 pixels PX are shown for the sake of simplicity, but as can be seen from FIGS. 2 and 3, a larger number of pixels are arranged on the light receiving surface of the actual solid-state imaging device. Not too long.

  The vertical scanning unit 11 outputs a selection pulse φSEL, a reset pulse φRES, and a transfer pulse φTX to the pixel groups arranged in the horizontal direction in FIG. The pulses φSEL, φRES, and φTX have a high logic level of the power supply voltage VDD and a low logic level of the ground voltage VSS. The signal accumulation unit 12 sequentially accumulates a noise signal output from each pixel PX of the pixel group arranged in the horizontal direction in FIG. 1 and a pixel signal in which the noise signal is superimposed on a signal component corresponding to a signal charge generated by the photodiode. To do. The horizontal scanning unit 13 controls the operation of the signal storage unit 12 by the control pulse φH, and sequentially outputs the signals stored in the signal storage unit 12 to a not-shown correlated double sampling circuit (CDS circuit) or the like.

  The constant current source 15 supplies a current to the vertical output line 14 in order to read out the image signal. The transfer gates 16a and 16b are formed by nMOS transistors. The transfer gate 16a is turned on in synchronization with the signal transfer pulse φTS in order to transfer the pixel signal on which the noise signal is superimposed to the signal storage unit 12. The transfer gate 16b is turned on in synchronization with the noise transfer pulse φTN in order to transfer the noise signal to the signal storage unit 12.

  FIG. 4 is a diagram illustrating an example of a planar structure of the imaging pixel and the focus detection pixel in the first embodiment. FIG. 5 is a diagram illustrating a circuit configuration example of the imaging pixels and the focus detection pixels. Here, the shaded area in FIG. 4 indicates the gate of the transistor. In FIG. 4, illustration of control wirings for supplying the pulses φSEL, φRES, and φTX, respectively, is omitted.

  Each pixel of the imaging pixel and the focus detection pixel includes a photodiode PD, a transfer transistor TX, a reset transistor RES, an amplification transistor AMP, a selection transistor SEL, and a floating diffusion region FD. Note that the transistors formed in each pixel are all nMOS transistors.

  The photodiode PD generates a signal charge by photoelectric conversion according to the amount of incident light. The transfer transistor TX is turned on during the high level period of the transfer pulse φTX, and transfers the signal charge accumulated in the photodiode PD to the floating diffusion region FD.

  The source of the transfer transistor TX is the photodiode PD, and the drain of the transfer transistor TX is the floating diffusion region FD. The floating diffusion region FD is an N diffusion region formed by introducing impurities into the semiconductor substrate. Note that the floating diffusion capacitance in each pixel is obtained as the sum of the diffusion layer capacitance and the wiring capacitance.

  The floating diffusion region FD is connected to the gate of the amplification transistor AMP and the source of the reset transistor RES by connection wiring (copper wiring or aluminum wiring).

  In each pixel of FIG. 4, the selection transistor SEL, the amplification transistor AMP, and the reset transistor RES are arranged in a line along the line in which the photodiode PD, the transfer transistor TX, and the floating diffusion region FD are arranged. The selection transistor SEL, the amplification transistor AMP, and the reset transistor RES are formed by disposing gates at predetermined intervals on one active region extending in the horizontal direction in FIG. The amplification transistor AMP and the reset transistor RES have a common drain connected to the power supply line VDD. In the first embodiment, with this arrangement, the source / drain of the selection transistor SEL, the amplification transistor AMP, and the reset transistor RES can be shared, and the layout size of each pixel can be minimized.

  The reset transistor RES is turned on during the high level period of the reset pulse φRES, and resets the floating diffusion region FD to the power supply voltage VDD. The amplification transistor AMP includes a source follower circuit having a drain connected to the power supply voltage VDD, a gate connected to the floating diffusion region FD, a source connected to the drain of the selection transistor SEL, and the constant current source 15 as a load. It is composed. The amplification transistor AMP outputs a read current to the output terminal OUT via the selection transistor SEL according to the voltage value of the floating diffusion region FD. The selection transistor SEL is turned on during the high level period of the selection pulse φSEL, and connects the source of the amplification transistor AMP to the output terminal OUT.

  Further, as shown in FIG. 4, a rectangular discharge region 17 for discharging unnecessary charges is disposed adjacent to the photodiode PD on the light receiving surface of the focus detection pixel. In the focus detection pixel arrangement according to the first embodiment, the left region of the focus detection pixel in which the photodiode PD is arranged eccentrically on the right side and the right side of the focus detection pixel in which the photodiode PD is arranged eccentrically on the left side. One common discharge region 17 is disposed across the two regions. Therefore, the discharge area 17 in the first embodiment is shared between adjacent pixels. In the first embodiment, each discharge region 17 is connected to the power supply line VDD.

  Further, on the light receiving surface of one focus detection pixel, the photodiode PD is arranged at a position where a first range (for example, the right half of the pupil) used for generating phase difference information in the pupil of the optical system forms an image. . The discharge region 17 is disposed at a position where the remaining second range (for example, the left half of the pupil) that does not overlap the first range of the pupil of the optical system is imaged. In addition, the first range and the second range are reversed left and right between the focus detection pixels adjacent in the horizontal direction. In the drawings of the present specification, the range in which the pupil image is formed on the light receiving surface is indicated by a one-dot chain line, and the first range in the focus detection pixel is indicated by hatching.

  Here, signal charges are accumulated in the photodiode PD of the focus detection pixel by receiving a light beam corresponding to the first range of the pupil. On the other hand, most of the luminous flux corresponding to the second range of the pupil forms an image in the discharge area 17. Then, the light generated in the discharge region 17 of the focus detection pixel upon receiving the light beam corresponding to the second range of the pupil is discharged from the discharge region 17 as it is. In addition, the potential of the discharge region 17 is equal to the potential of the power supply and is lower than the photodiode PD. Therefore, most of the charge generated in the separation region between the photodiode PD and the discharge region 17 is absorbed by the discharge region 17 and discharged. Thereby, in 1st Embodiment, the electric charge corresponding to the 1st range of a pupil image can be well isolate | separated in photodiode PD of a focus detection pixel.

  Note that the arrangement of the photodiodes PD of the imaging pixels is set so that all pupil images of the optical system are formed. Thereby, the charge obtained by receiving the light beam corresponding to the entire range of the pupil image is accumulated in the photodiode PD of the imaging pixel. In the drawings of the present specification, the range in which the pupil image is formed in the imaging pixels is also indicated by hatching.

  In the first embodiment, the photodiode PD of the focus detection pixel is configured to transfer the signal charge to the opposite side of the discharge region 17. Then, between two adjacent photodiodes PD in the focus detection pixel array, the floating diffusion region FD and the transfer transistor TX are alternately opposed to each other while being shifted in the vertical direction in order to avoid interference. By disposing the floating diffusion region FD of the focus detection pixel and the transfer transistor TX as described above, the structural divergence between the imaging pixel and the focus detection pixel can be relatively reduced, and the layout of each pixel and the manufacture of the solid-state imaging device Becomes easier.

  FIG. 6 is a schematic diagram illustrating a cross-section of the focus detection pixel in the first embodiment. In the solid-state imaging device of the first embodiment, a P-type well 22 is provided on an N-type silicon substrate 21, and elements such as a photodiode PD, a transfer transistor TX, a floating diffusion region FD, and a discharge region 17 are provided on the P-type well 22. Is forming. A silicon oxide film 23 is formed on the upper surface side of the P-type well 22.

  A photodiode PD shown in FIG. 6 is an embedded photodiode including an N-type charge storage layer provided in the P-type well 22 and a P-type depletion prevention layer disposed on the surface side thereof. . The discharge region 17 is composed of an N type diffusion layer. The isolation between the photodiode PD and the discharge region 17 may be performed by a known method such as a LOCOS (local oxidation of silicon) method, an STI (shallow trench isolation) method, or diffusion isolation.

  In addition, microlenses 24 are arranged on the upper surfaces of the respective focus detection pixels. In the wiring portion of the focus detection pixel, incident light is shielded by the light shielding aluminum film 25 disposed between the microlens 24 and the light receiving surface. In the focus detection pixel shown in FIG. 6, an area (photodiode PD) in which a light beam in a first range used for generating phase difference information in the pupil of the optical system overlaps with the first range in the pupil of the optical system. The region where the remaining second range of light flux forms an image (excluding the pixel boundary in the discharge region 17) is not covered with the light shielding film 25, and other regions are covered with the light shielding film 25. In addition, although the light shielding aluminum layer 25 is arrange | positioned ranging over the adjacent focus detection pixels on the upper part of the discharge | emission area | region 17 shared between adjacent pixels, this light shielding aluminum layer 25 does not necessarily need to provide. Further, as described above, the light shielding film 25 is not provided above the region where the light beam in the second range is imaged, but the light shielding layer 25 may be provided.

  Hereinafter, the operation of the solid-state imaging device in the first embodiment will be described. In the focus detection pixel according to the first embodiment, the photodiode PD receives a light beam corresponding to the first range of the pupil and accumulates signal charges, and receives a light beam corresponding to the second range of the pupil to generate charges generated. It discharges from the discharge area 17. Thereby, in the focus detection pixel of the first embodiment, it is possible to prevent the charge generated by the light beam other than the desired pupil region from flowing into the photodiode PD, so that the pupil division is relatively accurately performed at the position of the substrate surface. Can be done. In addition, it is possible to realize highly accurate AF using phase difference information with a relatively simple configuration.

  Further, in the solid-state imaging device of the first embodiment, pupil division is performed at the position on the substrate surface, so that the condensing position of the microlens can be matched between the imaging pixel and the focus detection pixel. Therefore, since the same microlens can be used for the imaging pixel and the focus detection pixel, the process of forming the microlens can be simplified as compared with the case of a solid-state imaging device that performs pupil division with a light shielding film.

<Description of Second Embodiment>
FIG. 7 is a diagram illustrating an example of a planar structure of an imaging pixel and a focus detection pixel in the second embodiment. In the following description of the embodiment, the same reference numerals are given to the same components as those in the first embodiment, and the duplicate description will be omitted.

  The solid-state imaging device according to the second embodiment includes a potential adjusting unit 18 that adjusts the potential of the discharge region 17. The potential adjusting unit 18 is connected to each discharge region 17 through a control wiring.

  In the second embodiment, when the potential of the discharge region 17 is adjusted to be low, the charge generated in the separation region between the photodiode PD and the discharge region 17 has a higher probability of flowing into the discharge region 17. On the other hand, when the potential of the discharge region 17 is adjusted to be high, the charge generated in the vicinity of the photodiode PD among the charges generated in the separation region is likely to flow into the photodiode PD. Therefore, according to the configuration of the second embodiment, the position of the boundary where the pupil image is divided in the focus detection pixel can be finely adjusted by adjusting the potential of the discharge region 17.

  In the second embodiment, although not shown, the solid-state imaging device is usually provided with a color filter corresponding to each pixel between the microlens 24 and the light receiving surface shown in FIG. In a solid-state imaging device having an imaging pixel and a focus detection pixel, although not particularly limited, each of color filters of different colors (for example, red, blue, and green color filters) is provided on the light receiving surface side of the imaging pixel. It is arranged corresponding to. In addition, on the light receiving surface side of the focus detection pixel, for example, a white filter that transmits light in the visible light region is disposed. In this case, depending on the shooting conditions, there may be a problem in the balance between the signal charge level generated by the focus detection pixel and the signal charge level generated by the imaging pixel. In that case, the area of the photodiode PD of the focus detection pixel may be changed so as not to affect pupil division. For example, the area of the photodiode PD can be expanded to a region that does not affect pupil division.

<Supplementary items of the embodiment>
(1) In the example of the first embodiment, the example in which the discharge region 17 of the focus detection pixel is connected to the power supply line VDD has been described. However, the focus detection pixel discharge region 17 may be connected to a reset control line for transmitting the reset pulse φRES instead of the power supply line VDD shown in FIG. Here, during the period in which charges are accumulated in the photodiode PD of the focus detection pixel, the reset pulse φRES is at a high level, and the floating diffusion region FD is reset. Therefore, by connecting the discharge region 17 to the reset control line, it becomes possible to absorb unnecessary charges.

  (2) The configuration of the focus detection pixel of the above embodiment is merely an example. For example, as shown in FIG. 8, in the range of 2 × 2 pixels including two imaging pixels and two focus detection pixels, the drains of the amplification transistor AMP and the reset transistor RES and the discharge region 17 are connected and integrated. May be. In the example of FIG. 8, illustration of the power supply line VDD connected to the discharge region 17 and the like is omitted.

  Here, in the case of FIG. 8, the floating diffusion region FD and the transfer transistor TX are in the first range for the pixel on the left side (left column) in the drawing among the pair of focus detection pixels (pixels in the lower row in FIG. 8). And the second range. The transfer directions of the signal charges accumulated in the photodiode PD of the focus detection pixel are opposite to each other in the pair of focus detection pixels in the first embodiment, but in the case of FIG. Even with such an arrangement, the structural divergence between the image pickup pixel and the focus detection pixel can be relatively reduced, and the layout of each pixel and the manufacture of the solid-state image sensor can be facilitated.

  In the example of the planar structure of the imaging pixel and the focus detection pixel shown in FIG. 4, the drains of the amplification transistor AMP and the reset transistor RES are within a range of 2 × 2 pixels including the two imaging pixels and the two focus detection pixels. And the discharge region 17 may be connected and integrated.

  FIG. 9 is another arrangement example of focus detection pixels when pupil division is performed in the row direction of the pixel array. In the example of FIG. 9, among the pair of focus detection pixels (pixels in the lower row of FIG. 9), the transfer direction of the signal charge accumulated in the photodiode PD is the right side for the pixels on the left side (left column) in the figure. The floating diffusion region FD and the transfer transistor TX are arranged downward so as to be orthogonal to the direction of charge transfer in the focus detection pixels in the (right column), and the selection transistor SEL, the amplification transistor AMP, and the reset transistor RES are vertically Arranged along the direction. The discharge region 17 shown in FIG. 9 is integrated with the amplification transistor AMP and the drain of the reset transistor RES of the left focus detection pixel. In the example of FIG. 9, the power supply line VDD connected to the discharge region 17 and the like is not shown.

  Further, FIG. 10 is an arrangement example of focus detection pixels when pupil division is performed in the column direction of the pixel array. In the example of FIG. 10, the pixels in the right column in the figure are a pair of focus detection pixels. The photodiodes PD of the upper (upper row) focus detection pixels are arranged eccentrically on the upper side, and the photodiodes PD of the lower (lower row) focus detection pixels are arranged eccentrically on the lower side. A discharge region 17 is disposed between the two photodiodes PD. The discharge region 17 shown in FIG. 10 is integrated with the amplification transistor AMP and the drain of the reset transistor RES of the upper focus detection pixel. In the example of FIG. 10, illustration of the power supply line VDD connected to the discharge region 17 and the like is omitted.

  In the example of FIG. 10, the discharge region 17 in the pair of focus detection pixels has a structure integrated with the amplification transistor AMP and the drain of the reset transistor RES of the upper focus detection pixel, but is not limited thereto. . The discharge region 17 may be provided individually in the pair of focus detection pixels. In that case, similarly to the above-described embodiment, the discharge region 17 may be connected to the power supply line VDD or to the reset control line.

  (3) In each of the above embodiments, a light shielding film may be disposed on the upper surface side of the discharge region 17 of the focus detection pixel. By combining the light shielding by the light shielding film and the discharge of unnecessary charges by the discharge region 17, it is possible to perform pupil division with higher accuracy in the focus detection pixel.

  (4) Note that the photodiode PD of the focus detection pixel may be arranged eccentrically by applying, for example, the configuration disclosed in Japanese Patent Application Laid-Open No. 2009-105358.

  (5) The configuration of the present invention can also be applied to an array of focus detection pixels extending obliquely on the pixel array. In the above embodiment, an example of a CMOS sensor having four transistors per pixel has been described. However, the solid-state image sensor of the present invention is not limited to such a configuration, and other solid-state image sensors (CCD, etc.) You may apply to the structure of.

  From the above detailed description, features and advantages of the embodiments will become apparent. It is intended that the scope of the claims extend to the features and advantages of the embodiments as described above without departing from the spirit and scope of the right. Further, any person having ordinary knowledge in the technical field should be able to easily come up with any improvements and modifications, and there is no intention to limit the scope of the embodiments having the inventive features to those described above. It is also possible to use appropriate improvements and equivalents within the scope disclosed in.

DESCRIPTION OF SYMBOLS 11 ... Vertical scanning part, 12 ... Signal storage part, 13 ... Horizontal scanning part, 14 ... Vertical output line, 15 ... Constant current source, 16a, 16b ... Transfer gate, 17 ... Discharge area | region, 18 ... Potential adjustment part, 21 ... N-type silicon substrate, 22 ... P-type well, 23 ... silicon oxide film, 24 ... microlens, 25 ... light shielding aluminum film, PX ... pixel, PD ... photodiode, TX ... transfer transistor, RES ... reset transistor, AMP ... amplification Transistor, SEL ... select transistor, FD ... floating diffusion region

Claims (5)

An imaging pixel that captures an image of a subject and generates an image signal, and a pair of focus detection pixels that receive light beams passing through different partial areas of the pupil of the optical system and obtain phase difference information of the image of the subject, In a solid-state imaging device comprising:
The focus detection pixel is
A photoelectric conversion region that generates a signal charge according to the amount of incident light at a position on the light receiving surface corresponding to the first range used for generating the phase difference information in the pupil;
A solid-state imaging device, comprising: a discharge region for discharging charges at a position on a light receiving surface corresponding to a second range of the pupil that does not overlap with the first range. The solid-state imaging device according to claim 1,
The solid-state imaging device, wherein the discharge region is connected to a power source or a reset control line of the focus detection pixel. The solid-state imaging device according to claim 1,
The solid-state imaging device further comprising a potential adjusting unit that adjusts the potential of the discharge region. The solid-state imaging device according to claim 2 or 3,
The focus detection pixel is
A floating diffusion region for accumulating the signal charge generated in the photoelectric conversion region;
A transfer transistor that transfers the signal charge from the photoelectric conversion region to the floating diffusion region, and
The solid-state imaging device, wherein the floating diffusion region and the transfer transistor of each pixel are alternately arranged opposite to each other between two adjacent photoelectric conversion regions in the focus detection pixel. The solid-state imaging device according to claim 2 or 3,
The focus detection pixel is
A floating diffusion region for accumulating the signal charge generated in the photoelectric conversion region;
A transfer transistor that transfers the signal charge from the photoelectric conversion region to the floating diffusion region, and
The solid-state imaging device, wherein the floating diffusion region and the transfer transistor are arranged on a boundary side between the first range and the second range for one of the pair of focus detection pixels.

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