JP2010098696A - Communication terminal device - Google Patents

Abstract

The present invention achieves reduction of power consumption as a whole device during intermittent reception.
A transmission / reception unit for performing communication, a CPU for controlling the transmission / reception unit, a first clock having at least a first frequency, and a second frequency having a second frequency higher than the first frequency. PLL circuits 17 to 19 as clock supply means for supplying the second clock and intermittent reception by the transmission / reception unit 11 and second signals by the PLL circuits 17 to 19 as clock supply means at the time of intermittent reception And a clock input source selection circuit 16 for selecting a clock and supplying it to the CPU 10.
[Selection] Figure 1

Description

  The present invention relates to a communication terminal apparatus that performs so-called intermittent reception in which a reception operation is intermittently performed when a call or communication is not performed, such as a mobile phone.

  2. Description of the Related Art Conventionally, in a communication terminal apparatus that performs intermittent reception, a sleep period is provided by intermittent reception to reduce power consumption by setting a transmission / reception unit, a CPU, and its peripheral circuits to a sleep state.

In addition, multiple types of CPU clocks with different frequencies are prepared, and the CPU is operated using the CPU clock with the lowest frequency during the reception operation by intermittent reception, thereby reducing the power consumption by suppressing the power consumption of the CPU. (See Patent Documents 1 and 2).
Japanese Patent Laid-Open No. 04-170823 JP 2005-260717 A

  However, operating the CPU using the CPU clock with the lowest frequency as described above means that the operating speed of the CPU decreases, and the time required for one reception operation during intermittent reception increases. As a result, the energization time of the transmission / reception unit becomes longer, resulting in a problem that the power consumption of the entire apparatus is not reduced.

  The present invention has been made in view of the problems in intermittent reception as described above, and an object of the present invention is to provide a communication terminal device that can achieve a reduction in power consumption as a whole device during intermittent reception. is there.

  A communication terminal device according to the present invention includes a transmission / reception unit that performs communication, a CPU that controls the transmission / reception unit, a first clock having at least a first frequency, and a second frequency that is faster than the first frequency. A clock supply means for supplying a second clock having a clock selection means for performing intermittent reception by the transmission / reception unit, and for selecting a second clock by the clock supply means for intermittent reception at the time of intermittent reception. It is characterized by comprising.

  In the communication terminal device according to the present invention, a clock having three or more types of frequencies is supplied from the clock supply means, and during intermittent reception, the clock selection means selects the clock with the highest frequency of the clock supply means and the CPU It is characterized by giving to.

  The communication terminal device according to the present invention has a bus connecting the CPU and an external memory, and the clock selection means selects and supplies a bus clock used for the bus from a clock by the clock supply means. And

  According to the communication terminal device according to the present invention, the second CPU clock having a higher frequency is selected and given to the CPU at the time of intermittent reception, so that the operation speed of the CPU is increased and necessary processing at the time of intermittent reception is performed. Can be completed in a shorter time than the prior art, the energization time to the transmission / reception unit can be reduced, and the power consumption of the entire apparatus can be reduced during intermittent reception.

  According to the communication terminal apparatus according to the present invention, the clock selection means selects the highest frequency CPU clock of the clock supply means at the time of intermittent reception, so that the operation speed is maximized, and the entire apparatus is at the time of intermittent reception. Achieve reduction in power consumption.

  According to the communication terminal apparatus of the present invention, the clock selection means selects and supplies the bus clock used for the bus from the clock supplied by the clock supply means, so that the bus access time is shortened and the entire apparatus is received during intermittent reception. As a result, a reduction in power consumption can be achieved.

  Embodiments of a communication terminal apparatus according to the present invention will be described below with reference to the accompanying drawings. FIG. 1 shows a block diagram of a main part of a mobile phone which is an embodiment of a communication terminal device. The cellular phone includes a transmission / reception unit 11, and the transmission / reception unit 11 performs transmission / reception via the antenna 12. The mobile phone includes a CPU 10 for overall control of the operation of the mobile phone, an external memory 13 in which a program used by the CPU 10 is stored, and a power supply IC 14 for supplying power to each unit. A cellular phone is provided with a key operation unit, a display unit such as an LCD, and a call unit to which a speaker and a microphone for making a call are connected. These components are supplied with power during intermittent reception. The illustration is omitted because it is not directly related to the present invention.

  The power supply IC 14 includes a crystal resonator 15, and a clock having a predetermined frequency is output from the crystal resonator 15 to the clock input source selection circuit 16 and the three PLL circuits 17 to 19. The three PLL circuits 17 to 19 divide or multiply the clock output from the crystal unit 15 and output clocks having different frequencies to the clock input source selection circuit 16. The clock input source selection circuit 16 receives a clock from the crystal unit 15, clocks from the three PLL circuits 17 to 19, and an external clock regenerated from the received signals.

  The clock input source selection circuit 16 receives an instruction of a clock to be selected from the software of the CPU 10 via the clock control I / O terminal 21 and the clock control signal line 22. The selected clock is supplied to the CPU 10 as a CPU clock and is also supplied to the external memory 13 as a bus clock.

  The power supply IC 14 supplies power to the CPU 10, the transmission / reception unit 11, and the external memory 13. The software of the CPU 10 gives an instruction to the power supply IC 14 via the power supply control I / O terminal 23 and the power supply control signal line 24 at the time of intermittent reception, turns on / off the power of the transmission / reception unit 11, and the CPU 10 and the external memory 13 Switch the power on and low power (sleep mode power). The power supply to the clock input source selection circuit 16 and the three PLL circuits 17 to 19 is always performed even during intermittent reception.

  In this embodiment, the software of the CPU 10 controls the clock input source selection circuit 16 at the time of intermittent reception, selects the clock with the highest frequency among the clocks supplied to the clock input source selection circuit 16, The CPU clock is supplied to the CPU 10 as well as the bus clock to the external memory 13.

  As a result, the operation time T1 required for the operation such as the reception control for intermittent reception in the present embodiment is the operation required for the operation according to the conventional example in which intermittent reception is performed with the clock frequency reduced as shown in FIG. The time is significantly shorter than time T2.

  As shown in FIG. 3, the current consumption by the CPU 10 and the external memory 13 when operating using the high-speed clock according to the present embodiment is larger than that in the conventional example of intermittent reception, but continues in this embodiment. Time is short. In addition, the magnitude of the current consumption of the transmission / reception unit 11 does not change both in the case of this embodiment and in the case of the conventional example of intermittent reception, but in this embodiment, the energization time (current consumption time) is short ( FIG. 4).

  As a result, the total current consumption is smaller in the case of the present embodiment where the duration is short than in the case of the conventional example of intermittent reception (FIG. 5), and the overall power consumption is reduced. be able to.

  The number of clocks that can be selected in the above is merely an example, and may be more or less than that of the present embodiment. As a clock to be selected for intermittent reception, a high-speed clock is used, so that the operation time is shortened and power consumption can be reduced as compared with the conventional example of intermittent reception in which the clock frequency is reduced. If so, it is not always necessary to use the fastest clock.

The block diagram which shows the structure of the communication terminal which concerns on the Example of this invention. The figure which shows CPU operation time of the intermittent reception by the Example of this invention, and CPU operation time of the intermittent reception by a prior art example. The figure which shows the consumption current of CPU and external memory at the time of the intermittent reception by the Example of this invention, and the consumption current of CPU and external memory at the time of the intermittent reception by a prior art example. The figure which shows the consumption current by the transmission / reception part at the time of the intermittent reception by the Example of this invention, and the consumption current by the transmission / reception part at the time of the intermittent reception by a prior art example. The figure which shows the consumption current by the whole apparatus at the time of the intermittent reception by the Example of this invention, and the consumption current by the whole apparatus at the time of the intermittent reception by a prior art example.

Explanation of symbols

11 Transmission / Reception Unit 12 Antenna 13 External Memory 14 Power Supply IC
15 Crystal resonator 16 Clock input source selection circuit 21 Terminal 22 Clock control signal line 23 Terminal 24 Power supply control signal line

Claims (3)

A transmission / reception unit for communication;
A CPU for controlling the transmission / reception unit;
Clock supply means for supplying a first clock having at least a first frequency and a second clock having a second frequency faster than the first frequency;
And a clock selection unit that performs intermittent reception by the transmission / reception unit and selects a second clock by the clock supply unit and supplies the second clock to the CPU at the time of intermittent reception. A clock having three or more frequencies is supplied from the clock supply means,
2. The communication terminal device according to claim 1, wherein the clock selection means selects the clock having the highest frequency of the clock supply means and supplies it to the CPU during intermittent reception. A bus for connecting the CPU and an external memory;
3. The communication terminal apparatus according to claim 1, wherein the clock selection unit selects and supplies a bus clock used for the bus from a clock by the clock supply unit.

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