JP2009004790A - 電磁気バンドギャップ構造物を備えた印刷回路基板 - Google Patents
電磁気バンドギャップ構造物を備えた印刷回路基板 Download PDFInfo
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- JP2009004790A JP2009004790A JP2008162568A JP2008162568A JP2009004790A JP 2009004790 A JP2009004790 A JP 2009004790A JP 2008162568 A JP2008162568 A JP 2008162568A JP 2008162568 A JP2008162568 A JP 2008162568A JP 2009004790 A JP2009004790 A JP 2009004790A
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- 239000002184 metal Substances 0.000 claims abstract description 131
- 229910052751 metal Inorganic materials 0.000 claims abstract description 131
- 235000001674 Agaricus brunnescens Nutrition 0.000 claims description 16
- 239000010410 layer Substances 0.000 description 126
- 238000000034 method Methods 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 6
- 230000008054 signal transmission Effects 0.000 description 6
- 230000005540 biological transmission Effects 0.000 description 5
- 238000010295 mobile communication Methods 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000003989 dielectric material Substances 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
- 239000013256 coordination polymer Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P5/00—Coupling devices of the waveguide type
- H01P5/12—Coupling devices having more than two ports
- H01P5/16—Conjugate devices, i.e. devices having at least one port decoupled from one other port
- H01P5/18—Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers
- H01P5/184—Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers the guides being strip lines or microstrips
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P1/00—Auxiliary devices
- H01P1/20—Frequency-selective devices, e.g. filters
- H01P1/2005—Electromagnetic photonic bandgaps [EPB], or photonic bandgaps [PBG]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0236—Electromagnetic band-gap structures
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K9/00—Screening of apparatus or components against electric or magnetic fields
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15192—Resurf arrangement of the internal vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/0929—Conductive planes
- H05K2201/093—Layout of power planes, ground planes or power supply conductors, e.g. having special clearance holes therein
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09663—Divided layout, i.e. conductors divided in two or more parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
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- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Optics & Photonics (AREA)
- Structure Of Printed Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
【解決手段】一つが電源層であり、他の一つが接地層である第1金属層及び第2金属層210と、前記第1金属層と前記第2金属層との間に積層される第3金属層232と、前記第3金属層のパターンにおいて、空いている空間内に金属板が配列され、前記金属板に連結されるビア234を備えたきのこ型構造物230と、を含み、電磁気バンドギャップ構造物200は、印刷回路基板の層数の増加することなく、電源層または接地層と同一層上に設けられる。
【選択図】図3
Description
130 デジタル回路
140 アナログ回路
200 電磁気バンドギャップ構造物
210−1、210−2 金属層
230 きのこ型構造物
232 金属板
234 ビア
220a、220b、220 誘電層
Claims (10)
- アナログ回路とデジタル回路とを含む印刷回路基板であって、
一つが電源層であり、他の一つが接地層である第1金属層及び第2金属層と、
前記第1金属層と前記第2金属層との間に積層される第3金属層と、
前記第3金属層の回路パターン間の空間内に金属板が配列され、前記金属板に連結されるビアを備えたきのこ型構造物と、
を含むことを特徴とする印刷回路基板。 - 前記きのこ型構造物の金属板と前記第3金属層とが、同一層を形成することを特徴とする請求項1に記載の印刷回路基板。
- 前記ビアの一端が前記金属板に連結され、他端が前記第1金属層に連結されることを特徴とする請求項1に記載の印刷回路基板。
- 前記第1金属層と、前記第2金属層と、前記第1金属層及び前記第2金属層の間に形成されたきのこ型構造物とが、電磁気バンドギャップ構造物を形成することを特徴とする請求項1に記載の印刷回路基板。
- 前記きのこ型構造物が、前記第1金属層と前記第2金属層との間に複数存在し、帯構造で配列されていることを特徴とする請求項1に記載の印刷回路基板。
- 前記第3金属層が、複数の前記きのこ型構造物の金属板により第1パターン領域と第2パターン領域に区分され、
前記第1パターン領域と前記第2パターン領域のうちのいずれか一つが前記デジタル回路を含み、他の一つが前記アナログ回路を含むことを特徴とする請求項5に記載の印刷回路基板。 - 前記第1パターン領域と前記第2パターン領域とが、領域ビアを通して前記第2金属層に連結されることを特徴とする請求項6に記載の印刷回路基板。
- 前記帯構造が、前記デジタル回路領域と前記アナログ回路領域のうちの一つ以上を取り囲むことを特徴とする請求項5に記載の印刷回路基板。
- 前記帯構造が、閉ループ状、「コ」の字状、または「L」字状のうちの何れか一つであることを特徴とする請求項8に記載の印刷回路基板。
- 前記帯構造が、前記デジタル回路領域と前記アナログ回路領域との間の空いている空間を横切る一つ以上の直線状であることを特徴とする請求項8に記載の印刷回路基板。
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020070061833A KR100838246B1 (ko) | 2007-06-22 | 2007-06-22 | 전자기 밴드갭 구조물이 구비된 인쇄회로기판 |
| KR10-2007-0061833 | 2007-06-22 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2009004790A true JP2009004790A (ja) | 2009-01-08 |
| JP4722967B2 JP4722967B2 (ja) | 2011-07-13 |
Family
ID=39771394
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008162568A Expired - Fee Related JP4722967B2 (ja) | 2007-06-22 | 2008-06-20 | 電磁気バンドギャップ構造物を備えた印刷回路基板 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7943864B2 (ja) |
| JP (1) | JP4722967B2 (ja) |
| KR (1) | KR100838246B1 (ja) |
| DE (1) | DE102008002507B4 (ja) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010199550A (ja) * | 2009-02-24 | 2010-09-09 | Samsung Electro-Mechanics Co Ltd | 電磁気バンドギャップ構造を用いたemiノイズ低減基板 |
| JP2011124503A (ja) * | 2009-12-14 | 2011-06-23 | Nec Corp | 電子装置及びノイズ抑制方法 |
| JP2012129271A (ja) * | 2010-12-14 | 2012-07-05 | Nec Corp | ノイズ抑制構造 |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100998720B1 (ko) | 2007-12-07 | 2010-12-07 | 삼성전기주식회사 | 전자기 밴드갭 구조물 및 인쇄회로기판 |
| JP5380919B2 (ja) * | 2008-06-24 | 2014-01-08 | 日本電気株式会社 | 導波路構造およびプリント配線板 |
| KR100956689B1 (ko) | 2008-06-27 | 2010-05-10 | 삼성전기주식회사 | 전자기 밴드갭 구조물 및 인쇄회로기판 |
| KR100965264B1 (ko) | 2008-09-23 | 2010-06-22 | 삼성전기주식회사 | 전자기 밴드갭 구조물 및 인쇄회로기판 |
| KR101046716B1 (ko) | 2008-11-28 | 2011-07-06 | 삼성전기주식회사 | 전자기 밴드갭 구조물 및 회로 기판 |
| KR101018807B1 (ko) | 2008-12-02 | 2011-03-03 | 삼성전기주식회사 | 전자기 밴드갭 구조물 및 회로 기판 |
| KR20100072382A (ko) * | 2008-12-22 | 2010-07-01 | 한국전자통신연구원 | 전자파 저감 장치 및 방사체에서 전자파 저감 방법 |
| JP5326649B2 (ja) | 2009-02-24 | 2013-10-30 | 日本電気株式会社 | アンテナ、アレイアンテナ、プリント基板、及びそれを用いた電子装置 |
| KR101066419B1 (ko) | 2009-05-22 | 2011-09-23 | 한국조폐공사 | 전자기 밴드갭 패턴, 그 제조방법 및 전자기 밴드갭 패턴을 이용한 보안제품 |
| KR101077439B1 (ko) * | 2009-06-24 | 2011-10-26 | 삼성전기주식회사 | 전자기밴드갭 구조물을 구비한 인쇄회로기판 |
| US8711055B2 (en) * | 2009-06-24 | 2014-04-29 | Samsung Electro-Mechanics Co., Ltd. | Printed circuit board including electromagnetic bandgap structure |
| JP6611065B2 (ja) * | 2016-07-27 | 2019-11-27 | 国立大学法人 岡山大学 | 印刷配線板 |
| KR102528687B1 (ko) * | 2016-09-06 | 2023-05-08 | 한국전자통신연구원 | 전자기 밴드갭 구조물 및 그 제조 방법 |
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|---|---|---|---|---|
| JP2010199550A (ja) * | 2009-02-24 | 2010-09-09 | Samsung Electro-Mechanics Co Ltd | 電磁気バンドギャップ構造を用いたemiノイズ低減基板 |
| JP2011124503A (ja) * | 2009-12-14 | 2011-06-23 | Nec Corp | 電子装置及びノイズ抑制方法 |
| JP2012129271A (ja) * | 2010-12-14 | 2012-07-05 | Nec Corp | ノイズ抑制構造 |
Also Published As
| Publication number | Publication date |
|---|---|
| US7943864B2 (en) | 2011-05-17 |
| DE102008002507B4 (de) | 2012-11-22 |
| US20080314635A1 (en) | 2008-12-25 |
| DE102008002507A1 (de) | 2009-01-02 |
| KR100838246B1 (ko) | 2008-06-17 |
| JP4722967B2 (ja) | 2011-07-13 |
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