[go: up one dir, main page]

JP2008166576A - Semiconductor device manufacturing method - Google Patents

Semiconductor device manufacturing method Download PDF

Info

Publication number
JP2008166576A
JP2008166576A JP2006355713A JP2006355713A JP2008166576A JP 2008166576 A JP2008166576 A JP 2008166576A JP 2006355713 A JP2006355713 A JP 2006355713A JP 2006355713 A JP2006355713 A JP 2006355713A JP 2008166576 A JP2008166576 A JP 2008166576A
Authority
JP
Japan
Prior art keywords
wafer
silicon wafer
semiconductor device
center
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006355713A
Other languages
Japanese (ja)
Inventor
Goro Nakaya
吾郎 仲谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP2006355713A priority Critical patent/JP2008166576A/en
Priority to US11/889,289 priority patent/US7845229B2/en
Publication of JP2008166576A publication Critical patent/JP2008166576A/en
Priority to US12/943,616 priority patent/US8776602B2/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]

Landscapes

  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method that allows manufacturing of a semiconductor device employing a thin silicon wafer without edge chipping on the silicon wafer. <P>SOLUTION: The back 4 of the wafer W is formed with a recess portion 5 having a shape in which an overall part included in the center 1 of the back 4 is recessed towards the surface side. Afterwards, an etching fluid is supplied to the surface 3 and the back 4 of the wafer W, and the surface 3 and the back 4 of the wafer W are etched. This etching allows the edge portions 2 of the wafer W to have a thickness larger than the thickness of the center thereof 1 by the depth of the recessed portion 5 when the center 1 of the wafer the wafer W is thinned to a desired thickness. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、シリコンウエハを用いた半導体装置を製造する方法に関する。   The present invention relates to a method for manufacturing a semiconductor device using a silicon wafer.

最近、MEMS(Micro Electro Mechanical Systems)技術を応用したセンサ(MEMSセンサ)の携帯電話機への搭載が開始されたことから、そのMEMSセンサの注目度が高まっている。MEMSセンサの代表的なものとしては、物体の加速度を検出するための加速度センサやシリコンマイクが知られている。
MEMSセンサの製造工程には、シリコンウエハを薄化する工程(ウエハ薄化工程)が含まれる。シリコンウエハの薄化は、シリコンウエハをその裏面側(デバイスが形成される表面と反対側)から研削および/またはエッチングすることにより達成することができる。現在、MEMSセンサに用いられるシリコンウエハは、ウエハ薄化工程において、厚さ約200〜400μm程度まで薄化される。
特開2005−161516号公報
Recently, since the mounting of a sensor (MEMS sensor) using MEMS (Micro Electro Mechanical Systems) technology on a mobile phone has been started, the attention of the MEMS sensor is increasing. As a typical MEMS sensor, an acceleration sensor and a silicon microphone for detecting the acceleration of an object are known.
The manufacturing process of the MEMS sensor includes a process of thinning the silicon wafer (wafer thinning process). Thinning of the silicon wafer can be achieved by grinding and / or etching the silicon wafer from its back side (opposite to the surface on which the device is formed). Currently, silicon wafers used in MEMS sensors are thinned to a thickness of about 200 to 400 μm in the wafer thinning process.
JP 2005-161516 A

図2に示すように、シリコンウエハは、エッジ部の断面形状がR形状(凸湾曲状)になっている。そのため、シリコンウエハを元の厚さの1/2以上に薄くすると、エッジ部の断面形状がシャープな形状となり、エッジ部の機械的強度が非常に弱くなる。その結果、シリコンウエハのハンドリング時などに、シリコンウエハのエッジ部が破損する、いわゆるエッジチッピングを生じることがあった。   As shown in FIG. 2, in the silicon wafer, the cross-sectional shape of the edge portion is an R shape (convex curved shape). Therefore, when the silicon wafer is thinned to ½ or more of the original thickness, the cross-sectional shape of the edge portion becomes sharp, and the mechanical strength of the edge portion becomes very weak. As a result, when handling the silicon wafer, the edge portion of the silicon wafer may be damaged, so-called edge chipping may occur.

そこで、本発明の目的は、シリコンウエハのエッジチッピングを生じることなく、薄化されたシリコンウエハを用いた半導体装置を製造することができる方法を提供することである。   Accordingly, an object of the present invention is to provide a method capable of manufacturing a semiconductor device using a thinned silicon wafer without causing edge chipping of the silicon wafer.

前記の目的を達成するための請求項1記載の発明は、シリコンウエハのデバイスが形成される表面と反対側の裏面の中央部に凹部を形成し、前記シリコンウエハの中央部を薄化する第1ウエハ薄化工程と、前記第1ウエハ薄化工程後に、前記シリコンウエハの表面および裏面をエッチングして、前記シリコンウエハの中央部およびその周囲のエッジ部を薄化する第2ウエハ薄化工程とを含む、半導体装置の製造方法である。   In order to achieve the above object, according to the first aspect of the present invention, a recess is formed in the center of the back surface opposite to the surface on which the device of the silicon wafer is formed, and the center of the silicon wafer is thinned. 1 wafer thinning step and after the first wafer thinning step, a second wafer thinning step in which the front and back surfaces of the silicon wafer are etched to thin the center portion of the silicon wafer and the peripheral edge portion thereof. A method for manufacturing a semiconductor device.

シリコンウエハにおいて、中央部は、半導体装置の製造に用いられる領域(デバイスが形成されるデバイス形成領域)であり、その中央部の周囲のエッジ部(周縁部)は、半導体装置の製造に用いられない領域(デバイスが形成されない非デバイス形成領域)である。
前記の製造方法では、シリコンウエハの裏面の中央部(シリコンウエハの裏面のデバイス形成領域に含まれる部分)に凹部が形成されることにより、シリコンウエハの中央部が薄化される。その後、シリコンウエハの表面および裏面がエッチングされることにより、シリコンウエハの中央部およびエッジ部が薄化される。このエッチングは、シリコンウエハの表面ならびに裏面の中央部およびエッジ部において同じレートで進行する。したがって、シリコンウエハの中央部が所望の厚さに薄化された時点で、シリコンウエハのエッジ部は、その中央部の厚さよりも凹部の深さ分だけ大きな厚さを有する。これにより、シリコンウエハのエッジ部の機械的強度を確保することができるので、シリコンウエハのエッジチッピングの発生を防止することができる。よって、シリコンウエハのエッジチッピングを生じることなく、その薄化されたシリコンウエハを用いた半導体装置を製造することができる。
In a silicon wafer, the central portion is a region used for manufacturing a semiconductor device (device forming region where a device is formed), and an edge portion (peripheral portion) around the central portion is used for manufacturing a semiconductor device. No region (non-device formation region where no device is formed).
In the above manufacturing method, the central portion of the silicon wafer is thinned by forming the concave portion in the central portion of the back surface of the silicon wafer (the portion included in the device formation region on the back surface of the silicon wafer). Thereafter, the center and edge portions of the silicon wafer are thinned by etching the front and back surfaces of the silicon wafer. This etching proceeds at the same rate at the center and edge portions of the front surface and back surface of the silicon wafer. Therefore, when the central portion of the silicon wafer is thinned to a desired thickness, the edge portion of the silicon wafer has a thickness larger than the thickness of the central portion by the depth of the concave portion. As a result, the mechanical strength of the edge portion of the silicon wafer can be ensured, so that edge chipping of the silicon wafer can be prevented. Therefore, a semiconductor device using the thinned silicon wafer can be manufactured without causing edge chipping of the silicon wafer.

以下では、本発明の実施の形態を、添付図面を参照して詳細に説明する。
図1は、本発明の一実施形態に係る半導体装置の製造方法を説明するための模式的な図である。
この半導体装置の製造方法では、まず、図1(a)に示すように、シリコンウエハ(以下では単に「ウエハ」という。)Wが用意される。このウエハWにおいて、中央部1は、半導体装置の製造に用いられる領域であり、その中央部1の周囲のエッジ部2は、半導体装置の製造に用いられない領域である。そして、ウエハWの中央部1において、表面3側の表層部にトランジスタなどのデバイスが形成される。
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 is a schematic view for explaining a method for manufacturing a semiconductor device according to an embodiment of the present invention.
In this method of manufacturing a semiconductor device, first, as shown in FIG. 1A, a silicon wafer (hereinafter simply referred to as “wafer”) W is prepared. In the wafer W, the central portion 1 is a region used for manufacturing a semiconductor device, and an edge portion 2 around the central portion 1 is a region not used for manufacturing a semiconductor device. Then, in the central portion 1 of the wafer W, a device such as a transistor is formed on the surface layer portion on the surface 3 side.

次に、図1(b)に示すように、ウエハWの表面3と反対側の裏面4に、その裏面4の中央部1に含まれる部分を全体的に表面側に窪ませた形状の凹部5が形成される。これにより、ウエハWの中央部1は、たとえば、元の厚さ(625μm)の約3分の2の厚さ(400μm)に薄化される(第1ウエハ薄化工程)。なお、凹部5は、研削により形成されてもよいし、エッチングにより形成されてもよい。   Next, as shown in FIG. 1B, a concave portion having a shape in which a portion included in the central portion 1 of the back surface 4 is entirely recessed on the front surface side on the back surface 4 opposite to the front surface 3 of the wafer W. 5 is formed. Thereby, the central portion 1 of the wafer W is thinned to a thickness (400 μm) that is about two-thirds of the original thickness (625 μm), for example (first wafer thinning step). The concave portion 5 may be formed by grinding or may be formed by etching.

その後、ウエハWの表面3および裏面4にエッチング液が供給されて、ウエハWの表面3および裏面4がエッチングされる(第2ウエハ薄化工程)。このエッチングは、ウエハWの表面3および裏面4(凹部5内を含む。)において同じレートで進行する。したがって、図1(c)に示すように、ウエハWの中央部1が所望の厚さ(たとえば、300μm)に薄化された時点で、ウエハWのエッジ部2は、その中央部1の厚さよりも凹部5の深さ分だけ大きな厚さを有する。   Thereafter, an etchant is supplied to the front surface 3 and the back surface 4 of the wafer W, and the front surface 3 and the back surface 4 of the wafer W are etched (second wafer thinning step). This etching proceeds at the same rate on the front surface 3 and the rear surface 4 (including the inside of the recess 5) of the wafer W. Therefore, as shown in FIG. 1C, when the central portion 1 of the wafer W is thinned to a desired thickness (for example, 300 μm), the edge portion 2 of the wafer W has a thickness of the central portion 1. It has a thickness larger than the thickness by the depth of the recess 5.

このように、ウエハWのエッジ部2に比較的大きな厚さを残すことにより、ウエハWのエッジ部2の機械的強度を確保することができるので、ウエハWのエッジチッピングの発生を防止することができる。よって、ウエハWのハンドリング時などにエッジチッピングを生じることなく、その薄化されたウエハWを用いて、MEMSセンサなどを備える半導体装置を製造することができる。   In this way, by leaving a relatively large thickness at the edge portion 2 of the wafer W, the mechanical strength of the edge portion 2 of the wafer W can be ensured, so that the occurrence of edge chipping of the wafer W can be prevented. Can do. Therefore, a semiconductor device including a MEMS sensor or the like can be manufactured using the thinned wafer W without causing edge chipping when the wafer W is handled.

以上、本発明の一実施形態を説明したが、この実施形態には、特許請求の範囲に記載された事項の範囲で種々の設計変更を施すことが可能である。   Although one embodiment of the present invention has been described above, various design changes can be made to this embodiment within the scope of the matters described in the claims.

本発明の一実施形態に係る半導体装置の製造方法を説明するための模式的な図である。It is a typical figure for explaining a manufacturing method of a semiconductor device concerning one embodiment of the present invention. 従来の薄化されたシリコンウエハのエッジ部の形状を示す模式的な側面図である。It is a typical side view which shows the shape of the edge part of the conventional thinned silicon wafer.

符号の説明Explanation of symbols

1 中央部
2 エッジ部
3 表面
4 裏面
5 凹部
W ウエハ
DESCRIPTION OF SYMBOLS 1 Center part 2 Edge part 3 Front surface 4 Back surface 5 Recessed part W Wafer

Claims (1)

シリコンウエハのデバイスが形成される表面と反対側の裏面の中央部に凹部を形成し、前記シリコンウエハの中央部を薄化する第1ウエハ薄化工程と、
前記第1ウエハ薄化工程後に、前記シリコンウエハの表面および裏面をエッチングして、前記シリコンウエハの中央部およびその周囲のエッジ部を薄化する第2ウエハ薄化工程とを含む、半導体装置の製造方法。
A first wafer thinning step of forming a recess in the center of the back surface opposite to the surface on which the device of the silicon wafer is formed, and thinning the center of the silicon wafer;
A second wafer thinning step including etching a front surface and a back surface of the silicon wafer after the first wafer thinning step to thin a central portion of the silicon wafer and a peripheral edge portion thereof. Production method.
JP2006355713A 2006-08-11 2006-12-28 Semiconductor device manufacturing method Pending JP2008166576A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2006355713A JP2008166576A (en) 2006-12-28 2006-12-28 Semiconductor device manufacturing method
US11/889,289 US7845229B2 (en) 2006-08-11 2007-08-10 Acceleration sensor
US12/943,616 US8776602B2 (en) 2006-08-11 2010-11-10 Acceleration sensor, semiconductor device and method of manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006355713A JP2008166576A (en) 2006-12-28 2006-12-28 Semiconductor device manufacturing method

Publications (1)

Publication Number Publication Date
JP2008166576A true JP2008166576A (en) 2008-07-17

Family

ID=39695635

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006355713A Pending JP2008166576A (en) 2006-08-11 2006-12-28 Semiconductor device manufacturing method

Country Status (1)

Country Link
JP (1) JP2008166576A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015170851A (en) * 2014-03-04 2015-09-28 株式会社ディスコ Manufacturing method of MEMS device chip
JP2017085174A (en) * 2011-12-27 2017-05-18 芝浦メカトロニクス株式会社 Substrate processing apparatus and substrate processing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017085174A (en) * 2011-12-27 2017-05-18 芝浦メカトロニクス株式会社 Substrate processing apparatus and substrate processing method
JP2015170851A (en) * 2014-03-04 2015-09-28 株式会社ディスコ Manufacturing method of MEMS device chip

Similar Documents

Publication Publication Date Title
US9139427B2 (en) Methods for producing a cavity within a semiconductor substrate
US8165324B2 (en) Micromechanical component and method for its production
KR101455454B1 (en) Semiconductor devices and methods of fabrication thereof
EP3249952B1 (en) Integrated structure of mems microphone and pressure sensor, and manufacturing method thereof
US6743654B2 (en) Method of fabricating pressure sensor monolithically integrated
CN110636422B (en) Semiconductor device and method of forming the same
JP4915440B2 (en) Manufacturing method of semiconductor device
JP2010098518A (en) Method of manufacturing mems sensor, and mems sensor
JP5441371B2 (en) Method of manufacturing a wafer for use in a microelectromechanical system
US7214324B2 (en) Technique for manufacturing micro-electro mechanical structures
WO2020224513A1 (en) Method for manufacturing micro electro mechanical system device
TW201725170A (en) MEMS structure and manufacturing method thereof
JP2010103701A (en) Mems sensor
US20140103460A1 (en) MEMS Device and Method of Manufacturing a MEMS Device
CN102106161B (en) Micromechanical component and preparing method thereof
CN101026125A (en) Method of Dicing Wafers
JP2010074523A (en) Method of etching sacrificial layer, method of manufacturing mems device, and mems device
JP6333464B2 (en) Manufacturing method of sensor based on MEMS
US11402288B2 (en) Membrane-based sensor having a plurality of spacers extending from a cap layer
JP2008166576A (en) Semiconductor device manufacturing method
JP2013147404A (en) Method for manufacturing glass substrate with through-hole
CN118545678A (en) Preparation method of MEMS cavity structure
US7179668B2 (en) Technique for manufacturing silicon structures
WO2016173268A1 (en) Method for forming cavity of sensor chip, method for manufacturing sensor chip, chip and electronic device
JP2002004034A (en) Mask for vapor deposition and its production method