JP2007288180A - Wiring structure, multilayer wiring board and electronic device - Google Patents

Abstract

In a multilayer wiring board in which balanced transmission paths and unbalanced transmission paths are mixed, a multilayer wiring board that easily matches the characteristic impedances of both, has a high wiring density, and can cope with high-speed operation of a semiconductor element. thing.
A general signal line, a differential signal line composed of a pair of signal lines for transmitting differential signals whose waveforms are inverted from each other, and the general signal line and the differential signal line are spaced apart from each other. And a reference potential layer 4 that is disposed and has a non-formed portion at a portion electromagnetically coupled to the differential signal line 2.
[Selection] Figure 1

Description

  The present invention relates to a wiring structure having a differential signal line suitable for connecting electronic components such as a semiconductor element and an optical semiconductor element that operate at high speed, a multilayer wiring board using the wiring structure, and an electronic device. In particular, the present invention relates to a wiring structure including a differential signal line and a general signal line, a multilayer wiring board, and an electronic device.

  2. Description of the Related Art Conventionally, electronic components such as a semiconductor element represented by a microprocessor, an ASIC (Application Specific Integrated Circuit), and the like are mounted on a multilayer wiring board and used as an electronic device. As the demand for improving information processing capabilities is increasing, the operating speed of semiconductor devices is increasing. Therefore, matching of characteristic impedance and crosstalk between signal wirings are required for signal wiring among internal wiring of multilayer wiring boards. Improvements in electrical characteristics such as noise reduction have been demanded.

  In order to meet such a demand, a strip line structure or a microstrip line structure is used as a signal arrangement line structure. The microstrip line structure is a structure including a large-area ground (ground) conductor layer via an insulating layer above or below a signal wiring. The stripline structure is a structure including a ground (ground) conductor layer having a large area via insulating layers above and below a signal wiring.

  In response to the further increase in speed of semiconductor devices in recent years, high-frequency signals of about several GHz have been transmitted. There are two methods for transmitting a high-frequency signal: an unbalanced transmission path and a balanced transmission path. The unbalanced transmission path transmits a high-frequency signal through a ground conductor layer and a single signal wiring (general signal line). The balanced transmission path transmits a high-frequency signal through two signal wirings (differential signal lines) substantially parallel to the ground conductor layer. In this differential signal line, a two-phase signal of an inverted signal and a non-inverted signal is input to each signal wiring, and each difference is taken as one signal. As a result, the noise is canceled out, and a signal with less distortion can be transmitted, and the speed can be further increased. A specific example is described in Patent Document 1.

  In particular, in a multilayer wiring board on which a semiconductor element such as an ASIC is mounted, the increase in the number of pins is accelerating due to high performance. In order to suppress an increase in the size of the package due to the increase in the number of pins, a differential signal line is used for transmission of a signal in which noise or the like has a significant effect, and a conventional general signal line is used for other signals. A differential signal line and a general signal line are mixedly used in a multilayer wiring board. In such a multilayer wiring board, it is necessary to match with different characteristic impedances suitable for each transmission method. Generally, a general signal line is matched with 50Ω and a differential signal line is matched with 100Ω.

  In general, the matching of characteristic impedance of signal wiring is performed by (1) adjusting the signal wiring width and (2) adjusting the thickness or dielectric constant of the insulating layer between the signal wiring and the ground conductor layer. There is a way to do it.

  In the method of matching the characteristic impedance by adjusting the signal wiring width, it is necessary to make the wiring width of the general signal line larger than the wiring width of the differential signal line, so that there is a problem that the wiring density cannot be increased. . On the other hand, in the method of matching impedance by adjusting the thickness or dielectric constant of the insulating layer, the thickness of one insulating layer can be changed as a whole, but in practice, the thickness is partially changed in one insulating layer. And it is necessary to change the material of the insulating layer partially, which is not realistic and very difficult to implement.

  In order to solve such a problem, Patent Document 2 proposes a multilayer wiring board 16 as shown in a sectional view in FIG. Region where the differential signal line 12 that forms a balanced transmission line is disposed between the power supply conductor layer 18 or ground conductor layer 14 formed in the uppermost layer and the power supply conductor layer 18 or ground conductor layer 14 formed in the lowermost layer. There is. Further, the power supply conductor layer 18 or the ground conductor layer 14 is disposed on the same surface as the differential signal line 12, and the power supply conductor layer 18 or the ground conductor layer 14 is connected to the power conductor layer 18 or the ground conductor layer 14 at the lowermost position. By disposing the general signal line 11 therebetween, the unbalanced transmission line is arranged in a state where it is stacked in the vertical direction.

Depending on the arrangement of the general signal line 11, differential signal line 12, power supply conductor layer 18 and ground conductor layer 14 in one multilayer wiring board 16, the thickness of the insulating layer 13 may be partially changed or the material of the insulating layer 13 may be changed. There is an advantage that the respective impedances can be matched without partially changing.
JP-A-2-240994 Japanese Patent Laid-Open No. 2002-158452

  However, since at least five insulating layers 13 are required to form one differential signal line 12, the thickness of the multilayer wiring board 16 is increased, which is one of the miniaturization of the multilayer wiring board. There was a problem that it could not cope with the thinning.

  In addition, when the number of insulating layers is large and the thickness of the multilayer wiring board is large, the gap between the semiconductor element connection electrode formed on the surface of the multilayer wiring board and the external connection electrode formed on the back surface of the multilayer wiring board. Since the power supply inductance increases, there is a problem that the high-speed operation of the semiconductor element is hindered.

  The present invention has been completed in order to solve the above-mentioned conventional problems, and its purpose is to easily match both characteristic impedances in a multilayer wiring board in which balanced transmission paths and unbalanced transmission paths are mixed. Another object of the present invention is to provide a multilayer wiring board having a high wiring density and capable of handling a high-speed operation of a semiconductor element.

  In the wiring structure of the present invention, a general signal line, a differential signal line composed of a pair of signal wirings for transmitting differential signals whose waveforms are inverted from each other, and the general signal line and the differential signal line are spaced apart from each other. And a reference potential layer having a non-formed portion at a portion electromagnetically coupled to the differential signal line.

  In the wiring structure according to the aspect of the invention, it is preferable that the non-formation portion overlaps the differential signal line in a plan view of the reference potential layer.

  In the wiring structure of the present invention, it is preferable that the general signal line and the differential signal line are formed on the same surface.

  In the wiring structure of the present invention, it is preferable that the non-formed portion is a plurality of non-formed portions arranged at intervals.

  In the wiring structure according to the aspect of the invention, it is preferable that each of the plurality of non-forming portions has a length along the extending direction of the differential signal line that is ¼ of the wavelength of the signal transmitted through the differential signal line. It is characterized by the following.

  Preferably, the wiring structure of the present invention further includes a second reference potential layer on a side opposite to the reference potential layer with respect to the general signal line and the differential signal line.

  In the wiring structure of the present invention, a general signal line, a differential signal line composed of a pair of signal wirings for transmitting differential signals whose waveforms are inverted from each other, and the general signal line and the differential signal line are spaced apart from each other. The area of the portion of the reference potential layer that is electromagnetically coupled to the differential signal line with respect to the area of the differential signal line when the reference potential layer is viewed in plan Is smaller than the ratio of the area of the portion of the reference potential layer that is electromagnetically coupled to the general signal line to the area of the general signal line.

  In the wiring structure of the present invention, preferably, the area of the portion of the reference potential layer that is electromagnetically coupled to the differential signal line is an overlapping area of the reference potential layer and the differential signal line, The area of the portion that is electromagnetically coupled to the general signal line is an overlapping area of the reference potential layer and the general signal line.

  In the wiring structure of the present invention, it is preferable that the general signal line and the differential signal line are formed on the same surface.

  The multilayer wiring board of the present invention includes a general signal line, a differential signal line composed of a pair of signal wirings for transmitting differential signals whose waveforms are inverted from each other, and an insulating layer on the general signal line and the differential signal line. And a reference potential layer having a non-formed portion at a portion that is electromagnetically coupled to the differential signal line.

  In the multilayer wiring board of the present invention, it is preferable that the non-formation portion overlaps the differential signal line in a plan view of the reference potential layer.

  In the multilayer wiring board of the present invention, preferably, the general signal line and the differential signal line are formed on the same surface.

  In the multilayer wiring board of the present invention, it is preferable that the non-formed portion is a plurality of non-formed portions arranged at intervals.

  In the multilayer wiring board of the present invention, preferably, each of the plurality of non-formed portions has a length along the extending direction of the differential signal line of 1 / wavelength of a signal transmitted through the differential signal line. 4 or less.

  Preferably, the multilayer wiring board of the present invention further includes a second reference potential layer via an insulating layer on the side opposite to the reference potential layer with respect to the general signal line and the differential signal line. .

  The multilayer wiring board of the present invention includes a general signal line, a differential signal line composed of a pair of signal wirings for transmitting differential signals whose waveforms are inverted from each other, and an insulating layer on the general signal line and the differential signal line. A portion that is electromagnetically coupled to the differential signal line of the reference potential layer with respect to the area of the differential signal line when the reference potential layer is viewed in plan Is smaller than the ratio of the area of the portion of the reference potential layer that is electromagnetically coupled to the general signal line to the area of the general signal line.

  In the multilayer wiring board of the present invention, preferably, the area of the portion of the reference potential layer that is electromagnetically coupled to the differential signal line is an overlapping area of the reference potential layer and the differential signal line, and the reference potential layer The area of the portion that is electromagnetically coupled to the general signal line is an overlapping area of the reference potential layer and the general signal line.

  In the multilayer wiring board of the present invention, preferably, the general signal line and the differential signal line are formed on the same surface.

  The multilayer wiring board of the present invention preferably includes the multilayer wiring board of the present invention and an electronic component electrically connected to the general signal line and the differential signal line.

  According to the present invention, the capacitance between the differential signal line and the ground conductor layer is reduced, and the characteristic impedance of the differential signal line is increased. As a result, the thickness of the insulating layer formed between the general signal line and the differential signal line and the ground conductor layer is greatly different, or the wiring width of the general signal line is made larger than the wiring width of the differential signal line. Therefore, the characteristic impedances of the general signal line and the differential signal line can be matched. Therefore, it is possible to design the wiring density high.

  Further, the total number of insulating layers can be reduced, and the thickness of the multilayer wiring board can be suppressed. As a result, the semiconductor element mounted on the multilayer wiring board can be operated at high speed.

  In addition, when a structure in which a plurality of openings are arranged at intervals in the opening of the ground conductor layer, a path for current to flow in the direction intersecting the differential signal line in the ground conductor layer is provided between the openings. Therefore, the increase in power supply inductance due to the opening and the accompanying increase in power supply noise can be suppressed, and the semiconductor element can be operated at higher speed.

  In the above configuration, when the length of the opening along the length direction of the differential signal line is ¼ or less of the wavelength of the signal transmitted to the differential signal line, the signal is transmitted to the differential signal line. Therefore, it is possible to suppress transmission of a high-speed signal from the opening.

  The multilayer wiring board of the present invention will be described in detail below. FIG. 1 is a diagram showing an example of an embodiment of a multilayer wiring board according to the present invention. FIG. 1 (a) is a cross-sectional view of the multilayer wiring board according to the present invention, and FIG. It is the principal part enlarged view which saw through the part from the upper surface. In these figures, 1 is a general signal line, 2 is a differential signal line, 2a is a first signal line forming the differential signal line 2, 2b is a second signal line forming the differential signal line 2, and 3 An insulating layer, 4 is a ground conductor layer as a reference potential layer, 5 is a non-formed portion (hereinafter also referred to as an opening) in the ground conductor layer 4, 6 is a multilayer wiring board, and 7 is a surface wiring.

  In the present invention, the reference potential layer refers to a conductor layer that includes a so-called ground conductor layer and a power supply layer and is set to a reference potential. In addition, the general signal line is a single signal wiring that is arranged at a predetermined interval with respect to the reference potential layer, and constitutes an unbalanced transmission path for transmitting a high-frequency signal. On the other hand, the differential signal line is composed of a pair of signal wirings arranged in parallel at regular intervals, and each signal wiring is arranged at substantially the same interval with respect to the reference potential layer. A non-inverted signal is input to one signal wiring of the differential signal line, and an inverted signal is input to the other signal wiring to constitute a balanced transmission path for transmitting a high-frequency signal. By taking the difference between the two-phase signal of the input inverted signal and non-inverted signal and considering it as one signal, the noise is canceled out, and a signal with less distortion can be transmitted, resulting in higher speed. Become.

  In the present invention, for example, the general signal line transmits a signal of 1 GHz or less, and the differential signal line transmits a high-frequency signal of 2 GHz or more.

  The multilayer wiring board 6 of the present invention is disposed via the insulating layer 3 so as to overlap the general signal line 1 and the differential signal line 2 disposed on the same surface between the insulating layers 3 constituting the multilayer substrate in a top view. The ground conductor layer 4 has an opening 5 in a portion overlapping the differential signal line 2 in a top view.

  In the embodiment shown in FIG. 1, as shown in FIG. 1A, a differential signal line comprising a general signal line 1 and two signal lines 2a and 2b formed substantially parallel to the upper surface of the insulating layer 3b. 2 are formed. A large-area ground conductor layer 4 is formed so as to face the general signal line 1 and the differential signal line 2 through the lower insulating layer 3b. As shown in FIG. 1B, the ground conductor layer 4 has an opening 5 (a region indicated by a broken line) in a portion overlapping the differential signal line 2 in a top view. Each signal wiring of the general signal line 1 and the differential signal line 2 and the ground conductor layer 4 constitute a microstrip structure. A surface wiring 7 is provided on the surface of the multilayer wiring board 6. An electrode pad 7a for connecting an electronic component such as a semiconductor element is provided on the upper surface, and a terminal electrode 7b for connecting the multilayer wiring board 6 to an external wiring board is provided on the lower surface. The surface wiring 7, electrode pad 7 a, terminal electrode 7 b, general signal line 1, differential signal line 2, and ground conductor layer 4 are appropriately electrically connected by a through conductor (not shown) that penetrates the insulating layer 3. The

  In the multilayer wiring board 6 of the present invention adopting this structure, the capacitance between the differential signal line 2 and the ground conductor layer 4 is reduced by reducing the area of the ground conductor layer 4 facing the differential signal line 2. Thus, the characteristic impedance of the differential signal line 2 is increased. Therefore, the thickness of the insulating layer 3 (insulating layer 3b) disposed between the general signal line 1 and the differential signal line 2 and the ground conductor layer 4 is made the same, and the thickness of the insulating layer 3 is generally larger than the wiring width of the differential signal line 2. The characteristic impedances of the general signal line 1 and the differential signal line 2 can be matched without increasing the wiring width of the signal line 1.

  Moreover, since it is not necessary to make the wiring width of the general signal line 1 larger than the wiring width of the differential signal line 2, the wiring width of any wiring can be made small, so that the wiring density is designed to be high. It becomes possible to do.

  The general signal line 1 and the differential signal line 2 are formed in the same layer, and the thickness of the insulating layer 3 (insulating layer 3b) between the common signal line 1 and the ground conductor layer 4 is also the same. The characteristic impedance of the dynamic signal line 2 can be matched. Unlike the conventional example, it is not necessary to form the general signal line 1 and the differential signal line 2 on different insulating layers 3 in the vertical direction, and one layer above and below the general signal line 1 and the differential signal line 2. A simple structure is sufficient if there are two insulating layers 3 each. Even if both the unbalanced transmission path and the balanced transmission path are formed on the multilayer wiring board 6, it is not necessary to increase the thickness of the multilayer board. Therefore, since there is no increase in power supply inductance and accompanying power supply noise, the semiconductor element mounted on the multilayer wiring board 6 can be operated at high speed.

  In general, the characteristic impedance of the general signal line 1 is often set to 50Ω, and the characteristic impedance of the differential signal line 2 is often set to 100Ω. Depending on the relative dielectric constant of the insulating layer 3b, the thickness of the insulating layer 3b, the width of the general signal line 1 and the differential signal line 2, and the distance between the signal line 2a and the signal line 2b of the differential signal line 2 By designing the width, it becomes easy to set each specific impedance to the above-mentioned preferable value.

  2 shows a strip line structure in which a ground conductor layer 4 is formed on the general signal line 1 and the differential signal line 2 via an insulating layer 3d as shown in a cross-sectional view similar to FIG. In this case, the upper ground conductor layer 4 is similarly provided with an opening 5 in a portion overlapping the differential signal line 2 in a top view. In this case, one of the upper and lower ground conductor layers 4 may be a power conductor layer. In the example shown in FIG. 1, the ground conductor layer 4 is disposed below the general signal line 1 and the differential signal line 2, but the ground conductor layer 4 may be disposed above.

  Moreover, it is preferable that the openings 5 are a plurality of openings 5 arranged at intervals along the length direction of the differential signal line 2. As a result, there is a structure having a path between the openings 5 for the current to flow in the direction intersecting the differential signal line 2 in the ground conductor layer 4. An increase in power supply noise is suppressed, and a mounted semiconductor element can operate at high speed.

  The distance between the plurality of openings 5 is preferably as small as possible. This is because the ground conductor layer 4 and the differential signal line 2 face each other at the interval between the openings 5, so that the capacitance between them is larger than the part where the openings 5 are provided. This is because the impedance of 2 decreases. Note that, by reducing the distance between the openings 5, the resistance value of this portion increases, and the power supply inductance may increase. In this case, as shown in FIG. 3 which is an enlarged view of the main part similar to FIG. 1B, an interval is set so as to have an appropriate resistance value, and an impedance adjustment opening is placed beside the interval. By providing the part 5a and adjusting the impedance, it is possible to minimize the influence of the decrease in the impedance of the differential signal line 2.

  Further, each of the plurality of openings 5 has the length of the opening 5 along the length direction of the differential signal line 2 overlapping the opening 5 (length L shown in FIG. 1B). It is preferable that it is 1/4 or less of the wavelength of the high frequency signal transmitted to the differential signal line 2. As a result, it is possible to suppress leakage of the signal transmitted to the differential signal line 2 from the opening 5, thereby reducing the loss of the transmitted signal and improving the transmission of the high-speed signal. Can do.

  As shown in FIG. 1B, when the differential signal line 2 has a bent portion and the opening 5 is formed in the ground conductor layer 4 at a portion overlapping the bent portion, the differential signal line 2 The length of the opening 5 along the length direction of the line 2 is the longer outside of the bent portion (length L1 shown in FIG. 1B).

  The opening 5 in this example is provided with a pair of openings 5 so as to overlap each of the pair of signal lines 2a and 2b constituting the differential signal line 2 as shown in FIG. 4, one opening 5 may be provided so as to overlap both the pair of signal lines 2a and 2b, as shown in an enlarged view of the main part similar to FIG.

  For example, when the relative dielectric constant of the insulating layer 3b between the differential signal line 2 and the ground conductor layer 4 is 5.4 and the thickness of the insulating layer 3b is 58 μm, the line width of the general signal line 1 is 50 μm and the thickness is When the thickness is 10 μm, the characteristic impedance of the general signal line 1 is matched to 50Ω. At this time, each of the pair of signal lines 2a and 2b constituting the differential signal line 2 has a line width of 50 μm, a thickness of 10 μm, a wiring interval of 150 μm, and each of the signal lines 2a and 2b of the differential signal line 2 If the width of each of the pair of openings 5 overlapping each other is 40 μm to 95 μm, the characteristic impedance of the differential signal line 2 can be matched to approximately 100Ω. Here, approximately 100Ω means that it is in the range of ± 5% required for normal impedance matching, and is 95 to 105Ω. The width of each of the pair of openings 5 is arranged so that the center line passing through the center of the width of the opening 5 and the center lines of the pair of signal lines 2a and 2b overlap each other when viewed from above. Is the case. If the opening 5 is not provided in the ground conductor layer 4 at this time, the characteristic impedance of the differential signal line 2 is 93Ω.

  In this example, when the line width of the pair of signal lines 2a and 2b constituting the differential signal line 2 is the same 50 μm and only the wiring interval is 100 μm, the width of each of the pair of openings 5 is 80 μm to 160 μm. Thus, the characteristic impedance of the differential signal line 2 can be matched to approximately 100Ω. In this case, when the width of the opening 5 is 150 μm or more, one opening 5 overlaps both the pair of signal lines 2a and 2b as shown in FIG. 4, and when the width exceeds 150 μm, the pair of opening 5 overlaps. Become. For example, when the width is 160 μm, the pair of openings 5 overlap each other by 10 μm to form one opening 5 having a width of 310 μm.

  In the above example, when the thickness of the insulating layer 3b is 50 μm, the characteristic impedance of the general signal line 1 is matched to 50Ω when the line width of the general signal line 1 is 40 μm. At the same time, if the line width of each of the pair of signal lines 2a and 2b constituting the differential signal line 2 is set to 40 μm and the wiring intervals are all set to 150 μm, the characteristic impedance of the differential signal line 2 is matched to about 100Ω. The width of the opening 5 may be adjusted to 15 μm to 75 μm.

  Further, in the above example, when the line width and the wiring interval of the general signal line 1 and the differential signal line 2 are the same and the relative dielectric constant of the insulating layer 3b is 7.6, if the thickness of the insulating layer 3b is 80 μm, The characteristic impedance of line 1 is matched to 50Ω. At the same time, in order to match the characteristic impedance of the differential signal line 2 to approximately 100Ω, the width of the opening 5 may be set to 115 μm to 260 μm.

  As described above, the width of the opening 5 may be appropriately designed according to the relative dielectric constant and thickness of the insulating layer 3b and the line widths and wiring intervals of the signal lines 2a and 2b of the differential signal line 2.

  Further, the length of the opening 5 along the length direction of the differential signal line 2 is not related to the value of the characteristic impedance, but the signal transmitted to the differential signal line 2 is transmitted to the opening 5 as described above. In order to suppress the leakage from the high-frequency signal, it is preferable that the wavelength is 1/4 or less of the wavelength of the high-frequency signal transmitted through the differential signal line 2. For example, when the frequency of a signal transmitted through the differential signal line 2 is 10 GHz, the length of the opening 5 is preferably 3.2 mm or less.

  As described above, the interval between the openings 5 is preferably as small as possible, but if it is about 0.3 mm, the influence of a partial impedance decrease in the length direction of the differential signal line 2 is small. The influence on the power supply inductance is small. The size of the impedance adjusting opening 5a depends on the relative dielectric constant and thickness of the insulating layer 3b as well as the line width and wiring interval of the signal lines 2a and 2b of the differential signal line 2 in the same manner as the opening 5. And design as appropriate. The length of the opening 5a along the length direction of the differential signal line 2 is equal to the interval between the openings 5, and the characteristic impedance is more reliably matched throughout the length direction of the differential signal line 2. Is preferable.

  The multilayer wiring board 6 of the present invention includes an electronic component storage package such as a semiconductor element storage package, an electronic component mounting substrate, a so-called multichip module or multichip package on which a large number of semiconductor elements are mounted, Or it is used as a motherboard. Further, an electronic circuit module or the like can be configured by attaching a coil inductor, a cross inductor, a chip capacitor, an electrolytic capacitor, or the like to the multilayer wiring board 6. Then, an electronic component such as a semiconductor element is mounted on the multilayer wiring board 6 of the present invention, and the electronic component is electrically connected to the general signal line 1 and the differential signal line 2 to obtain the electronic device of the present invention.

  The insulating layer 3 in the multilayer wiring board 6 of the present invention includes an aluminum oxide sintered body, an aluminum nitride sintered body, a silicon carbide sintered body, a silicon nitride sintered body, a mullite sintered body, a glass ceramic, and the like. Or an organic insulating material such as polyimide, epoxy resin, fluororesin, polynorbornene or benzocyclobutene. In the case of an organic insulating material, a composite insulating material in which an inorganic insulating powder of ceramic powder is dispersed in a resin or glass fibers are impregnated with an organic insulating material may be used.

  When the insulating layer 3 is a ceramic material, for example, it can be produced by using a conventionally known ceramic green sheet lamination method as described below. That is, an appropriate organic binder and solvent, if necessary, a dispersant, a plasticizer, etc. are added to the raw material powder of the ceramic material, and a slurry prepared by mixing by a mixing method such as a ball mill method is used as a molding method such as a doctor blade method. A ceramic green sheet can be obtained by adopting a sheet shape.

  The obtained ceramic green sheets are laminated one above the other, and this laminate is heated at a temperature of 100 to 800 ° C. to remove the binder, and then fired at a temperature of 800 to 1600 ° C. When the insulating layer 3 is made of an aluminum oxide sintered body, it is fired at a temperature of 1600 ° C. in a reducing atmosphere. Moreover, when it consists of glass ceramics, according to the wiring conductor to be used, it bakes at the temperature of 800-1100 degreeC in nitrogen atmosphere or air | atmosphere. In the case of a reducing atmosphere or a nitrogen atmosphere, the binder removal property is increased by humidification.

  At this time, the general signal line 1 and the differential signal line 2, the ground conductor layer 4, and the surface wiring 7 are tungsten (W), molybdenum (Mo), When the insulating layer 3 is made of glass ceramics and is made of high melting point metal powder metallized molybdenum manganese (Mo-Mn), low melting point metal powder such as copper (Cu), silver (Ag) or silver palladium (Ag-Pd) Consists of metallization. To these metal powders, an appropriate organic binder, a solvent and, if necessary, a dispersant are added and mixed, and kneaded by a kneading means such as a ball mill, a three-roll mill, a planetary mixer or the like to produce a metal paste. A metal paste is printed on a ceramic green sheet in a predetermined pattern and fired together with a laminate of ceramic green sheets to form a multilayer wiring board.

  In the case where the insulating layer 3 is a ceramic material, it is preferable to use glass ceramics having a relatively low dielectric constant and low resistance copper-based or silver-based metallization in order to transmit a high-frequency signal.

  If the insulating layer 3 is made of an organic insulating material, for example, a thermosetting resin such as an epoxy resin, an organic resin precursor is formed by a spin coating method or a curtain coating method, and this is subjected to a thermosetting treatment. The insulating layer 3 made of an organic resin such as an epoxy resin and the thin film wiring conductor layer are alternately laminated.

  At this time, the general signal line 1 and the differential signal line 2, the ground conductor layer 4 and the surface wiring 7 made of the thin film wiring conductor layer are made of copper (Cu), silver (Ag), nickel (Ni), chromium (Cr), What is necessary is just to form with metal materials, such as titanium (Ti), gold | metal | money (Au), niobium (Nb), and those alloys, for example, after forming a metal film by sputtering method, vacuum evaporation method, or plating method, and by photolithography method It can be formed in a predetermined wiring pattern. Alternatively, the mask can be formed by forming a mask having an opening having a predetermined wiring pattern shape on the upper surface of the insulating layer 3, forming a metal film, and then removing the mask.

  The thicknesses of these insulating layers 3 are appropriately set so as to satisfy the conditions such as mechanical strength and electrical characteristics corresponding to the required specifications in accordance with the characteristics of the materials used.

  Note that the present invention is not limited to the above-described embodiments, and various modifications may be made without departing from the scope of the present invention. For example, the general signal line 1 and the differential signal line 2 are formed of an insulating layer in which a general signal line and a differential signal line are formed in addition to the microstrip line structure and the strip line structure shown in FIGS. A coplanar line structure may be used in which a power supply wiring layer or a ground wiring layer is formed on the same surface with a space therebetween (insulated with them) so as to sandwich them.

(A) is sectional drawing which shows an example of embodiment of the multilayer wiring board of this invention, (b) is the principal part enlarged view which saw through the principal part from the upper surface. It is sectional drawing which shows an example of other embodiment in the multilayer wiring board of this invention. It is the principal part enlarged view which saw through the principal part of an example of embodiment of the multilayer wiring board of this invention from the upper surface. It is the principal part enlarged view which saw through the principal part of an example of embodiment of the multilayer wiring board of this invention from the upper surface. It is sectional drawing which shows an example of embodiment of the conventional multilayer wiring board.

Explanation of symbols

1 .... General signal line 2 .... Differential signal line 2a, 2b ... Signal line 3 .... Insulation layer 4 .... Ground conductor layer 5 ....・ ・ ・ ・ Opening 6 ・ ・ ・ ・ ・ ・ Multilayer wiring board 7 ・ ・ ・ ・ ・ ・ Surface wiring

Claims (19)

A general signal line;
A differential signal line composed of a pair of signal wirings each transmitting differential signals whose waveforms are inverted from each other;
A reference potential layer that is disposed with a space between the general signal line and the differential signal line and has a non-forming portion at a portion that is electromagnetically coupled to the differential signal line;
A wiring structure comprising: The wiring structure according to claim 1, wherein the non-forming portion overlaps with the differential signal line in plan view of the reference potential layer. The wiring structure according to claim 1, wherein the general signal line and the differential signal line are formed on the same surface. The wiring structure according to any one of claims 1 to 3, wherein a plurality of the non-forming portions are arranged at intervals. Each of the plurality of non-formed portions has a length along the extending direction of the differential signal line that is ¼ or less of a wavelength of a signal transmitted through the differential signal line. Item 5. The wiring structure according to Item 4. 6. The wiring structure according to claim 1, further comprising a second reference potential layer on a side opposite to the reference potential layer with respect to the general signal line and the differential signal line. . A general signal line;
A differential signal line composed of a pair of signal wirings each transmitting differential signals whose waveforms are inverted from each other;
A reference potential layer disposed at a distance from the general signal line and the differential signal line;
When the reference potential layer is viewed in plan, the ratio of the area of the portion of the reference potential layer that is electromagnetically coupled to the differential signal line to the area of the differential signal line is the reference potential relative to the area of the general signal line. A wiring structure characterized by being smaller than the ratio of the area of the portion of the layer that is electromagnetically coupled to the general signal line. The area of the reference potential layer that is electromagnetically coupled to the differential signal line is an overlapping area of the reference potential layer and the differential signal line, and the area that is electromagnetically coupled to the general signal line of the reference potential layer The wiring structure according to claim 7, wherein the area of the reference potential layer is an overlapping area of the reference potential layer and the general signal line. 9. The wiring structure according to claim 7, wherein the general signal line and the differential signal line are formed on the same surface. A general signal line;
A differential signal line composed of a pair of signal wirings each transmitting differential signals whose waveforms are inverted from each other;
A reference potential layer disposed on the general signal line and the differential signal line via an insulating layer, and having a non-forming portion at a portion electromagnetically coupled to the differential signal line;
A multilayer wiring board comprising: The multilayer wiring board according to claim 10, wherein the non-formation portion overlaps the differential signal line in plan view of the reference potential layer. 12. The multilayer wiring board according to claim 10, wherein the general signal line and the differential signal line are formed on the same surface. The multilayer wiring board according to any one of claims 10 to 12, wherein a plurality of the non-forming portions are arranged at intervals. Each of the plurality of non-formed portions has a length along the extending direction of the differential signal line that is ¼ or less of a wavelength of a signal transmitted through the differential signal line. Item 14. A multilayer wiring board according to Item 13. 15. The semiconductor device according to claim 10, further comprising a second reference potential layer via an insulating layer on an opposite side of the reference potential layer with respect to the general signal line and the differential signal line. A multilayer wiring board according to 1. A general signal line;
A differential signal line composed of a pair of signal wirings each transmitting differential signals whose waveforms are inverted from each other;
A reference potential layer disposed through an insulating layer on the general signal line and the differential signal line,
When the reference potential layer is viewed in plan, the ratio of the area of the portion of the reference potential layer that is electromagnetically coupled to the differential signal line to the area of the differential signal line is the reference potential relative to the area of the general signal line. A multilayer wiring board characterized in that it is smaller than the ratio of the area of the portion of the layer that is electromagnetically coupled to the general signal line. The area of the reference potential layer that is electromagnetically coupled to the differential signal line is an overlapping area of the reference potential layer and the differential signal line, and the area that is electromagnetically coupled to the general signal line of the reference potential layer 17. The multilayer wiring board according to claim 16, wherein the area is an overlapping area of the reference potential layer and the general signal line. 18. The multilayer wiring board according to claim 16, wherein the general signal line and the differential signal line are formed on the same surface. 19. An electronic device comprising: the multilayer wiring board according to claim 10; and an electronic component electrically connected to the general signal line and the differential signal line.

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