JP2005535115A - 磁気抵抗ランダムアクセスメモリ - Google Patents
磁気抵抗ランダムアクセスメモリ Download PDFInfo
- Publication number
- JP2005535115A JP2005535115A JP2004524584A JP2004524584A JP2005535115A JP 2005535115 A JP2005535115 A JP 2005535115A JP 2004524584 A JP2004524584 A JP 2004524584A JP 2004524584 A JP2004524584 A JP 2004524584A JP 2005535115 A JP2005535115 A JP 2005535115A
- Authority
- JP
- Japan
- Prior art keywords
- bit
- magnetic
- region
- magnetic field
- moment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
- G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1673—Reading or sensing circuits or methods
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Hall/Mr Elements (AREA)
- Semiconductor Memories (AREA)
- Measuring Magnetic Variables (AREA)
Abstract
Description
(関連出願)
本出願は、同時係属中で、本出願と同じ譲受人に譲渡される「トグルメモリセルの読み出し回路及び読み出し方法」と題する2002年6月28日出願の米国出願第10/184,811号に関するものであり、この出願を参照することにより、この出願の内容が本発明の開示に含まれる。
Claims (4)
- 磁気抵抗トンネル接合メモリセルであって、
磁気抵抗トンネル障壁を形成するように構成される電気絶縁材料と、
前記電気絶縁材料の一方の側に配置され、印加磁界が無いときにはビット磁化容易軸に沿った方向を向くビット磁気モーメントを有するビット磁性領域と、
前記電気絶縁材料の反対の側に配置された基準磁性領域であって、前記電気絶縁材料及び前記ビット磁性領域とともに磁気抵抗トンネル接合素子(MTJD)を形成する基準磁性領域と、
印加磁界を前記ビット磁性領域及び前記基準磁性領域に生じさせる手段とを備え、
前記基準磁性領域は、低アスペクト比を有し、かつ印加磁界がゼロの大きさを有する場合に前記ビット磁化容易軸にほぼ直交する基準磁気モーメントを有し、ゼロの大きさの印加磁界では前記MTJDが基準磁気抵抗を有し、
前記ビット磁気モーメントの方向は、前記基準磁気モーメントの回転から生じる前記MTJDの磁気抵抗の変化の符号によって確実に示され、前記ビット磁気モーメントの方向は、印加磁界が非スイッチング磁界領域内の感度値を有する場合には切り替わらない、磁気抵抗トンネル接合メモリセル。 - 磁気抵抗トンネル接合メモリセルであって
磁気抵抗トンネル障壁を形成するように構成される電気絶縁材料と、
前記電気絶縁材料の一方の側に配置され、印加磁界が無いときにはビット磁化容易軸に沿った方向を向くビット磁気モーメントを有するビット磁性領域と、
前記電気絶縁材料の反対の側に配置された基準磁性領域であって、前記電気絶縁材料及び前記ビット磁性領域とともに磁気抵抗トンネル接合素子(MTJD)を形成する基準磁性領域と、
印加磁界を前記ビット磁性領域及び前記基準磁性領域に生じさせる手段とを備え、
前記基準磁性領域は2つの安定方向を向く基準磁気モーメントを有し、これらの2つの安定方向は、印加磁界の大きさがゼロの場合にビット磁化容易軸に直交する方向に対してほぼ等しい角度をなし、
前記ビット磁気モーメントの方向は前記MTJDの磁気抵抗の変化の符号によって確実に示され、前記ビット磁気モーメントの方向は、印加磁界が非スイッチング磁界領域内の感度値を示している間は、印加磁界の一成分がビット磁化容易軸に沿って第1方向から第2方向に変化するときに切り替わらない、磁気抵抗トンネル接合メモリセル。 - 磁気抵抗トンネル接合メモリセルであって
磁気抵抗トンネル障壁を形成するように構成される電気絶縁材料と、
前記電気絶縁材料の一方の側に配置され、印加磁界が無いときにはビット磁化容易軸に沿った方向を向くビット磁気モーメントを有するビット磁性領域と、
前記電気絶縁材料の反対の側に配置された基準磁性領域であって、前記基準磁性領域は約1の基準磁性領域アスペクト比を有し、かつ印加磁界がゼロのときに正味の磁気モーメントがゼロの渦磁場を形成するために十分な厚さで、ピン止めされない単一の強磁性層を含み、前記電気絶縁材料及び前記ビット磁性領域とともに磁気抵抗トンネル接合素子(MTJD)を形成する基準磁性領域と、
印加磁界を前記ビット磁性領域及び前記基準磁性領域に生じさせる手段とを備え、
前記MTJDは印加磁界の大きさがゼロの場合に基準磁気抵抗を有し、
前記ビット磁気モーメントの方向は、MTJDの磁気抵抗の前記基準磁気抵抗からの変化の符号によって確実に示され、前記ビット磁気モーメントの状態は、印加磁界が非スイッチング磁界領域及び渦磁場領域内の感度値を有する場合には切り替わらない、磁気抵抗トンネル接合メモリセル。 - 磁気抵抗トンネル接合メモリセルであって、
磁気抵抗トンネル障壁を形成するように構成される電気絶縁材料と、
前記電気絶縁材料の一方の側に配置され、印加磁界が無いときにはビット磁化容易軸に沿った方向を向くビット磁気モーメントを有するビット磁性領域と、
前記電気絶縁材料の反対の側に配置された基準磁性領域であって、前記電気絶縁材料及び前記ビット磁性領域とともに磁気抵抗トンネル接合素子(MTJD)を形成する基準磁性領域と、
印加磁界を前記ビット磁性領域及び前記基準磁性領域に生じさせる電流搬送導電体とを備え、
前記基準磁性領域は、印加磁界の第1の値及び第2の値に対応する第1の値及び第2の値を少なくとも有する基準磁気モーメントを有し、
前記ビット磁気モーメントの方向は、印加磁界の前記第1の値及び第2の値に関して行なわれるMTJDの磁気抵抗の測定によって確実に判断することができ、
印加磁界の前記第1の値及び第2の値は非スイッチング磁界領域内にあり、この領域内では、前記ビット磁気モーメントの方向は切り替わらない、磁気抵抗トンネル接合メモリセル。
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/209,156 | 2002-07-31 | ||
| US10/209,156 US6654278B1 (en) | 2002-07-31 | 2002-07-31 | Magnetoresistance random access memory |
| PCT/US2003/021668 WO2004012197A2 (en) | 2002-07-31 | 2003-07-11 | Magnetoresistive random access memory with soft magnetic reference layer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2005535115A true JP2005535115A (ja) | 2005-11-17 |
| JP4833548B2 JP4833548B2 (ja) | 2011-12-07 |
Family
ID=29584066
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004524584A Expired - Fee Related JP4833548B2 (ja) | 2002-07-31 | 2003-07-11 | 磁気抵抗ランダムアクセスメモリ |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US6654278B1 (ja) |
| EP (1) | EP1525584A2 (ja) |
| JP (1) | JP4833548B2 (ja) |
| KR (1) | KR20050034726A (ja) |
| CN (1) | CN100565701C (ja) |
| AU (1) | AU2003249035A1 (ja) |
| TW (1) | TW200410247A (ja) |
| WO (1) | WO2004012197A2 (ja) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007105358A1 (ja) * | 2006-03-02 | 2007-09-20 | Kyoto University | 強磁性ドットのコア回転素子及び強磁性ドットのコア利用情報記憶素子 |
| WO2009157100A1 (ja) * | 2008-06-24 | 2009-12-30 | 富士電機ホールディングス株式会社 | スピンバルブ記録素子及び記憶装置 |
| WO2009157101A1 (ja) * | 2008-06-25 | 2009-12-30 | 富士電機ホールディングス株式会社 | 磁気メモリ素子とその駆動方法及び不揮発記憶装置 |
| WO2010007695A1 (ja) * | 2008-07-14 | 2010-01-21 | 富士電機ホールディングス株式会社 | スピンバルブ素子及びその駆動方法並びにこれらを用いる記憶装置 |
| JP2017112375A (ja) * | 2015-12-14 | 2017-06-22 | インフィネオン テクノロジーズ アクチエンゲゼルシャフトInfineon Technologies AG | 磁気抵抗構造を有する磁気センサデバイス、および、磁気抵抗構造を有する磁気センサデバイスのための方法 |
| CN113314666A (zh) * | 2020-05-20 | 2021-08-27 | 台湾积体电路制造股份有限公司 | 磁存储器件及其形成方法 |
Families Citing this family (112)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3788964B2 (ja) | 2002-09-10 | 2006-06-21 | 株式会社東芝 | 磁気ランダムアクセスメモリ |
| US6870758B2 (en) * | 2002-10-30 | 2005-03-22 | Hewlett-Packard Development Company, L.P. | Magnetic memory device and methods for making same |
| US20050013059A1 (en) * | 2003-07-15 | 2005-01-20 | International Business Machines Corporation | Magnetoresistive sensor with a net magnetic moment |
| US7911832B2 (en) | 2003-08-19 | 2011-03-22 | New York University | High speed low power magnetic devices based on current induced spin-momentum transfer |
| US8755222B2 (en) | 2003-08-19 | 2014-06-17 | New York University | Bipolar spin-transfer switching |
| US6980469B2 (en) * | 2003-08-19 | 2005-12-27 | New York University | High speed low power magnetic devices based on current induced spin-momentum transfer |
| US6987692B2 (en) * | 2003-10-03 | 2006-01-17 | Hewlett-Packard Development Company, L.P. | Magnetic memory having angled third conductor |
| WO2005060657A2 (en) * | 2003-12-15 | 2005-07-07 | Yale University | Magnetoelectronic devices based on colossal magnetoresistive thin films |
| US6972229B2 (en) | 2003-12-23 | 2005-12-06 | 02Ic, Inc. | Method of manufacturing self-aligned non-volatile memory device |
| DE102005004126B4 (de) * | 2004-02-06 | 2008-05-08 | Qimonda Ag | MRAM-Speicherzelle mit schwacher intrinsisch anisotroper Speicherschicht |
| US7436700B2 (en) * | 2004-02-06 | 2008-10-14 | Infineon Technologies Ag | MRAM memory cell having a weak intrinsic anisotropic storage layer and method of producing the same |
| FR2866750B1 (fr) * | 2004-02-23 | 2006-04-21 | Centre Nat Rech Scient | Memoire magnetique a jonction tunnel magnetique et procede pour son ecriture |
| JP4031451B2 (ja) * | 2004-03-18 | 2008-01-09 | 株式会社東芝 | 半導体集積回路装置 |
| US7102916B2 (en) * | 2004-06-30 | 2006-09-05 | International Business Machines Corporation | Method and structure for selecting anisotropy axis angle of MRAM device for reduced power consumption |
| US7072208B2 (en) * | 2004-07-28 | 2006-07-04 | Headway Technologies, Inc. | Vortex magnetic random access memory |
| US7356909B1 (en) * | 2004-09-29 | 2008-04-15 | Headway Technologies, Inc. | Method of forming a CPP magnetic recording head with a self-stabilizing vortex configuration |
| TWI261912B (en) * | 2004-12-01 | 2006-09-11 | Ind Tech Res Inst | Magnetic random access memory with reference magnetic resistance and reading method thereof |
| JP2006185961A (ja) * | 2004-12-24 | 2006-07-13 | Toshiba Corp | 磁気ランダムアクセスメモリ |
| US7622784B2 (en) * | 2005-01-10 | 2009-11-24 | International Business Machines Corporation | MRAM device with improved stack structure and offset field for low-power toggle mode writing |
| ATE541295T1 (de) * | 2005-01-24 | 2012-01-15 | Nxp Bv | Magnetisches speichersystem unter verwendung von mram-abtaster |
| JP2006287081A (ja) * | 2005-04-04 | 2006-10-19 | Fuji Electric Holdings Co Ltd | スピン注入磁区移動素子およびこれを用いた装置 |
| US9812184B2 (en) | 2007-10-31 | 2017-11-07 | New York University | Current induced spin-momentum transfer stack with dual insulating layers |
| JP2011008861A (ja) * | 2009-06-25 | 2011-01-13 | Sony Corp | メモリ |
| US7999337B2 (en) * | 2009-07-13 | 2011-08-16 | Seagate Technology Llc | Static magnetic field assisted resistive sense element |
| JP2012059906A (ja) * | 2010-09-09 | 2012-03-22 | Sony Corp | 記憶素子、メモリ装置 |
| US8730715B2 (en) | 2012-03-26 | 2014-05-20 | Honeywell International Inc. | Tamper-resistant MRAM utilizing chemical alteration |
| US9042164B2 (en) | 2012-03-26 | 2015-05-26 | Honeywell International Inc. | Anti-tampering devices and techniques for magnetoresistive random access memory |
| FR2989211B1 (fr) | 2012-04-10 | 2014-09-26 | Commissariat Energie Atomique | Dispositif magnetique a ecriture assistee thermiquement |
| US9082888B2 (en) | 2012-10-17 | 2015-07-14 | New York University | Inverted orthogonal spin transfer layer stack |
| US9082950B2 (en) | 2012-10-17 | 2015-07-14 | New York University | Increased magnetoresistance in an inverted orthogonal spin transfer layer stack |
| US8854871B1 (en) * | 2012-11-19 | 2014-10-07 | U.S. Department Of Energy | Dynamic control of spin states in interacting magnetic elements |
| US9025364B2 (en) * | 2013-03-14 | 2015-05-05 | Micron Technology, Inc. | Selective self-reference read |
| US8982613B2 (en) | 2013-06-17 | 2015-03-17 | New York University | Scalable orthogonal spin transfer magnetic random access memory devices with reduced write error rates |
| TWI612698B (zh) | 2013-10-09 | 2018-01-21 | 財團法人工業技術研究院 | 多位元儲存之非揮發性記憶體晶胞及非揮發性記憶體 |
| US9263667B1 (en) | 2014-07-25 | 2016-02-16 | Spin Transfer Technologies, Inc. | Method for manufacturing MTJ memory device |
| US9337412B2 (en) | 2014-09-22 | 2016-05-10 | Spin Transfer Technologies, Inc. | Magnetic tunnel junction structure for MRAM device |
| US10468590B2 (en) | 2015-04-21 | 2019-11-05 | Spin Memory, Inc. | High annealing temperature perpendicular magnetic anisotropy structure for magnetic random access memory |
| US9728712B2 (en) | 2015-04-21 | 2017-08-08 | Spin Transfer Technologies, Inc. | Spin transfer torque structure for MRAM devices having a spin current injection capping layer |
| US9853206B2 (en) | 2015-06-16 | 2017-12-26 | Spin Transfer Technologies, Inc. | Precessional spin current structure for MRAM |
| US9773974B2 (en) | 2015-07-30 | 2017-09-26 | Spin Transfer Technologies, Inc. | Polishing stop layer(s) for processing arrays of semiconductor elements |
| US10163479B2 (en) | 2015-08-14 | 2018-12-25 | Spin Transfer Technologies, Inc. | Method and apparatus for bipolar memory write-verify |
| US9837602B2 (en) * | 2015-12-16 | 2017-12-05 | Western Digital Technologies, Inc. | Spin-orbit torque bit design for improved switching efficiency |
| CN106910588B (zh) * | 2015-12-22 | 2019-05-21 | 三星电机株式会社 | 磁片 |
| US9741926B1 (en) | 2016-01-28 | 2017-08-22 | Spin Transfer Technologies, Inc. | Memory cell having magnetic tunnel junction and thermal stability enhancement layer |
| US10628316B2 (en) | 2016-09-27 | 2020-04-21 | Spin Memory, Inc. | Memory device with a plurality of memory banks where each memory bank is associated with a corresponding memory instruction pipeline and a dynamic redundancy register |
| US10437723B2 (en) | 2016-09-27 | 2019-10-08 | Spin Memory, Inc. | Method of flushing the contents of a dynamic redundancy register to a secure storage area during a power down in a memory device |
| US11119936B2 (en) | 2016-09-27 | 2021-09-14 | Spin Memory, Inc. | Error cache system with coarse and fine segments for power optimization |
| US11151042B2 (en) | 2016-09-27 | 2021-10-19 | Integrated Silicon Solution, (Cayman) Inc. | Error cache segmentation for power reduction |
| US10818331B2 (en) | 2016-09-27 | 2020-10-27 | Spin Memory, Inc. | Multi-chip module for MRAM devices with levels of dynamic redundancy registers |
| US10437491B2 (en) | 2016-09-27 | 2019-10-08 | Spin Memory, Inc. | Method of processing incomplete memory operations in a memory device during a power up sequence and a power down sequence using a dynamic redundancy register |
| US10446210B2 (en) | 2016-09-27 | 2019-10-15 | Spin Memory, Inc. | Memory instruction pipeline with a pre-read stage for a write operation for reducing power consumption in a memory device that uses dynamic redundancy registers |
| US10366774B2 (en) | 2016-09-27 | 2019-07-30 | Spin Memory, Inc. | Device with dynamic redundancy registers |
| US11119910B2 (en) | 2016-09-27 | 2021-09-14 | Spin Memory, Inc. | Heuristics for selecting subsegments for entry in and entry out operations in an error cache system with coarse and fine grain segments |
| US10460781B2 (en) | 2016-09-27 | 2019-10-29 | Spin Memory, Inc. | Memory device with a dual Y-multiplexer structure for performing two simultaneous operations on the same row of a memory bank |
| US10546625B2 (en) | 2016-09-27 | 2020-01-28 | Spin Memory, Inc. | Method of optimizing write voltage based on error buffer occupancy |
| US10360964B2 (en) | 2016-09-27 | 2019-07-23 | Spin Memory, Inc. | Method of writing contents in memory during a power up sequence using a dynamic redundancy register in a memory device |
| US10991410B2 (en) | 2016-09-27 | 2021-04-27 | Spin Memory, Inc. | Bi-polar write scheme |
| KR102651851B1 (ko) | 2016-12-06 | 2024-04-01 | 삼성전자주식회사 | 반도체 소자 |
| US10665777B2 (en) | 2017-02-28 | 2020-05-26 | Spin Memory, Inc. | Precessional spin current structure with non-magnetic insertion layer for MRAM |
| US10672976B2 (en) | 2017-02-28 | 2020-06-02 | Spin Memory, Inc. | Precessional spin current structure with high in-plane magnetization for MRAM |
| US10032978B1 (en) | 2017-06-27 | 2018-07-24 | Spin Transfer Technologies, Inc. | MRAM with reduced stray magnetic fields |
| US10489245B2 (en) | 2017-10-24 | 2019-11-26 | Spin Memory, Inc. | Forcing stuck bits, waterfall bits, shunt bits and low TMR bits to short during testing and using on-the-fly bit failure detection and bit redundancy remapping techniques to correct them |
| US10656994B2 (en) | 2017-10-24 | 2020-05-19 | Spin Memory, Inc. | Over-voltage write operation of tunnel magnet-resistance (“TMR”) memory device and correcting failure bits therefrom by using on-the-fly bit failure detection and bit redundancy remapping techniques |
| US10529439B2 (en) | 2017-10-24 | 2020-01-07 | Spin Memory, Inc. | On-the-fly bit failure detection and bit redundancy remapping techniques to correct for fixed bit defects |
| US10481976B2 (en) | 2017-10-24 | 2019-11-19 | Spin Memory, Inc. | Forcing bits as bad to widen the window between the distributions of acceptable high and low resistive bits thereby lowering the margin and increasing the speed of the sense amplifiers |
| US10679685B2 (en) | 2017-12-27 | 2020-06-09 | Spin Memory, Inc. | Shared bit line array architecture for magnetoresistive memory |
| US10360962B1 (en) | 2017-12-28 | 2019-07-23 | Spin Memory, Inc. | Memory array with individually trimmable sense amplifiers |
| US10424726B2 (en) | 2017-12-28 | 2019-09-24 | Spin Memory, Inc. | Process for improving photoresist pillar adhesion during MRAM fabrication |
| US10891997B2 (en) | 2017-12-28 | 2021-01-12 | Spin Memory, Inc. | Memory array with horizontal source line and a virtual source line |
| US10516094B2 (en) | 2017-12-28 | 2019-12-24 | Spin Memory, Inc. | Process for creating dense pillars using multiple exposures for MRAM fabrication |
| US10395712B2 (en) | 2017-12-28 | 2019-08-27 | Spin Memory, Inc. | Memory array with horizontal source line and sacrificial bitline per virtual source |
| US10395711B2 (en) | 2017-12-28 | 2019-08-27 | Spin Memory, Inc. | Perpendicular source and bit lines for an MRAM array |
| US10811594B2 (en) | 2017-12-28 | 2020-10-20 | Spin Memory, Inc. | Process for hard mask development for MRAM pillar formation using photolithography |
| US10360961B1 (en) | 2017-12-29 | 2019-07-23 | Spin Memory, Inc. | AC current pre-charge write-assist in orthogonal STT-MRAM |
| US10367139B2 (en) | 2017-12-29 | 2019-07-30 | Spin Memory, Inc. | Methods of manufacturing magnetic tunnel junction devices |
| US10546624B2 (en) | 2017-12-29 | 2020-01-28 | Spin Memory, Inc. | Multi-port random access memory |
| US10886330B2 (en) | 2017-12-29 | 2021-01-05 | Spin Memory, Inc. | Memory device having overlapping magnetic tunnel junctions in compliance with a reference pitch |
| US10840436B2 (en) | 2017-12-29 | 2020-11-17 | Spin Memory, Inc. | Perpendicular magnetic anisotropy interface tunnel junction devices and methods of manufacture |
| US10236047B1 (en) | 2017-12-29 | 2019-03-19 | Spin Memory, Inc. | Shared oscillator (STNO) for MRAM array write-assist in orthogonal STT-MRAM |
| US10270027B1 (en) | 2017-12-29 | 2019-04-23 | Spin Memory, Inc. | Self-generating AC current assist in orthogonal STT-MRAM |
| US10840439B2 (en) | 2017-12-29 | 2020-11-17 | Spin Memory, Inc. | Magnetic tunnel junction (MTJ) fabrication methods and systems |
| US10424723B2 (en) | 2017-12-29 | 2019-09-24 | Spin Memory, Inc. | Magnetic tunnel junction devices including an optimization layer |
| US10199083B1 (en) | 2017-12-29 | 2019-02-05 | Spin Transfer Technologies, Inc. | Three-terminal MRAM with ac write-assist for low read disturb |
| US10236048B1 (en) | 2017-12-29 | 2019-03-19 | Spin Memory, Inc. | AC current write-assist in orthogonal STT-MRAM |
| US10784439B2 (en) | 2017-12-29 | 2020-09-22 | Spin Memory, Inc. | Precessional spin current magnetic tunnel junction devices and methods of manufacture |
| US10339993B1 (en) | 2017-12-30 | 2019-07-02 | Spin Memory, Inc. | Perpendicular magnetic tunnel junction device with skyrmionic assist layers for free layer switching |
| US10319900B1 (en) | 2017-12-30 | 2019-06-11 | Spin Memory, Inc. | Perpendicular magnetic tunnel junction device with precessional spin current layer having a modulated moment density |
| US10236439B1 (en) | 2017-12-30 | 2019-03-19 | Spin Memory, Inc. | Switching and stability control for perpendicular magnetic tunnel junction device |
| US10141499B1 (en) | 2017-12-30 | 2018-11-27 | Spin Transfer Technologies, Inc. | Perpendicular magnetic tunnel junction device with offset precessional spin current layer |
| US10255962B1 (en) | 2017-12-30 | 2019-04-09 | Spin Memory, Inc. | Microwave write-assist in orthogonal STT-MRAM |
| US10229724B1 (en) | 2017-12-30 | 2019-03-12 | Spin Memory, Inc. | Microwave write-assist in series-interconnected orthogonal STT-MRAM devices |
| US10468588B2 (en) | 2018-01-05 | 2019-11-05 | Spin Memory, Inc. | Perpendicular magnetic tunnel junction device with skyrmionic enhancement layers for the precessional spin current magnetic layer |
| US10438995B2 (en) | 2018-01-08 | 2019-10-08 | Spin Memory, Inc. | Devices including magnetic tunnel junctions integrated with selectors |
| US10438996B2 (en) | 2018-01-08 | 2019-10-08 | Spin Memory, Inc. | Methods of fabricating magnetic tunnel junctions integrated with selectors |
| US10446744B2 (en) | 2018-03-08 | 2019-10-15 | Spin Memory, Inc. | Magnetic tunnel junction wafer adaptor used in magnetic annealing furnace and method of using the same |
| US10388861B1 (en) | 2018-03-08 | 2019-08-20 | Spin Memory, Inc. | Magnetic tunnel junction wafer adaptor used in magnetic annealing furnace and method of using the same |
| US11107974B2 (en) | 2018-03-23 | 2021-08-31 | Spin Memory, Inc. | Magnetic tunnel junction devices including a free magnetic trench layer and a planar reference magnetic layer |
| US20190296220A1 (en) | 2018-03-23 | 2019-09-26 | Spin Transfer Technologies, Inc. | Magnetic Tunnel Junction Devices Including an Annular Free Magnetic Layer and a Planar Reference Magnetic Layer |
| US10784437B2 (en) | 2018-03-23 | 2020-09-22 | Spin Memory, Inc. | Three-dimensional arrays with MTJ devices including a free magnetic trench layer and a planar reference magnetic layer |
| US11107978B2 (en) | 2018-03-23 | 2021-08-31 | Spin Memory, Inc. | Methods of manufacturing three-dimensional arrays with MTJ devices including a free magnetic trench layer and a planar reference magnetic layer |
| US10411185B1 (en) | 2018-05-30 | 2019-09-10 | Spin Memory, Inc. | Process for creating a high density magnetic tunnel junction array test platform |
| US10593396B2 (en) | 2018-07-06 | 2020-03-17 | Spin Memory, Inc. | Multi-bit cell read-out techniques for MRAM cells with mixed pinned magnetization orientations |
| US10559338B2 (en) | 2018-07-06 | 2020-02-11 | Spin Memory, Inc. | Multi-bit cell read-out techniques |
| US10692569B2 (en) | 2018-07-06 | 2020-06-23 | Spin Memory, Inc. | Read-out techniques for multi-bit cells |
| US10600478B2 (en) | 2018-07-06 | 2020-03-24 | Spin Memory, Inc. | Multi-bit cell read-out techniques for MRAM cells with mixed pinned magnetization orientations |
| CN110837066B (zh) | 2018-08-17 | 2022-01-04 | 爱盛科技股份有限公司 | 磁场感测装置 |
| US10650875B2 (en) | 2018-08-21 | 2020-05-12 | Spin Memory, Inc. | System for a wide temperature range nonvolatile memory |
| US10699761B2 (en) | 2018-09-18 | 2020-06-30 | Spin Memory, Inc. | Word line decoder memory architecture |
| US10971680B2 (en) | 2018-10-01 | 2021-04-06 | Spin Memory, Inc. | Multi terminal device stack formation methods |
| US11621293B2 (en) | 2018-10-01 | 2023-04-04 | Integrated Silicon Solution, (Cayman) Inc. | Multi terminal device stack systems and methods |
| US10580827B1 (en) | 2018-11-16 | 2020-03-03 | Spin Memory, Inc. | Adjustable stabilizer/polarizer method for MRAM with enhanced stability and efficient switching |
| US11107979B2 (en) | 2018-12-28 | 2021-08-31 | Spin Memory, Inc. | Patterned silicide structures and methods of manufacture |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09509775A (ja) * | 1993-10-01 | 1997-09-30 | アメリカ合衆国 | 超高密度、不揮発性強磁性ランダム・アクセス・メモリ |
| JPH11154389A (ja) * | 1997-09-18 | 1999-06-08 | Canon Inc | 磁気抵抗素子、磁性薄膜メモリ素子および該メモリ素子の記録再生方法 |
| JP2001195878A (ja) * | 1999-10-25 | 2001-07-19 | Canon Inc | 磁気抵抗効果メモリ、および、それに記録される情報の再生方法とその再生装置 |
| JP2001203405A (ja) * | 1999-10-21 | 2001-07-27 | Motorola Inc | 磁場応答が改良された磁気素子とその作製方法 |
| WO2001067469A1 (en) * | 2000-03-09 | 2001-09-13 | Koninklijke Philips Electronics N.V. | Magnetic field element having a biasing magnetic layer structure |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3483895B2 (ja) * | 1990-11-01 | 2004-01-06 | 株式会社東芝 | 磁気抵抗効果膜 |
| US5841611A (en) * | 1994-05-02 | 1998-11-24 | Matsushita Electric Industrial Co., Ltd. | Magnetoresistance effect device and magnetoresistance effect type head, memory device, and amplifying device using the same |
| US5587943A (en) * | 1995-02-13 | 1996-12-24 | Integrated Microtransducer Electronics Corporation | Nonvolatile magnetoresistive memory with fully closed flux operation |
| US5650958A (en) * | 1996-03-18 | 1997-07-22 | International Business Machines Corporation | Magnetic tunnel junctions with controlled magnetic response |
| US6081446A (en) * | 1998-06-03 | 2000-06-27 | Hewlett-Packard Company | Multiple bit magnetic memory cell |
| US5982660A (en) * | 1998-08-27 | 1999-11-09 | Hewlett-Packard Company | Magnetic memory cell with off-axis reference layer orientation for improved response |
| US6436526B1 (en) * | 1999-06-17 | 2002-08-20 | Matsushita Electric Industrial Co., Ltd. | Magneto-resistance effect element, magneto-resistance effect memory cell, MRAM and method for performing information write to or read from the magneto-resistance effect memory cell |
| US6169689B1 (en) * | 1999-12-08 | 2001-01-02 | Motorola, Inc. | MTJ stacked cell memory sensing method and apparatus |
| US6538919B1 (en) * | 2000-11-08 | 2003-03-25 | International Business Machines Corporation | Magnetic tunnel junctions using ferrimagnetic materials |
| US6392924B1 (en) * | 2001-04-06 | 2002-05-21 | United Microelectronics Corp. | Array for forming magnetoresistive random access memory with pseudo spin valve |
| US6576969B2 (en) * | 2001-09-25 | 2003-06-10 | Hewlett-Packard Development Company, L.P. | Magneto-resistive device having soft reference layer |
-
2002
- 2002-07-31 US US10/209,156 patent/US6654278B1/en not_active Expired - Fee Related
-
2003
- 2003-07-11 JP JP2004524584A patent/JP4833548B2/ja not_active Expired - Fee Related
- 2003-07-11 EP EP03771593A patent/EP1525584A2/en not_active Withdrawn
- 2003-07-11 CN CNB03817782XA patent/CN100565701C/zh not_active Expired - Fee Related
- 2003-07-11 WO PCT/US2003/021668 patent/WO2004012197A2/en not_active Ceased
- 2003-07-11 AU AU2003249035A patent/AU2003249035A1/en not_active Abandoned
- 2003-07-11 KR KR1020057001777A patent/KR20050034726A/ko not_active Abandoned
- 2003-07-24 TW TW092120223A patent/TW200410247A/zh unknown
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09509775A (ja) * | 1993-10-01 | 1997-09-30 | アメリカ合衆国 | 超高密度、不揮発性強磁性ランダム・アクセス・メモリ |
| JPH11154389A (ja) * | 1997-09-18 | 1999-06-08 | Canon Inc | 磁気抵抗素子、磁性薄膜メモリ素子および該メモリ素子の記録再生方法 |
| JP2001203405A (ja) * | 1999-10-21 | 2001-07-27 | Motorola Inc | 磁場応答が改良された磁気素子とその作製方法 |
| JP2001195878A (ja) * | 1999-10-25 | 2001-07-19 | Canon Inc | 磁気抵抗効果メモリ、および、それに記録される情報の再生方法とその再生装置 |
| WO2001067469A1 (en) * | 2000-03-09 | 2001-09-13 | Koninklijke Philips Electronics N.V. | Magnetic field element having a biasing magnetic layer structure |
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7952915B2 (en) | 2006-03-02 | 2011-05-31 | Kyoto University | Core-rotating element of ferromagnetic dot and information memory element using the core of ferromagnetic dot |
| WO2007105358A1 (ja) * | 2006-03-02 | 2007-09-20 | Kyoto University | 強磁性ドットのコア回転素子及び強磁性ドットのコア利用情報記憶素子 |
| JP4803681B2 (ja) * | 2006-03-02 | 2011-10-26 | 国立大学法人京都大学 | 強磁性ドットのコア回転素子及び強磁性ドットのコア利用情報記憶素子 |
| US8679653B2 (en) | 2008-06-24 | 2014-03-25 | Fuji Electric Co., Ltd. | Spin-valve recording element and storage device |
| WO2009157100A1 (ja) * | 2008-06-24 | 2009-12-30 | 富士電機ホールディングス株式会社 | スピンバルブ記録素子及び記憶装置 |
| WO2009157101A1 (ja) * | 2008-06-25 | 2009-12-30 | 富士電機ホールディングス株式会社 | 磁気メモリ素子とその駆動方法及び不揮発記憶装置 |
| JP5387990B2 (ja) * | 2008-06-25 | 2014-01-15 | 富士電機株式会社 | 磁気メモリ素子とその駆動方法及び不揮発記憶装置 |
| US8709617B2 (en) | 2008-06-25 | 2014-04-29 | Fuji Electric Co., Ltd. | Magnetic memory element, driving method for same, and nonvolatile storage device |
| WO2010007695A1 (ja) * | 2008-07-14 | 2010-01-21 | 富士電機ホールディングス株式会社 | スピンバルブ素子及びその駆動方法並びにこれらを用いる記憶装置 |
| US8654576B2 (en) | 2008-07-14 | 2014-02-18 | Fuji Electric Co., Ltd. | Spin valve element, method of driving the same, and storage device using the same |
| JP2017112375A (ja) * | 2015-12-14 | 2017-06-22 | インフィネオン テクノロジーズ アクチエンゲゼルシャフトInfineon Technologies AG | 磁気抵抗構造を有する磁気センサデバイス、および、磁気抵抗構造を有する磁気センサデバイスのための方法 |
| US10008225B2 (en) | 2015-12-14 | 2018-06-26 | Infineon Technologies Ag | Magnetic sensor device having a magneto-resistive structure that generates a vortex magnetization pattern |
| CN113314666A (zh) * | 2020-05-20 | 2021-08-27 | 台湾积体电路制造股份有限公司 | 磁存储器件及其形成方法 |
| KR20210143646A (ko) * | 2020-05-20 | 2021-11-29 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | Sot-mram 용 합성 자유 층을 가진 자기 터널링 접합 |
| KR102476952B1 (ko) * | 2020-05-20 | 2022-12-12 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | Sot-mram 용 합성 자유 층을 가진 자기 터널링 접합 |
| US11844287B2 (en) | 2020-05-20 | 2023-12-12 | Taiwan Semiconductor Manufacturing Co., Ltd. | Magnetic tunneling junction with synthetic free layer for SOT-MRAM |
| US12329041B2 (en) | 2020-05-20 | 2025-06-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Magnetic tunneling junction with synthetic free layer for SOT-MRAM |
| CN113314666B (zh) * | 2020-05-20 | 2025-08-26 | 台湾积体电路制造股份有限公司 | 磁存储器件及其形成方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP1525584A2 (en) | 2005-04-27 |
| AU2003249035A8 (en) | 2004-02-16 |
| JP4833548B2 (ja) | 2011-12-07 |
| WO2004012197A3 (en) | 2004-07-08 |
| KR20050034726A (ko) | 2005-04-14 |
| TW200410247A (en) | 2004-06-16 |
| AU2003249035A1 (en) | 2004-02-16 |
| US6654278B1 (en) | 2003-11-25 |
| WO2004012197A2 (en) | 2004-02-05 |
| CN100565701C (zh) | 2009-12-02 |
| CN1708810A (zh) | 2005-12-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4833548B2 (ja) | 磁気抵抗ランダムアクセスメモリ | |
| EP1579231B1 (en) | Synthetic antiferromagnetic structure for magnetoelectronic devices | |
| KR100898875B1 (ko) | 스케일링 가능한 mram 소자에의 기록 | |
| US7932571B2 (en) | Magnetic element having reduced current density | |
| US7965543B2 (en) | Method for reducing current density in a magnetoelectronic device | |
| JP2005530340A (ja) | スイッチング磁界が低減された磁気抵抗ランダムアクセスメモリ | |
| WO2004064073A2 (en) | Spin-transfer multilayer stack containing magnetic layers with resettable magnetization | |
| KR20030009094A (ko) | 자기 메모리 셀 | |
| JP2004064073A (ja) | 磁気メモリデバイスおよび方法 | |
| US7800937B2 (en) | Method for switching magnetic moment in magnetoresistive random access memory with low current | |
| JP4477829B2 (ja) | 磁気記憶デバイスを動作させる方法 | |
| JP2003188359A (ja) | 磁気的に軟らかい合成フェリ磁性体基準層を含む磁気抵抗素子 | |
| US20090040663A1 (en) | Magnetic memory | |
| CN113451355A (zh) | 基于自旋轨道矩的磁性存储器件 | |
| JP2009038343A (ja) | バイアス層を有する磁気抵抗素子 | |
| CN101290947A (zh) | 磁存储器及其制造方法 | |
| JP2007281229A (ja) | 磁気抵抗ランダムアクセスメモリ、その書き込み方法、およびテスト方法 | |
| KR20070017043A (ko) | 저전류로 자기저항 랜덤 액세스 메모리의 자기 모멘트를전환하는 방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20060511 |
|
| A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20090224 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20100427 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20100628 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110405 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110531 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110726 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110803 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20110824 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20110922 |
|
| R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140930 Year of fee payment: 3 |
|
| LAPS | Cancellation because of no payment of annual fees |