JP2005250700A - Data storage device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To significantly reduce the time and cost required for erasing data when completely erasing data in a storage medium such as a hard disk device, and for the data storage device itself to autonomously and completely erase data. A data storage device is provided.
A data storage device according to the present invention includes a first physical switching unit capable of designating an on or off state, information indicating a power supply state and a state of the first physical switching unit, or externally. Control means for deciding whether or not to erase the data recorded on the storage medium based on the information, and an erasure data generating means for forming erasure recording data based on the information from the control means. When it is determined that data in a predetermined area of the storage medium is to be erased, the recording means is configured to write the erasure recording data in the predetermined area of the corresponding storage medium.
[Selection] Figure 1

Description

  The present invention relates to a data storage device such as a hard disk device, a flexible disk device, an optical disk device, and a memory card device, and more particularly to a data erasing technique for the data storage device.

Conventionally, for example, a hard disk device, a flexible disk device, an optical disk device, and a memory card are connected to an information processing device such as a personal computer so-called personal computer, a small computer workstation, or a PDA (Personal Digital Assistance) to record data. Data storage devices such as devices are manufactured and widely used.
Recently, for example, personal computers with built-in hard disk devices are on the market as recycled products, and cases where different owners use the same products are rapidly increasing.
In such a case, the first owner should generally let go of the data stored on the hard disk as a recycled product after formatting the hard disk to prevent it from being seen by the next owner. Is.

  However, when using a general hard disk format program on the market (such as Windows (registered trademark)), even if the complete hard disk format is selected, only the management area is initialized by this format. The original data remains in the data area. Even in such a state, since the management area is usually initialized, the original data remaining in the data area cannot be read. However, it is recently known that the original data remaining in the data area can be read by a special method even in such a formatted state, and there is a possibility that the data of the first owner may be leaked. I found out. Actually, when the first owner is a company, there has been a big problem that it leads to confidential leakage of the company.

Therefore, in order to solve such a problem, a special software program that is a software program that runs on a personal computer and that can completely erase the data area of the hard disk has been commercially available.
The method of erasing a special software program that completely erases the data area of the hard disk as described above specifies the data to be written from the personal computer and the area to be written to the hard disk, and writes this designated data to the designated area of the hard disk. By overwriting the data area of the hard disk, the original data is erased.

18 to 21 are views showing a conventional general hard disk drive (HDD). This conventional general hard disk drive (HDD) will be briefly described in order to clarify the difference from the present invention.
FIG. 18 is a block diagram showing the internal configuration of a conventional hard disk drive (HDD). In FIG. 18, a hard disk device 2000 is connected to a computer 110 via a data bus 11, and is configured to be capable of bidirectional data transmission during data recording and data reproduction. At the time of data recording, the hard disk device 2000 receives recording data from the computer 110 and records it on the hard disk (HD) 112 via the controller 2001 and the recording unit 111. On the other hand, at the time of data reproduction, reproduction data from the hard disk 112 is sent to the computer 110 via the reproduction unit 113 and the controller 2001.

  When data is recorded, a recording command is issued from the computer 110 to the host I / F 2002 of the controller 2001. When a recording command is input to the host I / F 2002, the recording command is transmitted to the control unit 2004. The control unit 2004 recognizes the information on the recording position and the data amount on the hard disk 112, and the memory 2005, ECC in the controller 2001 based on the information. Each block of the unit 2006, the encoder 2003, the decoder 2007, etc. is controlled.

  FIG. 19 is a block diagram illustrating a configuration of the ECC unit 2006. As shown in FIG. 19, the ECC unit 2006 includes a parity generation unit 2010, a syndrome calculation unit 2008, and an error correction unit 2009. The ECC unit 2006 is connected to the memory 2005 via the path 17 so that data communication is possible, and is configured to transmit the parity information generated by the ECC unit 2006 to the memory 2005.

FIG. 20 is a block diagram showing the configuration of the encoder 2003 and the decoder 2007. As shown in FIG. 20, in the encoder 2003, the data 13 from the memory 2005 is input to the scrambler 2011, sent to the modulation unit 2012 and the sync insertion unit 2013, and output to the recording unit 111 as block data 14. The The scrambler 2011 receives an initial value load signal 51, a fixed initial value signal 53, and a recording clock 61. A sync insertion signal 50 is input to the sync insertion unit 2013.
On the other hand, in the decoder 2007, the reproduction data 15 from the reproduction unit 113 is input to the sync detection unit 2014 and sent to the demodulation unit 2015 and the descrambler 2016. Output data 16 from the descrambler 2016 is output to the memory 2005. The descrambler 2016 receives an initial value load signal 51, a fixed initial value signal 53, and a reproduction clock 62. A sync detection signal 52 is output from the sync detection unit 2014.

Hereinafter, an erasing process operation that the computer 110 starts and executes with the above-described software program in order to completely erase the data area of the hard disk 112 (HD) will be described.
The erasure data string output from the computer 110 is stored in the memory 2005 via the data buses 11 and 12. When the erasure data string is stored in the memory 2005, the ECC unit 2006 divides the stored data into frame units, reads the data into the parity generation unit 2010 of the ECC unit 2006, calculates parity for error correction, and calculates each frame. Are stored in the memory 2005. As described above, when the parity corresponding to each frame in the memory 2005 is prepared, the control unit 2004 outputs the frame and the data 13 including the parity from the memory 2005 to the encoder 2003.

FIG. 21 is a conceptual diagram of the frame data 13 and parity 71 recorded in the memory 2005 and the block data 14 output from the encoder 2003. Here, each block 74 is obtained by adding a parity 71 and sync data 73 to each frame 70.
The encoder 2003 randomizes the data 13 received by the scrambler 2011 in accordance with the initial value load signal 51 from the control unit 2004, encodes it into a data sequence that reduces the error rate by the modulation unit 2012, and sends it to the sync insertion unit 2013. Thus, the block data 14 to which the sync data which is the frame synchronization pattern is added is formed. After the block data 14 is thus formed, it is transferred to the recording unit 111. The recording unit 111 records the modulated block data string in a specified area on the hard disk 112, whereby the data in that area is completely erased. The entire area is erased when the area extends over the entire surface of the disk.

  Data 15 read from the hard disk 112 and binarized by the reproduction unit 113 is input to the decoder 2007. In the decoder 2007, the sync detection unit 2014 detects sync data, and the sync detection signal 52 is sent to the control unit 2004. The demodulator 2015 at the next stage of the sync detector 2014 performs reverse processing of the modulator 2012 in the encoder 2003 and outputs the data to the descrambler 2016. The descrambler 2016 randomizes the demodulated data according to the initial value load signal 51 from the control unit 2004 and outputs the randomized data to the memory 2005. The descrambler 2016 of the decoder 2007 has the same configuration as the scrambler 2011 of the encoder 2003.

At the time of data reproduction, when the decoded data 16 output from the decoder 2007 is stored in the memory 2005 for one block data in the ECC unit 2006, the syndrome calculation unit 2008 (FIG. 19) reads the frame data and parity. Then, an error position and an error correction code are calculated and generated. The error correction unit 2009 that has received the information (error position and error correction code) reads out the data byte corresponding to the error position from the frame data in the memory 2005, corrects it using the corresponding error correction code, and then corrects the data byte. The later data byte is written back to the original position on the memory 2005 to correct the frame data.
As in the example described above, the software program erasing method that completely erases the data area of the hard disk specifies the data to be written from the personal computer and the area to be written to the hard disk, and this designated data is designated as the designated area of the hard disk. In this method, the data area of the hard disk is overwritten by writing to the original data to erase the original data.

  However, in the situation where data storage devices such as recent hard disks have increased in capacity, in the above-described full erase processing by the software program, the erasure data generated and output from the personal computer for all the data areas of the data storage device Since the column was overwritten, a long time was required for the erasing process. Further, since the conventional software program for the entire erasure process is expensive, there is a problem that it takes cost and time to erase the entire data area.

In order to solve such a problem, in the data storage device disclosed in Patent Document 1 below, an erasing signal generating means for erasing the hard disk is provided inside the hard disk device, and the entire surface of the hard disk is provided between the external computer and the hard disk. Defines the protocol for erasure. In this data storage device, when a command for instructing the entire hard disk to be erased is issued from the computer to the hard disk device, when the hard disk device receives this command, the signal generated by the erase signal generating means is transmitted to the entire hard disk. It is configured to record.
JP 2003-140835 A

In the data storage device of Patent Document 1, it is necessary to prepare an external computer that performs an operation corresponding to a specified protocol when performing the entire erase of the hard disk. For this reason, for example, when hard disk device manufacturers specify different protocols, it becomes a non-generic method and an erasing method that is very inconvenient for the user.
Further, in a conventional data storage device, for example, it is impossible to erase data in a plurality of hard disks at a time without using an external device such as a computer.

  An object of the present invention is to provide a highly versatile data storage device having a function capable of completely erasing data in a data area in a large-capacity storage medium with a simple configuration. In the present invention, a physical switch is provided so that the data in the entire data area in the storage medium or the data in the designated area can be completely erased autonomously and quickly without using an external device. The object is to provide a possible data storage device.

According to a first aspect of the present invention, there is provided a data storage device, a storage medium on which data is recorded,
Recording means for recording data on the storage medium;
A transmission / reception means for transmitting / receiving information to / from the outside;
A first physical switching means capable of designating an on or off state;
Control means for determining whether to erase data recorded on the storage medium based on information indicating the power supply state and the state of the first physical switching means, or information from the outside, and from the control means Erasure data generation means for forming erasure recording data based on the information of
Comprising
When the control means determines to erase data in a predetermined area of the storage medium, the recording means is configured to write the erasure recording data into the corresponding predetermined area of the storage medium. The data storage device configured as described above is provided with a physical switch so that the data in the entire data area in the storage medium or the data in the specified area can be autonomously and rapidly operated without using an external device. It is possible to erase completely.

Further, as described in claim 2, the data storage device of the present invention further comprises encoder means for encoding the data inputted by the data storage device of claim 1 and outputting it to the recording means,
When the control means determines to erase data in a predetermined area of the storage medium, the output of the erase data generation means is input to the encoder means and written to the predetermined area of the storage medium. The data storage device configured as described above can completely erase data in a data area in a large-capacity storage medium with a simple configuration.

Furthermore, the data storage device according to the present invention, as described in claim 3, is configured such that the data storage device according to claim 1 uses a predetermined logic to obtain information from the outside acquired via the transmission / reception means and the output of the linear feedback shift register. Scramble means for computing;
An encoder means having a modulating means for converting the output of the scramble means according to a predetermined rule, and outputting it;
When the control means determines to erase the data in a predetermined area of the storage medium, the control means generates an initial value of the linear feedback shift register, stores the initial value in the linear feedback shift register, and stores the storage medium. The linear feedback shift register is driven in synchronism with the data recording clock to write the output of the encoder means to a predetermined area of the storage medium. The data storage device configured as described above can surely erase data in a data area in a large-capacity storage medium with a simple configuration.

Further, according to the data storage device of the present invention, as described in claim 4, the data storage device of claim 1 can divide information from the outside into frames of a predetermined number of bytes, and can perform error correction and detection of frames. Parity generating means for generating parity to be
Signal conversion means for performing a predetermined operation on the output of the parity generation means;
Encoder means for performing a predetermined encoding on a data string obtained by combining a frame and a parity;
When the control means determines to erase the data in the predetermined area of the storage medium, the output of the signal conversion means is combined with the frame and input to the encoding means, and the output of the encoder means is written to the predetermined area of the storage medium It is configured as follows. The data storage device configured as described above can completely and reliably erase data in a data area in a large-capacity storage medium with a simple configuration.

Further, according to the data storage device of the present invention, as described in claim 5, the data storage device of claim 1 can divide information from the outside into frame units of a predetermined number of bytes, and can perform error correction and detection of frames. Parity generating means for generating parity to be
Signal conversion means for performing a predetermined operation on the output of the parity generation means;
Encoder means for predetermined encoding of a data string obtained by combining a frame and a parity;
The encoder means scramble means for performing a predetermined logical operation on the data string obtained by combining the frame and the parity and the output of the linear feedback shift register;
Modulation means for converting the output of the scramble means according to a predetermined rule and outputting the data,
When the control means determines to erase the data in the predetermined area of the storage medium, the output of the signal conversion means is combined with the frame and input to the scramble means, and the initial value generated by the control means is input to the linear feedback shift register. The output of the signal conversion means stored and written is written in a predetermined area of the storage medium. The data storage device configured as described above can completely and reliably erase data in a data area in a large-capacity storage medium with a simple configuration.

  Furthermore, the data storage device of the present invention may be configured such that the erase data generation means of claim 1 or 2 generates a predetermined fixed value or a predetermined random value, as described in claim 6.

Further, according to the data storage device of the present invention, as described in claim 7, the erasure data generation means of claim 1, 2 or 6 stores erasure recording data in a predetermined area of the storage medium. Means for specifying the number of times of recording, or the output format of the erasure data generation means for each recording,
The erasure data generation means may be configured to output erasure recording data to be recorded on the storage medium in accordance with a designation from the control means.

  Further, according to the data storage device of the present invention, as described in claim 8, the data storage device of claim 7 is for erasure that the control means records from the erasure data generation means to the storage medium based on information from the outside. The recording data may be output.

  Further, according to the data storage device of the present invention, as described in claim 9, the data storage device of claim 7 has a second physical switching unit, and information from the second physical switching unit. The recording data for erasure to be recorded on the storage medium may be output based on the above.

  Further, according to the data storage device of the present invention, as described in claim 10, every time the control means of claim 3 or 5 inputs a predetermined data amount as a recording unit to the storage medium to the scramble means. The initial value may be changed.

  Further, as described in claim 11, the data storage device of the present invention may be configured such that the control means of claim 3, 5, or 10 generates an arbitrary random number as an initial value.

Further, according to the data storage device of the present invention, as described in claim 12, the control means of claim 3, 5, 10, or 11 records the number of times of recording in a predetermined area of the storage medium, or A means for designating the timing for generating and outputting an initial value for each recording;
The erasure data generation means may be configured to output erasure recording data to be recorded on the storage medium in accordance with designation from the control means.

  Furthermore, as described in claim 13, the data storage device of the present invention may be configured such that the control means of claim 12 outputs erasure recording data to be recorded on the storage medium in accordance with information from the outside. .

  Further, according to the data storage device of the present invention, as described in claim 14, the control means of claim 12 outputs the erasure recording data to be recorded on the storage medium in accordance with the information from the second physical switching means. You may comprise.

  Furthermore, in the data storage device of the present invention, as described in claim 15, the first physical switching means of claim 1 to claim 14 is configured by a first switch, and the first physical switch When is changed from OFF to ON, the control unit may determine that data in a predetermined area of the storage medium is to be erased, and write erasure recording data in the predetermined area of the storage medium.

Furthermore, the data storage device according to the present invention is the data storage device according to any one of claims 1 to 14, wherein the power supply means for operating the data storage device transitions from an off state to an on state. At the time when the first physical switching means is in the ON state,
The control unit may determine that data in a predetermined area of the storage medium is to be erased, and write the erasure recording data in the predetermined area of the storage medium.

  Furthermore, the data storage device according to the present invention is the data storage device according to any one of claims 1 to 14, wherein the transmission / reception means receives an erasing instruction of predetermined area data in the storage medium from the outside. Thus, when the first physical switching unit is in the on state, the control unit may determine that the data in the predetermined area of the storage medium is to be erased, and write the erasure recording data in the predetermined area of the storage medium. Good.

Furthermore, the data storage device according to the present invention is the data storage device according to any one of claims 1 to 14, wherein a power supply state for operating the data storage device or a power supply means is provided. In the on state,
When the first physical switching unit or the power supply unit is operated again within a predetermined time after the first physical switching unit is operated, the control unit erases data in a predetermined area of the storage medium. Judgment
When the first physical switching unit or the power supply unit is not operated again within a predetermined time after the first physical switching unit is operated, the first physical switching unit is operated. The history may be deleted.

  Furthermore, as described in claim 19, the data storage device of the present invention controls the data storage device according to claims 1 to 14, when an instruction to erase data in a predetermined area of the storage medium is received from the outside. The means may determine that the data in the predetermined area of the storage medium is to be erased and write the erasure recording data in the predetermined area of the storage medium.

  Furthermore, the data storage device according to the present invention is the data storage device according to any one of claims 1 to 19, wherein the erasing record data is written in a predetermined area of the storage medium. Display means for showing in the above may be provided.

  Furthermore, the data storage device of the present invention can be configured such that, as described in claim 21, the display means of claim 20 can transmit predetermined data to the outside.

  Furthermore, in the data storage device of the present invention, as described in claim 22, the display means of the display means in claim 21 can be constituted by a light source such as an LED.

  Furthermore, the data storage device according to the present invention is the data storage device according to any one of claims 1 to 20, wherein the display means finishes recording the recording data for erasure in a predetermined area of the storage medium. You may provide the end display means shown outside.

  Further, as described in claim 24, the data storage device of the present invention can be configured such that the end display means of claim 23 can transmit predetermined data to the outside.

  Furthermore, in the data storage device of the present invention, as described in claim 25, the display means of claim 23 can be constituted by a light source such as an LED.

  Further, in the data storage device of the present invention, as described in claim 26, the storage medium of claim 1 to claim 25 may be a magnetic disk, a magnetic tape, an optical disk, or a semiconductor memory.

  Further, in the data storage device of the present invention, as described in claim 27, the predetermined area to be erased in the storage medium of claim 1 to claim 26 is the entire area of the storage medium, It can be erased without fail.

According to the present invention, it is possible to provide a highly versatile data storage device having a function capable of completely erasing data in a data area in a large-capacity storage medium with a simple configuration.
In the present invention, a physical switch is provided to completely erase the data in the entire data area in the storage medium or the data in the designated area independently and quickly without using an external device. It is possible to provide a data storage device capable of processing.

According to the data storage device of the present invention, it is possible to ensure complete or partial erasure of hard disk data not only based on commands from an external device such as a personal computer, but also on the power supply means of the hard disk device and the state of the physical switch. It can be erased.
In addition, according to the present invention, overwriting erasure data generation for erasing all or part of the data on the hard disk is realized by simply adding or changing the internal circuit of the conventional hard disk device. . As a result, regardless of the state of an external device such as a personal computer, it is possible to reliably erase all or part of the data of the hard disk itself by the hard disk device alone. As a result, the hard disk data erasing operation can be performed without going through an I / F (interface) with a personal computer, and the erasing time is greatly reduced as compared with the conventional data erasing operation. Can be erased at once without using an external device such as a personal computer.

  Preferred embodiments of a data storage device according to the present invention will be described below with reference to the accompanying drawings.

Embodiment 1
FIG. 1 is a block diagram showing an internal configuration of the data storage device according to the first embodiment of the present invention. In FIG. 1, a hard disk device (HDD) 10 is connected to a computer 110 via a data bus 11, and is configured to be capable of bidirectional data transmission during data recording and data reproduction. At the time of data recording, the recording data from the computer 110 is received by the hard disk device 10 and recorded on the hard disk (HD) 112 via the controller 100 and the recording unit 111. On the other hand, at the time of data reproduction, reproduction data from the hard disk 112 is sent to the computer 110 via the reproduction unit 113 and the controller 100.

At the time of data recording, a recording command is issued from the computer 110 to the host I / F 101 of the controller 100. When a recording command is input to the host I / F 101, it is transmitted to the control unit 103. The control unit 103 recognizes information on the recording position and data amount on the hard disk 112, and based on the information, the erasure control unit 102, the memory 104, the ECC unit 105, the data generation unit 106, the selector 107, the encoder 108 in the controller 100, Each block such as the decoder 109 is controlled.
1, in the data storage device of the first embodiment, each of the host I / F 101, the memory 104, the ECC unit 105, the encoder 108, and the decoder 109 of the controller 100 is the host I in the conventional controller 2001 shown in FIG. / F2002, the memory 2005, the ECC unit 2006, the encoder 2003, and the decoder 2007 have substantially the same functions and configurations.

  As shown in FIG. 1, in the data storage device of the first embodiment, a power switch (power SW) 121, a first switch (SW1) 122, and a second switch (SW2) 123 provided in the hard disk device 10. Is connected to the controller 100 and is configured to receive a signal indicating the on / off state of each switch. Further, the hard disk device 10 is provided with a light emitting unit 124 constituted by an LED, and is configured to display an erasing operation on the data area of the hard disk 112 as a recording medium. The erasure control unit 102 of the controller 100 is configured to receive a signal indicating an on / off state from the power switch 121, the first switch 122 and the second switch 123, and a command from the host I / F 101. Control is performed based on a selector 107 to which an erase start / end signal 25 as a control signal from the erase control unit 102 is input, a switching signal 26 as control information from the erase control unit 102, and the erase start / end signal 25. A data generation unit 106 is provided to which various control signals (29, 54, 63) generated and output by the unit 103 are input.

  In the data storage device of the first embodiment, a data generation unit 106, a selector 107, and an erasure control unit 102 are provided in the controller 100 so that a recording signal for erasing data on the hard disk 112 can be generated. . The data storage device according to the first embodiment configured as described above can control and manage the hard disk 112, that is, the start and end of erasure of data on the recording medium, and can control the erasure method and the erasure state. It becomes possible to make it easy.

  In the data storage device of the first embodiment, the power switch 121, the first switch 122, the second switch 123, and the erasure that has received the signals 21, 22, 23, and 24 that are erasure command information from the computer 110. The control unit 102 generates an erasure start / end signal 25 that indicates the start or end of recording of erasure recording data and a switching signal 26 that indicates the output format output by the data generation unit 106. When the erasure start / end signal 25 is output from the erasure control unit 102, the data generation unit 106 generates and outputs erasure data 27. At the same time, the selector 107 selects the erasure data 27 from the data generation unit 106, and the light emitting unit 124 is turned on. The erasure data output from the selector 107 is encoded by the encoder 108, sent to the recording unit 111 as erasure recording data 14, and recorded on the hard disk 112. At this time, the area to be erased on the hard disk 112 is designated based on the signal 23 from the second switch 123 or the signal 24 which is erase command information from the computer 110 via the host I / F 101. Is called. When all the designated areas have been recorded with the erasing recording data 14, the erasing start / end signal 25 indicates the end, and the selector 107 selects the data 13 from the memory 104. At this time, the data generation unit 106 stops generating and outputting the erasure recording data 14, and the light emitting unit 124 is turned off.

  FIG. 2 is a block diagram illustrating an example of the data generation unit 106 in the data storage device according to the first embodiment. The data generation unit 106 includes a data generation unit selector 151 that receives three types of values of 0 value, 1 value, and a pseudo random number value, and a pseudo random number generation unit 150 that generates a pseudo random number value. . The data generation unit 106 outputs 0-value, 1-value, or pseudo-random value data using the frame data and its parity data shown in FIG. 21 as data. In response to the switching signal 26 from the erasure control unit 102, the data generation unit selector 151 switches the input and selects data of 0 value, 1 value, or pseudo random number value. The pseudo random number generation unit 150 is configured to receive the pseudo random number load signal 29, the pseudo random number initial value 54, and the pseudo random number clock 63 from the control unit 103 and change the generation pattern format of the pseudo random number value. .

  FIG. 3 is a block diagram showing a specific configuration of the pseudorandom number generator 150. In the data storage device of the first embodiment, the pseudo random number generation unit 150 can be configured by a randomization circuit. FIG. 3 shows an example in which the pseudo random number generator 150 is configured by a randomization circuit. In the pseudo random number generation unit 150, ten flip-flops 153 from X0 to X9 are configured as shift registers, and when the pseudo random number load signal 29 is input, each bit of the pseudo random number initial value signal 54 is input. A value is recorded in each flip-flop 153. When one clock is input as the pseudo random number clock 63, each of the stored values X0 to X8 is stored in X1 to X9, respectively, and at the same time, an exclusive OR (ExOR) of the stored value of X9 and the stored value of X2 ) Is performed by the computing unit 152, and the result is stored in X0. In this way, each time a pseudo random number clock 63 is input, a signal 80 indicating a pseudo random number is output.

  FIG. 4 is a block diagram showing the configuration of the encoder 108 and the decoder 109. As shown in FIG. 4, the encoder 108 receives the output data 84 of the selector 107 that selects either the data 13 from the memory 104 or the data from the data generation unit 106. Data from the selector 107 is input to the scrambler 130 and sent to the modulation unit 131 and the sync insertion unit 132, and the erasure recording data 14 that is block data is output to the recording unit 111. The scrambler 130 receives an initial value load signal 51, a fixed initial value signal 53, and a recording clock 61. A sync insertion signal 50 is input to the sync insertion unit 132. Therefore, as shown in the prior art, the data 13 from the memory 104 can be input to the scrambler and output from the encoder 108 as the erasure recording data 14.

  On the other hand, in the decoder 109, the reproduction data 15 from the reproduction unit 113 is input to the sync detection unit 133 and sent to the demodulation unit 134 and the descrambler 135. Data 16 from the descrambler 135 is output to the memory 104. The descrambler 135 receives an initial value load signal 51, a fixed initial value signal 53, and a reproduction clock 62. A sync detection signal 52 is output from the sync detection unit 133.

FIG. 5 is a block diagram showing a specific configuration of the scrambler 130 in the encoder 108. In the data storage device of the first embodiment, the scrambler 130 and the descrambler 135 can be configured by a similar randomization circuit. Here, the configuration of the scrambler 130 will be described.
FIG. 5 shows an example in which the scrambler 130 is configured by a randomizing circuit. In the scrambler 130, 10 flip-flops 143 from X0 to X9 are configured as shift registers, similar to the above-described pseudorandom number generator 150, and when the initial value load signal 51 is input, a fixed initial value is set. Each bit value of the value signal 53 is recorded in each flip-flop 143. When one clock is input as the recording clock 61, each of the stored values X0 to X8 is stored in X1 to X9, and at the same time, an exclusive OR (ExOR) of the stored value of X9 and the stored value of X2 Is calculated by the calculator 142, and the result is stored in X0. In this way, each time the recording clock 61 is input, data 83 indicating a pseudo random number is input to the ExOR circuit 144. The ExOR circuit 144 generates an exclusive OR of the generated data 83 and the input data 84 and outputs the data 81. The flip-flop 143 as a shift register performs a bit shift operation every time 8-bit input data 84 is input to the randomizing circuit after the initial value is loaded. By changing the initial value set and stored in the shift register, it is possible to generate a pseudo-random number sequence of a different series.

  As described above, the encoder 108 randomizes the data 84 received by the scrambler 130 in accordance with the control signal from the control unit 103, encodes it into a data sequence such that the error rate is reduced by the modulation unit 131, and the sync insertion unit 132. The erasure recording data 14 which is block data to which sync data which is a frame synchronization pattern is added is formed. After the erasure recording data 14 is thus formed, it is transferred to the recording unit 111. The recording unit 111 records the modulated block data string in a specified area on the hard disk 112, whereby the data in that area is completely erased.

  In FIG. 4, the signal 15 read from the hard disk 112 and binarized by the reproduction unit 113 is input to the decoder 109. In the decoder 109, the sync detection unit 133 detects the sync, and the sync detection signal 52 is sent to the control unit 103. The demodulator 134 at the next stage of the sync detector 133 performs the reverse process of the modulator 131 in the encoder 108 and outputs the data to the descrambler 135. The descrambler 135 randomizes the demodulated data in accordance with the initial value load signal 51 from the control unit 103 and outputs it to the memory 104. The descrambler 135 of the decoder 109 has the same configuration as the scrambler 130 of the encoder 108.

  As described above, the scrambler 130 and the descrambler 135 can be configured by a randomization circuit as shown in FIG. 5, and the randomization circuit includes a pseudorandom number generation circuit 141 that generates a pseudorandom number and an ExOR circuit 144. Has been. Here, random data (83) is generated using a 10-bit shift register in which each bit is formed of a flip-flop and ExOR, and exclusive OR with input data (84) is generated and output (81). ing. The shift register performs a bit shift operation every time 8-bit data (recording clock 61) is input to the randomization circuit after a fixed initial value signal is loaded immediately before each block data is scrambled (or descrambled). It is carried out.

  At the time of data reproduction, the ECC unit 105 (corresponding to the ECC unit 2006 in FIG. 19) stores the decoded data 16 output from the decoder 109 for one block data in the memory 104, and stores the frame data and parity. A syndrome calculation unit (corresponding to the syndrome calculation unit 2008 in FIG. 19) reads and calculates and generates an error position and an error correction code. The error correction unit (corresponding to the error correction unit 2009 in FIG. 19) that has received the information (error position and error correction code) reads the data byte corresponding to the error position from the frame data in the memory 104, and corresponding error. After the correction using the correction code, the corrected data byte is written back to the original position on the memory 104 to correct the frame data.

FIG. 6 is a disk erasing flowchart showing a procedure of erasing data on a hard disk as a storage medium (hereinafter simply referred to as “disk erasing”) in the data storage device of the first embodiment. When the power of the hard disk device 10 is turned on (the power switch 121 is turned on, or the hard disk device 10 is connected to the computer 110 by a cable and energized), the disk erasing flow starts.
First, the disc erasure determination flow (S600) is started. The disk erasure determination flow (S600) is processing performed by the erasure control unit 102 and the control unit 103 in the controller 100. Some of specific examples of the determination flow (S600) are shown in FIGS. 7 to 11 and will be described later. In this disc erasure judgment flow (S600), disc erasure judgment and the K value (number of times of erasing recording data 14 to be erased in the target area) used in the subsequent steps are determined. When the disc erasure determination flow (S600) ends, the light emitting unit 124 is turned on (S601), the selector 107 selects the erasure data 27 output from the data generation unit 106 (S602), and the variable n is set to K. The value is stored (S603).

  Next, a 0 value is selected by the data generation unit selector 151 in the data generation unit 106 (S604), and 0 value is recorded as frame data and parity of the area to be erased on the hard disk 112 (S605). When the writing process in step S605 is normally completed, the data generation unit selector 151 selects one value (S607), and records one value as the frame data and parity of the area to be erased on the hard disk 112 (S608). When the write processing in step S608 is normally completed, the data generator selector 151 selects the output of the pseudo random number generator 150 (S610), turns on the pseudo random number generator 150 (S611), and erases the data on the hard disk 112. A pseudo random number value is recorded as the frame data and parity of the area to be processed (S612). When the writing process in step S612 is normally completed, the pseudo random number generation unit 150 is turned off, and a series of disk erasing flows is completed once.

Thereafter, each time a series of disk erasure flows is completed once, the variable n is decremented by 1 (S615), and the series of disk erasure flows is repeated K times (S616).
When the above-described series of disk erasure flows is repeated K times, the light emitting unit 124 is turned off (S617), and all disk erasure operations are completed. At this time, the selector 107 returns to the state of selecting the data 13 from the memory 104.
During the operation of writing the erasure recording data 14 to the hard disk 112, for example, if the recording is not possible in steps S605, S608, and S612, it is detected in steps S618, S619, and S620, and the writing process is forced. To stop. At the same time, the light emitting unit 124 is blinked to notify the outside of the error state.

  In the above-described disk erasing flow, as a series of disk erasing until the variable n is decremented by 1, 0 value recording (S605), 1 value recording (S608), and pseudorandom value recording (S612) in the area to be erased. Although the processing is performed sequentially, the data storage device of the first embodiment is not limited to such a flow. For example, in a series of disk erasure processing operations, only one of the three types of recording operations of 0 value recording, 1 value recording, and pseudorandom value recording may be performed. Alternatively, as the operation of the disk erasing process, for example, two types of processing among the three types of recording operations may be performed so that only zero value recording and one value recording are performed in this order.

Furthermore, when three types of recording operations are performed in a series of disc erasing flows, the order of 0-value recording, 1-value recording, and pseudo-random value recording is not limited to the order shown in the flowchart of FIG. For example, pseudo-random value recording, 1-value recording, and 0-value recording may be performed in this order. Further, when the series of disk erasing flow operations are two types of recording, for example, the order is not limited to the order in which 1-value recording is performed after 0-value recording, but in the order of 0-value recording after 1-value recording. You may go.
Note that it is possible to notify the external computer 110 or the like via the host I / F 101 of the normal end of the disk erasing flow by the light emitting unit 124 and the display of the error state. With this configuration, a plurality of hard disk devices can be managed collectively.

Next, a specific example of the disc erasure determination flow S600 in the disc erasure flow shown in FIG. 6 will be described with reference to FIGS.
FIG. 7 shows an example (S600A) of a disc erasure determination flow S600 performed in the data storage device of the first embodiment. In this determination flow S600A, it is confirmed whether or not a command is received from the host I / F 101 in step S701. If a command has been received, the command is processed (S702). If no command has been received, it is checked whether or not the first switch 122 has changed from the off state to the on state (S703). If the first switch 122 has changed from the OFF state to the ON state, it is determined that the entire hard disk 112 is instructed to be erased, and the K value (the number of times of erasing recording data to be recorded in the target area) is determined. The value of the second switch 123 is adopted as

  In step S703 of the determination flow S600A shown in FIG. 7, it is determined that the entire hard disk is to be erased. However, only a designated area can be erased. In this case, for example, the command received in step S701 includes information related to the designated area of the hard disk to be erased for erasing the disk, and the designated area for erasing the disk is stored in the command processing in step S702. Configure to In step S703, when it is determined that the disk should be erased, the designated area is recognized as an erase target.

Further, in step S704 of the determination flow S600A shown in FIG. 7, the value of the second switch 123 is adopted as the K value. However, the value of the second switch 123 is not only used as the K value but also other data generation. The initial value of the flip-flop 153 that is the shift register of the pseudo random number generation unit 150 in the unit 106 or a numerical value for selecting the timing for loading the initial value into the shift register may be adopted. For example, when the second switch 123 is a 3-bit DIP switch, 2 bits are allocated for selecting an initial value of the shift register and 1 bit is allocated for selecting a timing to be loaded into the shift register. When 2 bits are allocated for selecting an initial value, 4 types of selection can be made with 2 bits. For example, when 2 bits are “00”, the initial value is “11111111111”, when 2 bits is “01”, the initial value is “1001100111”, and when 2 bits are “10”, the initial value is “1100110011”. When the 2 bits are “11”, the initial value is “1010101010”. In addition, when 1 bit is allocated for timing selection to be loaded into the shift register, two selections can be made with 1 bit. For example, when 1 bit is “0”, the timing for loading into the shift register is set immediately before every frame data generation. If 1 bit is “1”, the data is loaded only once in step S601 (lighting of the light emitting unit 124: when the disk erasing operation starts) shown in FIG. 6, and then loaded until normal termination (S617). Do not do.
By performing the disk erasure flow of FIG. 6 using the disk erasure determination flow S600A shown in FIG. 7, the hard disk device according to the operating state of the physical switches (122, 123) provided in the hard disk device 10 in the power-on state. The disk erasing operation can be performed autonomously with only 10.

  FIG. 8 shows another example (S600B) of the disc erasure determination flow S600 performed in the data storage device of the first embodiment. In this determination flow S600B, when it is confirmed in step S801 that the first switch 122 is turned on, it is determined that the entire hard disk 112 is erased, and the value of the second switch 123 is adopted as the K value. (S802). If the first switch 122 is in the OFF state in step S801, the presence / absence of a command is detected in step S803. If there is a command, a predetermined process of the command is executed (S804). If there is no command, then the entire erasure instruction using the first switch 122 is not performed, and the command from the computer 110 is received and only the command is processed (S803, S804).

  By performing the disk erasure flow of FIG. 6 using the disk erasure determination flow S600B shown in FIG. 8, the hard disk device according to the operating state of the physical switches (122, 123) provided in the hard disk device 10 in the power-on state. The disk erasing operation can be performed autonomously with only 10.

FIG. 9 shows still another example (S600C) of the disc erasure determination flow S600 performed in the data storage device of the first embodiment. This determination flow S600C is an example in which a fail safe function is provided. First, in step S901, a command waiting state from the computer 110 is entered. If it is recognized in step S901 that a command other than the disk erasure command has been received from the computer 110, the command is processed through step S904 (S905). When the execution of the command processing is completed, the command wait state is returned again.
If it is recognized in step S901 that the disk erase command has been received, the parameter information (command parameter) transferred accompanying the disk erase command is held, and the process proceeds to the next step S902. In step S902, it is confirmed whether or not the first switch 122 is on. If the first switch 122 is on, it is determined that the entire disk is erased, and parameter information (command parameter) is set to a K value. If the first switch 122 is in the OFF state in step S902, it is determined that the disk erase command itself is invalid without executing the disk erase. At this time, the fact that the disk erase command itself is invalid is transmitted to the computer 110 via the host I / F 101 (S906), and the command wait state is returned again.

In the disk erasure determination flow S600C shown in FIG. 9, if the first switch 122 is in the ON state in step S902, it is determined that the entire disk is erased. However, the disk erasure operation for only the designated area may be performed. It is. For example, the parameter information transferred along with the erasure command includes designated area information to be erased on the hard disk as a part thereof, and the area on the hard disk designated by the designated area information is shown in FIG. The disk erasure process after step S601 in the disk erasure flow shown in FIG.
In the disk erasure determination flow S600C shown in FIG. 9, even if a disk erasure command is accidentally issued from the computer 110, the disk erasure operation is not executed unless the first switch 122 is on. It is possible to provide a highly safe fail-safe function.

  FIG. 10 shows still another example (S600D) of the disc erasure determination flow S600 performed in the data storage device of the first embodiment. Both the power switch 121 and the first switch 122 used in this determination flow S600D are momentary push switches. In this determination flow S600D, only when the first switch 122 or the power switch 121 is pressed again within a predetermined time after the first switch 122 is pressed, the disk erasure process for all data on the hard disk 112 is performed. Is configured to run. With this configuration, it is possible to provide a highly reliable fail-safe function.

  In the determination flow S600D, the FLAG variable is first initialized to 0 (S1001). After the FLAG variable is initialized to 0, a command waiting state from the computer 110 is entered (S1002). If it is recognized in step S1002 that a command has been input, the command is processed (S1010), and the command wait state is again entered (S1002).

  If it is recognized in step S1002 that a command has not been input, the process proceeds to step S1003 to determine whether or not the first switch 122 is pressed. If the first switch 122 is not in the pressed state, the process returns to the command waiting state (S1002) again. If the first switch 122 is in the pressed state, 1 is stored in the FLAG variable (S1004), M (seconds) is set in the timer counter (hereinafter abbreviated as TC) (S1005), and the TC is activated. (S1006). Here, the time M is a fixed value, but may be specified by the second switch 123 or may be specified by information transferred from the computer 110, for example. After the start-up, it is monitored whether TC indicates that M (seconds) has elapsed (S1007), and it is determined whether or not the first switch 122 or the power switch 121 has been pressed before M (seconds) has elapsed. (S1011). If the power switch 121 or the first switch 122 is pressed, the value of the second switch 123 is stored as the variable K (S1012). In this way, the value of the second switch 123 is stored in the variable K, and the disk erasure flow of all data in the hard disk 112 is advanced (flow after step S601 in FIG. 6). If neither the power switch 121 nor the first switch 122 is pressed until M (seconds) elapses, the TC is stopped (S1008). Then, after initializing the FLAG variable to zero, it returns to the command reception waiting state again (S1002).

  Note that TC is provided in the erasure control unit 102. For example, when the TC is set to 10 (seconds) and activated, the TC indicates that 10 seconds have elapsed after 10 seconds from the activation. As described above, the erasure control unit 102 performs the flow shown in FIG. 10, thereby confirming that the first switch 122 is pressed twice within a predetermined time, thereby preventing the erasure operation from being executed easily. Therefore, it is possible to provide a fail-safe function so that the disc erasing operation is not erroneously executed.

FIG. 11 shows still another example (S600E) of the disc erasure determination flow S600 performed in the data storage device of the first embodiment. In this determination flow S600E, the disk erasing operation is performed when the disk erasing command for instructing the disk erasing is simply received from the computer 110.
In the determination flow S600E, a command waiting state from the computer 110 is first entered (S1101). When a command other than the disk erase command is received (S1103), the process is performed (S1104), and the data erase command of the hard disk 112 is received. In this case (S1101), the command parameter added to this disk erase command is stored as a variable K (where variable K means the number of times of erasure recording data to be recorded in the target area). Thereafter (S1102), the disk erasure flow of all data on the hard disk 112 is advanced (flow after step S601 in FIG. 6).

As described above, the erasure control unit 102 and the control unit 103 process the disc erasure determination flow S600E shown in FIG. 11 so that the disc erasure operation can be performed even when a disc erasure command is issued from the outside to the hard disk device 10. It is possible to perform reliably.
In step S1102, the command parameter is stored as the variable K. However, a part of the command parameter is not limited to the number of times of recording for erasing the data to be erased, and the pseudo random number generation circuit 150 in the data generation unit 106 is used. It may be a 10-bit initial value to the shift register (flip-flop 153).
Further, in the disc erasure determination flow S600E shown in FIG. 11, it is determined that the entire disc is erased. In FIG. 6, an area on the hard disk designated by the area information is shown in FIG. 6 in order to erase a specific area on the disc. It is also possible to perform disk erasure processing after step S601.

Further, in the determination flow S600E, the command parameter is added to the disk erase command, but the parameter may be added to a command other than the disk erase command.
The power switch (121) is not necessarily a power switch, and may be a power supply determination unit that can be supplied as an on / off signal (signal 21) indicating whether power is supplied from the outside.
Note that the first switch 122 and the second switch 123 are preferably switches having functions that are difficult to switch as much as possible. For example, a jumper switch, a dip switch, or the like. However, in the disc erasure determination flow S600D shown in FIG. 10, the power switch 121 and the first switch 122 may be momentary switches that can be pushed relatively easily.
The disk erasure determination flow (S600A to S600E) shown in FIGS. 7 to 11 is processed by the erasure control unit 102 and the control unit 103.

  In the first embodiment, the recording unit is the recording unit 111, and the transmission / reception unit is the host interface (host I / F) 101. Further, the control means is composed of an erasure control section 102 and a control section 103, and the erasure data generation means is composed of a data generation section 106 and a selector 107. In the first embodiment, the encoder means is the encoder 108, the scramble means is the scrambler 130, and the modulation means is the modulation unit 131.

<< Embodiment 2 >>
FIG. 12 is a block diagram showing an internal configuration of the data storage device according to the second embodiment of the present invention. In the data storage device of the second embodiment, the configuration of the encoder 108 in the data storage device of the first embodiment is changed, and the data generation unit 106 and the selector 107 are deleted. In the second embodiment, components having the same functions and configurations as those of the data storage device of the first embodiment are denoted by the same reference numerals and description thereof is omitted.

In the data storage device of the second embodiment, the encoder 208 includes a scrambler 211, a modulation unit 212, a sync insertion unit 213, and an initial value generation unit 210. An erasing start / end signal 25 from the erasing control unit 202 is configured to be input to a light emitting unit 124 including a control unit 203, a host I / F 101, and an LED. The erasure control information 28 from the erasure control unit 202 is configured to be input to the initial value generation unit 210 of the encoder 208.
As described above, in the data storage device of the second embodiment, by adding the initial value generation unit 210 that generates the initial value to be loaded to the scrambler 211 to the encoder 208, the data of the hard disk 112 that is a storage medium is stored. A recording signal for erasing can be generated. In the data storage device of the second embodiment, similarly to the first embodiment, a power switch 121, a first switch 122, a second switch 123, a light emitting unit 124, and the like are connected to the controller 200. The erasure control unit 202 is provided, and it is possible to manage and display the erasure start, erasure end, erasure method and erasure state of the data of the hard disk 112 as a storage medium, and the erasure time and erasure method Judgment and control are possible.

  In the data storage device of the second embodiment, the randomization circuit shown in FIG. 5 in the first embodiment is used as the scrambler 211. The initial value generator 210 generates a value to be loaded into the flip-flop 143 (see FIG. 5) that is a shift register in the randomization circuit. However, the initial value generation unit 210 generates only a predetermined fixed initial value in a normal recording operation. The erasure control unit 202 receives the signal 21 from the power switch 121, the signal 22 from the first switch 122, the signal 23 from the second switch 123, and the signal 24 from the computer 110, and based on these information. The erasure start / end signal 25 and the erasure control information 28 relating to the generation format of the initial value output from the initial value generator 210 are output.

  A disk erasing flow in the data storage device of the second embodiment will be described. In the erasure control unit 202, an erasure start / end signal 25 indicating the start or end of recording of the disk erasure data based on information (21, 22, 23, 24) from the switches 121, 122, 123 and the host I / F 101. Is formed. When the erasure start / end signal 25 indicating the start state is formed and inputted to the control unit 203, the initial value generation unit 210 receives the erasure control information 28 relating to the generation format and switches the initial value to be generated. For example, when the erasure control information 28 relating to the generation format is 1-bit data, 1 bit is assigned for sequence selection to be loaded into the shift register, and two types of selection are possible. Specifically, when 1 bit allocated for sequence selection is “0”, the disk erasure process in which the remainder of (m / 4) is 0 with respect to the m-th (m is a positive integer) disk erasure process. , The initial value A “1111111111” is loaded into the shift register in the scrambler 211 before each frame data is input to the scrambler 211. Similarly, in the disk erasing process in which the remainder of (m / 4) is 1, the initial value B “1001100111” is loaded before each frame data is input to the scrambler 211, and the remainder of (m / 4) In the disk erasure process in which 2 is 2, the initial value C “1100110011” is loaded before each frame data is input to the scrambler 211, and in the disk erasure process in which the remainder of (m / 4) is 3, Before each frame data is input to the scrambler 211, the initial value D “1010101010” is loaded, and each frame data is loaded into the shift register in the scrambler 211. That is, after the fifth disk erasing process, the first to fourth cycles are repeated.

  When 1 bit is “1”, four types of initial values “11111111111”, “1001100111”, “1100110011”, “10101101010” are arranged in this order before each frame data is input to the scrambler 211. , Repeatedly loaded into the shift register. That is, the initial value “1111111111” is loaded into the shift register before the first frame is scrambled, the initial value “1001100111” is loaded before the second frame is scrambled, and the initial value “1001100111” is scrambled before the third frame is scrambled. 1100110011 ”, and the initial value“ 1010101010 ”is loaded before the fourth frame is scrambled. Each shift register is repeatedly loaded. After the fifth frame, the cycle from the first to the fourth frame is repeated until the disk erasing operation is completed.

  When the erase start / end signal 25 indicating the start or end of recording of the disk erase data indicates the start state, the light emitting unit 124 is turned on, and the initial value generation unit 210 is set to the initial value specified in the shift register in the scrambler 211 Is loaded for each frame input, the frame data area in the memory 104 and the data in the parity data area are sequentially read by the scrambler 211, and the data 83 (see FIG. 5) for each input data 84 (see FIG. 5) as byte data. Output data 81 (see FIG. 5), which is an exclusive OR with (5), is output to the modulation unit 212. Next, the code is converted in the modulation unit 212, and the disc erasure recording data 14 is formed in the sync insertion unit 213. The recording data 14 is sent to the recording unit 111 and recorded on the hard disk 112. At this time, the area to be erased on the hard disk 112 is designated by information from the second switch 123 (signal 23) or information from the computer 110 via the host I / F 101 (data 24). When all the designated areas have been recorded with the disk erase data, the erase start / end signal 25 indicates the end state, the scrambler 211 is stopped, and the light emitting unit 124 is turned off.

  The data in a certain frame data area and parity data area in the memory 104 may be only for one block, and may be prepared as a specific value or may be an arbitrary value. Further, the frame data and the parity data may be those transferred to the memory 104 by the external computer 110, or (specific) values of the memory when the power is on may be used. Further, the parity data may be configured by the ECC unit 105 from frame data, or a (specific) value of the memory when the power is on may be used.

FIG. 13 is a disk erasing flowchart showing a procedure of erasing (disk erasing) data of the hard disk 112 as a storage medium in the data storage device of the second embodiment. As shown in FIG. 13, when the power of the hard disk device 20 is turned on (the power switch 121 is turned on, or the hard disk device 20 is connected to the computer 110 by a cable and is energized), the disk erasing flow starts.
First, the disc erasure determination flow (S600) is started. The disc erasure determination flow (S600) is processing performed by the erasure control unit 202 and the control unit 203 in the controller 200. In this determination flow (S600), the determination flow shown in FIGS. 7 to 11 described in the first embodiment is performed. In this determination flow (S600), information (1) indicating whether or not to erase the disk, the K value that is the number of times of data recording for erasing the target area, and the generation format required by the initial value generation unit 210 Bit) is determined.
As shown in the flowchart of FIG. 13, when it is determined that the disk is to be erased, the light emitting unit 124 is turned on (S1601), the initial value generating unit 210 receives the generation format information (1 bit) (S1602), and the variable m is stored as 1 (S1603).

In the following description, only the case where the generation format information (1 bit) is 0 will be described.
In steps subsequent to step S1603, a series of disk erasures are repeated a predetermined number of times (K times) while incrementing the variable m by 1 each time disk erasure is performed once (S1613, S1614). Here, a case where K is 5 will be described as an example.
First, in step S1604, when the variable m = 1, the remainder of m / 4 becomes 1, and “1001100111” is shifted in the scrambler 211 as the initial value B before each frame data is randomized by the scrambler 211. Load into register. After that, recording data for erasure is recorded on the hard disk 112 while performing the randomizing process on the corresponding frame data and parity data (S1607). If it is determined in step S1608 that the recording has been completed normally, the variable m is incremented by 1 to m = 2 (S1613), and the variable m (= 2) is compared with a predetermined number K (= 5) ( S1614). In step S1614, since the variable m is equal to or less than the predetermined number K, the process returns to step S1604 again.

  Next, when the variable m = 2, the remainder of m / 4 is 2 (S1604), and recording is performed on the hard disk 112 while performing randomization processing using “1100110011” as the initial value C in step S1609. If it is determined in step S1610 that the recording has been completed normally, the variable m is incremented by 1 to m = 3 (S1613), and the variable m (= 3) is compared with a predetermined number K (= 5) ( S1614). In step S1614, since the variable m is equal to or less than the predetermined number K, the process returns to step S1604 again.

  Next, when the variable m = 3, the remainder of m / 4 is 3 (S1604), and recording is performed on the hard disk 112 while performing randomization processing using “1010101010” as the initial value D in step S1611. If it is determined in step S1612 that the recording has been completed normally, the variable m is incremented by 1 to m = 4 (S1613), and the variable m (= 4) is compared with a predetermined number of times K (= 5) ( S1614). In step S1614, since the variable m is equal to or less than the predetermined number K, the process returns to step S1604 again.

  Next, when the variable m = 4, the remainder of m / 4 becomes 0 (S1604), and recording is performed on the hard disk 112 while performing randomization processing using “1111111111” as the initial value A in step S1605. If it is determined in step S1606 that the recording has been completed normally, the variable m is incremented by 1 to m = 5 (S1613), and the variable m (= 5) is compared with a predetermined number K (= 5) ( S1614). In step S1614, since the variable m is equal to or less than the predetermined number K, the process returns to step S1604 again.

  When the variable m = 5, the remainder of m / 4 is 1 (S1604), and recording is performed on the hard disk 112 while performing randomization processing using “1001100111” as the initial value B in step S1607. If it is determined in step S1608 that the recording has been completed normally, the variable m is incremented by 1 to m = 6 (S1613), and the variable m (= 6) is compared with a predetermined number of times K (= 5) ( S1614). In step S1614, since the variable m exceeds the predetermined number K, the process proceeds to step S1615, the light emitting unit 124 is turned off (S1615), and all disk erasing operations are terminated.

In the above-described disk erasing operation, if the recording data for erasure to the hard disk 112 is being written (S1605, S1607, S1609, S1611) and the recording becomes impossible, the respective steps (S1616, S1617, S1618) are performed. In S1619), the recording operation is forcibly stopped (S1620), and the light emitting unit 124 is caused to blink (S1621). In this way, by flashing the light emitting unit 124 that is an LED, it is reliably notified to the outside that an error state has occurred.
As a method for displaying the normal end or error state by the light emitting unit 124, a method of notifying the external computer 110 via the host I / F 101 may be employed.
Note that the determination flow shown in FIGS. 7 to 11 is used for the disk erasure determination flow (S600) in the second embodiment. In these determination flows, the erasure control unit 202 performs the initial value generation unit 210. In the above description, the 1-bit information is transferred as the erasure control information 28 relating to the generation format. However, the present invention is not limited to such a configuration. For example, the 1-bit information may be information from the second switch 123 (signal 23), or may be based on information (data 24) received from the computer 110.
In the second embodiment, the configuration in which the initial value generation unit 210 generates four types of initial values has been described. However, the present invention is not limited to such a configuration, and random numbers may be generated.

  In the second embodiment, the recording means is the recording unit 111 and the transmission / reception means is the host interface (host I / F) 101 as in the first embodiment. Further, the control means is composed of an erasure control section 202 and a control section 203, and the erasure data generation means is composed of an initial value generation section 210 and a scrambler 211. In the second embodiment, the encoder means is the encoder 208, and the modulation means is the modulation unit 212.

<< Embodiment 3 >>
FIG. 14 is a block diagram showing an internal configuration of the data storage device according to the third embodiment of the present invention. In the data storage device of the third embodiment, the configuration of the ECC unit 105 in the data storage device of the first embodiment is changed, and the data generation unit 106 and the selector 107 are deleted. In the third embodiment, components having the same functions and configurations as those of the data storage device of the first embodiment are denoted by the same reference numerals and description thereof is omitted.

  In the data storage device according to the third embodiment, in addition to the syndrome calculation unit 310 and the error correction unit 311, the ECC unit 305 includes a parity generation unit 312, and a logic inversion unit 314 that logically inverts an output value with respect to an input value. A selector 313 that selects and outputs either the input from the parity generation unit 312 or the input from the logic inversion unit 314 is provided. By configuring the ECC unit 305 in this way, it is possible to generate recording data for erasing data in the storage medium.

The data storage device of the third embodiment is configured to connect the power switch 121, the first switch 122, the second switch 123, and the light emitting unit 124 to the controller 300 as in the first and second embodiments. In addition, an erasure control unit 302 is provided to manage and control erasure start, erasure end, erasure method, and erasure state of data on the storage medium. In the data storage device of the third embodiment, the erasure control unit 302 uses the signal 21 from the power switch 121, the signal 22 from the first switch 122, the signal 23 from the second switch 123, and the host I / F 101. Based on the data 24 from the computer 110, an erase start / end signal 25 indicating the start or end of writing (erasure recording) of record data for erasure to the recording medium is output to the control unit 303 and the selector 303 of the ECC unit 305. To do.
In the data storage device of the third embodiment, the K value used in the second embodiment is not used. That is, the third embodiment is not configured to repeat the disk erasing operation a predetermined number of times.

FIG. 15 is a disk erasing flowchart showing a procedure for erasing (disk erasing) data of the hard disk 112 as a storage medium in the data storage device of the third embodiment. As shown in FIG. 15, when the power of the hard disk device 30 is turned on (the power switch 121 is turned on, or the hard disk device 30 is connected to the computer 110 by a cable and energized), the disk erasing flow starts.
First, the disc erasure determination flow (S600) is started. The disc erasure determination flow (S600) is processing performed by the erasure control unit 302 and the control unit 303 in the controller 300. In this determination flow (S600), the determination flow shown in FIGS. 7 to 11 described in the first embodiment is performed.

  When the erase control unit 302 outputs an erase start / end signal 25 indicating the start or end of erase recording, the light emitting unit 124 is turned on, and the selector 313 selects an input from the logic inversion unit 314 (S1702). Frame data in a predetermined storage area in the memory 104 is read in units of 1 byte by the parity generation unit 312 to generate parity data. The parity data is inverted one bit at a time by the logic inversion unit 314 to generate parity inversion data. The parity inversion data generated in this way is stored in the parity storage area in the memory 104 via the selector 313 (S1703).

  Next, in step S1704, frame data and parity inversion data are transferred from the memory 104 to the encoder 108, respectively. Subsequently, the encoded recording data 14 as erasure block data is sent to the recording unit 111 and recorded on the hard disk 112 (S1705).

  If it is determined in step S1706 that all of the block data to be recorded has not yet been recorded, steps S1704 and S1705 are repeated unless there is a recording error in step S1709. When erasure recording of all block data to be recorded is completed (S1706), the erasure start / end signal 25 indicates the end, the selector 313 selects and outputs the input from the parity generation unit 312, and the light emitting unit 124 is turned off. To do.

In the data storage device of the third embodiment, the designation of the area to be erased on the hard disk (the recording start block data position and the number of block data to be erased) is determined by the second switch 123 or the host I / F 101. This is done in advance by the data 24 from the computer 110. The designation of the area to be erased on the hard disk 112 includes designation of the entire area of the hard disk 112.
If the recording data for erasure cannot be recorded during the disk erasing operation to the hard disk 112 (S1705), the recording operation is forcibly stopped (S1710) and the light emitting unit 124 is blinked (S1711). ). As described above, by blinking the light emitting unit 124, it is possible to notify the outside that the data storage device is in an error state.
The data in a certain frame data area in the memory 104 may be only for one frame, may be prepared in advance as a specific value, or may be an arbitrary value. The data in the frame data area may be data transferred to the memory 104 by the external computer 110. The frame data may use a (specific) value of the memory when the power is on.

Further, the frame data to be subjected to the parity calculation performed in step S1703 shown in FIG. For example, three types of frame data X, Y, and Z are prepared on the memory 104, and in step S1703, parity inversion data XP, YP, and ZP corresponding to each frame data are stored in a parity storage area in the memory. In addition, “X, XP”, “Y, YP”, “Z, ZP”, “X, XP”, “Y, YP”, “Z, ZP”, etc. for each series of processing in step S 1704 and step S 1705. It is also possible to repeat the above and transfer and record from the memory 104 to the encoder 108.
In the third embodiment, the normal termination and error state display by the light emitting unit 124 may be notified to the external computer 110 via the host I / F 101.

  In the third embodiment, the recording unit is the recording unit 111 and the transmission / reception unit is the host interface (host I / F) 101 as in the first embodiment. Further, the control means is composed of an erasure control section 302 and a control section 303, and the erasure data generation means is composed of a logic inversion section 314 and a selector 313. In the third embodiment, the encoder means is the encoder 108. Further, the parity generation unit is the parity generation unit 312 and the signal conversion unit is the logic inversion unit 314.

  As described above, in the description of the data storage device according to the present invention, the preferred embodiment has been described based on the three embodiments. For example, the first embodiment and the embodiment shown in FIG. The controller 400 using both configurations of the form 2 may be used. In the controller 400 shown in FIG. 16, the data generation unit 106, the selector 107, and the erasure control unit 402 are provided as in the first embodiment, and the power switch 121, the first switch 122, and the second switch are provided. 123 is connected. In the controller 400 shown in FIG. 16, the encoder 208 includes a scrambler 211, a modulation unit 212, a sync insertion unit 213, and an initial value generation unit 210, as in the second embodiment. The data storage device configured in this way can reliably erase all or part of the data of the hard disk itself, not only by an instruction from the external device, but also by the power state of the hard disk device and physical switch. .

  Moreover, the controller 500 using the structure of both Embodiment 2 and Embodiment 3 as shown in FIG. 17 may be sufficient. In the controller 500 shown in FIG. 17, the encoder 209 includes a scrambler 211, a modulation unit 212, a sync insertion unit 213, and an initial value generation unit 210, as in the second embodiment. The ECC unit 305 illustrated in FIG. 17 includes a syndrome calculation unit 310, an error correction unit 311, a parity generation unit 312, a logical inversion unit 314, and a selector 313, as in the third embodiment. The data storage device configured in this way can reliably erase all or part of the data of the hard disk itself, not only by an instruction from the external device, but also by the power state of the hard disk device and physical switch. .

In each of the above-described embodiments, the external computer 110 may be a personal computer, and is not limited to a computer but may be an external device.
In the above-described embodiment, the case where the data storage device is a hard disk device has been described. However, the present invention is not limited to this, and for example, a flexible disk, an optical disk device such as a CD / DVD, a memory card, etc. Needless to say, the present invention can be applied to any data storage device capable of storing data electrically, optically, and electrically.

  The data storage device according to the present invention is configured to autonomously erase all or part of the data on the storage medium, thereby reducing the time and cost required for complete or partial erasure, and measures against erroneous erasure. And is useful as a data storage device such as a hard disk device, a flexible disk device, an optical disk device, and a memory card device.

It is a block diagram which shows the internal structure of the data storage device of Embodiment 1 which concerns on this invention. 3 is a block diagram illustrating an example of a data generation unit 106 in the data storage device of Embodiment 1. FIG. 3 is a block diagram showing a specific configuration of a pseudorandom number generator 150 in the data storage device of Embodiment 1. FIG. 3 is a block diagram showing configurations of an encoder 108 and a decoder 109 in the data storage device of the first embodiment. FIG. 2 is a block diagram showing a configuration of a scrambler 130 in the data storage device of Embodiment 1. FIG. 3 is a flowchart showing a disk erasing flow in the data storage device of the first embodiment. 6 is a flowchart showing an example (S600A) of a disc erasure determination flow S600 in the data storage device of the first embodiment. 6 is a flowchart showing an example (S600B) of a disc erasure determination flow S600 in the data storage device of the first embodiment. 6 is a flowchart showing an example (S600C) of a disc erasure determination flow S600 in the data storage device of the first embodiment. 6 is a flowchart showing an example (S600D) of a disc erasure determination flow S600 in the data storage device of the first embodiment. 6 is a flowchart showing an example (S600E) of a disc erasure determination flow S600 in the data storage device of the first embodiment. It is a block diagram which shows the internal structure of the data storage device of Embodiment 2 which concerns on this invention. 6 is a flowchart showing a disk erasing flow in the data storage device of the second embodiment. It is a block diagram which shows the internal structure of the data storage device of Embodiment 3 which concerns on this invention. 10 is a flowchart showing a disk erasing flow in the data storage device of the third embodiment. It is a block diagram which shows the controller of another structure of the data storage device which concerns on this invention. It is a block diagram which shows the controller of another structure of the data storage device which concerns on this invention. It is a block diagram which shows the internal structure of the conventional hard disk drive. It is a block diagram which shows the structure of the ECC part in the conventional hard disk drive. It is a block diagram which shows the structure of the encoder and decoder in the conventional hard disk drive. It is a conceptual diagram of frame data and parity recorded in a memory in a hard disk device, and block data output from an encoder.

Explanation of symbols

10, 20, 30 Hard disk device 25 Erase start / end signal 26 Switching signal 29 Load signal for pseudo random number 50 Sync insertion signal 51 Initial value load signal 52 Sync detection signal 53 Fixed initial value signal 54 Initial value signal for pseudo random number 61 For recording Clock 62 Reproduction clock 63 Pseudo random number clock 100, 200, 300, 400, 500 Controller 101 Host I / F
102, 202, 302, 402, 502 Erase control units 103, 203, 303, 403, 503 Control unit 104 Memory 105, 305 ECC unit 106 Data generation unit 107 Selector 108, 208 Encoder 109 Decoder 110 Personal computer 111 Recording unit 112 Hard disk 113 playback unit 121 power switch 122 first physical switch 123 second physical switch 124 light emitting units 130, 211 scramblers 131, 212 modulation units 132, 213 sync insertion unit 133 sync detection unit 134 demodulation unit 135 descrambler 141 , 150 Pseudorandom number generator 151 Data generator selector 142, 152 Calculators 143, 153 Flip-flop 210 Initial value generator 310 Syndrome calculator 311 Error correction unit 312 Parity Generator 313 selector 314 logical inversion unit

Claims (27)

Storage medium on which data is recorded,
Recording means for recording data on the storage medium;
A transmission / reception means for transmitting / receiving information to / from the outside;
A first physical switching means capable of designating an on or off state;
Control means for determining whether to erase data recorded on the storage medium based on information indicating the power supply state and the state of the first physical switching means, or information from the outside, and from the control means Erasure data generation means for forming erasure recording data based on the information of
Comprising
A data storage device configured to write the erasure recording data in a predetermined area of the corresponding storage medium when the control means determines to delete data in the predetermined area of the storage medium. It further comprises encoder means for encoding the input data and outputting it to the recording means,
2. The data storage according to claim 1, wherein when the control means determines to delete data in a predetermined area of the storage medium, the output of the deletion data generation means is input to the encoder means and written to the predetermined area of the storage medium. apparatus. Scramble means for performing a predetermined logical operation on information from the outside acquired via the transmission / reception means and the output of the linear feedback shift register;
An encoder means having a modulating means for converting the output of the scramble means according to a predetermined rule, and outputting it;
When the control means determines to erase the data in a predetermined area of the storage medium, the control means generates an initial value of the linear feedback shift register, stores the initial value in the linear feedback shift register, and stores the storage medium. 2. The data storage device according to claim 1, wherein the linear feedback shift register is driven in synchronization with a data recording clock to write data, and an output of the encoder means is written in a predetermined area of the storage medium. Parity generating means for dividing information from outside into frames of a predetermined number of bytes and generating parity that enables error correction and detection of the frame;
Signal conversion means for performing a predetermined operation on the output of the parity generation means;
Encoder means for performing a predetermined encoding on a data string obtained by combining a frame and a parity;
When the control means determines to erase the data in the predetermined area of the storage medium, the output of the signal conversion means is combined with the frame and input to the encoding means, and the output of the encoder means is written to the predetermined area of the storage medium The data storage device according to claim 1 configured as described above. Parity generating means for dividing information from outside into frames of a predetermined number of bytes and generating parity that enables error correction and detection of the frame;
Signal conversion means for performing a predetermined operation on the output of the parity generation means;
Encoder means for predetermined encoding of a data string obtained by combining a frame and a parity;
The encoder means scramble means for performing a predetermined logical operation on the data string obtained by combining the frame and the parity and the output of the linear feedback shift register;
Modulation means for converting the output of the scramble means according to a predetermined rule and outputting the data,
When the control means determines to erase the data in the predetermined area of the storage medium, the output of the signal conversion means is combined with the frame and input to the scramble means, and the initial value generated by the control means is input to the linear feedback shift register. The data storage device according to claim 1, wherein the data storage device is configured to store the generated output of the signal conversion means in a predetermined area of the storage medium. The data storage device according to claim 1 or 2, wherein the erasure data generation means is configured to generate a predetermined fixed value or a predetermined random value. The erasure data generation means comprises means for designating the number of times recording data for erasure is recorded in a predetermined area of the storage medium or the output format of the erasure data generation means for each recording,
7. The data according to claim 1, wherein the erasure data generation means is configured to output erasure recording data to be recorded on the storage medium in accordance with a designation from the control means. Storage device. 8. The data storage device according to claim 7, wherein the control means outputs erasure recording data to be recorded on a storage medium from the erasure data generation means based on information from the outside. The data storage device according to claim 7, further comprising second physical switching means, configured to output erasure recording data to be recorded on a storage medium based on information from the second physical switching means. 6. The data storage device according to claim 3, wherein the control unit is configured to change the initial value every time a predetermined amount of data as a recording unit to the storage medium is input to the scramble unit. 11. The data storage device according to claim 3, wherein the control means is configured to generate an arbitrary random number as an initial value. The control means includes means for designating the number of times of recording in a predetermined area of the storage medium, or the timing for generating and outputting an initial value for each recording,
The erasure data generation means is configured to output erasure recording data to be recorded on the storage medium in accordance with a designation from the control means. A data storage device according to item. 13. The data storage device according to claim 12, wherein the control means is configured to output erasure recording data to be recorded on the storage medium in accordance with information from the outside. 13. The data storage device according to claim 12, wherein the control means is configured to output erasure recording data to be recorded on the storage medium in accordance with information from the second physical switching means. When the first physical switching means is constituted by a first switch, and the first physical switch transits from an off state to an on state, the control means determines to erase data in a predetermined area of the storage medium; The data storage device according to any one of claims 1 to 14, wherein the data storage device is configured to write erasure recording data in the predetermined area of the storage medium. When the first physical switching unit is in the on state when the power supply unit for operating the data storage device transitions from the off state to the on state,
The data according to any one of claims 1 to 14, wherein the control means determines that the data in a predetermined area of the storage medium is to be erased and writes the erasure recording data in the predetermined area of the storage medium. Storage device. When the transmission / reception means receives an instruction to erase the predetermined area data of the storage medium from the outside, if the first physical switching means is in the ON state, the control means determines to delete the data in the predetermined area of the storage medium, The data storage device according to any one of claims 1 to 14, wherein the data storage device is configured to write recording data for erasure in the predetermined area of the storage medium. In the power supply state for operating the data storage device, or the power supply means is on,
When the first physical switching unit or the power supply unit is operated again within a predetermined time after the first physical switching unit is operated, the control unit erases data in a predetermined area of the storage medium. Judgment
When the first physical switching unit or the power supply unit is not operated again within a predetermined time after the first physical switching unit is operated, the first physical switching unit is operated. The data storage device according to any one of claims 1 to 14, wherein the data storage device is configured to delete the history. When an instruction to erase data in a predetermined area of the storage medium is received from the outside, the control unit determines that the data in the predetermined area of the storage medium is to be erased, and writes the erasure recording data in the predetermined area of the storage medium The data storage device according to any one of claims 1 to 14, wherein the data storage device is configured. The data storage device according to any one of claims 1 to 19, further comprising display means for indicating to the outside that recording data for erasure is written in a predetermined area of the storage medium. The data storage device according to claim 20, wherein the display means is configured to be able to transmit predetermined data to the outside. 21. The data storage device according to claim 20, wherein the display means is composed of a light source such as an LED. 21. The data storage device according to claim 1, wherein the display unit includes an end display unit that indicates the end of recording of the erasure recording data in a predetermined area of the storage medium. The data storage device according to claim 23, wherein the end display means is configured to transmit predetermined data to the outside. The data storage device according to claim 23, wherein the display means comprises a light source such as an LED. The data storage device according to any one of claims 1 to 25, wherein the storage medium is a magnetic disk, a magnetic tape, an optical disk, or a semiconductor memory. 27. The data storage device according to any one of claims 1 to 26, wherein the predetermined area to be erased in the storage medium is the entire area of the storage medium.

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