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JP2001203374A - Non-single-crystal thin-film solar cell and method for manufacturing the same - Google Patents

Non-single-crystal thin-film solar cell and method for manufacturing the same

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Publication number
JP2001203374A
JP2001203374A JP2000013122A JP2000013122A JP2001203374A JP 2001203374 A JP2001203374 A JP 2001203374A JP 2000013122 A JP2000013122 A JP 2000013122A JP 2000013122 A JP2000013122 A JP 2000013122A JP 2001203374 A JP2001203374 A JP 2001203374A
Authority
JP
Japan
Prior art keywords
film
semiconductor layer
amorphous
solar cell
type semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000013122A
Other languages
Japanese (ja)
Inventor
Toshiaki Sasaki
敏明 佐々木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Corporate Research and Development Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Corporate Research and Development Ltd filed Critical Fuji Electric Corporate Research and Development Ltd
Priority to JP2000013122A priority Critical patent/JP2001203374A/en
Publication of JP2001203374A publication Critical patent/JP2001203374A/en
Pending legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/545Microcrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells

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  • Photovoltaic Devices (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、非晶質シリコン
系膜を主材料としたpin接合構造を有する非単結晶薄
膜太陽電池およびその製造方法に関する。
The present invention relates to a non-single-crystal thin-film solar cell having a pin junction structure mainly composed of an amorphous silicon-based film and a method of manufacturing the same.

【0002】[0002]

【従来の技術】非単結晶薄膜を用いた非単結晶薄膜太陽
電池、特にシリコン系の非晶質薄膜であるアモルファス
シリコン(以下a-Siと記す)、微結晶相を含んだ非晶質
シリコン(以下μc-Siと記す)、薄膜多結晶シリコン等
の非単結晶薄膜を主材料としたpin接合構造を有する
非単結晶薄膜太陽電池は、単結晶シリコンの太陽電池と
比較して、大面積に、低温で、安価に作成できることか
ら、電力用の大面積薄膜太陽電池として期待されてい
る。
2. Description of the Related Art Non-single-crystal thin-film solar cells using non-single-crystal thin films, especially amorphous silicon (hereinafter a-Si), which is a silicon-based amorphous thin film, and amorphous silicon containing a microcrystalline phase A non-single-crystal thin-film solar cell having a pin junction structure mainly composed of a non-single-crystal thin film such as a thin-film polycrystalline silicon (hereinafter referred to as μc-Si) has a larger area than a single-crystal silicon solar cell. In addition, since it can be manufactured at low temperature and at low cost, it is expected as a large-area thin-film solar cell for electric power.

【0003】非単結晶太陽電池の効率向上のために、p
in型太陽電池のドープ層であるp型半導体層(以下p
層と略す)、n型半導体層(以下n層と略す)の材料と
して、μc-Siを適用した例が報告されている。μc-Siを
光入射側のp層もしくはn層に用いることによって、光
吸収損の低減による短絡電流密度(以下Jsc と記す)の
増加、拡散電位の増加による開放電圧(以下Voc と記
す)の増加が図られる。一方、光入射と反対側のp層も
しくはn層に用いることによって、拡散電位の増加によ
るVocの増加、下地電極との接触抵抗の低減による曲線
因子(以下FFと記す)、Jscの増加が図られる。また、
2層以上積層した場合のトンネル接合層として、FF、Js
cの増加が図られる。
In order to improve the efficiency of non-single-crystal solar cells, p
A p-type semiconductor layer (hereinafter referred to as p-type) which is a doped layer of an in-type solar cell.
An example in which μc-Si is applied as a material for an n-type semiconductor layer (hereinafter abbreviated as an n-layer) has been reported. By using μc-Si for the p-layer or n-layer on the light incident side, the short-circuit current density (hereinafter, referred to as Jsc) is increased by reducing the light absorption loss, and the open-circuit voltage (hereinafter, referred to as Voc) is increased by increasing the diffusion potential. Increase is achieved. On the other hand, by using the p-layer or the n-layer on the side opposite to light incidence, increase in Voc due to increase in diffusion potential, fill factor (hereinafter referred to as FF) due to decrease in contact resistance with the underlying electrode, and increase in Jsc can be seen. Can be Also,
FF, Js as tunnel junction layers when two or more layers are stacked
c is increased.

【0004】[0004]

【発明が解決しようとする課題】しかし、μc-Si層の作
製条件によっては、実際には製膜初期にa-Siが形成され
る問題がある。この非晶質膜が形成されると、活性化エ
ネルギーが低いためにVocが低下するとともに、吸収係
数が大きいためJscが低下する問題がある。また、導電
率が低いために抵抗損失が大きくなり、FF、Jscが低下
する。また、この非晶質膜とi型半導体層(以下i層と
略す)との界面の欠陥密度が高くなり、セルの特性が低
下する。
However, depending on the preparation conditions of the μc-Si layer, there is a problem that a-Si is actually formed at an early stage of film formation. When this amorphous film is formed, there is a problem that Voc decreases due to low activation energy and Jsc decreases due to a large absorption coefficient. Further, since the conductivity is low, the resistance loss increases, and FF and Jsc decrease. In addition, the defect density at the interface between the amorphous film and the i-type semiconductor layer (hereinafter abbreviated as i-layer) increases, and the characteristics of the cell deteriorate.

【0005】i層上の製膜初期の非晶質膜を抑制し、始
めから微結晶を含んだ膜を作成する試みとして、μc 膜
製膜前のi層表面の水素プラズマによる処理が行われて
いるが、確かな効果はいまだに確認されていない。ま
た、Pellatonらはa-Siのi層上の二酸化炭素(以下CO
2 と記す)プラズマによる処理により、タンデムセルの
トンネル接合層を目的としたn型μc-Siが10nm以下の
膜厚で形成可能と報告している。(N. Pellaton Vaouch
er, B. Rech,D. Fischer, S. Dubail, M. Goetz, H. Ke
ppner, C. Beneking, O. Hadjadj, V. Shkllover and
A. Shah, Technical Digest of 9th Int. Photovoltaic
Science and Engineering Conf., Miyazaki, Nov. 11-
15, 1996, pp.651) 。しかし、作成法上、CO2 プラズ
マで界面に形成される層の組成、膜厚等の制御が困難で
あり、制御性、再現性に問題があるし、下地のa-Si層に
ダメージがある問題がある。また、p型のμc 膜への適
用の可否は何ら示されていない。
[0005] As an attempt to suppress the amorphous film in the initial stage of film formation on the i-layer and to form a film containing microcrystals from the beginning, the surface of the i-layer before the μc film is formed is treated with hydrogen plasma. However, a certain effect has not yet been confirmed. Further, Pellaton et al. (Hereinafter referred to as CO2) on the a-Si i-layer.
The 2 and referred) treatment by plasma, n-type [mu] c-Si for the purpose of tunnel junction layers of the tandem cell is reported that can be formed by the following film thickness 10 nm. (N. Pellaton Vaouch
er, B. Rech, D. Fischer, S. Dubail, M. Goetz, H. Ke
ppner, C. Beneking, O. Hadjadj, V. Shkllover and
A. Shah, Technical Digest of 9th Int. Photovoltaic
Science and Engineering Conf., Miyazaki, Nov. 11-
15, 1996, pp.651). However, it is difficult to control the composition and thickness of the layer formed at the interface by the CO 2 plasma due to the preparation method, which causes problems in controllability and reproducibility, and damages the underlying a-Si layer. There's a problem. In addition, it does not disclose any applicability to a p-type μc film.

【0006】発明者らは、p層にμc-Siを適用し、p層
とi層との界面にアモルファスシリコンオキサイド(以
下a-SiO と記す)のp/i界面層を10ないし20nmの
厚さ設けたpin型セルの構成で、μc-Siを85℃前後
の低温で作成することにより、製膜初期の非晶質層の形
成を抑制でき、Vocがp層にa-SiOを用いた場合よりも向
上することを報告している。(T. Sasaki, S. Fujikak
e, K.Tabuchi, T. Yoshida, T. Hama, H. Sakai and Y.
Ichikawa, J. Non-Cryst. Solids, 1999, to be publi
shed; T. Sasaki, S. Fujikake, K.Tabuchi, T. Yoshid
a, T. Hama, H.Sakai and Y. Ichikawa, Tech. Digest
of 11th Int. Photovoltaic Science and Engineering
Conf., Sapporo, Japan, Sep. 20-24, 1999, to be pub
lished)しかし、p層にa-SiOを用いた場合に比べて、F
F、Jscが低くなってしまい、総合的にセル効率の向上に
は結びつかなかった。
The inventors applied μc-Si to the p-layer, and formed an amorphous silicon oxide (hereinafter a-SiO) p / i interface layer having a thickness of 10 to 20 nm at the interface between the p-layer and the i-layer. By forming μc-Si at a low temperature of about 85 ° C. in the configuration of the pin type cell provided, the formation of the amorphous layer in the initial stage of film formation can be suppressed, and Voc uses a-SiO for the p layer. Report that it is better than if. (T. Sasaki, S. Fujikak
e, K. Tabuchi, T. Yoshida, T. Hama, H. Sakai and Y.
Ichikawa, J. Non-Cryst. Solids, 1999, to be publi
shed; T. Sasaki, S. Fujikake, K. Tabuchi, T. Yoshid
a, T. Hama, H. Sakai and Y. Ichikawa, Tech. Digest
of 11th Int. Photovoltaic Science and Engineering
Conf., Sapporo, Japan, Sep. 20-24, 1999, to be pub
However, compared to the case where a-SiO is used for the p layer, F
F and Jsc were low, and did not lead to an overall improvement in cell efficiency.

【0007】本発明の目的は、製膜初期の非晶質膜形成
を抑制しつつ、FF、Jsc等の特性を低下させず、総合的
にセル効率の向上が図れる非単結晶薄膜太陽電池および
その製造方法を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a non-single-crystal thin-film solar cell which can improve the cell efficiency comprehensively while suppressing the formation of an amorphous film at the initial stage of film formation, without deteriorating characteristics such as FF and Jsc. It is to provide a manufacturing method thereof.

【0008】[0008]

【課題を解決するための手段】上記の課題解決のため本
発明は、非単結晶薄膜からなる、p層、実質的に真性な
i層、n層を積層したpin接合を少なくとも一つ有す
る非単結晶薄膜太陽電池において、少なくとも一つのp
in接合のp層あるいはn層がμc 膜からなり、そのμ
c 膜の層と非晶質膜からなるi層との間に、1ないし8
nmの厚さのa-SiO の界面層を有するものとする。
In order to solve the above-mentioned problems, the present invention provides a non-single-crystal thin film having at least one pin junction formed by laminating a p-layer, a substantially intrinsic i-layer, and an n-layer. In a single crystal thin film solar cell, at least one p
The in-junction p-layer or n-layer is composed of a μc film,
1 to 8 between the film layer and the i-layer made of an amorphous film.
It has an a-SiO 2 interface layer with a thickness of nm.

【0009】プラズマCVD法、熱CVD法、光CVD
法等でμc 膜、例えばμc-Si膜を作成するときは、原料
ガスの水素化珪素を水素で希釈する。水素原子は製膜表
面の活性化と同時に膜のエッチングを同時におこなうと
考えられている。a-Siのエッチングレートは、μc-Siに
比べて速く、低温ほど速くなる。(H. N. Wanka andM.
B. Schubert, Mat. Res. Soc. Symp. Proc. 467, 1997,
pp.651) 従って、低温でμc-Siを作成すると、エッチ
ング作用が強くなり、実質的に初期の非晶質膜の製膜が
起こらず、μc-膜のみ形成される。しかしながら、下地
のi層が非晶質膜であると、下地もエッチングおよびダ
メージを受けてセル特性が低下する。
[0009] Plasma CVD, thermal CVD, optical CVD
When a μc film, for example, a μc-Si film is formed by a method or the like, silicon hydride as a source gas is diluted with hydrogen. It is believed that the hydrogen atoms simultaneously activate the film formation surface and simultaneously etch the film. The etching rate of a-Si is faster than that of μc-Si, and becomes faster at lower temperatures. (HN Wanka and M.
B. Schubert, Mat. Res. Soc. Symp. Proc. 467, 1997,
pp.651) Therefore, when μc-Si is formed at low temperature, the etching action becomes stronger, and substantially no initial amorphous film is formed, and only the μc-film is formed. However, when the underlying i-layer is an amorphous film, the underlying layer is also etched and damaged, and the cell characteristics deteriorate.

【0010】そこで、a-SiOを界面に設けると、a-SiOの
エッチングレートが遅いため(H. Nozaki, N. Sakuma a
nd H. Ito, Jpn. J. Appl. Phys. 28, 1989, pp.L170
8)、i層のエッチングやダメージを抑制して、初期非晶
質膜の抑制されたμc 膜が形成できる。しかし、μc-膜
のバンドギャップは、a-SiOのそれより小さいため、a-S
iOが厚い場合、a-SiOで発生したキャリアのμc-膜への
逆拡散による再結合電流の増加によって、Voc、Jsc、FF
が低下してセル特性が悪くなる。また、μc-膜とa-SiO
のバンドギャップの差が大きいため、a-SiOの膜厚が厚
い場合、バンド不連続によるスパイクやノッチによって
界面でのキャリアの伝導が妨げられ、Jsc、FFが低下し
て、セル特性が悪くなる。
Therefore, when a-SiO is provided at the interface, the etching rate of a-SiO is slow (H. Nozaki, N. Sakuma a.
nd H. Ito, Jpn. J. Appl. Phys. 28, 1989, pp.L170
8) By suppressing the etching and damage of the i-layer, a μc film in which the initial amorphous film is suppressed can be formed. However, since the band gap of the μc-film is smaller than that of a-SiO, aS
When iO is thick, Voc, Jsc, and FF are increased due to an increase in recombination current due to back diffusion of carriers generated in a-SiO into the μc-film.
And the cell characteristics deteriorate. Also, μc-film and a-SiO
When the thickness of a-SiO is large, carrier conduction at the interface is hindered by spikes and notches due to band discontinuity, Jsc and FF are reduced, and cell characteristics are deteriorated when the thickness of a-SiO is large. .

【0011】逆にa-SiOの膜厚が薄ぎすると、保護膜と
しての機能が不十分になり、i層のエッチングやダメー
ジによりセル特性が低下する。従って、界面層のa-SiO
の膜厚には、適当な膜厚があり、後述の実験からその厚
さを1ないし8nmとすることにより、エッチング時の保
護膜の機能を維持しながら、a-SiO中のキャリアの発生
を抑制し、また、トンネル電流によってバンド不連続部
分のキャリアの伝導を改善して、セル特性を向上するこ
とができる。
Conversely, if the thickness of a-SiO becomes thin, the function as a protective film becomes insufficient, and the cell characteristics deteriorate due to etching or damage of the i-layer. Therefore, a-SiO of the interface layer
There is an appropriate film thickness, and from the experiment described later, by setting the thickness to 1 to 8 nm, generation of carriers in a-SiO can be maintained while maintaining the function of the protective film at the time of etching. In addition, the cell characteristics can be improved by suppressing the conduction of carriers in the band discontinuous portion by the tunnel current.

【0012】μc-膜がシリコン、またはシリコンオキサ
イド、シリコンカーバイド、シリコンナイトライド等の
シリコン合金からなるものとする。μc-膜がμc-Siであ
るとき、効果がもたらされることは、後記の実施例で実
証されている。μc-Siと類似した性質を持ち、かつバン
ドギャップが大きく吸収の少ないμc-SiO 、μc-SiC 、
μc-SiN 等のシリコン合金の場合も同様の効果が期待で
きる。
The μc-film is made of silicon or a silicon alloy such as silicon oxide, silicon carbide, silicon nitride or the like. The effect is obtained when the μc-membrane is μc-Si, as demonstrated in the examples below. μc-SiO, μc-SiC, which have properties similar to μc-Si, and have large band gap and low absorption
Similar effects can be expected in the case of a silicon alloy such as μc-SiN.

【0013】非晶質薄膜からなるi層がシリコン、また
は非晶質シリコンゲルマニウム(以下a-SiGeと記す)等
のシリコン合金からなるものとする。i層がa-Siである
とき、特に効果がもたらされることは、後記の実施例で
実証されている。a-Siと類似した性質を持つa-SiGe等の
シリコン合金の場合も同様の効果が期待できる。
The i-layer made of an amorphous thin film is made of silicon or a silicon alloy such as amorphous silicon germanium (hereinafter a-SiGe). It is demonstrated in the examples described below that a particularly advantageous effect is obtained when the i-layer is a-Si. Similar effects can be expected in the case of a silicon alloy such as a-SiGe having properties similar to a-Si.

【0014】上記のような非単結晶薄膜太陽電池の製造
方法としては、i層の上にa-SiO の界面層を、更にその
上にμc 膜をこの順に製膜するものとする。そのように
すれば、μc 膜の製膜時にa-SiO の界面層によって下地
のi層のエッチングを防止できる。水素化珪素、二酸化
炭素を含む混合ガス用いて、プラズマCVD法、熱CV
D法あるいは光CVD法のいずれかによりa-SiO の界面
層を製膜するするものとする。
In the method of manufacturing a non-single-crystal thin-film solar cell as described above, an a-SiO interface layer is formed on the i-layer, and a μc film is formed thereon in this order. By doing so, the underlying i-layer can be prevented from being etched by the a-SiO 2 interface layer during the formation of the μc film. Plasma CVD, thermal CV using mixed gas containing silicon hydride and carbon dioxide
An interface layer of a-SiO 2 is formed by either the D method or the photo-CVD method.

【0015】そのようにすれば、a-SiO の界面層を製膜
して効果がもたらされることは、後記の実施例で実証さ
れている。酸化剤として酸素ガス、二酸化窒素ガスを用
いた場合には、良質なa-SiO 界面層を製膜できなかっ
た。μc 膜を、基板温度70〜120℃で作成すれば、
エッチング作用が強くなり、実質的に初期の非晶質膜の
製膜が起こらず、初期から微結晶相を含んだμc 膜が形
成される。
It is demonstrated in the examples described later that the effect can be brought about by forming an a-SiO interface layer. When oxygen gas or nitrogen dioxide gas was used as the oxidizing agent, a good quality a-SiO 2 interface layer could not be formed. If a μc film is formed at a substrate temperature of 70 to 120 ° C,
The etching action becomes stronger, and substantially no initial amorphous film is formed, and a μc film containing a microcrystalline phase is formed from the beginning.

【0016】[0016]

【発明の実施の形態】以下図面を参照しながら本発明の
実施の形態を説明する。 〔実施例1〕a-Siを主体とする太陽電池の試作実験につ
いて述べる。図1は本発明にかかる非単結晶薄膜太陽電
池の断面図であり、以下にその製造工程を説明する。
Embodiments of the present invention will be described below with reference to the drawings. [Example 1] An experimental test of a solar cell mainly composed of a-Si will be described. FIG. 1 is a sectional view of a non-single-crystal thin-film solar cell according to the present invention, and its manufacturing process will be described below.

【0017】基板1にはガラス基板を用いた。ガラス基
板1上に、金属電極2としてスパッタリング法により膜
厚100〜200nm の銀(Ag)膜を製膜する。アルミ
ニウム等を用いることもできる。次にプラズマCVD法
により、a-Siのn層3、a-Siのi層4、a-SiOのp/i
界面層5を順次形成する。そのとき、基板温度は60〜
300℃、反応圧力は13〜130Paである。
As the substrate 1, a glass substrate was used. A silver (Ag) film having a thickness of 100 to 200 nm is formed as a metal electrode 2 on a glass substrate 1 by a sputtering method. Aluminum or the like can also be used. Next, a-Si n-layer 3, a-Si i-layer 4, and a / SiO p / i are formed by plasma CVD.
The interface layer 5 is formed sequentially. At that time, the substrate temperature is 60 ~
300 ° C., reaction pressure 13-130 Pa.

【0018】先ず、a-Siのn層3は、モノシラン(以下
SiH4 と記す)ガス10〜200ml/min、フォスフィ
ン(以下PH3 と記す)ガス0.1〜2ml/min、水素
(以下H2 と記す)100〜2000ml/minの混合ガス
を用いて、10〜50nm形成する。続いてa-Siのi層4
は、SiH4 ガス10〜2000ml/min、H2 ガス10
〜2000ml/minの混合ガスを用いて、100〜500
nm形成する。続いてa-SiOのp/i界面層5をSiH4
ガス10〜100ml/min、CO2 ガス1〜50ml/min、
2 ガス200〜2000ml/minの混合ガスを用いて、
1〜8nm形成する。p/i界面層5のa-SiOは、膜中酸
素濃度が5〜20% 、光学ギャップが1.9〜2.0eV
のものである。なお、酸化剤として酸素ガス、二酸化窒
素ガスを用いた場合には、良質なa-SiO のp/i界面層
を形成できなかった。
First, the n-layer 3 of a-Si is composed of a monosilane (hereinafter referred to as SiH 4 ) gas of 10 to 200 ml / min, a phosphine (hereinafter referred to as PH 3 ) gas of 0.1 to 2 ml / min, and hydrogen (hereinafter referred to as H). 2 ) A mixed gas of 100 to 2000 ml / min is used to form a film having a thickness of 10 to 50 nm. Then a-Si i-layer 4
Are SiH 4 gas 10 to 2000 ml / min, H 2 gas 10
Using a mixed gas of ~ 2000ml / min, 100 ~ 500
Form nm. Then SiH the p / i interface layer 5 of a-SiO 4
Gas 10-100ml / min, CO 2 gas 1-50ml / min,
Using a mixed gas of 200 to 2000 ml / min of H 2 gas,
1 to 8 nm is formed. The a-SiO of the p / i interface layer 5 has an oxygen concentration in the film of 5 to 20% and an optical gap of 1.9 to 2.0 eV.
belongs to. When oxygen gas or nitrogen dioxide gas was used as the oxidizing agent, a high quality a-SiO 2 p / i interface layer could not be formed.

【0019】p/i界面層5の上にμc-Siのp層6を、
基板温度は85℃、反応圧力13〜130Paで、Si
4 ガス1〜10ml/min、ディボラン(以下B2 6
記す)ガス0.001〜0.1ml/min、H2 ガス100
〜2000ml/minの混合ガスを用いて、膜厚10〜60
nm形成する。μc-Siの製膜は、70〜120℃の温度範
囲でおこなうことが重要である。温度を120℃より高
くすると、製膜初期に非晶質層ができることが透過電子
顕微鏡観察により観測され、そのようなμc-Siをもつセ
ルでは特性が低下した。120℃より低温で微結晶薄膜
を作成すると、エッチング作用が強くなり、実質的に初
期の非晶質膜の製膜が起こらず、微結晶薄膜のみ形成さ
れる。但し、70℃より低くすると、微結晶薄膜に空孔
の発生が、透過電子顕微鏡により観察され、セル特性も
低下した。70〜120℃の範囲では、空孔の発生も、
製膜初期の非晶質層の発生も抑制でき、セル特性が向上
する。
On the p / i interface layer 5, a p layer 6 of μc-Si
The substrate temperature is 85 ° C., the reaction pressure is 13 to 130 Pa,
H 4 gas 1 to 10 ml / min, (hereinafter referred to as B 2 H 6) diborane gas 0.001~0.1ml / min, H 2 gas 100
Using a mixed gas of て 2000 ml / min, a film thickness of 10-60
Form nm. It is important that the μc-Si film is formed in a temperature range of 70 to 120 ° C. When the temperature was higher than 120 ° C., it was observed by transmission electron microscope observation that an amorphous layer was formed in the initial stage of film formation, and the characteristics of such a cell having μc-Si were deteriorated. When a microcrystalline thin film is formed at a temperature lower than 120 ° C., the etching action becomes strong, and substantially no initial amorphous film is formed, and only the microcrystalline thin film is formed. However, when the temperature was lower than 70 ° C., generation of vacancies in the microcrystalline thin film was observed with a transmission electron microscope, and the cell characteristics also deteriorated. In the range of 70 to 120 ° C., the generation of vacancies
The generation of an amorphous layer in the initial stage of film formation can be suppressed, and the cell characteristics are improved.

【0020】本実施例では基板温度が低いので問題とな
る初期遷移層が存在しない。実際に断面を透過電子顕微
鏡観察により確認した。微結晶相の含有率は、60〜8
0%である。つづいて、スパッタリング法により透明電
極7として膜厚60〜80nmのITOを形成する。ZnO等を
用いることもできる、最後に透明電極7の上に、グリッ
ド電極8を形成する。
In this embodiment, since the substrate temperature is low, there is no problematic initial transition layer. The cross section was actually confirmed by transmission electron microscope observation. The content of the microcrystalline phase is 60 to 8
0%. Subsequently, ITO having a thickness of 60 to 80 nm is formed as the transparent electrode 7 by a sputtering method. Finally, a grid electrode 8 is formed on the transparent electrode 7 which can use ZnO or the like.

【0021】図2は、a-SiOのp/i界面層5の厚さと
セル特性との関係を示す特性図である。縦軸はセル特性
[Voc、Jsc、FF、Eff]、横軸はp/i界面層5の厚さ
である。Vocは、a-SiOの膜厚1〜12nmの範囲でほぼ一
定だが、1nmより薄くすると急激に低下する。Jscは、a
-SiOの膜厚を薄くしていくと、1nmまで増加し、それよ
り薄い膜厚で減少する。FFは、a-SiOの膜厚を薄くして
いくと、4nmまで増加し、それより薄い膜厚で減少す
る。
FIG. 2 is a characteristic diagram showing the relationship between the thickness of the p / i interface layer 5 of a-SiO and the cell characteristics. The vertical axis represents the cell characteristics [Voc, Jsc, FF, Eff], and the horizontal axis represents the thickness of the p / i interface layer 5. Voc is almost constant in the range of a-SiO film thickness of 1 to 12 nm, but drops sharply when it is thinner than 1 nm. Jsc is a
As the film thickness of -SiO is reduced, it increases to 1 nm and decreases at a film thickness smaller than that. FF increases up to 4 nm as the film thickness of a-SiO is reduced, and decreases at smaller film thicknesses.

【0022】この結果、Effはa-SiOの膜厚を薄くしてい
くとき、4nmまで増加し、それより薄い膜厚では2nm付
近から減少する。従って、p/i界面層5としてのa-Si
Oの厚さには、最適領域が存在し、その上下側ではいず
れもセル効率が低下することがわかる。Effの最大値
は、a-SiOの厚さが4nmのとき7.5% である。
As a result, Eff increases up to 4 nm when the film thickness of a-SiO is reduced, and decreases from around 2 nm when the film thickness is smaller than that. Therefore, a-Si as the p / i interface layer 5
It can be seen that there is an optimum region for the thickness of O, and the cell efficiency decreases on both upper and lower sides. The maximum value of Eff is 7.5% when the thickness of a-SiO is 4 nm.

【0023】a-SiOの厚さを4nmとした本発明実施例の
太陽電池の他に、比較のため構造が異なるもの3つを含
め4つの太陽電池を試作した。内訳は表1に示すとおり
である。図3、4、5は、それぞれ比較例1、2、3の
太陽電池のセル構造に示す断面図である。比較例1は、
p/i界面層5を設け上にa-SiOのp層9を積層したセ
ルである。なお、このp層9のa-SiOは、p/i界面層
用のa-SiOと異なり、膜中酸素濃度が20〜25% 、光
学ギャップが2.0〜2.15eVのものである。比較例
2、3は、a-SiOのp/i界面層を設けないでp層をμc
-Siとしたものである。比較例2、3の違いは、比較例
3が、a-SiOのp層を積層する前にi層の表面をCO2
プラズマ処理した点である。
In addition to the solar cell of the example of the present invention in which the thickness of a-SiO was 4 nm, four solar cells were prototyped including three having different structures for comparison. The breakdown is as shown in Table 1. FIGS. 3, 4, and 5 are cross-sectional views showing the cell structures of the solar cells of Comparative Examples 1, 2, and 3, respectively. Comparative Example 1
This is a cell in which a p / i interface layer 5 is provided and a p-layer 9 of a-SiO is laminated on the p / i interface layer 5. The a-SiO of the p layer 9 differs from the a-SiO for the p / i interface layer in that the oxygen concentration in the film is 20 to 25% and the optical gap is 2.0 to 2.15 eV. In Comparative Examples 2 and 3, the p-layer was set to μc without providing the p-i interface layer of a-SiO.
-Si. The difference between Comparative Examples 2 and 3 is that the surface of the i-layer is CO 2 before the p-layer of a-SiO is laminated.
This is the point of the plasma treatment.

【0024】[0024]

【表1】 比較例1では、効率(Eff)で7.19%を示した。比較例
2では、比較例1に比べて、Voc、Jsc、FFが低下してい
る。特にVocの低下が著しく、Effは6.24%と低くな
っている。これは、μc-Si製膜時に下地のi層がエッチ
ングされ、或いはダメージを受けて界面の欠陥が増えた
ためと考えられる。
[Table 1] In Comparative Example 1, the efficiency (Eff) was 7.19%. In Comparative Example 2, Voc, Jsc, and FF are lower than in Comparative Example 1. In particular, Voc is significantly reduced, and Eff is as low as 6.24%. This is probably because the underlying i-layer was etched or damaged during the μc-Si film formation, increasing the number of interface defects.

【0025】比較例3では、比較例2と同様にVocが特
に低く、Effは6.16%と比較例1、2よりも低く、C
2 プラズマ処理によるセル特性の改善はみられなかっ
た。図2のEffの図の破線は、比較例1のEffである。界
面層のa-SiOの膜厚1から8nmの範囲で、Effが比較例1
の値を上回っていることがわかる。比較例4は、図1の
実施例と同様のセル構造で、a-SiOのp/i界面層の厚
さを12nmとした。Vocが改善されて比較例1の値を上
回ったが、Jsc、FFが比較例1を下回り、Effは6.66
%にとどまった。
In Comparative Example 3, Voc was particularly low similarly to Comparative Example 2, and Eff was 6.16%, which was lower than Comparative Examples 1 and 2.
No improvement in cell characteristics was observed by the O 2 plasma treatment. The broken line in the diagram of Eff in FIG. 2 is Eff in Comparative Example 1. In the range of the a-SiO film thickness of the interface layer from 1 to 8 nm, Eff is comparative example 1.
It can be seen that the value is higher. Comparative Example 4 had a cell structure similar to that of the embodiment of FIG. 1, and the thickness of the p / i interface layer of a-SiO was 12 nm. Although Voc was improved and exceeded the value of Comparative Example 1, Jsc and FF were lower than Comparative Example 1, and Eff was 6.66.
% Stayed.

【0026】結果的に本発明を適用することにより、最
適負荷条件での最大出力(Pmax)は比較例4の1.13
倍、比較例1と比較しても1.04倍に向上した。 〔実施例2〕実施例1と同様にして、a-Siのp層、a-Si
のi層、1ないし8nmのa-SiO、μc-Siのn層の順に製
膜した非単結晶薄膜太陽電池を試作した。この場合も、
同様のセル特性の向上が見られた。
As a result, by applying the present invention, the maximum output (Pmax) under the optimum load condition is 1.13 of Comparative Example 4.
As compared with Comparative Example 1, it was improved by 1.04 times. [Embodiment 2] A p-layer of a-Si, a-Si
A non-single-crystal thin-film solar cell was fabricated in which an i-layer of 1 nm, a-SiO of 1 to 8 nm, and an n-layer of μc-Si were formed in this order. Again,
Similar improvement in cell characteristics was observed.

【0027】a-SiOがエッチング保護膜として働き、微
結晶薄膜製膜初期の非晶質層の発生を抑え、かつ逆拡散
によるキャリアの再結合を抑制とキャリア伝導の改善に
より、セル特性が向上したと考えられる。微結晶相を含
む非晶質膜(μc 膜)のp層あるいはn層としては、実
施例で挙げたμc-Siの他に、さらに光学吸収ロスを減ら
すために、微結晶シリコン合金を用いることができる。
具体的には、μc-SiO 、μc-SiC 、μc-SiN が挙げられ
る。
The a-SiO acts as an etching protection film, thereby suppressing the formation of an amorphous layer at the initial stage of forming a microcrystalline thin film, and suppressing carrier recombination due to reverse diffusion and improving carrier conduction, thereby improving cell characteristics. It is thought that it was done. As the p-layer or the n-layer of the amorphous film (μc film) containing a microcrystalline phase, in addition to μc-Si described in the embodiment, a microcrystalline silicon alloy is used to further reduce optical absorption loss. Can be.
Specifically, μc-SiO 2, μc-SiC, and μc-SiN are mentioned.

【0028】非晶質薄膜のi層としては、実施例で挙げ
たa-Siの他に、非晶質シリコン合金(a-Si合金)を用い
ることができる。特にa-Si合金としては、吸収係数の大
きいa-SiGeが望ましい。a-SiOの作成には、通常SiH
4 、ジシラン(Si2 6 )などの水素化珪素とCO2
の混合ガスを用いるが、場合により、H2 あるいは希ガ
スで希釈してもよい。製膜はプラズマCVD法、熱CV
D法、光CVD法でおこなう。
As the i-layer of the amorphous thin film, an amorphous silicon alloy (a-Si alloy) can be used in addition to a-Si described in the embodiment. In particular, as the a-Si alloy, a-SiGe having a large absorption coefficient is desirable. a-SiO is usually prepared using SiH
4. Silicon hydride such as disilane (Si 2 H 6 ) and CO 2
Is used, but may be diluted with H 2 or a rare gas as the case may be. Film formation is plasma CVD, thermal CV
This is performed by the D method or the photo CVD method.

【0029】以上、本実施例ではガラス基板等の透光性
基板を用いたサブストレート型の太陽電池について述べ
た。しかしながら、不透光性基板を使った場合もμc-Si
を適用すると同様な現象がみられており、本発明は有効
である。
As described above, in this embodiment, a substrate type solar cell using a light transmitting substrate such as a glass substrate has been described. However, even when an opaque substrate is used, μc-Si
The same phenomenon is observed when is applied, and the present invention is effective.

【0030】[0030]

【発明の効果】以上説明したように本発明によれば、非
晶質薄膜からなるp層、実質的に真性なi層、n層を積
層したpin接合を少なくとも一つ有する非単結晶薄膜
太陽電池において、少なくとも一つのpin接合のp層
あるいはn層が微結晶相を含むμc 膜であり、そのμc
膜の層と非晶質膜からなるi層との間に、1ないし8nm
の厚さのa-SiO の界面層を設けることによって、従来の
もっと厚いa-SiO 界面層を適用したときに問題となって
いたFF、Jscの低下が大幅に改善され、その結果、Eff
を大幅に改善することが可能となる。更にp層をa-SiO
とした非単結晶薄膜太陽電池より、セル特性を向上でき
る。
As described above, according to the present invention, a non-single-crystal thin-film solar cell having at least one pin junction formed by laminating a p-layer made of an amorphous thin film, a substantially intrinsic i-layer, and an n-layer. In the battery, at least one p-layer or n-layer of the pin junction is a μc film containing a microcrystalline phase,
1 to 8 nm between the film layer and the i-layer made of an amorphous film
By providing an a-SiO 2 interface layer having a thickness of 1 mm, the reduction of FF and Jsc, which had been a problem when a conventional thicker a-SiO 2 interface layer was applied, was greatly improved.
Can be greatly improved. Further, the p-layer is a-SiO
The cell characteristics can be improved as compared with the non-single-crystal thin-film solar cell described above.

【0031】特に、μc 膜を、基板温度70ないし12
0℃で作成することによって、空孔や製膜初期の非晶質
層の発生を抑制することができる。界面層のa-SiO は、
水素化珪素、CO2 を含む混合ガス用いて、プラズマC
VD法、熱CVD法あるいは光CVD法によって作成で
きる。従って本発明は、高効率の非単結晶薄膜太陽電池
の構造および製造方法に関し、重要な発明である。
In particular, the μc film is formed at a substrate temperature of 70 to 12
By forming the film at 0 ° C., generation of voids and an amorphous layer in the initial stage of film formation can be suppressed. A-SiO of the interface layer is
Plasma C using a mixed gas containing silicon hydride and CO 2
It can be formed by a VD method, a thermal CVD method or a photo CVD method. Therefore, the present invention relates to the structure and manufacturing method of a high efficiency non-single-crystal thin film solar cell, and is an important invention.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明第一の実施例の非単結晶薄膜太陽電池の
断面図
FIG. 1 is a cross-sectional view of a non-single-crystal thin-film solar cell according to a first embodiment of the present invention.

【図2】p/i界面層のa-SiO の厚さとセル特性との関
係を示す特性図
FIG. 2 is a characteristic diagram showing a relationship between a-SiO 2 thickness of a p / i interface layer and cell characteristics.

【図3】比較例1の非単結晶薄膜太陽電池の断面図FIG. 3 is a cross-sectional view of a non-single-crystal thin-film solar cell of Comparative Example 1.

【図4】比較例2の非単結晶薄膜太陽電池の断面図FIG. 4 is a cross-sectional view of a non-single-crystal thin-film solar cell of Comparative Example 2.

【図5】比較例3の非単結晶薄膜太陽電池の断面図FIG. 5 is a cross-sectional view of a non-single-crystal thin-film solar cell of Comparative Example 3.

【符号の説明】[Explanation of symbols]

1.ガラス基板 2.金属電極 3.n層(a-Si) 4.i層(a-Si) 5.p/i界面層(a-SiO ) 6.p層(μc-Si) 7.透明電極 8.グリッド電極 9.p層(a-SiO ) 1. Glass substrate 2. Metal electrode 3. 3. n-layer (a-Si) 4. i-layer (a-Si) 5. p / i interface layer (a-SiO 2) 6. p-layer (μc-Si) Transparent electrode 8. Grid electrode 9. p-layer (a-SiO)

Claims (8)

【特許請求の範囲】[Claims] 【請求項1】非晶質薄膜からなるp型半導体層、実質的
に真性なi型半導体層、n型半導体層を積層したpin
接合を少なくとも一つ有する非単結晶薄膜太陽電池にお
いて、少なくとも一つのpin接合のp型半導体層ある
いはn型半導体層が微結晶相を含む非晶質膜からなり、
その微結晶相を含む非晶質半導体層と非晶質膜からなる
i型半導体層との間に、1ないし8nmの厚さの非晶質シ
リコンオキサイドを有することを特徴とする非単結晶薄
膜太陽電池。
1. A pin having a stacked structure of a p-type semiconductor layer made of an amorphous thin film, a substantially intrinsic i-type semiconductor layer, and an n-type semiconductor layer.
In a non-single-crystal thin-film solar cell having at least one junction, at least one p-type semiconductor layer or n-type semiconductor layer of a pin junction is formed of an amorphous film including a microcrystalline phase,
A non-single-crystal thin film having 1 to 8 nm thick amorphous silicon oxide between an amorphous semiconductor layer containing the microcrystalline phase and an i-type semiconductor layer made of an amorphous film. Solar cells.
【請求項2】微結晶相を含む非晶質膜がシリコン、また
はシリコン合金からなることを特徴とする請求項1に記
載の非単結晶薄膜太陽電池。
2. The non-single-crystal thin-film solar cell according to claim 1, wherein the amorphous film containing a microcrystalline phase is made of silicon or a silicon alloy.
【請求項3】微結晶相を含む半導体層がシリコン合金で
あり、シリコンオキサイド、シリコンカーバイド、シリ
コンナイトライドのいずれかであることを特徴とする請
求項1に記載の非単結晶薄膜太陽電池。
3. The non-single-crystal thin-film solar cell according to claim 1, wherein the semiconductor layer containing a microcrystalline phase is a silicon alloy and is one of silicon oxide, silicon carbide, and silicon nitride.
【請求項4】非晶質薄膜からなるi型半導体層がシリコ
ン、またはシリコン合金からなることを特徴とする請求
項1ないし3のいずれかに記載の非単結晶薄膜太陽電
池。
4. The non-single-crystal thin-film solar cell according to claim 1, wherein the i-type semiconductor layer made of an amorphous thin film is made of silicon or a silicon alloy.
【請求項5】i型半導体層が非晶質シリコンゲルマニウ
ムであることを特徴とする請求項1ないし3のいずれか
に記載の非単結晶薄膜太陽電池。
5. The non-single-crystal thin-film solar cell according to claim 1, wherein the i-type semiconductor layer is made of amorphous silicon germanium.
【請求項6】非晶質薄膜からなるp型半導体層、実質的
に真性なi型半導体層、n型半導体層を積層したpin
接合を少なくとも一つ有する非単結晶薄膜太陽電池にお
いて、少なくとも一つのpin接合のp型半導体層ある
いはn型半導体層が微結晶相を含む非晶質膜からなり、
その微結晶相を含む非晶質半導体層と非晶質膜からなる
i型半導体層との間に、1ないし8nmの厚さの非晶質シ
リコンオキサイド層を有する非単結晶薄膜太陽電池の製
造方法において、i型半導体層の上にシリコンオキサイ
ドの界面層を、更にその上に微結晶相を含む非晶質膜を
製膜することを特徴とする非単結晶薄膜太陽電池の製造
方法。
6. A pin formed by laminating a p-type semiconductor layer made of an amorphous thin film, a substantially intrinsic i-type semiconductor layer, and an n-type semiconductor layer.
In a non-single-crystal thin-film solar cell having at least one junction, at least one p-type semiconductor layer or n-type semiconductor layer of a pin junction is formed of an amorphous film including a microcrystalline phase,
Fabrication of a non-single-crystal thin-film solar cell having an amorphous silicon oxide layer having a thickness of 1 to 8 nm between an amorphous semiconductor layer containing the microcrystalline phase and an i-type semiconductor layer made of an amorphous film A method for manufacturing a non-single-crystal thin-film solar cell, comprising: forming an interface layer of silicon oxide on an i-type semiconductor layer; and forming an amorphous film containing a microcrystalline phase thereon.
【請求項7】水素化珪素、二酸化炭素を含む混合ガス用
いて、プラズマCVD法、熱CVD法あるいは光CVD
法のいずれかによりシリコンオキサイドの界面層を製膜
することを特徴とする請求項6に記載の非単結晶薄膜太
陽電池の製造方法。
7. A plasma CVD method, a thermal CVD method or an optical CVD method using a mixed gas containing silicon hydride and carbon dioxide.
The method for producing a non-single-crystal thin-film solar cell according to claim 6, wherein the interface layer of silicon oxide is formed by any one of the methods.
【請求項8】微結晶相を含む非晶質膜を、基板温度70
〜120℃で作成することを特徴とする請求項6または
7に記載の非単結晶薄膜太陽電池の製造方法。
8. An amorphous film containing a microcrystalline phase is formed at a substrate temperature of 70.degree.
The method of manufacturing a non-single-crystal thin-film solar cell according to claim 6, wherein the non-single-crystal thin-film solar cell is formed at a temperature of from −120 ° C.
JP2000013122A 2000-01-21 2000-01-21 Non-single-crystal thin-film solar cell and method for manufacturing the same Pending JP2001203374A (en)

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JP2012190849A (en) * 2011-03-08 2012-10-04 Mitsubishi Electric Corp Thin film solar cell and manufacturing method thereof
JP5160565B2 (en) * 2007-12-05 2013-03-13 株式会社カネカ Integrated thin film photoelectric conversion device and manufacturing method thereof
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