JP2001148448A - Substrate for mounting integrated circuit element and integrated circuit device - Google Patents

Abstract

(57) [Problem] To increase the density of terminal electrodes, the inductance of ground wiring and power supply wiring has increased, and it has become difficult to stably supply power and ground potential to integrated circuit elements. SOLUTION: In an integrated circuit element mounting substrate 1 on which an integrated circuit element 9 is mounted and mounted on a mounting section 2a on an upper surface of an insulating base 2, ground terminals 6 and power supply terminals 7 are provided at both ends in an inner region of the mounting section 2a. Three or more rows in which three or more daughters are alternately arranged at substantially equal intervals are arranged substantially in parallel, and the order of both terminals in the odd-numbered rows and the even-numbered rows is the same. Are mounted on the integrated circuit element mounting substrate 1 in such a manner that the terminals are displaced from each other in the column direction by substantially half of the interval between the terminals. Further, an integrated circuit device 11 is formed by mounting the integrated circuit element 9 thereon. The integrated circuit element 9 can be operated stably with the ground wiring and the power supply wiring having low resistance and low inductance.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit device mounting substrate for an integrated circuit device used in an information processing device such as a computer, and an integrated circuit device having the integrated circuit device mounted thereon. A terminal for supplying power and a ground potential to an integrated circuit element to be mounted is arranged such that inductances of the terminal and a wiring conductor connected to the terminal are reduced, and the integrated circuit element operates easily, stably, and at a high speed. The present invention relates to a substrate for mounting an integrated circuit element and an integrated circuit device.

[0002]

2. Description of the Related Art Conventionally, a so-called decoupling capacitor is provided in the vicinity of a semiconductor integrated circuit element to supply power to the integrated circuit element and to suppress power supply noise in order to operate the semiconductor integrated circuit element at high speed and stably. It has been studied to stabilize the power supply potential and the ground (ground) potential with respect to the integrated circuit element by reducing the impedance of the power supply by arranging the power supply and the power supply.

At the same time, mutual inductance is reduced by alternately arranging a power supply terminal and a ground terminal in order to reduce the inductance of a terminal for supplying a power supply and a ground potential to lower the power supply impedance. I have.

For example, the back surface of the integrated circuit device is formed of gold-silicon or the like on the bottom surface of a cavity portion, which is a concave portion formed for the purpose of mounting the integrated circuit device in a package for housing the integrated circuit device constituting the integrated circuit device. Joined with brazing alloy,
A terminal electrode for signal and power connection provided on the outer periphery on the front side of the integrated circuit element, and provided near the outer periphery of the cavity of the package and electrically connected to a wiring conductor formed inside or on the surface of the package. If the terminal pad is connected by wire bonding with a thin wire made of gold, aluminum, etc., the power supply and the ground are paired, and the signal terminal and the power / ground pair terminal are alternately arranged. Has been done.

[0005]

However, in recent years,
Since the operation of integrated circuit elements has become faster, if the integrated circuit element is mounted on the package for housing the integrated circuit element and connected by wire bonding, the effect of the inductance of the thin metal wire cannot be ignored and decoupling will occur. A problem arises in that it is difficult to stably supply the power supply and the ground potential only by reducing the power supply impedance by the ring capacitor.

Therefore, instead of the wire bonding connection, a conductor bump such as a solder ball is formed on the terminal electrode of the integrated circuit element, and this is used to form a package for storing the integrated circuit element or a wiring board for mounting the integrated circuit. A so-called flip-chip connection method of directly mounting and connecting to connection terminals has been devised.

In such an integrated circuit device, a signal, a power source and a ground potential are supplied from an outer peripheral portion of the integrated circuit device in the conventional integrated circuit device. Increase in resistance and inductance makes it difficult to stably supply power and ground potential to the logic circuit disposed in the center of the integrated circuit element. In order to supply power and ground potential to the arranged logic circuit section over a distance as short as possible, generally, a signal terminal electrode is provided on the outer peripheral portion of the surface, and a power supply and ground terminal electrode is provided on the inner central portion thereof. They are arranged in a grid. Therefore, when this integrated circuit element is flip-chip mounted, for example, as shown in the plan view of the main part in FIG. 4 and FIG. Will be placed.

In FIGS. 4 and 5, reference numeral 21 denotes a substrate for mounting an integrated circuit element such as a multilayer wiring board, and 22 denotes a ground terminal formed on the integrated circuit element mounting portion and electrically connected to an internal ground wiring layer. Reference numerals 23 (indicated by a symbol G in the figure) and power supply terminals (indicated by a symbol P in the figure) also formed on the integrated circuit element mounting portion and electrically connected to an internal power supply wiring layer. A ground wiring layer and a power wiring layer (not shown) formed in the integrated circuit element mounting substrate 21 are electrically connected to the ground terminal 22 and the power terminal 23 via through conductors such as via conductors. It is connected to the. Note that signal terminals are usually arranged around the ground terminals 22 and the power supply terminals 23 arranged in a lattice, but are not shown here. Further, d 'represents the diameter of each terminal formed in a circle, and p' represents the arrangement interval (pitch) of each terminal.

Here, FIG. 4 shows an example in which the ground terminals 22 and the power supply terminals 23 are alternately arranged in each column of the terminals arranged in a grid and between adjacent columns, and FIG. In each of the rows of the terminals arranged in a lattice, the ground terminals 22 and the power supply terminals 23 are all arranged, and the ground terminals 22 and the power supply terminals 23 are alternately arranged between adjacent rows.

However, even in the terminal arrangements shown in FIGS. 4 and 5, when the integrated circuit element mounted and connected to the terminal is operated at a higher speed, the operating voltage is reduced and the operating signal is reduced. Since the maximum frequency needs to be increased, the ground terminal 22 and the power terminal 23 are required.
Since the influence of mutual inductance due to the arrangement of the elements cannot be ignored, there has been a problem that it is difficult to stably supply power and ground potential to the integrated circuit element.

On the other hand, in the integrated circuit element mounting substrate 21 having the grounding and power supply terminals 22 and 23 arranged as described above, the grounding and power supply potentials of the internal grounding wiring layer and the power supply wiring layer are stabilized. In order to reduce the resistance of the wiring conductor layer for supplying each potential to the ground terminal 22 and the power supply terminal 23 by making the ground wiring layer and the power supply wiring layer have so-called solid surfaces with a large area, By alternately stacking layers and power supply wiring layers with an insulating layer interposed therebetween, and having a capacitance component between these layers, the impedance of the ground and the power supply is reduced, so that each potential is supplied stably. Was.

However, due to the recent increase in the number of terminal electrodes of the integrated circuit element and the increase in the density of the terminal electrodes, the integrated circuit element mounting board 21 on which the integrated circuit element is flip-chip mounted has conventionally had a ground wiring layer. In addition, there is a problem that it is difficult to form the power supply wiring layer as a solid surface having a sufficient area, and it is not possible to sufficiently secure the capacitance component formed by these.

An example for explaining this state is shown in a plan view of a main part in FIG. FIG. 6 shows an arrangement of a ground wiring layer and the like formed on an insulating layer located below the integrated circuit element mounting portion inside the multilayer wiring board 21. In the figure, reference numeral 24 denotes a ground wiring layer formed over a large area on an insulating layer,
25 is a ground through conductor for electrically connecting the ground wiring layer 24 to the ground terminal 22 of the integrated circuit element mounting portion of the multilayer wiring board 21 and other insulating layers and external ground wiring, and 26 is a ground wiring layer. 24, a power supply through conductor for electrically connecting the power supply terminal 23 of the integrated circuit element mounting portion to another insulating layer or external power supply wiring, and 27 a ground wiring layer 24 and a power supply through conductor 26. This is a clearance for insulation.

As described above, due to the increase in the number of terminal electrodes of the integrated circuit element and the increase in the density of the terminal electrodes in the integrated circuit element mounting portion of the multilayer wiring board, the terminal section where the ground terminal 22 and the power supply terminal 23 are arranged becomes Most of the area is occupied by the terminals, and accordingly, in the internal ground wiring layer 24, as shown in FIG. 6, the power supply through conductor 26 connected to the power supply terminal 23 is connected to the ground wiring layer. Since it is necessary to provide a clearance 27 in order to penetrate through the hole 24, the ground wiring layer 24 is insufficiently provided as a solid surface for obtaining a capacitance component due to the clearance 27.

Similarly, in the power supply wiring layer inside the multilayer wiring board 21, the ground through conductor connected to the ground terminal 22 is also provided.
A predetermined clearance is required to allow 25 to penetrate, and this clearance has made the solid surface insufficient. For this reason, the conductor resistance of each wiring layer and the inductance of each through conductor are increased, and it is difficult to stably supply power and ground potentials to the integrated circuit element.

The present invention has been made in view of the above-mentioned conventional problems, and has as its object to provide a low-resistance and high-speed integrated circuit element in which ground electrodes and power supply electrodes are arranged at high density. An object of the present invention is to provide a substrate for mounting an integrated circuit element which can supply a ground and a power supply potential stably with low inductance.

Another object of the present invention is to provide an integrated circuit device mounting substrate capable of stably supplying grounding and power supply potential with low resistance and low inductance, and ground electrodes and power supply electrodes are arranged at high density. It is an object of the present invention to provide an integrated circuit device having an integrated circuit element operating at a high speed and capable of operating at a high speed and stably.

[0018]

The inventor of the present invention has conducted various studies on the above-mentioned problems of the prior art. As a result, when an integrated circuit element is mounted on a wiring board by flip-chip connection, the element is not mounted. Regarding the arrangement of the ground and power supply terminals in the mounting portion, the power supply terminals and the ground terminals are alternately arranged in the arrangement of the terminals in the first row, and the power supply terminals and the ground terminals are alternately arranged in the next row. The arrangement of the terminals in the first row is located at an intermediate position with respect to the arrangement of the terminals in the first row. In the third row, the arrangement of the power supply terminals and the ground terminals is the same as the arrangement in the first row, and the interval between adjacent terminals is minimum. It has been found that, by adopting a configuration characterized in that the power supply and the ground potential are supplied, the power supply and the ground potential can be stably performed with low resistance and low inductance.

The substrate for mounting an integrated circuit element of the present invention has a mounting portion for the integrated circuit element on the upper surface of the insulating base, in which a ground wiring layer, a power supply wiring layer, and a signal wiring layer are formed. A ground terminal electrically connected to the wiring layer, a power terminal and a signal terminal are arranged and formed on the mounting portion, and the ground electrode on the lower surface of the integrated circuit element mounted on the mounting portion at each of these terminals. In an integrated circuit element mounting substrate to which a power electrode and a signal electrode are electrically connected, the signal terminal is disposed in a peripheral area of the integrated circuit element, and the ground terminal and the power terminal are disposed in an inner area thereof. And three terminals alternately at approximately equal intervals
At least three or more rows are arranged substantially in parallel, and the order of both terminals in the odd-numbered columns and the even-numbered columns is the same, and the terminals of adjacent columns are connected in the column direction. Are arranged so as to be shifted from each other by approximately half.

In the integrated circuit device according to the present invention, the ground electrode, the power electrode and the ground electrode corresponding to the ground terminal, the power terminal, and the signal terminal on the lower surface of the mounting portion of the integrated circuit element mounting substrate having the above-described configuration may be provided. The integrated circuit device having signal electrodes is mounted by electrically connecting corresponding terminals and electrodes.

According to the integrated circuit element mounting substrate of the present invention, each terminal electrically connected to each electrode of the integrated circuit element has a signal terminal arranged in a peripheral region of the integrated circuit element, and a ground terminal. And a power supply terminal, in an inner region thereof, three or more rows in which at least three terminals are alternately arranged at substantially equal intervals, in a substantially parallel manner, and the order of both terminals in the odd-numbered columns and the even-numbered columns. Are arranged in the same manner, and the terminals of adjacent columns are arranged so as to be displaced from each other in the column direction by substantially half of the interval between the terminals. For example, when a certain ground terminal is seen, six Since the terminals are arranged and four of them can be used as the power supply terminals, the ground terminals connected to the ground wiring layer and the power Interaction with power supply terminals connected to the wiring layer The inductance can be minimized.

According to the substrate for mounting an integrated circuit element of the present invention, the ground terminals and the power terminals are arranged in a so-called staggered pattern in two rows by the arrangement of the ground terminals and the power terminals. The ground wiring layer and the power supply wiring layer respectively connected to the ground terminal and the power supply terminal can be formed with a sufficiently large area corresponding to the line widths of the two rows of the terminal arrangement. The layer can have a low resistance, and the capacitance component obtained by opposing the ground wiring layer and the power supply wiring layer can have a sufficiently large capacitance component. The wiring can have low resistance and low inductance.

As a result, according to the integrated circuit element mounting substrate of the present invention, grounding, power supply and power supply noise suppression for the element for stably operating the integrated circuit element operating at high speed can be extremely effectively achieved. It can be performed stably.

Further, according to the integrated circuit device of the present invention, the ground electrode, the power supply electrode and the signal electrode corresponding to the ground terminal, the power supply terminal and the signal terminal, respectively, are mounted on the mounting portion of the integrated circuit element mounting board having the above configuration. Since the integrated circuit element on the lower surface is mounted with the corresponding terminals and electrodes electrically connected to each other, stable grounding and power supply potential are supplied to the integrated circuit element with low resistance and low inductance. It is possible to operate stably at high speed.

[0025]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an integrated circuit device mounting substrate and an integrated circuit device according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a sectional view showing an embodiment of an integrated circuit element mounting substrate and an integrated circuit device using the same according to the present invention.

In FIG. 1, reference numeral 1 denotes a substrate for mounting an integrated circuit element, 2 denotes an insulating base, 2a denotes a mounting portion of the integrated circuit element formed on the upper surface of the insulating base 2, and 3 denotes a part formed inside the insulating base 2. 4 is a power supply wiring layer, 5 is a signal wiring layer, 6 is a ground terminal electrically connected to the ground wiring layer 3 and formed on the mounting portion 2a, and 7 is a power supply wiring layer 4 similarly.
A power supply terminal 8 electrically connected to the signal wiring layer 5 is also a signal terminal electrically connected to the signal wiring layer 5. The wiring layers 3 to 5 and the terminals 6 to 8 are not shown except for typical ones.

Reference numeral 9 denotes an integrated circuit element, on the lower surface of which a ground electrode, a power supply electrode and a signal electrode (not shown) respectively corresponding to the terminals 6 to 8 of the integrated circuit element mounting substrate 1 are provided. . Reference numeral 10 denotes a conductor bump, such as a solder bump, for electrically connecting each terminal of the integrated circuit element mounting substrate 1 and each electrode of the integrated circuit element 9.

Then, the integrated circuit element 9 is mounted on the mounting portion 2a, and the ground electrode and the ground terminal 6, the power electrode and the power terminal 7, the signal electrode and the signal terminal 8 of the integrated circuit element 9 are respectively connected via the conductor bumps 10. By being electrically connected
An integrated circuit device 11 of the present invention is configured.

Reference numeral 12 denotes an external electric circuit board on which the integrated circuit device 11 of the present invention is mounted.
The electrodes of the integrated circuit element 9 are connected to the external conductors via the terminals 6 to 8 and the wiring layers 3 to 5 by being connected to the connection conductors 13 formed on the upper surface of the semiconductor device via the conductive connection members 14. It will be electrically connected to the substrate 12.

FIG. 2 is a plan view of an essential part similar to FIGS. 4 and 5, showing an example of the arrangement of the ground terminal 6 and the power supply terminal 7 in the mounting portion 2a of the integrated circuit element mounting substrate 1 of the present invention. is there.

In FIG. 2, reference numeral 2 denotes an insulating substrate of the integrated circuit element mounting substrate 1, reference numeral 6 denotes a ground terminal (indicated by a symbol G in the figure) formed on the integrated circuit element mounting portion 2a, and reference numeral 7 denotes an integrated circuit. A power supply terminal (indicated by a symbol P in the figure) formed on the circuit element mounting portion 2a.

The ground terminal 6 and the power supply terminal 7 are electrically connected to the ground wiring layer 3 and the power supply wiring layer 4 (not shown) formed in the insulating base 2 via through conductors such as via conductors. It is connected to the. The signal terminals 8 are arranged in the peripheral area of the mounting portion 2a around the ground terminals 6 and the power supply terminals 7, but are not shown here. Also, d is the diameter of each terminal formed in a circular shape,
p represents an arrangement interval (pitch) in the row of each terminal, and q represents an arrangement interval between adjacent terminals in each row of each terminal.

In the example shown in FIG. 2, the arrangement of the ground terminal 6 and the power supply terminal 7 is such that when the vertical columns in the figure are viewed as the first, second, third,. In each row, five rows in each of which five ground terminals 6 and power supply terminals 7 are alternately arranged at substantially equal intervals p, each row is substantially parallel, and the odd-numbered 1
The ground terminal 6 and the power supply terminal 7 between the columns of the third, fifth, and fifth columns and between the even, second and fourth columns.
Are arranged in the same order, and the terminals of adjacent rows are connected to each other, that is, the first row, the second row, the second row, and the third row
The terminals in the fourth and fourth columns and the fourth and fifth columns are arranged so as to be displaced from each other in the column direction by substantially half of the interval p between the terminals. If the spacing between the columns is set so that the spacing p between the terminals in the row of the terminals and the spacing q between the adjacent terminals between the rows of the terminals are substantially equal, for example, the conventional terminal layout The terminals can be arranged at a higher density while securing the same distance between the terminals and suppressing the mutual inductance between the terminals and the through conductors connected thereto.

By arranging the ground terminal 6 and the power supply terminal 7 in this manner, compared with the conventional grid-like arrangement as shown in FIGS. A power terminal 7 surrounding the ground terminal 6,
In addition, since the number of ground terminals 6 surrounding the power supply terminal 7 can be increased, the self-inductance of each terminal and each through conductor can be reduced by the interaction.

As described above, according to the integrated circuit element mounting substrate 1 of the present invention, the ground terminal 6 and the power terminal 7 are provided in the area inside the signal terminal 8 arranged in the peripheral area of the integrated circuit element mounting section 2a. , Three or more rows in which both terminals are alternately arranged at substantially equal intervals are arranged in substantially parallel to three or more rows, and the order of the two terminals in the odd-numbered rows and the even-numbered rows is the same. Since the terminals of the columns to be arranged are shifted from each other in the column direction by substantially half of the interval between the terminals, the inductance of the ground wiring and the power supply wiring of the integrated circuit element mounting substrate 1 can be further reduced.

Next, the ground wiring layer 3 formed on the insulating layer located below the integrated circuit element mounting portion 2a inside the insulating substrate 2 of the integrated circuit element mounting substrate 1 of the present invention having such a terminal arrangement. FIG. 3 is a plan view of an essential part similar to FIG. In the figure, reference numeral 3 denotes a ground wiring layer formed over a large area on the insulating layer, and 3 'denotes the ground wiring layer 3.
And integrated circuit element mounting portion 2a of integrated circuit element mounting substrate 1
And a ground through conductor 4 'for electrically connecting the ground terminal 6 and another insulating layer or an external ground wiring to the power supply terminal 7 of the integrated circuit element mounting portion 2a through the ground wiring layer 3. Reference numeral 15 denotes a power supply through conductor for electrically connecting the insulating layer and an external power supply wiring, and 15 denotes a clearance for insulating the ground wiring layer 3 from the power supply through conductor 4 '.

According to the integrated circuit element mounting substrate 1 of the present invention, as can be seen from the example shown in FIG. 2, the so-called staggered arrangement of the ground terminals 6 and the power supply terminals 2 in two rows when the arrangement is viewed in the horizontal direction. Since they are arranged in a lattice, the ground wiring layer 3 formed thereunder can be formed as a wide area having a line width of two columns. Similarly, the power supply wiring layer 4 formed on another insulating layer can also be formed as a wide area having the same line width of two columns.

Thus, the ground wiring layer and the power supply wiring layer can be made to have low resistance, and the capacitance component obtained by making the ground wiring layer and the power supply wiring layer face each other has a sufficient magnitude. Accordingly, the ground wiring and the power supply wiring can have low resistance and low inductance.

Therefore, according to the integrated circuit device 11 of the present invention using such an integrated circuit device mounting substrate 1 of the present invention, the integrated circuit device 9 has a low resistance and a low inductance and a stable ground and power supply potential. As a result, power supply to the element for stably operating the integrated circuit element 9 operating at high speed and noise suppression of the power supply can be performed very effectively and stably. The integrated circuit element 9 can be operated stably at high speed.

For example, in the conventional terminal arrangement shown in FIG. 4, in an alumina ceramic multilayer wiring board having a thickness of 1 mm, tungsten is used for the conductor wiring, and the diameter of the ground terminal 22 and the power supply terminal 23 is determined for the via conductor penetrating the substrate. d ′ and arrangement interval p ′ and the corresponding ground terminal 22
When the inductance L per via conductor was examined in consideration of the mutual inductance, d ′ (μm) −p ′ (μm) −L (pH / mm) 50−150−37175−225−371100−350 −411 150 −500 −398, and similarly, in the conventional terminal arrangement shown in FIG. 5, d ′ · p ′ · L is d ′ (μm) −p ′ (μm) −L (pH / mm) 50 −150 −394 75 −225 −394 100 −350 −434 150 −500 −422, but according to the terminal arrangement on the integrated circuit element mounting substrate 1 of the present invention shown in FIG. The diameter d of the ground terminal 6 and the power supply terminal 7 and the arrangement interval p · q
(P = q) and the inductance L corresponding thereto are: d (μm) −p · q (μm) −L (pH / mm) 50−150−36975−225−367 100−350−407 150−500 −395, indicating that the inductance can be reduced while the terminals are arranged at a higher density with the same diameter and the same arrangement interval.

In the above example, when the terminals of the adjacent columns are shifted in the column direction, the odd-numbered columns and the even-numbered columns are alternately shifted.
The manner in which the columns are shifted is not limited to such a shifting method, and may be appropriately selected according to the specifications of the electrode arrangement of the integrated circuit element 9 and the like.

In the substrate 1 for mounting an integrated circuit element of the present invention, the insulating substrate 2 is made of aluminum oxide sintered body, aluminum nitride sintered body, mullite sintered body, silicon carbide sintered body, glass ceramic, or the like. Ceramic material, or epoxy resin, BT (bis-triazine) resin, polyimide, benzocyclobutene, polynorbornene, fluororesin or other polymer insulating material, or thermosetting polymer of inorganic insulating powder made of ceramic material It is made of, for example, a composite insulating material joined by an insulating material, and is, for example, a substantially rectangular flat plate.

The insulating base 2 made of a ceramic material
A multilayer wiring portion may be formed by laminating an interlayer insulating layer made of a polymer insulating material and a wiring conductor on the upper surface of the substrate.

Each wiring composed of the signal wiring layer 3, the power wiring layer 4, the signal wiring layer 5 and the ground through conductor 3 ', the power through conductor 4', and the signal through conductor is made of, for example, tungsten, molybdenum, molybdenum-manganese, copper, It is a conductor for electric wiring made of silver, silver-palladium, or the like, and a plurality of the conductors are formed from the upper surface of the insulating base 2 to, for example, the lower surface of the insulating base 2 by metal powder metalization or the like by a thick film printing method or the like.

The ground terminal 6, the power supply terminal 7, and the signal terminal 8 are formed on the insulating base 2 by the same material and method as those of the wiring layers 3 to 5. Each of the terminals 6 to 8 may be formed as a terminal pad on the mounting portion 2 a on the upper surface of the insulating base 2.
And exposing the end face of the signal through conductor to the mounting portion 2a,
The end face may be used as each terminal.

When the insulating substrate 2 is made of, for example, an aluminum oxide sintered body, a binder, a solvent, a plasticizer, a dispersant, etc., suitable for a raw material powder of aluminum oxide, silicon oxide, magnesium oxide, calcium oxide, etc. Is added and mixed to form a slurry, and this is formed into a sheet by employing a conventionally known doctor blade method to obtain a plurality of ceramic green sheets. Thereafter, a suitable punching process is performed on the ceramic green sheets. And a metal paste for forming the wiring layers 3 to 5 and the terminals 6 to 8 is printed and filled. Finally, the ceramic green sheets are vertically laminated and fired at a temperature of about 1600 ° C.

The wiring layers 3 to 5 and the terminals 6 to 8
For example, if these are made of tungsten metallization, a paste obtained by adding and mixing an appropriate organic binder, a solvent, a plasticizer, etc. to a tungsten powder is used as the metal paste for forming the ceramic green. The formation and filling of the sheet is performed by employing a screen printing method or the like.

An integrated circuit element 9 is mounted and mounted on the mounting portion 2a on the upper surface of the insulating base 2 via a conductive bump 10 such as solder or gold-tin alloy, gold, conductive resin, or ACF. Terminals 6 to 8 are electrically connected.

In this way, the integrated circuit device 11 of the present invention is completed. The upper surface of the insulating base 2 is filled with a so-called underfill resin between the integrated circuit element 9 and the mounting portion 2a. Alternatively, a resin coating may be applied so as to cover the integrated circuit element 9 and the upper surface of the insulating base 2 around the integrated circuit element 9, or the upper surface of the insulating base 2 so as to cover the integrated circuit element 9. The cover may be joined to the cover.

The integrated circuit device 11 of the present invention
Each wiring and external electric circuit board led out on the lower surface of the insulating base 2
By connecting the 12 connecting conductors 13 via the conductive connecting members 14, each electrode of the integrated circuit element 9 is simultaneously connected to the external electric circuit while being mounted on the external electric circuit board 12. become.

It should be noted that the present invention is not limited to the above-described embodiments, and various improvements and modifications may be made without departing from the spirit of the present invention.

For example, on the lower surface of the insulating base 2, a lead-out portion of each wiring connected to the external electric circuit board 12,
By setting the arrangement on the next mounting side to be the same as the arrangement of the terminals 6 to 8 in the mounting section 2a, the inductance of each of the terminals 6 to 8 and each wiring in the integrated circuit element mounting substrate 1 can be further reduced.

[0054]

As described above in detail, according to the substrate for mounting an integrated circuit element of the present invention, each terminal electrically connected to each electrode of the integrated circuit element, and the signal terminal is located in the peripheral area of the integrated circuit element. The ground terminal and the power supply terminal are arranged in an inner region thereof. At least three rows of both terminals are alternately arranged at substantially equal intervals in a substantially parallel manner. The terminals are arranged in the same way as the conventional grid because the terminals of adjacent columns are arranged in the same order, and the terminals of adjacent columns are arranged so that they are shifted from each other in the column direction by approximately half of the interval between terminals. As compared with the configuration, the mutual arrangement of the terminal and the power supply terminal connected to the ground wiring layer and the power supply terminal can be minimized while the arrangement of the terminals is further increased.

According to the substrate for mounting an integrated circuit element of the present invention, the ground terminals and the power terminals are arranged in a so-called staggered pattern in two rows by the arrangement of the ground terminals and the power terminals as described above. The ground wiring layer and the power supply wiring layer respectively connected to the ground terminal and the power supply terminal can be formed with a sufficiently large area corresponding to the line widths of the two rows of the terminal arrangement. The layer can have a low resistance, and the capacitance component obtained by opposing the ground wiring layer and the power supply wiring layer can have a sufficiently large capacitance component. The wiring has a low resistance and low inductance.

As a result, according to the integrated circuit device mounting substrate of the present invention, grounding, power supply, and power supply noise suppression for the device for stably operating the integrated circuit device operating at high speed can be extremely effectively performed. It was able to be performed stably.

According to the integrated circuit device of the present invention, the grounding electrode, the power supply electrode and the signal electrode corresponding to the grounding terminal, the power supply terminal and the signal terminal, respectively, are mounted on the mounting portion of the integrated circuit element mounting substrate having the above-described configuration. Since the integrated circuit element on the lower surface is mounted with the corresponding terminals and electrodes electrically connected to each other, stable grounding and power supply potential are supplied to the integrated circuit element with low resistance and low inductance. It was possible to operate stably at high speed.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating an example of an embodiment of an integrated circuit element mounting substrate and an integrated circuit device using the same according to the present invention.

FIG. 2 is a plan view of a principal part showing an example of the arrangement of ground terminals and power terminals on the integrated circuit element mounting board of the present invention.

FIG. 3 is a plan view of an essential part showing an example of an arrangement configuration of a ground wiring layer and the like formed on an insulating layer located below an integrated circuit element mounting portion inside the insulating substrate of the integrated circuit element mounting substrate of the present invention; It is.

FIG. 4 is a main part plan view showing an example of the arrangement of ground terminals and power terminals on a conventional integrated circuit element mounting substrate.

FIG. 5 is a main part plan view showing another example of the arrangement of the ground terminals and the power supply terminals on the conventional integrated circuit element mounting substrate.

FIG. 6 is a plan view of an essential part showing an example of an arrangement of a ground wiring layer and the like formed on an insulating layer located below an integrated circuit element mounting portion inside an insulating substrate of a conventional integrated circuit element mounting substrate. is there.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Integrated circuit element mounting board 2 ... Insulating base 2a ... Integrated circuit element mounting part 3 ... Ground wiring layer 4 ... Power supply wiring layer 5 ... Signal Wiring layer 6 Ground terminal 7 Power supply terminal 8 Signal terminal 9 Integrated circuit element

Claims (2)

[Claims] An integrated circuit element mounting portion is provided on an upper surface of an insulating base, and a ground wiring layer, a power supply wiring layer, and a signal wiring layer are formed therein, and are electrically connected to the respective wiring layers. Ground terminals, power supply terminals, and signal terminals are arranged and formed on the mounting portion, and the ground electrode, the power supply electrode, and the signal electrode on the lower surface of the integrated circuit element mounted on the mounting portion are electrically connected to the respective terminals. In the integrated circuit element mounting substrate connected to the above, the signal terminal is arranged in a peripheral area of the integrated circuit element, and the ground terminal and the power supply terminal are arranged such that both terminals are substantially alternately arranged in an inner area thereof. At least three rows arranged at intervals are arranged substantially in parallel with at least three rows, and the order of both terminals in the odd-numbered rows and the even-numbered rows is the same. A substrate for mounting an integrated circuit element, wherein the substrate is disposed so as to be shifted from the terminal in a direction by substantially half. 2. The integrated circuit according to claim 1, wherein the mounting portion of the substrate for mounting an integrated circuit element has the ground electrode, the power electrode, and the signal electrode corresponding to the ground terminal, the power terminal, and the signal terminal on a lower surface. An integrated circuit device, wherein a circuit element is mounted by electrically connecting corresponding terminals and electrodes.