JP2001095286A - Power supply control device and power supply control method - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To keep the operating speed of a wiper motor constant against fluctuations in wiping resistance and power supply voltage of a wiper and fluctuations in operating conditions such as ambient temperature. SOLUTION: In a wiper motor drive control device provided with a thermal FET QA which is switching-controlled in response to a PWM control signal 152 and controls power supply from a power supply to the wiper motor 102, a comparator CMP2 determines a load current flowing through the wiper motor 102 in a predetermined manner. Compare with threshold. The cycle counter 107 detects the operation cycle of the wiper motor 102 from the comparison result of the comparator CMP2 over time, and the cycle determination circuit 108
The second operation cycle is compared with a desired cycle. And PWM
The control unit 109 can control the speed of the wiper motor 102 by changing the duty ratio of the PWM control signal 152 based on the determination result of the operation cycle of the wiper motor 102.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a power supply control device for controlling power supply from a power supply to a load, and more particularly to a power supply control device for controlling the speed of a wiper motor provided in a vehicle or the like.

[0002]

2. Description of the Related Art A wiper driving device provided on a front window or the like of a vehicle has at least one wiper blade (hereinafter, referred to as a wiper) and moves the wiper between two inverted positions on a front window or a rear window of the vehicle. By reciprocating between them, water droplets such as rain are wiped off. In recent years, in speed control of a wiper, PWM
The speed can be adjusted arbitrarily and steplessly by the control, so that the speed operation of the wiper of the vehicle during rainfall or the like is more comfortable.

As a conventional wiper motor drive control device based on PWM control, there is a “wiper drive device” disclosed in Japanese Patent Application Laid-Open No. H11-48916, for example. FIG. 5 shows a configuration diagram of the wiper motor drive control device of the conventional example.

In FIG. 1, the wiper motor drive control device of the prior art is connected to a drain of an FET 4 via an electromagnetic relay 3 through a path connecting a power supply to a coil of the wiper motor 2.
Sources are connected in series, and power supply to the wiper motor 2 is controlled by switching control of the FET 4.

Here, the FET 4 is a so-called field-effect transistor and is capable of switching a large current circuit, for example, a power MOSFET (metal oxide semiconductor).
ductorfield effect transistor). The FET 4 is of an N-channel type, and conducts between the drain and the source when the gate voltage becomes “H” level. The FET 4 is driven by a pulse signal (drive signal) output from the IC 6, and a switching function is realized by an on / off operation based on the pulse signal. Note that a P-channel type can be used as the FET 4, and in this case, the IC 7 (charge pump circuit) is unnecessary.

[0006] The electromagnetic relay 3 includes an exciting coil 3a.
And a contact portion 3b having an a terminal, a b terminal, and a c terminal. The terminal c of the electromagnetic relay 3 is connected to one end of the coil of the wiper motor 2, the terminal b is connected to the source terminal of the FET 4, and the terminal a is connected to the ground potential (GND). The other end of the exciting coil 3a is connected to a transistor 5
The connection of the contact portion 3b is controlled by an exciting current generated by the on / off control of the transistor 5 through the ground potential. That is, the wiper switch 1
, The wiper switch 1 is closed (the wiper switch 1 is closed), the transistor 5 is turned on, the contact 3b is in a state where the c terminal and the b terminal are connected, and F
A power supply voltage is applied to the coil of the wiper motor 2 through the signal path between the drain and source of the ET 4 and through the c terminal and the b terminal of the electromagnetic relay 3.

The IC 6 has a voltage input terminal (f terminal,
This is a voltage-frequency converter having a (v terminal), a pulse signal output terminal (out terminal), and an enable signal input terminal (E terminal). When the wiper switch 1 is closed, the enable signal goes high and the IC 16
Works. The IC 16 outputs a pulse signal from the out terminal, and its frequency is determined by the circuit constants of the resistor R and the capacitor C connected to the f terminal. Further, the duty ratio of the pulse signal is determined by the resistance value of the variable resistor VR connected to the v terminal. Here, the duty ratio refers to the time ratio of the signal being at “H” level in one cycle.

The pulse signal output from the IC 6 (voltage-frequency converter) is boosted by the IC 7 (charge pump circuit) and supplied to the gate terminal of the FET 4. The wiper switch 1 instructs the operation of the wiper. Is turned on (the wiper switch 1 is closed), the on / off of the FET 4 is turned on / off by PWM (pulse width modul) by a pulse signal having a duty ratio corresponding to the resistance value of the variable resistor VR.
ation; pulse width modulation).

As described above, the voltage supplied from the power supply to the wiper motor 2 is PWM-controlled by the pulse signal having the duty ratio corresponding to the resistance value of the variable resistor VR, and the operating speed of the wiper motor 2 is reduced by the resistance value of the variable resistor VR. Speed according to the speed. Therefore, if the driver or the like operates the variable resistor VR, the operation speed of the wiper can be adjusted to an arbitrary size.

[0010]

However, in the above-described conventional wiper motor drive control device, it is difficult to detect and control the speed change of the wiper due to the wiping resistance between the wiper and the window glass, the temperature, and the like. Therefore, the operating speed of the wiper motor cannot be kept constant with respect to fluctuations in the wiping resistance of the wiper, power supply voltage, and fluctuations in operating conditions such as the ambient temperature, and there is a problem in safety.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional problems, and has been made in consideration of the operation of the wiper motor even when the operating conditions such as the wiping resistance of the wiper, the power supply voltage, and the ambient temperature change. It is an object of the present invention to provide a power supply control device and a power supply control method capable of maintaining a constant speed.

[0012]

According to a first aspect of the present invention, there is provided a power supply control apparatus comprising:
A power supply control device provided with a switching unit that is switched and controlled in accordance with an M control signal and controls power supply from a power supply to a load, wherein a comparing unit that compares a load current flowing through the load with a predetermined threshold value; Cycle detecting means for detecting an operation cycle of the load from a temporal comparison result of the comparing means; and switching control means for changing a duty ratio of the PWM control signal in accordance with the operation cycle detected by the cycle detecting means. It is a thing.

In the power supply control device according to a second aspect of the present invention, the load is a motor, and the speed of the motor is controlled by a change in a duty ratio of a PWM control signal by the switching control means.

According to a third aspect of the present invention, there is provided a power supply control method, comprising: a power supply control device having switching means for performing switching control in response to a PWM control signal to control power supply from a power supply to a load. In the control method, a comparing step of comparing a load current flowing through the load with a predetermined threshold value; a cycle detecting step of detecting an operation cycle of the load from a temporal comparison result of the comparing step; And a switching control step of changing the duty ratio of the PWM control signal in accordance with the operation cycle detected in (1).

Further, in the power supply control method according to a fourth aspect of the present invention, the load is a motor, and the speed of the motor is controlled by changing a duty ratio of a PWM control signal in the switching control step.

In the power supply control device according to the first and second aspects of the present invention, the power supply control device includes a switching unit that performs switching control in response to a PWM control signal and controls power supply from a power supply to a load such as a motor. At
The comparing means compares the load current flowing through the load with a predetermined threshold value, and the cycle detecting means detects the operation cycle of the load from the comparison result of the comparing means with time, and according to the operating cycle detected by the cycle detecting means. By changing the duty ratio of the PWM control signal by the switching control means, motor speed control and the like are performed. This allows
Since the operation cycle of the load can be accurately detected and the power supply to the load can be controlled in accordance with the operation state of the load, the speed control of the motor and the like can be optimally performed.

In the power supply control method according to the third and fourth aspects of the present invention, the power supply control apparatus includes switching means for controlling the power supply from a power supply to a load such as a motor, the switching being controlled in accordance with the PWM control signal. In the power supply control method, the load current flowing in the load is compared with a predetermined threshold value in the comparing step, and the operation cycle of the load is detected from the temporal comparison result in the synchronization detecting step.
By changing the duty ratio of the PWM control signal in a switching control step in accordance with the detected operation cycle, motor speed control and the like are performed. Thus, the power supply to the load can be controlled in accordance with the operation state of the load by accurately detecting the operation cycle of the load, so that the motor speed control and the like can be optimally performed.

For example, when controlling the operation speed of the wiper motor of the vehicle, the load current flowing through the wiper motor is compared with a predetermined threshold value, and the operation cycle of the wiper motor is detected based on the result over time, and the detected operation period is determined. The speed control of the wiper motor is performed by changing the duty ratio of the PWM control signal based on the operation cycle of the wiper motor. As described above, the operation cycle of the wiper motor is accurately detected, and the optimum speed control is performed in accordance with the operation cycle of the wiper motor.
It is possible to realize a power supply control device and a power supply control method that can keep the operation speed of the wiper motor constant even when the operating conditions such as the cycle temperature change.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a power supply control device and a power supply control method according to the present invention will be described with reference to the drawings. Here, FIG. 1 is a configuration diagram of a power supply control device according to an embodiment of the present invention, FIG. 2 is a configuration diagram of a switching device used in the power supply control device of the embodiment, and FIG. 3 is a movement of a wiper and a corresponding wiper motor. And FIG. 4 is a flowchart showing the operation of the power supply control device according to the embodiment.

Before giving a detailed description of the embodiment, first,
A switching device (hereinafter referred to as YAFET) used in the power supply control device of the embodiment will be described with reference to FIG. The YASFET has a drain D-source S of a thermal FET QA as a semiconductor switch connected to a path for supplying the output voltage VB of the power supply 101 to the load 102.
Are connected in series to control power supply by switching control of the thermal FET QA.
This is an integrated circuit in which the driving means, the protection means, the load current detection means, and the like are combined with the TQA and integrated into one chip 110.

In FIG. 2, a YSFET 110 is a charge pump 30 as driving means for a thermal FET QA.
5 and a drive circuit 111. Drive circuit 111
Includes a source transistor having a collector connected to the output of the charge pump 305 and a sink transistor having an emitter connected to the ground potential, which are connected in series. Based on a switching signal by turning on / off the switch SW1, these sources are connected to each other. The on / off control of the transistor and the sink transistor outputs a signal for driving and controlling the thermal FET QA. When the output voltage VB of the power supply 101 is, for example, 12 [V], the output voltage of the charge pump is, for example, VB + 10 [V].

Next, as a protection means for the thermal FET QA, the YAFET 110 has a cutoff latch circuit 306. The cut-off latch circuit 306 is a general thermal FE
This function realizes the overheat protection function also added to T. When the built-in temperature sensor detects that the temperature of the thermal FET QA has risen to a temperature higher than a specified value, detection information to that effect is sent to the latch circuit. The thermal FET QA is forcibly turned off by making the overheat blocking FET connected between the gate and the source of the thermal FET QA be turned on. The information held by the latch circuit is output via the terminal T14 and can be used as diagnostic (diagnosis) information.

Next, as a load current detecting means of the thermal FET QA, the YASFET 110 is provided with an overcurrent detecting function 30.
1 and an undercurrent detection function. First, the overcurrent detection function 301 specifically includes the FET QB and the resistors R1 to R
5, Rr1, diode D1 and comparator CMP
1 is realized. That is, the FET QB and the resistor Rr1 are means for generating a first reference voltage in overcurrent detection, and the source SB potential of the FET QB is supplied to the inverting terminal (-) of the comparator CMP1.
The non-inverting terminal (+) of the comparator CMP1 has
The voltage VD between the drain D and the source S of the thermal FET QA
The voltage obtained by dividing SA by the resistors R1 and R2 is equal to the voltage of the resistor R5
Is supplied via

That is, the drain D of the thermal FET QA
A first reference voltage having a voltage characteristic substantially equivalent to the source-to-source voltage VDSA is generated by the FET QB on the same chip 110 and the resistor Rr1 outside the chip 110, and the first reference voltage and the thermal FET are output by the comparator CMP1.
Overcurrent detection is performed by detecting the difference between the voltage VDSA between the drain D and the source S of QA.

Therefore, when a complete short circuit (dead short circuit) occurs on the load 102 side, the comparator CMP
1 becomes valid (“H” level), and the driving circuit 1
11 turns off the thermal FET QA. Also,
When the thermal FET QA transitions from the OFF state to the ON state while a complete short circuit (dead short circuit) occurs, or when an incomplete short circuit (rare short circuit) having a certain short-circuit resistance occurs, The on / off control of the thermal FET QA is repeatedly performed to overheat the thermal FET QA by a periodic heat generation function, and the overheat protection of the thermal FET QA is accelerated by the overheat protection function.

The setting of the first reference voltage, that is, the setting of the resistor Rr1 is performed as follows. That is, since the thermal FET QA is usually formed by connecting n FETs (having the same characteristics as the FET QB) in parallel, the resistor Rr1 may be set to (the resistance value of the load 102 × n). It is desirable to set a resistance value of about 102 as a short-circuit resistance at the time of incomplete short-circuit (rare short). FIG.
Although the configuration is such that the output of the comparator CMP1 is supplied only to the drive circuit 111, the output can be output to the outside via a terminal and used for other control or the like.

Next, the undercurrent detection function, specifically,
This is realized by the FET QC, the resistor Rr2, and the comparator CMP2. That is, the FET QC and the resistor Rr2 are means for generating a second reference voltage in detecting an undercurrent, and the source SC potential of the FET QC is supplied to the inverting terminal (-) of the comparator CMP2. The non-inverting terminal (+) of the comparator CMP2 is supplied with the source SA potential of the thermal FET QA.

That is, the drain D of the thermal FET QA
A second reference voltage having a voltage characteristic substantially equivalent to the voltage VDSA between the sources S is generated by the FET QC on the same chip 110 and the resistor Rr2 outside the chip 110, and the second reference voltage and the thermal FET are output by the comparator CMP2.
Undercurrent detection is performed by detecting the difference between QA and the voltage VDSA between the drain D and the source S.

Therefore, when a disconnection failure or the like occurs on the load 102 side, the output of the comparator CMP2 becomes valid (“L” level) and is output to the outside of the chip 110 via the terminal T15. Here, the setting of the second reference voltage, that is, the setting of the resistor Rr2 is performed as follows.
Similarly to the first reference voltage (resistance Rr1), the resistance Rr2 may be set to (the resistance value of the load 102 × n), but the resistance value of the load 102 may be set to a value about the load resistance at the time of disconnection failure. Is desirable.

In addition to the driving means, protection means, and load current detecting means described above, the YAFET 110 includes a power supply Enable 302, masking (rush current mask circuit) 303 for avoiding overcurrent determination of inrush current, and ON / OFF count. Although an ON / OFF counting and integrating circuit 304 for performing a cutoff control by integration is also shown, the description is omitted because it is not directly related to the present invention.

Finally, the features of the YAFET 110 can be summarized as follows. First, the shunt resistor for current detection is not required, and power consumption in the power supply path can be suppressed, which is advantageous for a large current circuit. Thirdly, the sensitivity and the current detection accuracy are high. Third, the thermal FET QA can be turned on / off by simple drive control. High-speed processing is possible,
Fourth, the circuit configuration can be reduced by the one-chip configuration, the mounting space can be reduced, and the cost of the device can be reduced. Fifth, the current detection is performed by using the drain-source voltage VDSA of the thermal FET QA and the first reference voltage. And the second
Since the detection is performed by detecting the difference from the reference voltage, the FETs QB and QC and the thermal FET QA are mounted on the same chip.
Is formed, it is possible to eliminate the common-mode error factor in current detection, that is, the influence of power supply voltage, temperature drift, and variation between lots.

Next, the power supply control device of the present embodiment will be described with reference to FIG. The power supply control device of the present embodiment obtains the operation cycle of the wiper motor (load) of the vehicle by using the undercurrent detection function of the above-described YASFET 110, and changes the duty ratio of the PWM control signal based on the result. This is a wiper motor drive control device capable of keeping the operation speed of the wiper motor constant even when the wiper resistance and the power supply voltage fluctuate and the operating conditions such as the ambient temperature fluctuate.

In FIG. 1, the main circuit components (FETQC, resistor Rr2,
The functions and operations of the components other than the comparator CMP2, the cycle counter 107, the cycle determination circuit 108, and the PWM control unit 109) are the same as those described with respect to the above-described YASFET 110.

In the figure, the power supply control device of the present embodiment detects, as main circuit components, an FET QC for realizing an undercurrent detection function, a resistor Rr2 and a comparator CMP2, and an operation cycle of a wiper motor (load) 102. Counter 107 for performing the operation and the wiper motor 1
02: a cycle determination circuit 108 for determining whether the operation cycle of 02 is a desired cycle (a cycle of a speed originally set);
A PWM control unit 109 that controls the operation speed of the wiper motor 102 is provided.

Here, the comparator CMP2 corresponds to comparing means for comparing the load current flowing through the wiper motor 102 with a predetermined threshold value. Further, the FET QC and the resistor Rr2 are means for generating a second reference voltage serving as a predetermined threshold value of the load current. The source SC potential of the FET QC is supplied to the inverting terminal (-) of the comparator CMP2, and the non-inverting terminal (+) of the comparator CMP2 is
The source SA potential of the thermal FET QA is supplied. By comparing potentials supplied to two input terminals of the comparator CMP2, the wiper motor 102
Is generated.

That is, the drain D of the thermal FET QA
A second reference voltage having a voltage characteristic substantially equivalent to the voltage VDSA between the sources S is generated by the FET QC on the same chip 110 and the resistor Rr2 outside the chip 110, and the second reference voltage and the thermal FET are output by the comparator CMP2.
Undercurrent detection is performed by detecting the difference between the voltage VDSA between the drain D and source S of QA, and the status signal ST is generated as a result of the undercurrent detection.

The load current flowing through the wiper motor 102 is
There is a characteristic that the value changes according to the movement of the wiper reciprocating between two reversing positions on the front window of the vehicle, has a value close to zero when the wiper is reversed, and when the wiper passes the reversing position. To rise.

In this embodiment, the status signal ST is generated by detecting the timing at which the load current stops flowing using this characteristic. FIGS. 3B and 3C show the load current and the status signal ST corresponding to the movement of the wiper during normal operation in which no overload occurs.
It is represented as Here, FIGS. 3 (a), (b),
(C) shows the movement of the wiper and the accompanying wiper motor 102
FIG. 4 is an explanatory diagram showing a time course of a load current and a status signal ST.

For example, the rated value of the load current at the time of PWM control (a value originally corresponding to the set speed) is 10 [A].
, The resistance Rr2 of the means for generating the second reference voltage
Is set such that a load current of 5 A or less of the reference current can be detected. Thus, the source voltage VSC of the second reference voltage FETQC corresponding to the reference current 5 [A] is supplied to the "-" input terminal of the comparator CMP2.

Therefore, the output of the comparator CMP2 has a potential corresponding to the load current supplied to the “+” input terminal from the potential corresponding to the reference current 5 [A] supplied to the “−” input terminal of the comparator CMP2. When the potential supplied to the “+” input terminal is smaller than the potential supplied to the “−” input terminal, the signal becomes invalid (“L” level) when the potential is higher (“H” level). A pulse signal (status signal ST) as shown in FIG. Here, FIG. 3C shows the state of the comparator CMP.
2 shows a signal waveform of a status signal ST output from the second signal generator 2.

As shown in FIG. 3, the status signal ST
Becomes "L" level when the load current hardly flows at the time of inversion of the wiper (reference current 5 [A] or less), and becomes "H" level when the wiper moves away from the inversion position (reference current 5 [A] or more). become. Therefore, the status signal ST
, The operation cycle of the wiper motor 102 can be obtained by measuring the period of the next fall (operation cycle t ₁ , t ₂ , t ₃ ,...) Of the load from the fall (turn-off) of the wiper motor 102.

Next, the cycle counter 107 obtains the wiper motor 102
Corresponds to a cycle detecting means for detecting the operation cycle of the operation. That is, in the period count 107 counts the operation cycle of the wiper motor 102 (inversion cycle of the wiper) on the basis of the status signal ST output from the comparator CMP2, representing the duty cycle t _x of the wiper motor 102 with respect to the period determination circuit 108 The digital value 150 is output.

As a more specific configuration of the period counter 107, the falling (turn-off) of the status signal ST
A configuration is conceivable in which a pulse of a predetermined clock is counted during a period from to the next fall. Here, as the clock, an operation clock of a CPU (not shown) that controls the entire power supply control device may be used. That is, the actual value of the operation cycle of the wiper motor 102 can be obtained by multiplying the operation clock cycle × the pulse count.

[0044] In the cycle determining circuit 108 compares the operation period t _x of the wiper motor 102 from the period counter 107 and the desired period (period of the speed to be set originally) t _typ. Then, based on the comparison result, the wiper motor 10
2 to increase or decrease the operation speed, and output a speed control signal 151 for changing the duty ratio of the PWM control signal 152 based on the increase or decrease. For example, the cycle determination circuit 108
What is necessary is just to implement | achieve by the digital comparator which compares the output (digital value) of the period counter 107 with the count value equivalent to 1 [second].

The PWM control unit 109 corresponds to switching control means for changing the duty ratio of the PWM control signal 152 according to the operation cycle of the wiper motor 102 detected by the cycle counter 107. In other words, receives a speed control signal 151 based on the duty cycle t _x of the wiper motor 102 detected by the period counter 107 from cycle determining circuit 108, by changing the duty ratio of the PWM control signal 152 to control the operation speed of the wiper motor 102 .

When the cycle judging circuit 108 is realized by the digital comparator, the speed control signal 151 which is the output of the digital comparator is a binary logic signal indicating that the operation cycle t _x is larger / smaller than the desired cycle t _typ. In the PWM control unit 109, the speed control signal “H”
The duty ratio is increased or decreased by a predetermined amount in accordance with the / "L" level.

Next, the operation of the power supply control device of the present embodiment having the above-described configuration, that is, the power supply control method will be described in detail with reference to the flowchart of FIG. FIG. 4 is a flowchart showing the operation of the power supply control device of the present embodiment.

First, in step S401, the status signal ST is generated in the comparator CMP2. Specifically, in step S411, the load current is compared with a predetermined threshold. That is, the value of the resistor Rr2 is set so that a load current that is equal to or less than the reference current serving as a determination value can be detected, and the source voltage VSA of the thermal FET QA corresponding to the load current input to the two input terminals of the comparator CMP2, respectively. The source voltage VSC of the FET QC corresponding to the reference current is compared.

In the comparison in step S411, if the load current is larger than the predetermined threshold value, step S4
At "12", an "H" level is output. On the other hand, if the load current is smaller than the predetermined threshold, an “L” level is output in step S413. By repeating steps S411 to S413 for a predetermined period, a pulse-like status signal ST is generated.

Next, in step S402, the period counter 107 detects the operation period t _x of the wiper motor 102 (load) from the status signal ST generated at step S401. Specifically, the status signal ST
The counter is started at the falling edge of the clock and the time until the next falling edge is measured. Next, in step S403, the cycle determination circuit 108 detects the operation cycle t of the load detected.
_x is compared with a desired cycle (period of the originally desired speed) t _typ . If the load operation cycle t _x is longer than the desired cycle t _typ , that is, if the wiper is slower than the desired operation speed, In step S404, the duty ratio of the PWM control signal 152 is increased to increase the operating speed of the wiper motor 102. If the operation cycle t _{x of the} load is shorter than the desired cycle t _typ , that is, if the wiper is faster than the desired operation speed, in step S405, P
The duty ratio of the WM control signal 152 is reduced.

In step S406, step S404
And the duty ratio P changed in step S405.
In response to the WM control signal 152, the switch of the thermal FET QA is switched.
Switching control is performed. That is, the PWM control signal 15
Based on the change in the duty ratio of 2, the driving circuit 111
Output a signal to drive and control the thermal FET QA,
FET QA controls the wiper motor 1 by switching control.
02 is controlled. Note that the above step S4
03 to S406 are the operation cycle t of the wiper motor 102. _x
Operation of the wiper motor 102.
Can be kept constant.

As a modification of this embodiment, the cycle counter 1
07 and the cycle determination circuit 108 can be realized by a microcomputer (CPU). That takes a status signal ST to the microcomputer (CPU), and starts the software timer status signal ST is at the timing of falling, the operation by measuring the time until the timing of the fall of the next status signal ST period t _x The processing of steps S402 to S405 in FIG. 4 is realized by a program of a microcomputer (CPU).

When the processes of steps S402 to S405 are realized by the program of the microcomputer (CPU), more complicated control can be performed. That is, in the comparison of step S403, detects the difference between the wiper motor (load) 102 of the operation period t _x and the desired period (period of the speed to be set originally) t _typ, at step S404 and S405 in accordance with the difference If the amount of change in the duty ratio is changed, it is possible to reach the optimum speed (desired period) in a shorter time.

As described above, in the power supply control device and the power supply control method of the present embodiment, the wiper motor 102
Is compared with a predetermined threshold value, and the operation cycle of the wiper motor 102 is detected from the result over time,
By changing the duty ratio of the PWM control signal 152 from the detected operation cycle of the wiper motor 102, the wiper motor 10
2 is performed. As described above, since the operation cycle of the wiper motor 102 is accurately detected and the optimal speed control is performed according to the operation cycle of the wiper motor 102, the wiper resistance of the wiper, the fluctuation of the power supply voltage, and
Wiper motor 1 for fluctuations in operating conditions such as cycle temperature
02 can be kept constant, and the safety of the device can be improved.

In the power supply control device of the present embodiment, the status signal ST is generated using YASFFE.
Although the undercurrent detection means of T110 was used,
110 is modified to output the output of the comparator CMP1 to the outside of the YASFET 110 through the terminal 15;
FET QB realizing overcurrent detection function, resistors R1 to R
5, Rr1, diode D1 and comparator CMP
1, the status signal ST can be generated. In this case, the reference value (judgment value) in the comparator CMP1 is the maximum value of the load current (20 in FIG. 3).
Current value slightly smaller than [A]) (17-18 [A])
Will be set.

Further, in the present embodiment, the power supply control device and the power supply control method of the present invention selectively supply power from a battery to the wiper motor based on the operation cycle of the wiper motor in the vehicle. Although the embodiment applied to the device for controlling the operation speed of the power supply has been described, the present invention is not limited to such an embodiment, and the operation of the load has a periodicity, and the power supply from the power supply to the load is performed. Any type of power supply control device can be applied as long as it is a power supply control device that performs switching control according to a PWM control signal.

[0057]

As described above, according to the power supply control device and the power supply control method of the present invention, the operation cycle of the load is accurately detected, and the power supply to the load is controlled according to the operation state of the load. Therefore, the speed control of the motor can be optimally performed. Further, for example, when controlling the operating speed of the wiper motor of the vehicle, the operating speed of the wiper motor can be kept constant with respect to fluctuations in the wiping resistance and power supply voltage of the wiper, and fluctuations in operating conditions such as ambient temperature. ,
Thereby, safety can be improved.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a power supply control device according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of a switching device used in the power supply control device of the embodiment.

FIG. 3 is an explanatory diagram showing the movement of the wiper, the load current of the wiper motor accompanying the movement of the wiper, and the time course of the status signal ST.

FIG. 4 is a flowchart showing an operation in the power supply control device of the embodiment.

FIG. 5 is a configuration diagram of a conventional wiper drive control device.

[Explanation of symbols]

 Reference Signs List 101 power supply 102 load (wiper motor) 107 cycle counter 108 cycle determination circuit 109 PWM control unit 110 YAFET (chip constituent part) 111 drive circuit 150 digital value 151 speed control signal 152 PWM control signal 301 overcurrent detection function 302 power supply enable (power supply Enable) 303) Inrush current mask circuit (masking) 304 ON / OFF counting and integrating circuit 305 Charge pump 306 Cut-off latch circuit QA Thermal FET QB, QC FET RG Internal resistance R1 to R10, Rr1, Rr2 Resistance CMP1, CMP2 Comparator ZD1 Zener diode D1 Diode SW1 switch VB Power supply voltage ST Status signal

Claims (4)

[Claims] 1. A power supply control device comprising a switching unit which is switched and controlled in accordance with a PWM control signal and controls power supply from a power supply to a load, wherein a load current flowing through the load is compared with a predetermined threshold value. Comparing means; cycle detecting means for detecting an operation cycle of the load from a temporal comparison result of the comparing means; and P in accordance with the operating cycle detected by the cycle detecting means.
A power supply control device, comprising: switching control means for changing a duty ratio of a WM control signal. 2. The power supply control device according to claim 1, wherein the load is a motor, and the switching control means controls the speed of the motor by changing a duty ratio of a PWM control signal. 3. A power supply control method for a power supply control device, comprising: a switching unit that is controlled to be switched in response to a PWM control signal and controls a power supply from a power supply to a load. A comparison step of comparing with a threshold value; a cycle detection step of detecting an operation cycle of the load from a time-dependent comparison result of the comparison step; and an operation cycle of the PWM control signal according to the operation cycle detected in the cycle detection step. A power supply control method, comprising: a switching control step of changing a duty ratio. 4. The power supply control method according to claim 3, wherein the load is a motor, and the speed of the motor is controlled by changing a duty ratio of a PWM control signal in the switching control step.