JP2001068954A - Signal processing circuit - Google Patents

Abstract

(57) [Summary] [Problem] A variable step width is accurately set to a decibel = constant, and is resistant to variation. SOLUTION: A switch circuit sa5 is inserted between an input terminal and an output terminal To. Between the output terminal To and the ground, a switch circuit sa1 and a resistor ra11, a switch circuit sa2 and a resistor ra21, and a switch circuit s
a3 and the resistor ra31 are inserted in parallel with the switch circuit sa4 and the resistor ra41. A resistor ra12 is inserted between the switch circuits sa1 and sa2 provided in parallel. Similarly, switch circuits s provided in parallel
a2 and a switch circuit (not shown), a resistor ra22
Is inserted, a resistor ra32 is inserted between the switch circuits sa3 and sa4, and a resistor ra42 is inserted between the switch circuits sa4 and sa5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing circuit having an accurate variable step width.

[0002]

2. Description of the Related Art It is assumed that a variable gain amplifier having a gain range of about 30 dB is to be realized with a variable step width of 0.1 dB. Considering a flash method in which a switch is provided for each 0.1 dB step and the switch is switched, 301 switches are required. In the case of the flash method, there are problems such as deterioration of frequency characteristics and increase in layout area due to the capacitance of the switch.

Therefore, in practice, the variable gain amplifier is divided into two or more stages, such as a variable gain amplifier (coarse amplifier) for the higher order and a variable gain amplifier (fine amplifier) for the lower order. Constitute. For example, 29.9 dB = coarse amplifier 1 stage (28 dB = 2.0 dB)
B step x 14) + one stage of fine amplifier (1.9 dB =
(0.1 dB steps × 19) can be realized with a two-stage configuration. At this time, 35 switches are required.

[0004] At this time, if the variable step width is not exactly constant, the gain is reversed when the carry from the fine amplifier to the coarse amplifier occurs, and the problem that the monotonic increase cannot be maintained occurs. For these reasons, when a variable gain amplifier is divided into an upper order and a lower order to realize a multi-stage, cascade connection configuration, it is necessary that the variable step width is exactly constant for the upper variable gain amplifier.

[0005]

However, when a variable attenuator using a resistor string realizes a variable step width in which decibel (dB) is constant, it is necessary to use a resistance value calculated in detail. Attempting to configure this with only a single resistor has the problem of increasing the number of resistors used.

For example, FIG. 7 shows an example of a variable attenuator having a variable step width of -3.5 dB and only a single resistor r. The switch circuit si5 is inserted between the input terminal Ti and the output terminal To. The output terminal To is connected to one of the switch circuits si1, si2, si3, and si4. Eight single resistors r connected in series are inserted between the other switch circuit si1 and the other switch circuit si2. 1 connected in series between the other switch circuit si2 and the other switch circuit si3.
Two single resistors r are inserted. Eighteen single resistors r connected in series are inserted between the other switch circuit si3 and the other switch circuit si4. 27 single resistors r connected in series are inserted between the other switch circuit si4 and the other switch circuit si5. Sixteen single resistors r connected in series are inserted between the other end of the switch circuit si1 and the ground.

FIG. 7 shows an example of -3.5 dB steps × 4. As described above, the resistor string shown in FIG. 7 has a problem that as many as 81 single resistors r are required for log units.

Further, in the case of the variable attenuator using the resistor string shown in FIG. 7, if the number of resistors is to be reduced,
It cannot be configured with only a single resistor.

FIG. 8 shows an example of a variable attenuator having a variable step width of -3.5 dB. The switch circuit sj5 is inserted between the input terminal Ti and the output terminal To.

The output terminal To is connected to switch circuits sj1, s
j2, sj3, and sj4.
A resistor 8r that is eight times the single resistor r is inserted between the other switch circuit sj1 and the other switch circuit sj2. A resistor 12r that is 12 times the single resistor r is inserted between the other switch circuit sj2 and the other switch circuit sj3. A resistor 18r that is 18 times the single resistor r is inserted between the other switch circuit sj3 and the other switch circuit sj4. A resistor 27r that is 27 times the single resistor r is inserted between the other switch circuit sj4 and the other switch circuit sj5. Between the other end of the switch circuit sj1 and the ground, a resistor 16 which is 16 times the single resistor r
r is inserted.

FIG. 8 shows an example of -3.5 dB steps × 4. As described above, when only considering the reduction of the number of resistors to be used, it can be realized by using five types of resistance values, for example, POLY resistors. For this reason, the variation in the absolute value of the resistance value affects the variation in the variable step width.

When a variable attenuator is realized by using an r-nr resistor network, generally, all resistors including the terminating resistor cannot be constituted by a single resistor. Therefore, there has been a problem that the variation in the absolute value of the resistance value affects the variable step width, and the variable step width cannot be accurately set to a decibel (dB) = constant.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a signal processing circuit in which the variable step width is exactly dB and constant, and which is resistant to variations.

[0014]

According to a first aspect of the present invention, there is provided a resistor having a constant step width of attenuation and switch means for varying the attenuation, wherein the resistor has a terminal resistor. A signal processing circuit characterized in that all the included resistors are configured with only one type of resistance value.

According to the fourth aspect of the present invention, the first resistor section in which the step width of the attenuation is fixed and all the resistors including the terminating resistor are composed of only one type of resistance value, and the attenuation is variable. A first variable attenuator comprising first switch means for causing the first variable attenuator to be inserted into a negative feedback path; a first variable gain means comprising first operational amplifying means for inserting the first variable attenuator into a negative feedback path; A second resistor section in which the step width of the attenuation smaller than the resistance section is constant and all resistors including the terminating resistor are constituted by only one type of resistance value, and a second switch means for varying the small attenuation. A second variable attenuator comprising a second variable attenuator, a second operational amplifying means for inserting the second variable attenuator into a negative feedback path, and first and second variable gain means. A signal processing circuit characterized by being cascaded.

A switch circuit and r-n composed of a single resistor
The variable attenuator configured by using the r-resistance network switches the switch circuit to make the variable step width of the attenuation amount decibel (dB) = constant. The variable attenuator is inserted into the negative feedback path of the operational amplifier in the variable gain amplifier circuit.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a first embodiment of a variable attenuator using an r-nr resistor network and a switch circuit. As shown in FIG. 1, a power supply Vi is supplied from an input terminal Ti. The switch circuit sa5 is inserted between the input terminal Ti and the output terminal To. As an example, the switch circuit is configured by a MOS transistor. Between the output terminal To and the ground, a switch circuit sa1 and a resistance ra11, and a switch circuit sa2 and a resistance ra21
And the switch circuit sa3 and the resistor ra31 and the switch circuit sa4 and the resistor ra41 are inserted in parallel. A resistor ra12 is inserted between the switch circuits sa1 and sa2 provided in parallel. Similarly, a resistor ra22 is inserted between the switch circuit sa2 provided in parallel and a switch circuit (not shown), and the switch circuit sa3
A resistor ra32 is inserted between the switch circuits sa4 and sa4, and a resistor ra42 is inserted between the switch circuits sa4 and sa5.

[0018] As an example, the value of the resistor ra11 is the characteristic impedance Z _0. Also, resistors ra21 and ra3
1, the value of ra41 becomes n × single resistance r, and the resistance ra
The values of 12, ra22, ra32, and ra42 are single resistors r.

FIG. 1 shows switch circuits sa1 to sa5.
Is turned off and the output terminal To is viewed from the input terminal Ti, the characteristic impedance becomes Z ₀
Becomes The characteristic impedance Z ₀ is given by: Z ₀ = {r + (n × r × Z ₀ ) / (n × r + Z ₀ )} (1) (Z ₀ / r) = (1/2) × {1 +} (4 × n + 1)｝ (2)

Therefore, the resistance ra11 as the terminating resistance is:
Characteristic impedance Z ₀ is required. In order for the specific impedance Z _{0 to} be an integral multiple of the single resistor r, (2)
Considering the equation, the following condition is required: n = K × K + K, K = 1, 2, 3,... (3). If the condition of the expression (3) is satisfied, the characteristic impedance Z ₀ can be realized by an integral multiple of the single resistor r, so that accuracy can be easily obtained. Then, it is possible to realize a single resistance without approximating all the resistances of the r-nr resistance network. By realizing with a single resistor, it is possible to generate a variable attenuator that is resistant to the variation in which the variation in the absolute value of the resistance value due to the process does not affect the variable step width.

Here, considering the attenuation amount At for one stage of r-nr, At = (n × r × Z ₀ ) / (n × r + Z ₀ ) / ｛r + (n × r × Z ₀ ) / (n × r + Z ₀ )｝ = 1 / {1+ (Z ₀ / r × 1 / n)} (4) At this time, since both Z ₀ / r and 1 / n are constants when viewed from any switch circuit, the attenuation At becomes decibel (dB) = constant.

When realizing an r-nr resistor network, it is not only required that r is a single resistor but simply constituted by one and n resistors, but it is sufficient if n times as many resistors can be realized. This can be realized by devising a combination of series and parallel connection of the single resistor r. A second embodiment of the r-6r resistor network, Z ₀ / r _{= 3 (} 3.5 dB steps) is shown in FIG.

FIG. 2A shows one and six single resistors r.
This is an example of the configuration. A power supply Vi is supplied from an input terminal Ti. The switch circuit sb5 is inserted between the input terminal Ti and the output terminal To. A switch circuit sb1 and resistors rb11, rb1 are connected between the output terminal To and the ground.
2, rb13, switch circuit sb2 and resistor rb2
1, rb22, rb23, rb24, rb25, rb2
6, switch circuit sb3 and resistors rb31, rb3
2, rb33, rb34, rb35, rb36, switch circuit sb4 and resistors rb41, rb42, rb4
3, rb44, rb45, and rb46 are inserted in parallel.

Switch circuits sb1 and sb provided in parallel
The resistor rb14 is inserted between the resistor rb14 and the resistor b2. Similarly, between switch circuits sb2 and sb3 provided in parallel,
The resistor rb27 is inserted, and the switch circuits sb3 and sb4
Between the switch circuit sb
4 and sb5, a resistor rb47 is inserted.

FIG. 2B is an example in which the number of resistors is reduced by combining the r-6r resistor network in series and parallel connection of a single resistor r '. A power supply Vi is supplied from an input terminal Ti. The switch circuit sc5 is inserted between the input terminal Ti and the output terminal To. Between the output terminal To and the ground, the switch circuit sc1 and the resistor rc11, and the switch circuit sc2 and the resistor rc2
1, rc22, switch circuit sc3 and resistor rc3
1, rc32, switch circuit sc4 and resistor rc4
1, rc42 are inserted in parallel.

Switch circuits sc1 and s provided in parallel
The resistors rc12, rc13, and rc14 are inserted in parallel with the resistor c2. Similarly, between switch circuits sc2 and sc3 provided in parallel, resistors rc23, rc24,
rc25 is inserted in parallel, and switch circuits sc3 and sc
4, resistors rc33, rc34, and rc35 are inserted in parallel, and between switch circuits sc4 and sc5, resistors rc43, rc44, and rc45 are inserted in parallel.

As described above, in FIG. 2A, 25 single resistors r were required. However, by devising a combination of series and parallel connection, as shown in FIG. 2B, 19 single resistors r were used. r '. In other words, it is only necessary that the ratios match, and in FIG. 2A, the ratio is 1R: 6R: 3R, and in FIG. 2, it is R / 3: 2R: R.

Further, in order to make the impedance resistance Z ₀ an integral multiple of the single resistance r, if the value of K increases when the condition of the above equation (3) is satisfied, the number of resistances increases. Since it increases, the connection is made in parallel as shown in FIG. 2B.

The first variable gain amplifier of the inversion type in which the variable attenuator shown in FIG. 1 is inserted into the negative feedback path of the operational amplifier circuit.
3 is shown in FIG. The non-inverting input terminal of the operational amplifier OP1 is grounded. The switch circuit sd1 and the resistor rd11 are inserted between the inverting input terminal of the operational amplifier OP1 and the output of the operational amplifier OP1. A switch circuit sd2 and a resistor rd21, a switch circuit sd3 and a resistor rd31, a switch circuit sd4 and a resistor r are provided between the inverting input terminal of the operational amplifier circuit OP1 and the ground.
d51, a switch circuit sd5 and a resistor rd61,
The switch circuit sd6, the resistor rd71, and the power supply e are inserted in parallel.

A resistor rd12 is inserted between the switch circuits sd1 and sd2. Similarly, the switch circuit sd2
Between the switch circuit sd3 and a switch circuit (not shown), a resistor rd22 is inserted between the switch sd3 and the switch circuit (not shown).
d32 is inserted, and a resistor rd41 is inserted between a switch circuit (not shown) and sd4. Further, a resistor rd52 is inserted between the switch circuits sd4 and sd5, and a resistor rd6 is inserted between the switch circuits sd5 and sd6.
2 is inserted.

As an example, the values of the resistors rd11 and rd71 are the characteristic impedance Z ₀ -r. The resistance r
The value of d21, rd31, rd51, rd61 is n × single resistor r, and the resistors rd12, rd22, rd32,
The values of rd41, rd52, and rd62 are single resistors r.

In FIG. 3, switch circuits are denoted by sd1 to sd1.
Although shown by sd6, including switch circuits (not shown), there are m switch circuits in total, and sd1 to sdm
Becomes The gain at this time is: G = Vo / Vi = -At {(m-2 × x) (5) At = 1 / {1+ (Z ₀ / r × 1 / n)}, x = 0, 1 .., Ms sd1 ON (x = 0): G = −At ＾ m Minimum gain <0 dB (6) When sdm / 2 ON (x = m / 2): G = 0 dB sdm ON (X = m): G = −At ＾ (− m) The maximum gain is obtained. As described above, the gain range is At {m times to At}.
0 dB or less (-m) times can be realized. Since the variable step width is At (constant), a variable gain amplifier in which the variable step width is constant in decibels (dB) can be realized.

FIG. 4 shows a second embodiment of a non-inverting type variable gain amplifier in which the variable attenuator shown in FIG. 1 is inserted in a negative feedback path of an operational amplifier circuit. The non-inverting input terminal of the operational amplifier OP2 is grounded via the power supply e. A switch circuit se1 and a resistor re11 are inserted between the inverting input terminal of the operational amplifier OP2 and the output of the operational amplifier OP2. A switch circuit se2 and a resistor re21, a switch circuit se3 and a resistor re41, and a switch circuit s are provided between the inverting input terminal of the operational amplifier circuit OP2 and the ground.
e4 and resistor re51, switch circuit se5 and resistor re61, switch circuit se6 and resistor re7
1 are inserted in parallel.

A resistor re12 is inserted between the switch circuits se1 and se2. Similarly, the switch circuit se2
And a switch circuit (not shown), a resistor re22 is inserted between the switch circuit (not shown) and the switch circuit se3.
And a resistor re31 is inserted between
The resistor re42 is inserted between e3 and se4. Further, a resistor re is connected between the switch circuits se4 and se5.
52, and a resistor re62 is inserted between the switch circuits se5 and se6.

As an example, the values of the resistors re11 and re71 are the characteristic impedance Z ₀ -r. The resistance r
The values of e21, re41, re51, and re61 are n × single resistors r, and the resistors re12, re22, re31,
The values of re42, re52, and re62 are single resistors r.

In FIG. 3, the switch circuits are represented by se1 to se1.
Although shown in se6, including switch circuits (not shown), there are m switch circuits in total, and se1 to sem
Becomes Gain in this case, the gain: G = Vo / Vi = 1 / A 0 × At ^ (- x) (7) At = 1 / {1+ (Z 0 / r × 1 / n)}, A 0 = 1 / {2- (r / Z ₀ )}, x = 0, 1, 2,..., M se1 ON (x = 1): G = 1 / A ₀ Minimum gain (8) semi ON (X = m): G = 1 / A ₀ × At ＾
(−m) The maximum gain is reached.

When the resistance re11 (Z ₀ -r) on the output side of the operational amplifier circuit is removed, the gain range is when se1 is ON (x = 1): G = 0 dB, minimum gain (9) sem ON (X = m): G = At ＾ (− m) Maximum gain As described above, the gain is 0 dB or more.

Next, a third embodiment of the variable gain amplifier is shown in FIG. FIG. 5 is an example of a differential type variable gain amplifier. The non-inverting input terminal of the operational amplifier OP3 is grounded via the power supply e1. Operational amplifier circuit OP3
Between the inverting input terminal and the output of the operational amplifier OP3.
The switch circuit sf1 and the resistor rf11 are inserted.
The output terminal To1 is derived from the output of the operational amplifier OP3. The non-inverting input terminal of the operational amplifier OP4 is
Grounded via power supply e2. A switch circuit sg1 and a resistor rg11 are inserted between the inverting input terminal of the operational amplifier circuit OP4 and the output of the operational amplifier circuit OP4. The output terminal To2 is derived from the output of the operational amplifier OP4.

A switch circuit sf1, resistors rf21, rg21, and a switch circuit sg are provided between the inverting input terminal of the operational amplifier circuit OP3 and the inverting input terminal of the operational amplifier circuit OP4.
1, a switch circuit sf2, resistors rf31, rg31,
Switch circuit sg2, switch circuit sf3, resistor rf
41, rg41, switch circuit sg3, switch circuit sf4, resistors rf51, rg51, switch circuit sg4
And a switch circuit sf5, resistors rf61 and rg61, and a switch circuit sg5 are inserted in parallel.

A resistor rf22 is inserted between the switch circuit sf1 and a switch circuit (not shown). Similarly, a resistor rf32 is inserted between the switch circuits sf2 and sf3, and a resistor r is connected between the switch circuits sf3 and sf4.
f42 is inserted, and a resistor rf52 is inserted between the switch circuits sf4 and sf5. A resistor rg22 is inserted between the switch circuit sg1 and a switch circuit (not shown). Similarly, a resistor rg32 is inserted between the switch circuits sg2 and sg3, and the switch circuits sg3 and sg3 are inserted.
The resistor rg42 is inserted between the switch circuits sg4 and g4, and the resistor rg52 is inserted between the switch circuits sg4 and sg5.

As an example, resistors rf11, rf61, r
The values of g11 and rg61 are the characteristic impedance Z ₀ -r
Becomes Also, resistors rf21, rf31, rf41, r
The values of g21, rg31, rg41 are n × single resistor r, and resistors rf22, rf32, rf42, rf52,
The value of rg22, rg32, rg42, rg52 is a single resistance r.

In FIG. 5, the connection points to which the resistors nr are connected can be combined. As described above, by adopting the differential type, a configuration resistant to noise is obtained.

In FIG. 5, switch circuits are denoted by sf1 to sf1.
Although sf5 and sg1 to sg5 are shown, when including switch circuits (not shown), there are a total of m switch circuits, which are sf1 to sfm and sg1 to sgm, respectively.
In this example, the switch circuits sf1 and sg1 are simultaneously turned on, and similarly, the switch circuits sf2 and sg2 are turned on.
2, the switch circuits sf3 and sg3,..., The switch circuits sfm and sgm are simultaneously turned on.

The gain in this case, the gain: G = (Vo1-Vo2) / (Vi1-Vi2) = 1 / A 0 × At ^ (- x) (10) At = 1 / {1+ (Z 0 / r × 1 / n)}, a 0 = 1 / {2- (r / Z 0)}, x = 0,1,2, ···, m sf1, sg1 when ON (x = 0): G = 1 / A ₀ Minimum gain (11) When sfm and sgm are ON (x = m): G = 1 / A ₀ × At ＾ (− m) Maximum gain Although FIG. The same can be achieved in the form.

Here, a variable gain amplifier having a log-linear characteristic using the r-nr resistance network of FIG.
FIG. 6 shows a fourth embodiment of a variable gain amplifier having a two-stage cascade connection configuration in which a variable gain amplifier having a linear characteristic of a resistor string system is used as a fine amplifier for a lower order, which is used in an "arse" amplifier.

The non-inverting input terminal of the operational amplifier OP5 is
Grounded via power supply e. The inverting input terminal of the operational amplifier OP5 is connected to the selection terminal of the switch circuit sh1. The terminal a of the switch circuit sh1 is connected to the operational amplifier OP
5 output. A resistor rh21 is inserted between the b terminal of the switch circuit sh1 and the ground, a resistor rh31 is inserted between the c terminal of the switch circuit sh1 and the ground, and between the d terminal of the switch circuit sh1 and the ground. , A resistor rh41 is inserted. Also, e of the switch circuit sh1
The resistors rh51 and rh61 are inserted in parallel between the terminal and the ground.

A resistor rh11 is inserted between the terminals a and b of the switch circuit sh1, and a resistor rh22 is inserted between the terminals b and c of the switch circuit sh1.
Further, between the c terminal and the d terminal of the switch circuit sh1,
The resistor rh32 is inserted, and the resistor rh42 is inserted between the d terminal and the e terminal of the switch circuit sh1.

One of the resistors rh81 in which 32 single resistors r are connected in series is connected to the output of the operational amplifier OP5. Between the other end of the resistor rh81 and the output terminal To, the resistors rh71, rh72, rh73, rh74, r
h75, rh76, rh77, rh78, rh82, r
h83 are connected in series. The resistor rh81 includes 32 single resistors r connected in series.

The g terminal of the switch circuit sh2 is derived from the connection point of the resistors rh71 and rh72, and is connected to the resistor rh72.
The terminal h of the switch circuit sh2 is derived from the connection point of the switches rh73 and rh73, and the terminal i of the switch circuit sh2 is derived from the connection point of the resistors rh73 and rh74. Resistance rh
The j terminal of the switch circuit sh2 is derived from the connection point of 74 and rh75, the k terminal of the switch circuit sh2 is derived from the connection point of the resistors rh75 and rh76, and the resistance r
From the connection point of h76 and rh77, switch circuit sh2
Are derived, and the n terminal of the switch circuit sh2 is derived from the connection point of the resistors rh77 and rh78.

The f terminal of the switch circuit sh2 is derived from the connection point between the resistors rh71 and rh82. Resistance rh8
2 is composed of eight single resistors r connected in series. The resistor rh83 includes 32 single resistors r connected in series.

The non-inverting input terminal of the operational amplifier OP6 is
Grounded, the inverting input terminal is connected to the selection terminal of the switch circuit sh2. An output terminal To is derived from the output of the operational amplifier OP6.

As an example, resistors rh21, rh31, r
The values of h41 and rh51 are six single resistors r connected in series, and the value of the resistor rh61 is two single resistors r connected in series. Also, the resistances rh11 and rh2
2, rh32, rh42, rh71, rh72, rh7
3, rh74, rh75, rh76, rh77, rh7
The value of 8 is a single resistor r.

In the fourth embodiment, the operational amplifier O
P5 uses a variable gain amplifier with log-linear characteristics using an r-nr resistance network as a coarse amplifier for the higher order, and further uses an operational amplifier circuit OP6 as a variable gain amplifier with linear characteristics of a resistor string type as a fine amplifier for the lower order. .

If it is attempted to realize the log linear in small steps, the value of n of the r-nr resistance network becomes large, which is not practical. Therefore, in the fourth embodiment,
As the fine amplifier for the lower part of the small step, a variable gain amplifier having a linear characteristic of a resistor string was used. If the step width is small, the difference between the log linear characteristics can be ignored. The gain of the fourth embodiment is as follows: upper amplifier = 3.52 dB step × 4 = (0 dB to 1)
4.08dB) Lower amplifier = 0.44dB step x 7 = (0dB ~
3.08 dB) Total gain range = 0 dB to 17.16 dB (0.44 dB)
(dB step).

[0055]

According to the present invention, since the variable attenuator can be constituted by only one kind of resistance value, the process variation of the absolute value of the resistance value does not affect the variation of the variable step width. Is exactly decibel (dB) = constant, and a variable attenuator having a configuration resistant to variation can be realized.

According to the present invention, by inserting the variable attenuator in the negative feedback path of the operational amplifier, it is possible to easily realize a variable gain amplifier in which the variable step width is constant in decibels (dB). In addition, since the variable step width can be accurately realized with a constant decibel (dB), a variable gain amplifier and a variable attenuator having a multi-stage, cascade connection configuration divided into upper and lower stages can be easily realized.

[Brief description of the drawings]

FIG. 1 is a first embodiment of a variable attenuator to which the present invention is applied.

FIG. 2 is a second embodiment of the variable attenuator to which the present invention is applied;

FIG. 3 is a first embodiment of a variable gain amplifier to which the present invention is applied.

FIG. 4 is a second embodiment of the variable gain amplifier to which the present invention is applied;

FIG. 5 is a third embodiment of the variable gain amplifier to which the present invention is applied;

FIG. 6 is a fourth embodiment of the variable gain amplifier to which the present invention is applied;

FIG. 7 is an example of a conventional variable attenuator.

FIG. 8 is another example of a conventional variable attenuator.

[Explanation of symbols]

ra11, ra12, ra21, ra22, ra31,
ra32, ra41, ra42 ... resistance, sa1, s
a2, sa3, sa4, sa5 ... switch circuit

Claims (6)

[Claims] 1. A resistance section having a constant attenuation step width and all resistors including a terminating resistor constituted by only one type of resistance value, and a switch means for varying the attenuation amount. Signal processing circuit. 2. The signal processing circuit according to claim 1, wherein the resistance section is configured by an r-nr resistance network. 3. The signal processing circuit according to claim 1, wherein said resistor and said switch are inserted into a negative feedback path of said operational amplifier. 4. A first resistor unit in which the step width of the attenuation is constant and all the resistors including the terminating resistor are composed of only one type of resistance value, and a first switch means for varying the attenuation. A first variable attenuator comprising: a first variable attenuator comprising: a first variable attenuator; a first operational amplifying means for inserting the first variable attenuator into a negative feedback path; A second resistor section having a constant step width of the attenuation amount and all resistors including the terminating resistor configured by only one type of resistance value, and a second switch means for varying the small attenuation amount. A second variable attenuator, a second operational gain unit that inserts the second variable attenuator into a negative feedback path, a cascade of the first and second variable gain units. A signal processing circuit characterized by being connected. 5. The signal according to claim 4, wherein the first resistor section is configured by an r-nr resistor network, and the second resistor section is configured by a resistor string. Processing circuit. 6. The signal processing circuit according to claim 1, wherein the step width is decibel.