JP2000295769A - Circuit for reducing power consumption of logical circuit, and method of reducing power consumption used for it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power consumption reducing circuit which can reduce the power of a board at large without performing the complicated control, by enabling it to be applicable to a circuit without an unoperating part, too. SOLUTION: A ROM 7 which stores the lowest power voltage for guarantee of operation is mounted on a board 1 which includes a DC/DC converter 4 for supplying a logical circuit part 2 with power voltage and the logical circuit part 2. At power on from a power feeder 9, a voltage controller 8 reads out the lowest power voltage for operation guarantee from the ROM 7 on the board 1, and controls the potential division ratio within a potential diving circuit 6 by the value. A voltage monitor 5 within the DC/DC converter 4 monitors and controls the voltage so as to supply the logical circuit part 2 with the desired output voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for reducing power consumption of a logic circuit and a method of reducing power consumption used in the circuit, and more particularly to a method of reducing power consumption of a logic circuit using a power conversion unit.

[0002]

2. Description of the Related Art Conventionally, as a method of reducing the power consumption of a logic circuit, a clock of an inactive portion of the logic circuit is stopped,
This is realized by reducing the power consumption of individual components constituting the logic circuit.

[0003] As a method of reducing power consumption as described above,
There is a method disclosed in JP-A-9-288527. In this method, in order to reduce power consumption, not only the frequency is lowered but also the minimum voltage operable at the frequency is supplied to the system logic.

[0004]

In the above-described conventional power consumption reduction method, when the power consumption is reduced by a method such as a clock stop, it can be applied only to a circuit having an inactive portion. In addition, when the power consumption of each component is reduced, the control is complicated and the effect of reducing the power of the entire board cannot be said to be significant.

[0005] Even in the method disclosed in the above-mentioned publication, the control of the reduction of the frequency and the supply of the lowest voltage operable at the frequency must be controlled, so that the control becomes complicated.

Therefore, an object of the present invention is to solve the above-mentioned problems, apply the present invention to a circuit having no inactive portion, and reduce the power of the entire board without performing complicated control. An object of the present invention is to provide a power consumption reduction circuit of a circuit and a power consumption reduction method used for the circuit.

[0007]

A power consumption reduction circuit for a logic circuit according to the present invention is a power consumption reduction circuit for a logic circuit mounted on a substrate on which a conversion circuit for converting a supplied power supply voltage is mounted. Read-only storage means for storing information on the minimum power supply voltage detected at the time of shipment and for which operation of the substrate is guaranteed, and the minimum power supply voltage is supplied from the conversion circuit based on the contents stored in the storage means during normal operation. Control means for controlling supply to the logic circuit is provided on the substrate.

A method for reducing power consumption of a logic circuit according to the present invention is a method for reducing power consumption of a logic circuit mounted on a substrate on which a conversion circuit for converting a supplied power supply voltage is mounted. Detecting the guaranteed minimum power supply voltage of the substrate, storing the detected information of the guaranteed minimum power supply voltage of the substrate in a read-only storage unit, and storing the information in the storage unit during normal operation. Controlling the minimum power supply voltage to be supplied from the conversion circuit to the logic circuit based on the content.

That is, the method for reducing the power consumption of a logic circuit according to the present invention comprises a means for detecting a minimum power supply voltage of a logic circuit substrate utilizing a DC (DC power supply) / DC converter, the operation of which is guaranteed for the substrate. , The value (information for obtaining the minimum power supply voltage) on the ROM (read only memory) on the board
Means for storing the data in the ROM when the power to the board is turned on.
Is read, and a power supply voltage is supplied to the logic circuit on the substrate based on the value. Thus, the power consumption of the logic circuit can be reduced.

[0010]

Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a power consumption reduction circuit of a logic circuit according to one embodiment of the present invention. In FIG. 1, a power supply voltage VOU is supplied to a logic circuit unit 2.
A ROM (read only memory) 7 for storing a minimum power supply voltage whose operation is guaranteed is mounted on the substrate 1 including a DC (DC power supply) / DC conversion unit 4 for supplying T and the logic circuit unit 2.

When the power is supplied from the power supply device 9, the voltage control device 8 reads the operation-guaranteed minimum power supply voltage from the ROM 7 on the substrate 1 and controls the voltage dividing ratio in the voltage dividing circuit 6 according to the value. The voltage monitoring unit 5 in the DC / DC conversion unit 4 monitors and controls a desired output voltage to be supplied to the logic circuit unit 2.

FIG. 2 is a diagram showing a configuration example of the voltage dividing circuit 6 of FIG. In FIG. 2, a voltage dividing circuit 6 includes resistors R1 and R1 for realizing a reference voltage dividing ratio so that the voltage dividing ratio can be changed.
In addition to R2, n additional resistors R3 can be electrically connected, that is, n additional resistors R3 can be connected via switches S1 to Sn.

FIG. 3 is a flowchart showing a procedure at the time of shipping inspection of the substrate 1 of FIG. With reference to FIGS. 1 to 3, a procedure for storing the minimum power supply voltage whose operation is guaranteed according to the embodiment of the present invention in the ROM 7 will be described.

When the substrate 1 receives power supply from the power supply device 9 (step S1 in FIG. 3), the DC / DC converter 4 starts supplying power to the logic circuit unit 2. The normality checking unit 3 in the logic circuit unit 2 determines the normality of the normal operation of the logic circuit unit 2 based on the supplied voltage (step S2 in FIG. 3), and transmits the determination result to the voltage control device 8. .

When the operation of the logic circuit unit 2 is abnormal, the voltage controller 8 makes the board 1 unshippable (step S3 in FIG. 3), but when the operation of the logic circuit unit 2 is normal,
The voltage controller 8 controls the switches S1 to Sn in the voltage dividing circuit 6 to control the voltage dividing ratio. The power supply monitoring unit 5 monitors the output voltage VOUT of the DC / DC conversion unit 4 divided by the voltage dividing circuit 6 and controls the output voltage VOUT of the DC / DC conversion unit 4 according to the monitoring result. The voltage is reduced by one step (step S4 in FIG. 3).

Thereafter, the normality checking unit 3 determines the normality of the logic circuit unit 2 (step S5 in FIG. 3), and the result of the determination is transmitted to the voltage control unit 8. When the determination result is normal, the voltage control device 8 controls the voltage dividing circuit 6 so as to further reduce the power supply voltage by one step (step S4 in FIG. 3).

The voltage control unit 8 repeats the above-described series of operations, and controls the voltage dividing ratio in the voltage dividing circuit 6 until the result of the judgment by the normality check unit 3 becomes abnormal. When the judgment result of the normality check section 3 becomes abnormal, the voltage control device 8 sets the voltage dividing ratio in the voltage dividing circuit 6 to return to the power supply voltage immediately before the normality is checked.

That is, the voltage control device 8 controls the voltage dividing circuit 6 so as to increase the power supply voltage by one step (step S in FIG. 3).
6), the value at that time (switches S1 to Sn in voltage dividing circuit 6)
Switch information indicating which one is connected)
It is stored in the OM 7 (step S7 in FIG. 3).

FIG. 4 is a flowchart showing the normal operation of the substrate 1 of FIG. With reference to FIGS. 1 and 4, the operation of reading the minimum power supply voltage whose operation is guaranteed from one embodiment of the present invention and supplying the voltage of that value to the logic circuit 2 of the substrate 1 according to one embodiment of the present invention will be described.

When power is supplied to the substrate 1 (step S11 in FIG. 4), first, the contents of the ROM 7 are read and output to the voltage dividing circuit 6 (step S12 in FIG. 4). The voltage dividing circuit 6 controls the voltage dividing ratio by connecting the internal switches S1 to Sn based on the value (switch information) stored in the ROM 7.

The power supply monitoring unit 5 is provided with a D
The output voltage VOUT of the C / DC converter 4 is monitored, and the output voltage VOUT of the DC / DC converter 4 is
Control. The controlled voltage is output from the DC / DC converter 4 and supplied to the logic circuit 2 (step S in FIG. 4).
13).

As described above, in the substrate 1 of the logic circuit 2 using the DC / DC converter 4, the lowest power supply voltage of the substrate 1 whose operation is guaranteed is detected and its value (switch information) is detected.
Is stored in the ROM 7 on the substrate 1, the value stored in the ROM 7 is read when the normal power supply to the substrate 1 is turned on, and the power supply voltage corresponding to the value is supplied to the logic circuit 2 of the substrate 1. Since the power consumption is reduced by setting the voltage of the substrate 1, a great effect can be obtained as compared with the power consumption reduction of individual components.

Further, since it is not necessary to constantly monitor the operation during the normal operation, the amount of circuit increase of the substrate 1 is small, and the voltage controller 8 is not mounted on the substrate 1, so that the increase in the cost of the substrate 1 can be suppressed. .

Furthermore, since the voltage control device 8 can be shared for a plurality of types of substrates 1 at the time of shipping inspection, there is no need to have a plurality of voltage control devices 8 and normal operation at the minimum power supply voltage in the shipping inspection process. By confirming the nature, the operation can be guaranteed in normal times. Therefore, the present invention can be applied to a circuit having no inactive portion, and the power of the entire substrate can be reduced without performing complicated control.

The present invention can be applied to a substrate having a plurality of DC / DC converters 4 and a substrate having an AC (AC power supply) / DC converter instead of the DC / DC converter 4.
Alternatively, the above-described power consumption reduction method can be applied to a case where the power supply unit and the logic circuit unit are divided into individual substrates, and a case where the logic circuit unit is divided into a plurality of substrates. The same effect as described above can be obtained.

Further, in the above description, an example using the voltage dividing circuit 6 is described. However, it is possible to guarantee the minimum power supply voltage without using the voltage dividing circuit 6. Information for obtaining the minimum power supply voltage may be stored.

[0027]

As described above, according to the present invention, in a logic circuit mounted on a substrate on which a conversion circuit for converting a supplied power supply voltage is mounted, the lowest power supply whose operation of the substrate is guaranteed at the time of shipment. A voltage is detected, and information on the detected minimum power supply voltage of the board whose operation is guaranteed is stored in the read-only storage means. During normal operation, the minimum power supply voltage is converted from the conversion circuit to the logic circuit based on the storage contents of the storage means. By controlling so that the power is supplied to the circuit, the present invention can be applied to a circuit having an inactive portion, and has an effect that the power of the entire substrate can be reduced without performing complicated control.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a power consumption reduction circuit of a logic circuit according to one embodiment of the present invention.

FIG. 2 is a diagram illustrating a configuration example of a voltage dividing circuit of FIG. 1;

FIG. 3 is a flowchart showing a procedure at the time of shipping inspection of the substrate of FIG. 1;

FIG. 4 is a flowchart showing a normal operation of the substrate of FIG. 1;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Board 2 Logic circuit part 3 Normality check part 4 DC / DC conversion part 5 Voltage monitoring part 6 Voltage dividing circuit 7 ROM 8 Voltage control device 9 Power supply device

Claims (6)

[Claims] 1. A power consumption reduction circuit for a logic circuit mounted on a substrate on which a conversion circuit for converting a supplied power supply voltage is mounted, the minimum power source being detected at the time of shipment and whose operation of the substrate is guaranteed. A read-only storage unit for holding voltage information; and a control unit for controlling the minimum power supply voltage to be supplied from the conversion circuit to the logic circuit based on the storage content of the storage unit during normal operation. A power consumption reduction circuit, which is provided above. 2. The control means according to claim 1, wherein said control means monitors a voltage divided by said voltage dividing means based on the contents stored in said storage means, and monitors the voltage divided by said voltage dividing means. 2. The power consumption reducing circuit according to claim 1, further comprising a monitoring unit that controls an output voltage from the conversion circuit according to a result. 3. A voltage dividing means comprising: a reference resistor for dividing an output voltage from the conversion circuit; and a plurality of additional resistors for lowering the output voltage from the conversion circuit than the voltage division by the reference resistor. And a plurality of switch means operable to add the plurality of additional resistances to the reference resistance,
3. The power consumption reducing circuit according to claim 2, wherein information indicating which one of the plurality of switch means is to be connected is stored in the storage means as information of the minimum power supply voltage. 4. A method for reducing power consumption of a logic circuit mounted on a board on which a conversion circuit for converting a supplied power supply voltage is mounted, the method comprising detecting a minimum power supply voltage for which operation of the board is guaranteed at the time of shipment. And storing the detected information of the minimum power supply voltage for which operation of the substrate is assured in the read-only storage means.During normal operation, the minimum power supply voltage is set based on the storage contents of the storage means. Controlling the power supply from the conversion circuit to the logic circuit. 5. The step of controlling the minimum power supply voltage to be supplied from the conversion circuit to the logic circuit, comprising: dividing an output voltage from the conversion circuit based on the contents stored in the storage means; 5. The method according to claim 4, further comprising: monitoring the divided voltage and controlling an output voltage from the conversion circuit according to a result of the monitoring. 6. The step of dividing an output voltage from the conversion circuit, wherein the step of dividing the output voltage from the conversion circuit into a reference resistor for dividing the output voltage from the conversion circuit, It operates to add any of a plurality of additional resistors for lowering through a plurality of switch means, and stores information indicating which of the plurality of switch means to connect in the storage means as information of the minimum power supply voltage. 6. The method according to claim 5, wherein the power consumption is reduced.