JP2000267134A - Active matrix type liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an active matrix type liquid crystal display device which assures a necessary storage capacity in spite of fining to a higher degree and obviates the degradation in an aperture ratio. SOLUTION: A liquid crystal layer 14 is disposed between a pair of transparent insulative substrates 1a and 1b and a plurality of gate wiring and a plurality of source wiring are intersected and are disposed to a matrix form on the one transparent substrate 1a. Thin-film transistors(TFTs) 12 are disposed at the respective intersection points and liquid crystals are driven by transparent pixel electrodes 11 formed by being connected to the respective TFTs 12. First transparent conductive electrodes 2 are disposed on the transparent substrate 1a so as to cover the entire part of the range where the respective transparent pixel electrodes 11 are arranged. A first transparent insulative film 3 is formed thereon. The surface of the insulating film 3 is provided with a plurality of the gate wiring, a plurality of the source wiring and the plural transparent pixel electrodes 11 together with the plural TFTs 12. Storage capacitors C are formed between the first transparent conductive electrodes 2 and the respective transparent pixel electrodes 11.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an active matrix type liquid crystal display device.

[0002]

2. Description of the Related Art In an active matrix type liquid crystal display device widely used as a flat panel display for high image quality and large screen, a storage capacitor is usually provided in parallel with each pixel electrode. The main objects are to prevent the voltage once written in each pixel from being attenuated by the current when the active element is turned off, and to reduce the influence of the rounding of the drive waveform due to the parasitic capacitance. This has the effect of improving the image quality of the display and extending the life.

In general, a necessary storage capacitance value is determined by a capacitance value necessary to hold a voltage written to a pixel electrode for one frame period. Assuming that the resistance of the active element when off is R, the storage capacitance is C _s , the capacitance between the pixel electrode and the counter substrate electrode sandwiching the liquid crystal is C _LC , and the initial value of the written voltage is V ₀ , the time after writing The pixel voltage V at t is given by the following equation. V = −V ₀ × exp (t / R · (C _LC + C _s ))

The frame frequency depends on the standard of the signal.
Around 0 Hz is common. In this case, during one cycle time, that is, t = 16.7 milliseconds, the write voltage is held up to 80 to 90%, that is, V = 0.8 to 0.9.multidot.
When V ₀ is used, the value of C _LC + C _s is from 0.1 to
0.3 pF. _CLC is determined by the dielectric constant and thickness of the liquid crystal layer, that is, the gap between the two transparent substrates. Since the gap is as large as several μm, it is usually about an order of magnitude lower than this. Therefore, the value C _s required as storage capacity values forming each pixel is 0.1～0.3PF.

In general, if the number of steps for forming the storage capacitor is increased, the degree of freedom of the structure is increased and the aperture ratio can be increased. The aperture ratio is given by a ratio of a portion through which light passes to the entire area of the pixel. If the aperture ratio can be increased, it is advantageous in terms of brightness of a screen of a liquid crystal display device, power consumption, and the like. However, an increase in the number of steps causes a decrease in yield and an increase in lead time. In particular, an increase in the number of photo-etching steps has a large effect on yield. Various methods for forming a storage capacitor have been proposed to solve this conflicting problem.

As an example, a method of forming a capacitor between the adjacent gate wiring 54a and the pixel electrode 61 as shown in FIG. 5 instead of a common electrode is widely used. . FIG. 5 shows a thin film transistor array substrate. FIG. 5A is a plan view and FIG.
FIG. 5B is a cross-sectional view taken along line 5B-5B ′ in FIG. 5A, and FIG. 5C is a cross-sectional view taken along line 5C-5C ′ in FIG. 5A.

In the thin film transistor array of this example, a gate wiring 54a and a gate electrode 54b made of a metal material are formed on a glass substrate 51, and a gate insulating film 55 made of a transparent material is formed thereon. A semiconductor layer 56 made of silicon is sequentially formed, and a source wiring 58a, a source electrode 58b, a drain electrode 58c, and a storage capacitor electrode 58d are further formed thereon.
Are formed by forming and processing the same metal thin film, and a channel protection film 59 made of a transparent material and a pixel electrode 61 made of a transparent conductive material are sequentially formed. In the uppermost layer of the semiconductor layer 56, the portion where the source electrode 58b and the drain electrode 58c are in contact is n
^{It is a +} type amorphous silicon 57.

The storage capacitor C2 is shown in FIGS. 5A and 5C.
, Ie, a portion where the gate wiring 54a and the storage capacitor electrode 58d overlap each other, and a gate insulating film 55 located therebetween, and have a parallel plate structure. Each pixel electrode 61 is connected to the drain electrode 58c via the contact hole 60c, and is formed on the gate wiring of the upper adjacent pixel in FIG. 5A, that is, the pixel scanned immediately before. The storage capacitor electrode 58d is connected via a contact hole 60d. This realizes forming a capacitor in parallel with the pixel.

The method shown in FIG. 5 can form a storage capacitor without newly adding a process, but is very disadvantageous in terms of an aperture ratio. Further, the electrodes forming the capacitance are both made of metal, and the area of the gate wiring 54a needs to be increased in order to form the required capacitance. As a result, the aperture ratio decreases, which causes a decrease in luminance of the display device or an increase in power consumption for compensating for the decrease.

[0010] As the definition further increases, the aperture ratio decreases more seriously. For example, to form a capacitance of 0.2 pF using a silicon nitride film (relative dielectric constant 7) having a thickness of 400 nm, 36
An area of μm × 36 μm is required. Normally, the portion where the liquid crystal alignment defect is likely to occur near the edge of the pixel electrode is hidden, and the area occupied by the TFT and the signal line wiring is required. Therefore, the aperture ratio is about 90 μm × 30 μm per dot and about 10%. Be depressed. That is, in the prior art, this degree of definition is the limit.

[0011]

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide an active matrix type liquid crystal display device which secures a necessary storage capacity and does not lower the aperture ratio without lowering the yield.

[0012]

An active matrix type liquid crystal display device according to the present invention has a liquid crystal layer disposed between a pair of transparent insulating substrates, and a plurality of gate wirings and a plurality of gate wirings on one of the transparent substrates. In a liquid crystal display device in which a liquid crystal is driven by a transparent pixel electrode formed by connecting a thin film transistor at each intersection with a source wiring of the same, A first transparent conductive film electrode is provided on the substrate so as to cover at least the entire area in which each pixel electrode is arranged, and a first transparent insulating film is formed thereon, and on the insulating film, Providing the plurality of transparent pixel electrodes together with a plurality of gate wirings, the plurality of source wirings, and the plurality of thin film transistors, between the first transparent conductive electrode and each of the transparent pixel electrodes Form a storage capacitor.

According to such an active matrix type liquid crystal display device, the storage capacitance in each pixel is determined by the first transparent conductive film electrode pixel electrode covering almost the entire display screen area, and the transparent pixel electrode in each pixel. Are formed at overlapping portions. Therefore, necessary storage capacity can be secured without lowering the aperture ratio.

As a material for the above-mentioned transparent conductive thin film, indium tin oxide (hereinafter ITO), indium zinc oxide (IZO) and the like are suitable. Regarding the film thickness and the film resistance, it is sufficient that a constant voltage can be applied to the entire surface.
It can be set substantially arbitrarily.

The material of the first transparent insulating film formed thereon is desirably a material which is reliable in terms of withstand voltage and has as high a dielectric constant as possible. Specifically, silicon nitride and silicon oxide are suitable. On the other hand, the film thickness is 50
It is desirable that the thickness be 0 nm or less. It is advantageous to increase the thickness of the first transparent insulating film in terms of withstand voltage, but if it is too thick, it leads to an increase in lead time and material cost, and the formed storage capacitance value becomes small. It is.

The formed storage capacitance value is a capacitance value required to hold the voltage written to the pixel electrode for one frame period, that is, 0.1 to 0.3 p / pixel.
F is desirable. If it is smaller than this, a required storage capacity value cannot be obtained, and display defects such as flicker occur. If it is larger than this, a large current is required for writing to the pixel electrode, and the thin film transistor must be designed large, so that the aperture ratio decreases.

The storage capacitance value that can be formed is substantially inversely proportional to the thickness of the first transparent insulating film, and proportional to the dielectric constant of the first transparent insulating film and the area of each pixel electrode. The area of each pixel electrode is inversely proportional to the definition of the liquid crystal display device. That is, once the material and thickness of the first transparent insulating film are determined,
A desirable area as the definition of the liquid crystal display device corresponding thereto is determined. As an example, when a color liquid crystal display device in which one dot is formed by three pixels of RGB is manufactured using silicon nitride having a thickness of 300 nm as a first transparent insulating film, 1
The fineness corresponding to a dot of 150 μm square to 75 μm square is more preferable.

As a method of forming the first transparent insulating film, there is a method in which the first transparent conductive film and the metal film formed before and after the first transparent insulating film can be formed continuously in the same vacuum apparatus. Is more desirable from the viewpoint of the lead time and the like.
At present, it is generally preferable to form an ITO or metal film by a sputtering method. Therefore, the sputtering method is preferable.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an active matrix type liquid crystal display device according to the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing this embodiment. 2A and 2B are plan views showing a thin film transistor array substrate used in this embodiment. FIG. 2A is a plan view, FIG. 2B is a cross-sectional view taken along line 2B-2B ', and FIG.
(C) is a sectional view taken along line 2C-2C '.

In FIGS. 1 and 2, reference numerals 1a and 1b denote transparent insulating substrates made of glass, which sandwich a liquid crystal layer 14 to form a thin film transistor type liquid crystal display device. The first transparent conductive film electrode 2 made of ITO is formed on the thin film transistor array side glass substrate 1a. The transparent electrode 2 is provided so as to cover the entire area where the pixel electrode 11a described later is arranged. A first transparent insulating film 3 is formed on the first transparent conductive film electrode 2. Further, a gate wiring 4a and a source wiring 8a as shown in FIG.
Are arranged in a matrix. An inverted staggered thin film transistor is provided at each intersection of these wirings. That is, the gate wiring 4 is formed on the first transparent insulating film 3.
a and a gate electrode 4b are provided integrally, and a gate insulating film 5 made of silicon nitride is provided thereon.

Above the gate electrode 4a, a semiconductor layer 6 made of amorphous silicon is provided in an island shape with a gate insulating film 5 interposed therebetween. Both sides of the semiconductor layer 6 are electrically connected to a source electrode 8b and a drain electrode 8c via an amorphous silicon n ⁺ layer 7 doped with phosphorus for ohmic connection.
These gate insulating film 5, semiconductor layer 6, and drain electrode 8
A passivation film 9 made of silicon nitride is provided on c, the source electrode 8b, and the source wiring 8a formed integrally with the source electrode 8b.

A contact hole 10a is provided in the passivation film 9 on the drain electrode 8c, and the pixel electrode 11 provided on the passivation film 9 and the drain electrode 8c are electrically connected. Then, an alignment film 12 is formed on the pixel electrode 11 a and the passivation film 9.

In such a configuration, as shown by the dotted line in FIG. 2C, a substantially entire area of each transparent pixel electrode 11a, the first transparent conductive film electrode 2, and the area between them are arranged. A storage capacitor C is formed by the first transparent insulating film 3, the gate insulating film 5, and the passivation film 9 provided. Note that the first transparent conductive film electrode 2 has a structure shown in FIG.
As shown in FIG. 7, the common electrode 11b is formed through a contact hole 10b formed by etching the insulating films 3, 5, and 9.
And the same voltage as the counter substrate is applied. A black matrix 16 is formed on the surface of the counter substrate 1b on the liquid crystal layer 14 side, a counter electrode 15 is formed thereon, and an alignment film 13 is formed thereon.

The above-mentioned contact hole 10b may be at least one place on the substrate 1a. Further, in this example, all the insulating films formed during the process were used as the insulating films forming the storage capacitors, but some of them were removed by photoetching or the pixel electrodes 11a were formed. A structure in which a film is formed later may be used.

[0025]

DETAILED DESCRIPTION OF THE INVENTION Using the present invention, 3072.times.
A thin film transistor array substrate for a high-definition liquid crystal display device having 768 pixels was manufactured as shown in FIGS. 3A to 3E and FIGS. 4A to 4E.
In this liquid crystal display device, one pixel has a resolution of 120 μm square and one dot of 120 μm × 40 μm.

First, after cleaning a 152.4 mm square glass substrate 1, 50 nm of ITO is used as a first transparent conductive thin film 2 for forming a storage capacitor, and SiO ₂ is used as a first transparent insulating thin film 3. 300 nm, A is used as the metal film 18 for forming the gate wiring 4a and the gate electrode 4b.
An l film was continuously formed by a sputtering method in the same vacuum apparatus at a thickness of 50 nm.

Next, as shown in FIGS. 3A and 3B, a photoresist pattern 18 is formed, and an Al film 19 is formed.
Is etched to form a gate wiring 4a and a gate electrode 4
b was formed. Subsequently, SiN _x (x
Is approximately 1.33) at 300 nm, and undoped amorphous silicon (hereinafter a-Si) is used as the semiconductor layer 6.
(i)) of 100nm and a ohmic contact layer 7, was formed sequentially phosphorus about 1% doped n ⁺ -type amorphous silicon (hereinafter a-Si (n ⁺⁾⁾ at 50nm plasma CVD method.

Further, as shown in FIGS. 3C and 3D, a photoresist pattern 28 is formed, and a-Si (n
⁺ ) 7 and a-Si (i) 6 were etched, and then a contact hole to the gate wiring 4a was formed in the gate insulating film 5.

Next, as shown in FIGS. 3 (E) and 4 (A), a Cr film is formed as a metal material 20 for forming the source wiring 8a, the source electrode 8b, and the drain electrode 8c.
The film was formed by a 0 nm sputtering method. Subsequently, a photoresist pattern 38 was formed, and the Cr film 20 was etched to form a signal line wiring and a source electrode 8b and a drain electrode 8c. Further, as shown in FIG. 4B, a-Si (n ⁺ ) 7 is etched using the same resist pattern 38,
The channel of the thin film transistor was formed.

Then, as shown in FIG. 4C, a SiN _x passivation film 9 is formed by a plasma CVD method.
Is formed to a thickness of 400 nm, and then the photoresist pattern 1 is formed.
8 was formed. Then, as shown in FIG.
_x 9, 5, and 2 were etched to form a contact hole 10a for each pixel on the source electrode 8c and a contact hole 10b for the first ITO 2 at one place outside the display screen area. Finally, as shown in FIG.
As a transparent conductive material for forming 1a and each connection terminal, ITO was formed into a film by a sputtering method with a thickness of 100 nm, and the pixel electrode 11a, the source, the gate, and the connection terminal 11b for the storage capacitor were formed by photoetching. (The source and gate terminals are not shown.)

The liquid crystal display using the thin film transistor array manufactured as described above achieved an aperture ratio of 52%. The aperture ratio was greatly improved as compared with the aperture ratio of 41% when the device was manufactured based on the conventional method using the same pattern rule. The storage capacitance value was 0.18 pF, which was a necessary and sufficient value.

The liquid crystal display of this embodiment has a pixel size of 120 μm.
The m angle is very high definition among liquid crystal display devices currently announced, but falls within the low definition range in which the present invention can obtain the maximum effect. For this reason, a necessary and sufficient storage capacitance value is secured by suppressing the storage capacitance value by using 300 nm thick SiO ₂ (dielectric constant 4) as the first transparent insulating thin film.

Even when the definition is further increased, SiN _x (7.0) having a higher relative dielectric constant is used as the first transparent insulating thin film.
Although the pixel electrode 11a is disposed on the passivation film 9 in this example, a sufficient storage capacitance value can be secured by disposing the pixel electrode 11a under the passivation film 9 or the like. We can cope enough to the extent.

[0034]

As described above, the active matrix type liquid crystal display device according to the present invention secures necessary storage capacity and does not lower the aperture ratio.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an embodiment of a liquid crystal display device according to the present invention.

2A and 2B are diagrams showing a thin film transistor array substrate used in the embodiment shown in FIG. 1, wherein FIG. 2A is a plan view and FIG. 2B is 2B-2B 'in FIG. 2C is a cross-sectional view taken along the line, and FIG.
It is sectional drawing which followed the 2C 'line.

FIG. 3 is a process explanatory view for manufacturing the thin film transistor array substrate shown in FIG. 2;

FIG. 4 is an explanatory view of a step of manufacturing the thin film transistor array substrate shown in FIG. 2, which is an explanatory view of a step following the step shown in FIG. 3;

5A and 5B are views showing a conventional thin film transistor array substrate, FIG. 5A is a plan view, FIG. 4B is a cross-sectional view taken along line 5B-5B ′ in FIG. FIG. 4C is a sectional view taken along line 5C-5C ′ in FIG.

[Explanation of symbols]

 1a, 1b Glass substrate 2 First transparent conductive film (ITO) electrode 3 First transparent insulating thin film 4a Gate wiring 4b Gate electrode 5 Gate insulating film 8a Source wiring 8b Source electrode 8c Drain electrode 9 Passivation film 11 Pixel electrode 12 Thin film transistor 14 Liquid crystal layer C Storage capacitance

 ──────────────────────────────────────────────────続 き Continued on the front page F-term (reference) MA37 MA41 NA07 NA25 PA06 5F110 BB01 CC07 DD02 DD13 DD24 EE03 EE44 FF03 FF30 GG02 GG15 GG25 GG35 GG45 HK04 HK07 HK09 HK16 HK21 HK25 HK33 HK35 HM18 NN02 NN04 NN24 NN35 NN72 QQ09

Claims (3)

[Claims] 1. A liquid crystal layer is provided between a pair of transparent insulating substrates, and a plurality of gate wirings and a plurality of source wirings are disposed on one of the transparent substrates in a matrix so as to intersect with each other.
A thin film transistor is disposed at each of these intersections, and in a liquid crystal display device that drives a liquid crystal by a transparent pixel electrode formed by connecting to each thin film transistor, a first transparent conductive film electrode on the transparent substrate, at least the A first transparent insulating film is formed thereon so as to cover the entire area where the pixel electrodes are arranged, and the plurality of gate wirings, the plurality of source wirings, and the plurality of An active matrix type liquid crystal display device, wherein the plurality of transparent pixel electrodes are provided together with the thin film transistor described above, and a storage capacitor is formed between the first transparent conductive electrode and each of the transparent pixel electrodes. 2. The active matrix type liquid crystal display device according to claim 1, wherein the value of said storage capacitance is 0.1 to 0.3 pF. 3. The active matrix type liquid crystal display device according to claim 1, wherein said first transparent insulating film has a thickness of 500 nm or less.