IL270935A - A device and method for controlling change in an instruction system - Google Patents
A device and method for controlling change in an instruction systemInfo
- Publication number
- IL270935A IL270935A IL270935A IL27093519A IL270935A IL 270935 A IL270935 A IL 270935A IL 270935 A IL270935 A IL 270935A IL 27093519 A IL27093519 A IL 27093519A IL 270935 A IL270935 A IL 270935A
- Authority
- IL
- Israel
- Prior art keywords
- instruction system
- controlling change
- controlling
- change
- instruction
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
- G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
- G06F12/1441—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30054—Unconditional branch instructions
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30101—Special purpose registers
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30192—Instruction operation extension or modification according to data descriptor, e.g. dynamic data typing
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
- G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
- G06F9/323—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for indirect branch instructions
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
- G06F9/35—Indirect addressing
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
- G06F9/3865—Recovery, e.g. branch miss-prediction, exception handling using deferred exception handling, e.g. exception flags
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/468—Specific access rights for resources, e.g. using capability register
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computer Security & Cryptography (AREA)
- Mathematical Physics (AREA)
- Storage Device Security (AREA)
- Executing Machine-Instructions (AREA)
- Processing Or Creating Images (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Stored Programmes (AREA)
- Advance Control (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB1709511.8A GB2563580B (en) | 2017-06-15 | 2017-06-15 | An apparatus and method for controlling a change in instruction set |
| PCT/GB2018/051116 WO2018229455A1 (en) | 2017-06-15 | 2018-04-27 | An apparatus and method for controlling a change in instruction set |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| IL270935A true IL270935A (en) | 2020-01-30 |
| IL270935B1 IL270935B1 (en) | 2024-05-01 |
| IL270935B2 IL270935B2 (en) | 2024-09-01 |
Family
ID=59462226
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IL270935A IL270935B2 (en) | 2017-06-15 | 2018-04-27 | A device and method for controlling change in an instruction system |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US11080058B2 (en) |
| EP (1) | EP3639132B1 (en) |
| JP (2) | JP2020523680A (en) |
| KR (1) | KR102547479B1 (en) |
| CN (1) | CN110709817B (en) |
| GB (1) | GB2563580B (en) |
| IL (1) | IL270935B2 (en) |
| TW (1) | TWI786111B (en) |
| WO (1) | WO2018229455A1 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2563580B (en) * | 2017-06-15 | 2019-09-25 | Advanced Risc Mach Ltd | An apparatus and method for controlling a change in instruction set |
| US10607015B1 (en) * | 2019-05-16 | 2020-03-31 | Cyberark Software Ltd. | Security risk assessment and control for code |
| GB2592069B (en) * | 2020-02-17 | 2022-04-27 | Advanced Risc Mach Ltd | Address calculating instruction |
| US20230401313A1 (en) * | 2021-01-05 | 2023-12-14 | Nuvoton Technology Corporation | Processor with In-Band Fault-Injection Detection in the Presence of Exceptions |
| GB2612344B (en) * | 2021-10-29 | 2023-11-15 | Advanced Risc Mach Ltd | Apparatus and method using hint capability for controlling micro-architectural control function |
Family Cites Families (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62123552A (en) * | 1985-11-22 | 1987-06-04 | Nec Corp | Allocation system for central processing unit |
| GB2289354B (en) * | 1994-05-03 | 1997-08-27 | Advanced Risc Mach Ltd | Multiple instruction set mapping |
| GB2307072B (en) * | 1994-06-10 | 1998-05-13 | Advanced Risc Mach Ltd | Interoperability with multiple instruction sets |
| JPH08194504A (en) * | 1995-01-13 | 1996-07-30 | Matsushita Electric Works Ltd | Programmable controller |
| GB2376097B (en) * | 2001-05-31 | 2005-04-06 | Advanced Risc Mach Ltd | Configuration control within data processing systems |
| JP2004013556A (en) * | 2002-06-07 | 2004-01-15 | Matsushita Electric Ind Co Ltd | Processor device, compiling device and method thereof |
| JP3805314B2 (en) * | 2003-02-27 | 2006-08-02 | Necエレクトロニクス株式会社 | Processor |
| US7340588B2 (en) * | 2003-11-24 | 2008-03-04 | International Business Machines Corporation | Extending the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code |
| US7802252B2 (en) * | 2007-01-09 | 2010-09-21 | International Business Machines Corporation | Method and apparatus for selecting the architecture level to which a processor appears to conform |
| GB2448149B (en) | 2007-04-03 | 2011-05-18 | Advanced Risc Mach Ltd | Protected function calling |
| GB2448151B (en) * | 2007-04-03 | 2011-05-04 | Advanced Risc Mach Ltd | Memory domain based security control within data processing systems |
| GB2482701C (en) * | 2010-08-11 | 2018-12-26 | Advanced Risc Mach Ltd | Illegal mode change handling |
| US20120159127A1 (en) * | 2010-12-16 | 2012-06-21 | Microsoft Corporation | Security sandbox |
| TWI484413B (en) * | 2012-04-03 | 2015-05-11 | Mstar Semiconductor Inc | Function-based software comparison method |
| US9672164B2 (en) * | 2012-05-31 | 2017-06-06 | Nxp Usa, Inc. | Methods and systems for transitioning between a user state and a supervisor state based on a next instruction fetch address |
| US20160026486A1 (en) * | 2014-07-25 | 2016-01-28 | Soft Machines, Inc. | An allocation and issue stage for reordering a microinstruction sequence into an optimized microinstruction sequence to implement an instruction set agnostic runtime architecture |
| GB2541714B (en) | 2015-08-27 | 2018-02-14 | Advanced Risc Mach Ltd | An apparatus and method for controlling instruction execution behaviour |
| GB2544315B (en) * | 2015-11-12 | 2018-02-14 | Advanced Risc Mach Ltd | An apparatus and method for controlling use of bounded pointers |
| GB2544996B (en) * | 2015-12-02 | 2017-12-06 | Advanced Risc Mach Ltd | An apparatus and method for managing bounded pointers |
| GB2562102B (en) * | 2017-05-05 | 2019-09-04 | Advanced Risc Mach Ltd | An apparatus and method for managing use of capabilities |
| GB2563009B (en) * | 2017-05-25 | 2019-12-25 | Advanced Risc Mach Ltd | An apparatus and method for interpreting permissions associated with a capability |
| GB2563010B (en) * | 2017-05-25 | 2019-12-25 | Advanced Risc Mach Ltd | An apparatus and method for managing a capability domain |
| GB2563580B (en) * | 2017-06-15 | 2019-09-25 | Advanced Risc Mach Ltd | An apparatus and method for controlling a change in instruction set |
| US10635445B2 (en) * | 2018-05-29 | 2020-04-28 | Arm Limited | Handling modifications to permitted program counter ranges in a data processing apparatus |
-
2017
- 2017-06-15 GB GB1709511.8A patent/GB2563580B/en active Active
-
2018
- 2018-04-27 WO PCT/GB2018/051116 patent/WO2018229455A1/en not_active Ceased
- 2018-04-27 EP EP18722168.4A patent/EP3639132B1/en active Active
- 2018-04-27 US US16/619,192 patent/US11080058B2/en active Active
- 2018-04-27 CN CN201880037975.8A patent/CN110709817B/en active Active
- 2018-04-27 JP JP2019567553A patent/JP2020523680A/en active Pending
- 2018-04-27 KR KR1020207000431A patent/KR102547479B1/en active Active
- 2018-04-27 IL IL270935A patent/IL270935B2/en unknown
- 2018-05-07 TW TW107115419A patent/TWI786111B/en active
-
2023
- 2023-01-27 JP JP2023010685A patent/JP2023038361A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| EP3639132B1 (en) | 2024-05-29 |
| JP2020523680A (en) | 2020-08-06 |
| KR20200013049A (en) | 2020-02-05 |
| TWI786111B (en) | 2022-12-11 |
| CN110709817B (en) | 2023-09-22 |
| IL270935B2 (en) | 2024-09-01 |
| US11080058B2 (en) | 2021-08-03 |
| GB201709511D0 (en) | 2017-08-02 |
| WO2018229455A1 (en) | 2018-12-20 |
| EP3639132A1 (en) | 2020-04-22 |
| KR102547479B1 (en) | 2023-06-26 |
| CN110709817A (en) | 2020-01-17 |
| US20200117458A1 (en) | 2020-04-16 |
| TW201905705A (en) | 2019-02-01 |
| IL270935B1 (en) | 2024-05-01 |
| GB2563580B (en) | 2019-09-25 |
| JP2023038361A (en) | 2023-03-16 |
| GB2563580A (en) | 2018-12-26 |
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