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IE43404B1 - Method and apparatus for measuring the rpm and dwell angle of an internal combustion engine, and the relative power contribution and relative compression of each cylinder - Google Patents

Method and apparatus for measuring the rpm and dwell angle of an internal combustion engine, and the relative power contribution and relative compression of each cylinder

Info

Publication number
IE43404B1
IE43404B1 IE63676A IE63676A IE43404B1 IE 43404 B1 IE43404 B1 IE 43404B1 IE 63676 A IE63676 A IE 63676A IE 63676 A IE63676 A IE 63676A IE 43404 B1 IE43404 B1 IE 43404B1
Authority
IE
Ireland
Prior art keywords
ignition
cylinder
counter
pulses
voltage
Prior art date
Application number
IE63676A
Other versions
IE43404L (en
Original Assignee
United Technologies Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/562,090 external-priority patent/US3986009A/en
Priority claimed from US05/562,089 external-priority patent/US3955135A/en
Application filed by United Technologies Corp filed Critical United Technologies Corp
Publication of IE43404L publication Critical patent/IE43404L/en
Publication of IE43404B1 publication Critical patent/IE43404B1/en

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Classifications

    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F02COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
    • F02PIGNITION, OTHER THAN COMPRESSION IGNITION, FOR INTERNAL-COMBUSTION ENGINES; TESTING OF IGNITION TIMING IN COMPRESSION-IGNITION ENGINES
    • F02P17/00Testing of ignition installations, e.g. in combination with adjusting; Testing of ignition timing in compression-ignition engines
    • F02P17/10Measuring dwell or antidwell time
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F02COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
    • F02PIGNITION, OTHER THAN COMPRESSION IGNITION, FOR INTERNAL-COMBUSTION ENGINES; TESTING OF IGNITION TIMING IN COMPRESSION-IGNITION ENGINES
    • F02P17/00Testing of ignition installations, e.g. in combination with adjusting; Testing of ignition timing in compression-ignition engines
    • F02P17/02Checking or adjusting ignition timing
    • F02P17/04Checking or adjusting ignition timing dynamically
    • F02P17/06Checking or adjusting ignition timing dynamically using a stroboscopic lamp
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01MTESTING STATIC OR DYNAMIC BALANCE OF MACHINES OR STRUCTURES; TESTING OF STRUCTURES OR APPARATUS, NOT OTHERWISE PROVIDED FOR
    • G01M15/00Testing of engines
    • G01M15/04Testing internal-combustion engines
    • G01M15/042Testing internal-combustion engines by monitoring a single specific parameter not covered by groups G01M15/06 - G01M15/12
    • G01M15/044Testing internal-combustion engines by monitoring a single specific parameter not covered by groups G01M15/06 - G01M15/12 by monitoring power, e.g. by operating the engine with one of the ignitions interrupted; by using acceleration tests
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01PMEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P3/00Measuring linear or angular speed; Measuring differences of linear or angular speeds
    • G01P3/42Devices characterised by the use of electric or magnetic means
    • G01P3/44Devices characterised by the use of electric or magnetic means for measuring angular speed
    • G01P3/48Devices characterised by the use of electric or magnetic means for measuring angular speed by measuring frequency of generated current or voltage
    • G01P3/4802Devices characterised by the use of electric or magnetic means for measuring angular speed by measuring frequency of generated current or voltage by using electronic circuits in general
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01PMEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P3/00Measuring linear or angular speed; Measuring differences of linear or angular speeds
    • G01P3/42Devices characterised by the use of electric or magnetic means
    • G01P3/44Devices characterised by the use of electric or magnetic means for measuring angular speed
    • G01P3/48Devices characterised by the use of electric or magnetic means for measuring angular speed by measuring frequency of generated current or voltage
    • G01P3/481Devices characterised by the use of electric or magnetic means for measuring angular speed by measuring frequency of generated current or voltage of pulse signals
    • G01P3/489Digital circuits therefor

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Combustion & Propulsion (AREA)
  • Mechanical Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Ignition Installations For Internal Combustion Engines (AREA)
  • Testing Of Engines (AREA)

Description

This invention relates to a vehicle diagnostic system, and particularly to an apparatus and method for determining the speed (rpm), and dwell angle of an internal combustion engine, as well as cylinder relative power contribution and relative compression. Accurate information of these parameters is essential for tuning an engine to obtain maximum efficiency and minimum pollutant emissions, as well as for performing additional tests o'ri the vehicle operation.
Motor vehicles are increasing in number, type and complexity. At the same time, mechanics who are adequately trained and technically up-to-date are becoming harder to find. Consequently, when vehicles are taken to a garage or service station for repairs, owners are faced with faulty or incomplete diagnosis, unnecessary replacements, return visits and dissatisfaction; dealers and manufacturers are faced with high warranty costs; and owners and fleet operators are faced with excessive vehicle downtime and higher than necessary repair costs.
In an attempt to reduce the problems associated with motor vehicle repairs, automated vehicle diagnostic systems arc being developed which will permit diagnosis of vehicle condition by relatively unskilled personnel. Many such diagnostic systems simply display vehicle test parameters such as by oscilloscope waveforms or print-outs. Other diagnostic systems compare the vehicle test parameters with specification data supplied by the manufacturer. In both cases there is no attempt to diagnose a vehicle malfunction, and the analysis of the test data and determination of the required repair, if any, is left to the judgment of the mechanic or test operator. While such systems are satisfactory for obvious vehicle faults such as a defective cylinder, the output data is still subject to erroneous analysis and may result in unnecessary repairs. -2Decently there has been developed a completely automated vehicle diagnostic system which not only displays the vehicle performance data and any deviations from vehicle specifications, but also diagnoses the malfunction and 5 informs the test operator of the required repairs. This system, known as AUTOSENSE completely eliminates guesswork and unnecessary repairs, and the system can be used after the repairs are made to insure that the vehicle has been properly repaired .
One embodiment of the present invention forms a portion of the AUTOSENSE vehicle diagnostic system. The system as a whole includes means for providing signals indicative of vehicle rpm, and ignition system dwell and timing, as well as indicating distributor mechanical condition and the power 15 contributed by each cylinder. These parameters are fundamental in determining the condition of the vehicle engine and ignition system, and knowledge of one or more of these parameters is necessary to determine other vehicle conditions.
According to the invention there is provided a system 20 for measuring the rpm and dwel1 angle of an internal combustion engine having a distributor foi· selectively supplying a spark voltage to a plurality of spark ignition devices comprising means for generating a series of ignition pulses wherein each pulse has a duration related to the period 25 when the distributor points are open, means for generating a series of clock pulses, a counter connected to receive said series of clock pulses, first means for enabling said counter upon the leading edge of said ignition pulses and for stopping said counter upon the next occurring leading edge of said ignition pulses, wherein said counter contains a first count proportional to engine rpm, means for inverting said series of ignition pulses, second means for enabling said 343404 counter upon the leading edge of said ignition pulses, and stopping said counter upon the next occurring leading edge of said inverted ignition pulses, wherein said counter contains a second count proportional to ignition dwell time, moans for selectively connecting said first or second means with said counter, and data computation means connected with said counter for computing engine rpm and ignition dwell angle from said first and second counts.
The invention also provides a method for measuring the rpm and dwell angle of an internal combustion engine having a distributor for selectively supplying a spark voltage to a plurality of spark ignition devices comprising generating a series of ignition pulses wherein each pulse has a duration related to the period when tbe distributor points are open, generating a series of clock pulses, feeding said series of clock pulses to a counter, enabling said counter to count said clock pulses upon tbe occurrence of the leading edge of said ignition pulse, and stopping said counter upon the next occurring leading edge of said ignition pulses, wherein said counter contains a first count, computing engine rpm from said first count, inverting said series of ignition pulses, enabling said counter to count said clock pulses upon the leading edge of said ignition pulses, and stopping said counter upon tbe next occurring leading edge of said inverted ignition pulses, wherein said counter contains a second count, and computing tho dwell angle of said distributor from said first and second counts .
Xn one form of vehicle diagnostic system incorporating tbe invention, a first probe is connected to sense the voltage at the primary winding of the ignition coil, a second probe is connected to sense tbe firing voltage of tbe number one spark plug, and a timing light having connected thereto a variable -443404 delay circuit is used to measure top dead center of the number one i vlindi·)’ by means of a conventional strobing technique applied l.o the' timing marks on the vehicle. Vehicle rpm is measured by starting and stopping a digital counter respectively on the consecutive leading edges of the voltage pulses from the primary winding of the ignition coil. Dwell is measured by starting the digital counter on the leading edge of the voltage pulse from the primary winding of the coil, and inverting the voltage pulse so that the counter is stopped on the next leading edge. The counter then contains a count which is the inverse of dwell at the vehicle rpm, and digital or analog means are used to convert the count to represent dwell.
Timing is measured by adjusting the variable delay circuit connected to the timing light so that strobing of the timing light is retarded and occurs when the timing mark on the vehicle number one cylinder appears at the top dead center position. The digital counter is started by the leading edge of the voltage pulse which fires the number one cylinder, and the counter is stopped by tbe leading edge of tbe pulse from tbe delay circuit, tbe time between leading edges being a function of timing advance.
A high energy ignition adapter circuit and a signal conditioning circuit are connected to eliminate ringing and noise in tbe voltage pulse from the coil primary winding, and to provide a signal having leading and trailing edges which occui’ at tbe precise time that the ignition points open and close. -543404 The timing light delay circuit is adapted to fire the timing light after a delay determined by the. position of an adjustable potentiometer mounted, on the timing light. By delaying the firing of the timing light for a time equal to the advance of the firing of the spark plugs relative to top dead center, the time between the firing of the spark plug and the generation of a pulse from the delay circuit is a measure of ignition timing. A feature of the timing light delay circuit is a provision for two delay ranges, selectable by the system operator as a function of vehicle speed.
Other features and advantages of the present invention may be seen by reference to the accompanying specification and claims, read in conjunction with the drawings, wherein Fig. 1 is a schematic diagram of an engine rpm, dwell and timing diagnostic system embodying the invention. Fig, 2 is a schematic diagram of a typical engine ignition system showing the location of the probes of ?0 Fig. 1.
Fig. 3 is a schematic diagram of the analog rpm, dwell and timing computation units of Fig. 1. -643404 Fig, 4 is a schematic circuit diagram of the high energy ignition adapter and low coil signal conditioner of Fig. 1.
Fig. 5 shows the xwiveforms produced hy the circuit 5 of Fig. 4.
Fig·. 6 is a diagram of a timing light used in con-, junction with Fig. 1.
Fig. 7 is a schematic circuit diagram of the timing light delay circuit of Fig. 1.
Fig. 8 shows the waveforms produced by the circuit of Fig. 7.
Fig. 9 is a schematic diagram of a digital implementation of the engine rpm, timing and dwell system.
Fig. 10 is a schematic diagram of a system for 15 determining the power contribution of each cylinder ‘f and Fig. 11 shows the waveforms produced by the system of Fig. 10.
Fig. 1 shows in schematic block diagram form the basic system for computing engine rpm, dwell and timing. The system includes a probe 10 connected to the primary winding of the ignition coil (low coil), a probe 12 connected to sense the high voltage fed to the spark plug in the engine number one cylinder, and a timing light 14 adapted to contain a variable delay potentiometer 16.
Briefly, engine rpm and dwell are measured by actuating a digital counter in response to the pulses produced by the - 7 I. low coil probe 10. Timing is measured by enabling a digital counter to measure the time between the fir ing of the number one cylinder as measured by probe 12, and a delayed output signal from the timing light 14, the delay being adjustable to be equivalent to timing advance.
The count contained in the digital counter may be converted to rpm, dwell or timing by either analog or digital techniques. . . ; ......Fig. 2 shows schematically a typical ignition system for a vehicle having a four cylinder internal combustion engine. When the ignition switch 20 is closed, electrical current flows from the battery 18 into the primary winding of ignition coil 22 and through the closed distributor points 24 to store energy equal to 1/2 LX^ in the primary winding of the coil 22. The secondary winding of the coil 22 is connected to the distributor shown generally at 26. When the points 24 open, the collapsing field in the primary circuit of coil 22 induces a high negative voltage In the secondary winding of the coil which is passed to the desired spark plug as a function of the rotation of the distributor 26. The structure and operation of an ignition system of this type Is Well known and need not he described in further detail. The low coil probe 10 of Fig. 1 is connected as shown in Fig. 2 across the ignition points 24, the probe 10 producing a voltage· pulse which varies cyclically with each opening and closing of the points 24. Consequently, for a four cylinder engine - 8 43404 as shown in Fig. 2, four cyclic low coil voltage pulses are produced for each rotation of the rotor of distributor 26. The voltage probe 12 is connected to sense the high energy voltage fed from the distributor to the number one cylinder spark plug, and for a four cylinder engine shown in Fig. 2 only one voltage pulse will he sensed by probe 12 for each rotation of the distributor rotor. While probe 12 may be connected to any of the spark plugs, it is most convenient to connect the probe to sense the voltage fed to the number one cylinder since most automotive vehicles have timing marks which are aligned with the top dead center position of the number one cylinder.
While the probe 12 is shown as an in-line probe, any convenient type of voltage probe including a clamshell . type which clamps over the wire without breaking the connection may be used. The probe 10 is typically connected . by means of alligator clips.
Engine rpm and dwell are both measured in response to the low coil voltage produced by probe 10. passive signal conditioning circuitry, not shown, is typically. connected with the low coil probe 10 to produce an output signal which varies between zero and five volts 0C. The low coil voltage is then fed through a switch 80 (Figure 1), the position of which is controlled in response to a relay 29 powered by a manually operable switch 30, either directly to a signal conditioner circuit 32, or through a high - 9 434°λ energy ignition adapter circuit 28 to the signal conditioner circuit 32, circuits 28 and 32 being described more particularly In conjunction with Fig. 4. During normal operation switch 30 remains open, and the low coil voltage feeds through switch 80 to signal conditioner circuit 32 as shown in Fig. 1. Briefly, the signal conditioner 32 eliminates the ringing which typically occurs upon the opening and closing of the points and _____produces a. conditioned. low._coil_signal with sharp leading__. and trailing edges. In Fig. 5, waveform A (solid lines) shows a typical output voltage produced by the low coil probe 10, and waveform D shows the output voltage produced hy signal conditioner circuit 32.
Since the voltage output from the low coil probe 10, as conditioned by signal conditioner circuit 32, is in the form of a cyclic square wave pulse which increases in voltage-each time the points open, and decreases in voltage each time the points close, if a counter is started on the leading edge of the pulse when the points I open, and then is stopped on the next leading edge when the points again open, the count in the counter will he directly related to engine rpm. Likewise, since dwell is related to the time interval during which the points remain closed, if a counter is started when the points close, and is stopped when the points open, the count in the counter will be directly related to dwell. For reasons which will' become evident hereinafter, it has been found advantageous - 10 4 34 0 4when measuring dwell with the system of the present invention to start the counter when the points open, and stop the counter when the points close, the count in the counter then being inversely related to dwell and from 5 which count dwell can be. calculated by a simple arithmetic techn i.que.
In•order to accomplish the rpm and dwell measurement, the output from signal conditioning circuit 32, waveform ........_......D, of .Fig—5, is .fed through, an inverter 34-(Fig. 1) - ----------10 where the waveform is inverted to the form shown by waveform E of Fig. 5. This voltage is fed via signal line 36 to the dwell input terminal of a multiplex switch 38. Tlie voltage waveform E of Fig. 5 is also fed through an inverter 40 where it again assumes the form of !5 waveform D of Fig. 5, and is fed to both the rpm and dwell Input terminals of a multiplex switch 42, and also via line 44 to the rpm input terminal of multiplex switch 38.
The signals which pass through multiplex switches 38 and 42 are controlled respectively hy the position of adjustable switches 48 and 46 which are ganged together and simultaneously moved in response to a manually operated output selector 50 via line 54. In other words, when it is desired to measure engine rpm, output selector 50 is actuated by the system operator to move switches and 48 via line 54 to contact the rpm input terminals of multiplex switches 42 and 38 respectively. At this time only the signals appearing on the rpm input terminals pass through the multiplex switches. When it is desired to measure dwell, output selector 50 is actuated to cause switches 46 and 48 to move from the rpm input terminal to the dwell input terminal of multiplex switches 42 and 38, thereby permitting only the signals appearing on the dwell input terminals to pass through the multiplex switches. The signal passing ........through.multiplex.switch.42-d.s used, to- start.a.digital, -10 counter, and the signal passing through multiplex switch 38-is used to stop the digital counter. —For accuracy and economy of circuit design, it has been found desirable to arrange the system so that starting and stopping of the counter for rpm, dwell and timing measurements occurs only on the leading edge of the voltage pulses which pass through multiplex switches 38 and 42.
Assuming that the switches 46 and 48 are connected to the rpm Input terminals of multiplex switches 42 and !0 38, the voltage pulse shown at waveform D.of Fig’, 5 passes through multiplex switch 42 and into a digital filter 56. Likewise, the voltage pulse shown at waveform D of Fig. 5 also passes through multiplex switch 38 to a digital filter 58. The digital filters 56 and 58 comprise electronic logic circuits which pass therethrough a change in an input signal only if the signal remains at its new level for a predetermined time, and will not pass - 12 43404 therethrough changes in the input signal such as caused by noise which do not remain at the new level for the predetermined time.
The output from digital filter 56 is fed to a flip flop 60, and the output from digital filter 58 is fed to a flip flop 62. The outputs from flip flops 60 and 62 are in turn fed to a gate 64.which is typically an AND gate. Also fed to gate 64 are clock pulses generated by a clock 66. Initially, gate 64 is closed so that no clock pulses pass therethrough. Flip flops 60 and 62 are conditioned such that the leading edge of the waveform D of Fig. 5, produced when the points open, will change the state of slip flop 60 and open gate 64, thereby allowing clock pulses from clock 66 to pass through gate 64 into a digital counter 68 where the clock pulses are counted.
Flip flop 62 is conditioned by the output state of flip flop 60 via line 70 to respond to the next leading edge of the waveform and close gate 64 so that clock pulses no longer pass therethrough. As a result, digital counter 68 will count the clock pulses which occur between one leading edge and the next leading edge of the waveform, the count in digital counter 68 being proportional to the time between consecutive leading edges of the waveform, i.e., the time between consecutive openings of the points. - 13 4 3 4 Ο 4 While not shown, flip flops 60 and 62 may he interconnected so that the flip flops are reset after each cycle and will respond again in the same manner to open and close the gate 64 on the next consecutive leading edges of the rpm waveform, thereby continually updating the count in digital counter 68. As described in conjunction with Fig. 10, other circuit arrangements may he used in which the desired measurement is made for each cylinder in turn.
The output count from the digital counter 68 is fed - ·· through a digital-tto-analog converter 72 x-jhere there is produced an analog voltage equivalent to the count in digital counter 68. The analog output voltage from digital-to-analog converter 72 is fed through a three position switch 74 to one of three input terminals to the rpm, dwell and timing computation units 76. The details of the computation units 76 are shown specifically in conjunction with Fig. 3, and comprise computational circuitry for converting the output voltage from con!0 verter 72 into an rpm, dwell or timing measurement signal depending upon the position of switch 74. The position of switch 74 is controlled by the output selector 50 in conjunction with switches 46 and 48 in the multiplex switches 42 and 38 respectively, that is, when output •t ’5 selector 50 is actuated to select the rpm computation, switches 46, 48 and 74 are simultaneously moved to the * rpm terminals, and at this time only the rpm computation - 14 43404will be performed by computation units 76. The output from computation units 76 wil l, be a signal proportional to rpm, dwell or timing which may be fed to an indicator or other output display device 77.
Also shown feeding into the rpm, dwell and timing computation units 76 via line 79 is a signal from a cylinder selector 78. The cylinder selector 78 may be controlled manually by the operator of the system to .. produce , a signal indicative, of ..the number of. cylinders in___________ the engine of the-vehicle under test, typically, 4, 6 or .,. 8 -cylinders- -As-will be described in conjunction with Fig. 3, the computation of rpm, dwell and timing is a function of the number of cylinders, and information as to the numbers of cylinders in the engine under test is required by the computation units 76.
The dwell computation is also performed with the output from the low coil probe 10 of Fig. 1. When it is desired to measure dwell, output selector 50 is actuated to cause switches 46, 48 and 74 to make contact with the . respective dwell terminals. The waveform D of Fig. 5 is fed to the dwell input of multiplex switch 42, and the leading edge of the waveform causes flip flop 60.to transition and open gate 64, allowing clock pulses from clock 66 to pass to digital counter 68. The waveform E of Fig. 5 is fed to the dwell input of multiplex switch 38 via line 36, waveform E being inverted with respect to’ waveform D of Fig. 5. As a result, flip flop 62 will be - 15 43404 actuated and cause gate 64 to close upon the closing of the points, that Is, on the leading edge of waveform E, Fig. 5. Digital counter 68 will therefore contain a count proportional to the time between the opening and closing of the points. As will subsequently be described, a delay 'Z occurs between the closing of the points and the leading edge of waveform E, Fig. 5, the delay being caused by the operation of signal conditioner 32.
··»"·-— The-delay.-is compensated in •the computation-unit76 as'-'’"' 10 explained hereinafter.
- ‘- The counfin digital counter 68, which is equivalent to the number of clock pulses between the opening and closing of the points, is the inverse of dwell, since dwell is related to the time that the points are closed.
However, in the rpm computation the time between consecutive openings of the points is known, and dwell is computed in block 76 by a simple arithmetic process using the previous rpm measurement.
Fig. 4 shows the details of the.high energy ignition adapter circuit 28 and the signal conditioner circuit 32. The ringing negative and positive going high voltage unconditioned low coil signal produced by probe 10 Is shown at waveform A of Fig. 5. The waveform normally produced from the low coil probe 10 is shown by the solid ;5 lines in waveform A, and switch 80 will be in its normal position so that the voltage waveform bypasses the high energy ignition adapter circuit 28. The voltage waveform - 16 11 I is fed through series resistors 82 and 84 and parallel filtering capacitor 86 to the base junction of a transistor 88, the transistor 88 having a grounded emitter and a negative supply voltage provided to the base thereof through a resistor 90. Λ diode 92 is connected between the emitter and base of transistor 88 to maintain the base junction of transistor 88 at a voltage slightly more negative than ground and prevent conduction of -transistor .88 .until., the. occurrence of the leading edge ..of. the low coil voltage waveform.
------- - Since the rpm and dwell measurements are made as described in conjunction with Fig. 1 by enabling a clock gate to a digital counter on one leading edge of the conditioned low coil signal, and stopping the clock gate on the next leading edge of the conditioned low coil waveform, it is important that the ringing of the lox·/ coil waveform shoxrn by waveform A of Fig. 5 should cause no false edges, that is, it Is desirable that the leading and trailing edges of the conditioned lox/ coil waveform be as sharp as possible. This requirement is achieved by means of a delay circuit comprising resistors 94 and 96 connected to the collector of transistor 88 and through which a positive voltage is supplied from terminal 98, and by connecting a capacitor 100 between the collector of transistor 88 and ground. On each negative excursion of the low coil voltage waveform, the capacitor 100 is charged since transistor 88 is not conducting at this time - 17 1 434°4 and the capacitor 100 is connected directly in series between the voltage source 98, resistors 94 and 96, and ground. On positive excursions of the low coil waveform signal, the charge on capacitor 100 is discharged since transistor 88 now saturates, driving the collector voltage essentially to ground potential. The alternate charging and discharging of the capacitor 100 is represented hy waveform B of Fig. 5. The time constant of the RG network comprising resistors 94 and 96 and capacitor 100 is selected such that for the maximum length of a false negative going signal on the low coil waveform, the trip level of a comparator 102 connected to the capacitor 100 is not reached. By referring to waveform B of Fig. 5, it may be noted that during the ringing portion of the low coil signal, the negative and zero excursions are not long enough to charge capacitor 100 sufficiently to trip the comparator 102. However, after the ringing of the low coil waveform has stopped, the next negative going edge of the waveform A, which occurs upon closing of the ’-0 points, allows sufficient time for the capacitor 100 to charge up and trip the comparator 102. The negative input of comparator 102 is supplied via line 103 from voltage source 98 and voltage dividing resistors 104 and 106. !5 · When the capacitor 100 charges sufficiently positive for comparator 102 to he tripped, that is, when the points close, the comparator 102 changes states. The output from - 18 I I 3 4 0 4 the comparator 102 is shown by voltage waveform C of Fig. 5. If resistors 104 and 106 are equal, the delay I between the negative going edge, of the voltage waveform A ami the tripping of the comparator shown hy waveform C is solely determined by the accuracy of resistors 92; and 96 and capacitor 100. This fact results hy virtue of the fact that the voltage source 98 is used both as the reference to the comparator 102 and also to charge up capacitor 100, and therefore does not affect the delay accuracy. Since the delay is known and fixed independent of rpm, it may be corrected by subtracting a constant equal to the delay 'T' in the dwell computation as will be described in conjunction with Fig. 3.
The delay Ύ' produced hy the signal conditioner circuit 32 does not affect the rpm computation since the digital counter 68 of Fig. 1 is both started and stopped /•γ-, upon the opening of the breaker points, the delay / only affecting the waveform generated upon closing.of the breaker points and used in the dwell computations.
Referring back to Fig. 4, the output from comparator 102 is fed through a resistor 108 into the base of a transistor 110. The emitter of transistor 110 is grounded and connected to the base junction via diode 112, and a positive voltage is fed to the collector of transistor 110 through resistor 114, The output from transistor 110 is the waveform D of Fig. 5 which is fed via inverters 34- and 40 to the start and stop multiplex switches 42 and 38 of Fig. 1. - 19 4 3 4 0.4 The waveform produced by the low coil of most present-day automobile ignition systems is shown by the solid line in waveform Λ of Fig, 5. however, in some engine ignition systems, particularly those manufactured 5 by General Motors Corporation, a high energy ignition system is used which produces a waveform shown hy the dotted line 116 of waveform A, Fig. 5. It has been found that this type of waveform often causes an erroneous · output signal, that is, the portion of the waveform shown by dotted line 116 causes early switching of the comparator 102 and produces a false leading edge signal. This results in erroneous rpm and dwell readings. To overcome this problem, a bypass circuit comprising a series diode 118 and a reverse biased Zener diode 120 are placed in series with switch 80 in the high energy ignition adapter circuit 28. When tests are being performed on vehicles which incorporate high energy ignition systems, switch 30 (Fig. 1) is closed, thereby moving switch 80 to the terminal connected with the ignition adapter circuit 28 and providing a path for the low coil signal from probe 10 to the signal conditioner 32 through the diode 118 and Zener diode 120. The low coil xvaveform will not pass through the high energy ignition adapter circuit 28 until the voltage has reached an amplitude sufficient to overcome the breakdown voltage of the Zener diode 120, thereby eliminating the possibility of early actuation of the comparator 102 of signal conditioner 32 - 20 43404 which would produce a Jal.so leading edge l o the lew coll wavelorm.
Referring again to I’ig. 1, the ignition timing is measurexl by starting the digital counter 68 on the leading edge of the signal produced hy the number ona cylinder probe 12, and stopping the counter on the leading edge of an output signal from a timing light delay circuit 128. Briefly, the signal from the number one cylinder probe 12 is fed through a signal conditioning circuit 122 which contains circuitry of the type which will modify the raw signal from the number one cylinder probe 12, as shown at waveform F of Fig. 8, and produce therefrom a conditioned number one signal in the form of a pulse having sharp leading and trailing edges as shown by waveform H of Fig. 8, zU.so shown in Fig, 8 at waveform G are the conditioned low coil pulses from a four cylinder engine to illustrate the timing of the number one cylinder signal with respect to the low coil signals. The conditioned number one signal is fed via line 124 to the timing input terminal of the start multiplex switch 42. The conditioned number one waveform signal is also fed via line 126 to the timing light delay circuit 128.
The timing light delay circuit 128 produces a square wave output pulse having a leading edge which is delayed in time from the leading edge of the conditioned number one pulse by an amount determined by the position * of a delay potentiometer 16 connected with timing light 14. - 21 The timing Light 14, shown schematic «illy in Fig· 6, Is a standard commercial timing light «lightly modified to contain a delay potentiometer 16 and used in the conventional manner to determine when the number one cylinder piston is at its top dead center position as indicated by the timing marks on the damper and engine block of motor vehicle engines. Irt general, when the timing mark on the damper is aligned with the timing mark on the engine block, the number one cylinder piston is at its top dead center position.' However, with present-day engines it is standard practice to advance tho voltage pulse to the spark plugs so that ignition occurs a number of degrees before the piston attains its top dead center position in order to increase engine efficiency and decrease pollution. This timing advance is specified hy the manufacturer of the vehicle, and is generally a function of engine rpm. In order to measure the timing • advance, the delay potentiometer 16 is connected within the timing light as shown in Fig. 6, and is adjustable !0 such as by a thumbwheel 130. The delay potentiometer 16 is then connected to the timing light delay circuit 128 by lines 134 and will retard the triggering signal to the timing light 14 by a time determined by the resistance of the delay potentiometer 16. The operator will adjust the potentiometer 16 by means of the thumbscrew 130 so that the timing light fires or strobes when the timing marks are exactly aligned. The timing light delay circuit - 22 43404 will produce i.output pulse as a f· me tion of the delay time, which is dcterniin«.>d hy the resistance of potentiometer 16. By starting (lie digital counter 68 upon the firing of the number one cylinder as determined by the pulse from probe 12, and by stopping the digital counter on the leading edge of the delayed pulse front the timing light delay circuit 128 fed to multiplex switch 38 via line 210 (Fig. 3.), the count in the digital counter will be equivalent to the delay time produced in the timing light delay circuit 128, which is in turn equivalent to the timing advance.
Referring to Fig. 1, the trigger signal is fed via line 132 from the timing light delay circuit 128 to the timing light 14 to actuata the timing light 14 in accordance with the delay provided by the delay circuit 128. As will be described in detail in conjunction with Fig, 7, the timing light delay circuit 128 will provide a delay in the output signal therefrom which is adjustable by potentiometer 16 within one of two selectable delay ranges, a range and a range range being selectable such as by a delay range selector 142 (Fig. 1) via line 140.
The timing light in Fig. 6 Is a conventional timing light which has been slightly modified to incorporate the timing light delay potentiometer 16 which Is controlled by the adjustable; thumbwheel. 130. The timing light 1.4 ’ contains a trigger circuit 146 which causes actuation of a - 23 43404 - flash tube 148 at the proper time as determined by the trigger signal on line 132 which is fed to the trigger circuit 146 from the timing light delay circuit 128 (Fig. 1). The delay potentiometer 16 is connected to the timing light delay circuit 128 of Fig. 1 via line 134.
Power is supplied to the timing light 14 in a conventional manner via line 150.
The details of the timing light delay circuit 128 with the selectable delay ranges and T' are shown in Fig. 7. The conditioned number one cylinder signal on line 126, Fig. 1, as shown at waveform H of Fig. 8, i.s fed through resistor 152 to the base junction of transistor 154. Transistor 154 is normally nonconducting by virtue of the negative voltage supplied to the base junction thereof through resistor 156. A positive voltage is supplied to the collector of transistor 154 through resistor 158, and a diode 160 is connected between the emitter and base of transistor 154.
The conditioned number one signal on line 126 is differentiated by means of resistor 158, a series resistor 162 and capacitor 164, a resistor 166 connected to a positive source of voltage, and transistor 154, to produce at the base junction of a transistor 168 the waveform shown at I, Fig. 8. On the negative going portion of the differentiated signal, transistor 168 is turned on, supplying base current to a transistor 170 and' » driving transistor 170 into saturation. A capacitor 172 - 24 4 3 4 0 4 is connected aero;;;:, transistor 170, ar.d any charge on the capiicifor i;; disc!.a, gad through i.he conducting transistor 170 after pa;,;,aye of the negative going differentiated pulse. .After passage of the numher one cylinder pulse, transistors 168 and 170 turn off, causing capacitor 172 to charge in a linear fashion. The charging current to capacitor 172 is provided by a variable current source consisting of transistor 174, resistor 176, diodes 178 and 180, resistor 182, voltage source 184, resistor 186 and the delay potentiometer 16 which is physically positioned within timing light 14 and connected to the timing light delay circuit via lines 134. A fixed negative voltage is applied to the base of transistor 174 as a result of the voltage drop across fixed resistors 176 and 132 between ground and negative voltage source 134. Hence transistor 174 Is continuously conducting. However, the current through transistor 174 13 determined by the variable resistance in its emitter circuit comprising delay potentiometer 16 and fixed resistor 186. As a result, the current through transistor 174 and therefore the charging rate of capacitor 172 will be determined by tha resistance of delay potentiometer 16 which is in turn a variable. When transistors 168 and 170 are turned off, capacitor 172 charges in a linear fashion until the reference voltage to a comparator 188, produced by resistors 189, 191 and 193, and positive voltage source 195, is exceeded. Once tha reference - 25 43404 voltage ti) the com pa calx»; 138 i.s exceeded, the comparator 188 switches from a negative, clamp to a positive clamp. Λ negative voltage source 193a supplies a negative bias to a diode 175 via resistor divider 171, 173 to clamp the output across capacitor 172 to a negative value, thereby reducing the discharge time, of capacitor 172. While not shown, feed forward compensation may be employed with the operational amplifier circuit of comparator 188 to achieve minimum delay in switching the comparator.
When the output from comparator 188 has become positive, transistors 190 and 192 are turned on, conduction of transistor 192 turning on an optical coupler 194. The output of the optical coupler 194 is connected to the trigger circuit 146 in timing light 14 via lines 132 which preferably are a twisted pair shielded cable to minimize noise pickup. The optical coupler output may be differentiated and used to trigger an SCR circuit, not shown, located in the timing light 14 to cause the light !0 to flash after· a delay time determined with respect to the firing of the number one cylinder by virtue of the setting of delay potentiometer 16.
Fig. 8 shows the waveforms in connection with the operation of the circuit of Fig. 7. Waveform J shows the !5 .clxange in the voltage across capacitor 172 as a function of the differentiated number one cylinder signal shown at waveform I, Waveform K shows the output from - 26 43404 comparator '188, wivcfotirt ϊ, chows the output: from optical coupler 194 which triggers the timing light via 'fines 132, and waveform M shows the output from transistor 192 which is fed to multiplex switch 38 via line 210.
The operation of the circuit of Fig. 7 as described assumes that delay selector 142 of Fig. 1 has baen adjusted so that delay range I is selected. In Fig. 7, this is shown by connecting switch 138 to a positive voltage source 196 through a resistor 198. The positive voltage source 196 provides a positive voltage at the. base junction of transistor 200. Transistors 200 and 202 are nonconductive, and a capacitor 204, whieh is connected in series with transistor 202, is essentially removed from the circuit. In order to increase the delay time of the circuit such as during cranking or low speed operation, delay selector 142 is actuated to move switch 138 to select delay range ^2' grounding switch 138, a negative voltage is applied to the base of transistor 200 as a result of the voltage drop from negative voltage source 206 through resistors 208 and 210a. Transistor 200 now becomes conductive, turning on transistor 202 and driving it into saturation. Saturating transistor 202 effectively grounds one side of capacitor 204 connecting it in parallel with capacitor 172 and thereby increasing the time necessary for a given output current from the current source (transistor 174) to charge up capacitors 172 and 204 to exceed the reference voltage to comparator 188 - 27 43404 The delay circuit 128 of Fig. 7 ia connected by fairly long cables 134 to the delay potentiometar 16 in the external timing light 14, and has been found to be insensitive to noise pickup on the cable leads, and capable of being adjusted in a linear manner by means of the single potentiometer 16 over a delay ratio of approximately 1000 to 1. 'Tiie ability to provide two delay ranges hy connecting capacitor 204 in parallel with capacitor 172 permits the circuit to he used at low rpm where the actual time between the firing of the spark plugs is relatively long. The delay provided by the circuit decreases with increases in current through the ’ transistor 174, the current being a direct function of the resistance of delay potentiometer 16. Up to 60 degrees advance can be measured with the circuit of Fig. 7 with a commercially available timing light modified as disclosed herein. It should be noted thatthe count in the digital counter 68 of Fig. 1 is a measure of the delay in time provided by timing light delay circuit 128, not the number of degrees of advance.
The details of the rpm, dwell and timing computation units shown as block 76 in Fig. 1 are shown in Fig. 3.
The count in the digital counter 68, which has been converted to an analog signal in digital-to-analog converter 72, Is fed through switch 74 to either the rpm, dwell or timing computation terminal as a function of the position of output selector 50. - 28 43404 The rpm computation in performed in accordance with the following equation: Equation (1) Kl.’M ~ 2A 5 Λο2, «>: C where the numerator ia a function of the construction of digital counter 63, N is the number of cylinders, and is the contents of tha counter 68 when rpm is being computed.
Assuming that output selector 50 has selected rpm, and switches 46, 48 arid 74 are in contact with the rpm terminals, an analog signal indicative of the count Cj in the digital counter 68 is fed via signal line 212 to the sample and hold circuit 214 where the quantity is stored. The sample and hold circuit 214 is required since the quantity is also used in tha dwell and timing computations.
Cylinder selector 78, also shown in Fig. 1, is connected to a switch 222 which selects a voltage V^, or Vg shown in blocks 219, 220 and 221, and which are respectively proportional to the number of cylinders N 2o in the vehicle engine under test. The selected signal representing N is fed from switch 222 via line 218 to a multiplier 216 where the quantity N times C^ is computed. The output from the multiplier 216 is fed via line 224 t:o a divider 226 to which has also been fed a constant voltage Kj shown in block 228, the constant Kbeing equivalent to the numerator of Equation (1). The output: from the divider 226 on line 230 is a voltage - 29 43 40 4 C2 - K2 (2) DWELL ~ computation of the dwell signal, assuming that 46. 48 and 74 are connected to the dwell proportional.to rpm. The output may then be fed to an indicator or other output device ns shown by output display unit 77 of Fig. 1.
Dwell is computed according to Equation (2) as follows: Equation For switches . terminals, the digital counter 68 of Fig. 1 will contain a count which is fed through, the digital-to-analog converter 72 and through switch 74 via line 231 to a summing amplifier 232. Also fed to summing amplifier 232 is a constant shown in block 234 which is equal to r , the delay in the low coil signal produced by capacitor 100 of the signal conditioning circuit 32 shown in· Fig. 4, and also illustrated at waveforms D and E of Fig. 5. The delay Τ' must be subtracted so that the output from the summing amplifier 232 is proportional to the time between the actual opening and closing of the points. The output from summing amplifier 232 is fed via . line 236 to a divider 238 where it is divided by the contents of the sample and hold circuit, C^, which appears on lines 240 and 239. Since dwell is a distributor angle, and since the system disclosed in Fig. 1 measures time, the rpm of the engine must be taken into account in order to compute dwell. - 30 1 34 04 The output front divider.· 230 is fed into a summing amplifier 24.1. where it. is subtracted front a constant K shown at block 242, the constant K being equal to 1.
The term i.n the dwell equation 360°/N is computed in divider 244 which receives inputs of a constant from block 246, and the number of cylinders N via line 245. The output from divider 244 is then fed to a multiplier 250 via line 243 where it is multiplied by the output from summing amplifier 241, the output from multiplier 250 on line 252 being the dwell signal.
Timing is computed according to the following . Equation (3): Equation (3) TIMING =» 72θ° χ f4 N C1 Again assuming that the switches 46, 48 and 74 have been set by output selector 50 to the timing terminals, the digital counter 68 will contain a count which is proportional to the difference between the time of the leading edge of the number one cylinder signal, and the leading edge of the signal from the timing light delay circuit 128. The count in digital counter 68 is fed through digital-to-analog converter 72 of Fig. 1, and the analog voltage is fed through switch 74 via line 253 to divider 254 where the quantity C, is divided by the 4 quantity from the sample and hold circuit 214 and which appears on line 240. The output from divider 254 is fed via line 256 to a multiplier 258. Also fed to - 31 43404 multi.plfor 258 is tins output from divider 262 equivalent to the coii.'H'-'iut R,- in block 760 divided by N, Che. number of cylinders, from line 261. The output from the multiplier 258 on line 264 is a voltage proportional to degrees of advance.
Fig. 9 shows a digital implementation of the rpm, timing and dwell computation system. The computations are performed in a digital manner in a central processing unit 270 which may be a general purpose digital computer programmed in accordance with procedures well known in the art. Equations (1), (2) and (3) can be implemented, in the .central processing unit 270.
Referring to Fig. 9, the rpm, dwell and timing pulse signals derived as shown in Fig. 1 are fed to a start multiplex circuit 272, and a stop multiplex circuit 274, the multiplex circuits being digital equivalents of the start and stop multiplex switches 42 and 38 of Fig. 1.
An address control signal on signal line 275 is fed from the central processing unit 270 to address the start and stop multiplex circuits 272 and 274 and control the passage therethrough of either the rpm, dwell or timing signals as a function of the program stored in the central processing unit 270. The selected signals pass through the multiplex circuits to a two to one multiplex circuit 276, and the desired signal selected by a line 277 from a counter control logic circuit 280 passes through multiplex circuit 276 and a digital filter 278 to the counter control - 32 43404 logic e <>.<··.'i.t 280. The counter cont rol logic circuit 280 contain.·; wol I ••known digital logic circuitry which controls tho starting and stopping of the counter and .serial, converter 282 via start line 234 and reset line 286. A series oi clock pulaos from clock 288 is fed into the counter and serial converter 282. Also shown connecting counter control logic circuit 280 with the counter and serial converter 232 is a line 290 which indicates to the counter 282 when conversion of the data is complete.
Tiie output from the counter and serial converter 282 is fed to tha central processing unit 270 via line 292. Λ reset signal is fed from the central processing unit 270 via line 294 to the counter control logic circuit 230 and to the digital filter 278. A cylinder selector 296 feeds i.n forma tion to the central processing unit 270 as to the number of cylinders in the engine under test. The output from the central processing unit 270 is fed via line 298 to an input/output and display unit 300 which may be a printer, a hand held controller or other well-known device. The cylinder selection may be incorporated in the unit 300. The central processing unit 270 also feeds a signal via line 302 to select the timing range, or^2’ as a function of rpm. The computations of rpm, dwell and timing shown in Equations (1), (2) and (3) are performed by the central processing unit 270 by virtue of a stored program in a manner well known to those skilled in tha art. - 33 43404 Whether the computations are performed in an analog or a digital manner, the present system has the inherent capability of providing data as to vehicle engine and/or ignition system performance beyond the measurement of i rpm, dwell and timing. For example, a common problem with ignition systems is the mechanical wear associated with the distributor shaft bearings and drive gears. These problems manifest themselves as variations in dwell angle . readings from cylinder to cylinder which cannot be .0 detected in prior art analog systems which are averaging systems. By measuring dwell on a cylinder to cylinder basis, distributor problems can readily be detected.
The present 'system automatically identifies the dwell measurement and the particular engine cylinder producing the measurement by virtue of the number one cylinder signal prqduced by probe 12. For example, with the digital embodiment of Fig. 9, the signal produced by the number one cylinder is fed to the start multiplexer 272, and uniquely identifies tbe information fed to tbe central processing unit 270 at that time as being produced by tbe number one'cylinder. Since tbe central processing unit 270 is also fed data indicative of tbe number of cylinders in the vehicle under test from cylinder selector 296, the data produced by each cylinder is uniquely identified. In the system of Fig. 9, the conversion complete signal on signal line 290 identifies to the central processing unit 270 the occurrence of a number one - 34 43404 cylinder signal.. Ί'!ι« progr un instruct ions Cor causing tin· dwell angle data computed in central processing unit 270 to be displayed on an output display unit 300, which may include an oscilloscope, and to he identified as to each cylinder, are well known to those skilled in the art. The display of dwell angle for each cylinder provides the system operator with a unique means for identifying mechanical or other malfunctions in the vehicle distributor, and variations in dwell angle between cylinders inherently identify distributor problems. As an example, the distributor points for a four cycle engine are driven from the engine crankshaft at One-half crankshaft speed, normally via an intermediate drive such as the camshaft. For two stroke spark ignition engines, the speed relationship is one to one,albeit design considerations in most cases force the location of the distributor at some other intermediate position. As the gear mesh wears or as the bearing gear mesh in the distributor wears, the dwell will vary. Radial play caused by worn distributor bearings will cause a radial motion of the distributor and breaker point lobes. This motion will cause the points and consequently the dwell period to change. Likewise a worn timing chain or distributor drive gear will result in angular changes in distributor drive shaft velocity, causing an erratic reading In dwell. Since the system computes individual dwell readings these characteristics may be observed. - 35 4340 4 By means of a slight modification to the system, the power contribution and dynamic relative compression of each cylinder may be determined. In prior art power contribution schemes, it has been customary, to measure the power contributed to the vehicle hy each cylinder by defeating the spark to each of the cylinders in turn, and measuring the resultant decrease in rpm. A significant decrease in rpm is indicative of a properly operating cylinder, while a small or zero decrease in rpm when a cylinder is defeated indicates that the defeated cylinder is contributing little or nothing to vehicle power.
With this information proper diagnosis and repairs can be made to the engine.
The present system measures power contribution and dynamic relative compression without defeating the cylinders, and comprises a means to measure the variations in time for the acceleration and compression cycle of each cylinder to occur. Assuming that each cylinder is contributing an equal amount of power to the engine, and assuming a constant engine rpm, the time of the . acceleration cycle for each cylinder will be identical, and likewise the time for the compression cycle for each cylinder will be identical. The acceleration cycle is that portion of the ignition or low coil waveform during which the points are opened and during which the spark voltage is supplied to the spark plugs and combustion occurs in a cylinder causing the engine to accelerate. - 36 43404 The «««pression cycle for ilio next cylinder in the firing order is one portion of the Ignition or low coil waveform during which tho points arc closed and during which no spark voltage is supplied, the engine at this time causing compression of tho fuel-air mixture. Fig. 11, waveform Q, shows the instantaneous variation in engine rpm with degrees of crankshaft rotation for a four stroke engine, i.e., for 720° of crankshaft rotation. As shown in the Figure, T^° is the number of degrees during which acceleration of the number 1 piston/cylinder occurs, i.e., between the opening and closing of the points, and T^° is the number of degrees during which deceleration or compression of the number 2 piston/ cylinder occurs, i.e., between the closing and the next opening of the points,. Since the number of degrees of rotation of the crankshaft in the engine is equal for the acceleration and compression cycles of each cylinder, an engine in which each cylinder is contributing the same power will take the same time for the acceleration and compression cycles for each cylinder at a constant average rpm.
Assume, however, an engine in which one cylinder is defective and is contributing little or no power to the engine. When the spark voltage is fed to this cylinder, little or no acceleration occurs during the acceleration cycle for this cylinder, The engine rpm will either drop' slightly, or increase far less than the increase produced - 37 434θ 4 by a norma] cylinder. Consequently, the time for the acceleration cycle of this cylinder to occur (i.e. the time during which the points are opened) will be longer than that for a normal cylinder. By monsuc’ng the times of the acceleration and compression cycles for each cylinder, differences in the power contribution and dynamic relative compression of each cylinder can be determined relative to the other cylinders, and a defective cylinder or other defect can he located. Power contribution and .0 dynamic compression are measured by computing the average angular velocity for each cylinder during the acceleration and the compression cycles.
Referring to Fig. 10 there is shown a modification to the system of Fig. 1 in which average angular velocity 5 is computed for both the acceleration and compression cycles of each cylinder. Fig. 11 shows the waveforms generated in the embodiment of Fig. 10.
The rpm and dwell computation system described with respect to Figs. 1 and 9 uses a digital counter to count !0 clock pulses during selected times of the low coil signal. •Specifically, when the rpm input is selected, the digital . counter is enabled upon the leading edge of the low coil pulse and stopped upon the leading edge of the next low coil pulse. When the dwell input is selected, the digital counter is enabled upon the leading edge of the low coil pulse, and stopped on the leading edge of the inverted low coil pulse. A delay 7 produced by signal conditioning circuit 32, Fig. 1, is added to the count in Lhe counter; when dwell 1:: selected, hut does not affect the count in the counter when rpm i.s selected.
The present invention makes use of the count existing in the digital counter when the rpm and dwell terminals are selected to determine the average angular velocity during the acceleration and compression cycle of each cylinder.
Referring to Figs. 10 and 11, the rpm and dwell inputs are fed to a digital multiplexer 318 which is addressed by the control signal on line 322, and the inputs are then passed to a digital counter 320 in a manner described in conjunction with Figs, 1 and 9. The count, in counter 320 is converted to an analog signal in digital to analog converter 324, and the analog output voltage is then fed to an analog multiplexer 326 addressed by the control signal on line 328. From the analog multiplexer 326 the rpm and dwell counts are fed into a data computation unit 330, The address control signal, on lines 322 and 328 are provided by well-known timing control circuitry which may form part of the data computation unit 330.
Both the rpm and dwell counts, in analog format, are fed to sample and hold circuits 332 and 334 respectively within the data computation unit 330.
As explained previously in conjunction with Fig. 1, the count in counter 320 when rpm is addressed is the number of clock pulses between consecutive leading edges of the low coil pulses as shorn by T° in waveform N, Fig. 11.
The count in counter 320 when dwell is addressed is the number of clock pulses between the leading edge of the low coil pulse, and the leading edge of the inverted low coil pulse, plus the delay time τ added by signal conditioner of Fig. 1. The count is actually the inverse.of dwell as explained previously, and is shown at waveform 0, Fig. 11. A constant K2 (Κ2=τ) is subtracted from the dwell count in sample and hold circuit 334 in a summing amplifier 336· The output from summing amplifier 336 is the count The rpm count T° (indicative of the total duration of an acceleration and compression cycle of a cylinder) is fed from sample and hold circuit 332 to a summing amplifier 338 and the output count from summing amplifier 336, T^° (indicative of the duration of the acceleration cycle) is subtracted therefrom, the output from summing amplifier 33θ being the count T.,0 (indicative of the duration of the Compression cycle) shown at waveform P of Fig. 11.
The angular velocity for each cylinder is computed in data computation unit 33θ in accordance with the following equations: Equation (4) 0 X1 angular acceleration cycle velocity= _ T °’ and Equation (5) τ θ angular compression cycle velocity= __ T° where T°, T^° and T2° are defined in Fig. 11. -4043404 The angular acceleration cycle velocity is computed in divider 3^0, and the angular compression cycle velocity is computed in divider 3^2, in the data computation unit 330 of Fig. 10. The angular velocity outputs for each cylinder may be fed to a display unit, where the operator may visually determine variations between the power contribution of each cylinder, or further computations may be performed in data computation unit 330. The computations may be performed in an analog or digital manner. Since the system of Fig. 10 uses only the counts in the counter 320, and the counts vary with the time required for the acceleration and compression cycles, changes in engine rpm as reflected by changes in the count are directly related to the power contributed by each cylinder during the acceleration cycle, and the dynamic relative compression of each cylinder during the compression cycle. Consequently, substantial information relative to engine performance is obtained.
While the invention has been described in terms of a preferred embodiment thereof, it will be apparent to those skilled in the art that numerous changes may be made without departing from the scope of the invention as hereinafter cl aimed.
The above-described embodiment of the invention is also described, and claimed from other aspects thereof, in our Irish Patent Ho. 43405

Claims (17)

1. A system for measuring the rpm and dwell angle of an internal combustion engine having a distributor for selectively supplying a spark voltage to a plurality of 5 ppark ignition devices comprising means for generating a series of ignition pulses wherein each pulse has a duration related to the period when the distributor points are open, means for generating a series of clock pulses, 0 a counter connected to receive said series of clock pulses, first means for enabling said counter upon tbe leading edge of said ignition pulses and for stopping said counter upon the next occurring leading edge of said ignition 5 pulses, wherein said counter contains a first count proportional to engine rpm, means for inverting said series of ignition pulses, seconds means for enabling said counter upon the leading edge of said ignition pulses, and stopping said 3 counter upon the next occurring leading edge of said inverted ignition pulses, wherein said counter contains a second count proportional to ignition dwell time, Meulis for selectively connect lug sold first or second means with said counter, i and data computation means connected with said counter for computing engine rpm and ignition dwell angle from said first and second counts.
2. , A method for measuring tbe rpm and dwell angle of an internal combustion engine having a distributor for selectively supplying a spark voltage to a plurality of spark ignition devices comprising -4243404 gem-rating a series of ignition pulses wherein eacii pulse lias a duration related to the period when the distributor points are open, generating a series of clock pulses, feeding said series of clock pulses to a counter, enabling said counter to count said clock pulses, upon the occurrence of the leading edge of said ignition pulses and stopping said counter upon the next occurring leading edge of said ignition pulses, wherein said counter contains a first count, computing engine rpm from said first count, inverting said series of ignition pulses, enabling said counter to count said clock pulses upon the leading edge of said ignition pulses, and stopping said counter upon the next occurring leading edge of said inverted ignition pulses, wherein said counter contains a second count, and computing the dwell angle of said distributor from said first and second counts,
3. The method of claim 2 in which said engine has N cylinders, and in which the step of computing engine rpm is performed according to the equation K rpm= _ N ' C 1 where K = constant, N ~ the number of cylinders, and C.j= the first count in said counter. h. The method of claim 2 in which said engine has N cylinders, and in which the step of computing dwell angle is performed according to the equation -4343404 Dwell angle 360° N where K 2 = constant N = the number of cylinders, = the first count in said counter, and C 2 = the second count in said counter.
4. 5· A system for measuring the rpm and dwell angle of an internal combustion engine having an ignition system for producing a high voltage and distributor for selectively 10 supplying said voltage to each of a plurality of spark ignition devices connected with the engine cylinders comprising means connected with said ignition system for sensing the occurrence of said ignition voltage and producing a 15 series of ignition pulses indicative thereof, first and second multiplex switch means, each said switch means having first and second input terminals and an output terminal, means for supplying said series of ignition pulses to 20 the first and second input terminals of said first switch means, and to the first input terminal of said second switch means, means for inverting said series of ignition pulses, means for supplying said series of inverted ignition -5 pulses to the second terminal of said second switch means, selector means for simultaneously actuating said first and second switch means to cause passage to the output terminal thereof of the series of ignition pulses on either -4443404 the first or second input terminals of said switch means, Rating means connected to the output terminals of said first and second switch means, a source of clock pulses, means connecting said source of clock pulses to said gating means, a digital counter connected to said gating means, means for enabling said gating means to pass to said digital counter said series of clock pulses upon the leading edge of the ignition pulses passing through said first switch means, and for disabling said gating means upon the next occurring leading edge of the ignition pulses passing through said second switch means, whereby said digital counter contains a first count when said selector means actuates said switch means to cause passage therethrough of the ignition pulses on the first input terminals thereof, and said digital counter contains a second count when said selector means actuates said switch means to cause passage therethrough of the ignition pulses on the second input terminals thereof, and data computation means connected with said counter for computing engine rpm from said first count, and for computing dwell angle from said first and second counts.
5. 6. A system as in claim 5 in which said data computation means is a digital computer.
6. 7. A system as in claim 6 in which said first and second multiplex switch means are digital multiplexers, and in which said selector means comprises address control means connecting said digital computer with said digital multiplexers .
7. 8. A system as in claim 5 and including first and second flip flops connected respectively between said first and second switch means and said gating means. -4543404
8. 9- Λ system as in claim 5 and including output display means connected with said data computation means for displaying said computed rpm and dwell angle.
9. 10. A system as in claim 5 and further including means connected with one of said spark ignition devices for producing a timing signal indicative of the firing thereof, means including said data computation means for computing dwell angle for each of said engine cylinders, and means responsive to said timing signal for identifying the computed dwell angle with the cylinder for which said dwell angle is computed.
10. 11. A system for measuring the relative power contribution and relative compression for each cylinder in an internal combustion engine having breaker points and a spark ignition device connected to each cylinder comprising means for generating a series of voltage pulses wherein each pulse has a duration equivalent to the time between the opening of the points for creating the voltage pulse for each respective cylinder and the opening of the points for creating the voltage pulse for the next cylinder in the ignition sequence, digital counter means, means for producing in said digital counter means in response to said series of voltage pulses a first signal Indicative of the time between initiation of the voltage pulse for each respective cylinder and the initiation of the voltage pulse for the next cylinder in the ignition sequence, and a second signal indicative of the time duration of the said voltage pulse for each cylinder, and means responsive to said first and second signals in said digital counter means for producing first and second output signals for each cylinder indicative -4643404 respectively of the relative power contribution and relative compression of said cylinder,
11. 12, A system as in claim 11 in which said means for producing said first signal comprises means responsive to the leading edge of each of said voltage pulses for actuating said digital counter means so that a count is initiated therein, and means responsive to the leading edge of said next occurring voltage pulse for terminating the count in said digital counter means,
12. 13· Λ system as in claim 11 in which said means for producing said second signal comprises means responsive to the leading edge of each of said voltage pulses for actuating said digital counter means so that a count is initiated therein, means for inverting said series of voltage pulses, and means responsive to the next occurring leading edge of said inverted voltage pulses for terminating the count in said digital counter means.
13. 14. A system as in claim 11 in which Said means responsive to said first and second signals for producing first and second output signals comprises means for producing from said first and second signals a third signal indicative of the time between the termination of said ignition voltage for each cylinder and the initiation of the ignition voltage for the next cylinder, means for computing for each cylinder the ratio between said second signal and said first signal to produce said first output signal, and means for computing for each cylinder the ratio between said third signal and said first signal to produce said second output signal. -4743404
14. 15- A method for measuring the relative power contribution and relative compression for each cylinder in an internal combustion engine having breaker points and a spark ignition device connected to each cylinder comprising 5 the steps of generating a series of voltage pulses wherein each pulse has a duration equivalent to the time between tbe opening of the points for creating the voltage pulse for each respective cylinder and the opening of the points for 10 creating the voltage pulse for the next cylinder in the ignition sequence producing from said series of pulses a first signal indicative of the time between initiation of the voltage pulse for each cylinder and the initiation of the voltage 15 pulse for the next cylinder in the ignition sequence, producing from said series of pulses second and third signals indicative respectively of the time duration of the voltage pulse for each cylinder and the time between termination of tbe voltage pulse for each cylinder and the 20 initiation of tbe voltage pulse for tbe next cylinder in tbe ignition sequence, and computing from said first, second and third signals the relative power contribution and tbe relative compression for each cylinder. 25 l6. The method of claim 15 in which tbe step of computing the relative power contribution for each cylinder includes the step of computing the ratio of tbe second signal to the first signal. -4843404
15. 17. The mi-tliod of claim 15 in which the step of computing the relative compression for each cylinder comprises the step of computing the ratio of the third signal to the first signal. 5
16. 18. Λ method for measuring rpm and dwell angle according to claim 2 and substantially as hereinbefore described with reference to the accompanying drawings.
17. 19. A system for measuring rpm and dwell angle according to claim 1 and substantially as hereinbefore 10 described with reference to the accompanying drawings.
IE63676A 1975-03-26 1976-03-25 Method and apparatus for measuring the rpm and dwell angle of an internal combustion engine, and the relative power contribution and relative compression of each cylinder IE43404B1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US56207475A 1975-03-26 1975-03-26
US05/562,090 US3986009A (en) 1975-03-26 1975-03-26 Power contribution measurement system for internal combustion engines
US05/562,089 US3955135A (en) 1975-03-26 1975-03-26 Vehicle rpm and dwell measurement system

Publications (2)

Publication Number Publication Date
IE43404L IE43404L (en) 1976-09-26
IE43404B1 true IE43404B1 (en) 1981-02-25

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IE63676A IE43404B1 (en) 1975-03-26 1976-03-25 Method and apparatus for measuring the rpm and dwell angle of an internal combustion engine, and the relative power contribution and relative compression of each cylinder

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JP (1) JPS51119405A (en)
AU (1) AU498818B2 (en)
BE (1) BE840051A (en)
BR (1) BR7601810A (en)
DE (1) DE2612063A1 (en)
DK (1) DK123576A (en)
ES (1) ES446357A1 (en)
FR (1) FR2305725A1 (en)
GB (1) GB1549000A (en)
IE (1) IE43404B1 (en)
IT (1) IT1058575B (en)
LU (1) LU74648A1 (en)
NL (1) NL184126C (en)
SE (1) SE422997B (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5830135Y2 (en) * 1978-03-01 1983-07-02 株式会社デンソー Closing angle detection device for internal combustion engine ignition system
US5146168A (en) * 1990-10-01 1992-09-08 Actron Manufacturing Company Variable sensitivity timing analyzer
RU2206762C2 (en) * 2001-01-30 2003-06-20 Оренбургский государственный университет Internal combustion engine running-in and diagnosing system
DE202019005742U1 (en) 2019-02-06 2021-10-11 Auto-Intern GmbH Device for recording and processing and outputting synchronized measurement data and computer program product and use
DE102019102992A1 (en) 2019-02-06 2020-08-06 Auto-Intern GmbH Device and method for recording and processing and outputting synchronized measurement data, and computer program product and use
RU2715132C1 (en) * 2019-10-23 2020-02-25 Виталий Викторович Нечаев Method of diagnosing parts of cylinder-piston group and gas distributing mechanism of engine

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3474667A (en) * 1967-10-26 1969-10-28 Harold O Fuchs Engine ignition system performance monitor
US3788129A (en) * 1971-06-24 1974-01-29 Sun Electric Corp Select signal engine diagnosing apparatus
US3753082A (en) * 1972-01-20 1973-08-14 Prod Measurements Average timing method and apparatus for internal combustion engines
US3789658A (en) * 1972-01-28 1974-02-05 Clayton Manufacturing Co Engine performance analyzer
US3870869A (en) * 1973-04-26 1975-03-11 Columbia Gas Syst Digital apparatus for the timing and analysis of internal combustion engines
US3870947A (en) * 1973-11-12 1975-03-11 Leslie L Fields Method and apparatus for measuring the dwell and rpm of an engine

Also Published As

Publication number Publication date
FR2305725B1 (en) 1982-12-31
LU74648A1 (en) 1976-09-01
ES446357A1 (en) 1977-12-01
DE2612063A1 (en) 1976-10-14
FR2305725A1 (en) 1976-10-22
IT1058575B (en) 1982-05-10
JPS51119405A (en) 1976-10-20
AU1213276A (en) 1977-09-22
IE43404L (en) 1976-09-26
SE422997B (en) 1982-04-05
BR7601810A (en) 1976-09-28
BE840051A (en) 1976-07-16
NL184126B (en) 1988-11-16
DK123576A (en) 1976-09-27
NL184126C (en) 1989-04-17
NL7602773A (en) 1976-09-28
SE7602655L (en) 1976-09-27
GB1549000A (en) 1979-08-01
AU498818B2 (en) 1979-03-29

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