HK1237524A1 - Electro-optic displays with reduced remnant voltage, and related apparatus and methods - Google Patents

Description

Electro-optic displays with reduced remnant voltage and related devices and methods

Reference to related applications

This application claims the benefit of U.S. provisional application serial No. 62/111,927 filed on day 4/2/2015. This application is related to co-pending U.S. provisional application No.62/184,076 filed 24/6/2015; co-pending U.S. provisional application No.62/112,060 filed on day 4, month 2, 2015; co-pending U.S. provisional application No.62/219,606 filed on day 9, 16, 2015; and co-pending U.S. provisional application No.62/261,104 filed on 30/11/2015. These and all other U.S. patents mentioned below, as well as published and co-pending applications, are incorporated herein by reference in their entirety.

Background

Aspects of the present invention relate to electro-optic displays having reduced remnant voltage and techniques for reducing remnant voltage in electro-optic displays. Some embodiments relate to electrophoretic displays with reduced remnant voltage and techniques for reducing remnant voltage in electrophoretic displays.

Disclosure of Invention

The remnant voltage of the electro-optic display may remain even after the electro-optic display has been dormant for a significant period of time. Even low remnant voltages can cause artifacts in electro-optic displays. Thus, discharging the remnant voltage of an electro-optic display may improve the quality of the displayed image, even when the remnant voltage is already low. However, conventional techniques for discharging the remnant voltage of electro-optic displays may not completely discharge the remnant voltage. Thus, techniques for more fully discharging the remnant voltage from an electro-optic display are needed.

The remnant voltage of a pixel of an electro-optic display may be discharged by activating the transistor of the pixel and setting the voltages at the front and back electrodes of the pixel to substantially the same value. The pixel may discharge the remnant voltage for a specified period of time, and/or until an amount of remnant voltage remaining in the pixel is less than a threshold amount. The remnant voltage of two or more pixels in two or more rows of an active matrix of pixels of an electro-optic display may be discharged simultaneously by placing selected pixels in the same state, characterized in that (1) the transistor of each selected pixel is active and (2) the voltages applied to the front and back electrodes of each selected pixel are approximately equal.

Drawings

Various aspects and embodiments of the present application are described with reference to the following drawings. It should be understood that the drawings are not necessarily drawn to scale. Items appearing in multiple figures are denoted by the same reference numeral in all the figures in which they appear.

FIG. 1 is a schematic diagram of a pixel of an electro-optic display according to some embodiments.

FIG. 2 is a schematic diagram of an electrical model of an imaged film according to some embodiments.

Fig. 3 illustrates an addressing pulse followed by a residual voltage discharge pulse, according to some embodiments.

Fig. 4 illustrates an addressing pulse followed by a residual voltage discharge pulse, according to some embodiments.

Fig. 5A is a signal timing diagram of the driver circuit shown in fig. 5B.

Fig. 6A is a signal timing diagram of the driver circuit shown in fig. 6B.

Fig. 7A is a graph illustrating measured residual voltage values after repeated draining of residual charge by a series of applied voltages, according to some embodiments.

Fig. 7B is a graph illustrating measured residual voltage values after 40 repetitions of draining of residual charge by a series of applied voltages, according to some embodiments.

Detailed Description

The remnant voltage of a pixel of an electro-optic display may be discharged by: the transistors of the pixel are activated and the voltages of the front and back electrodes of the pixel are set to approximately the same voltage for a specified period of time and/or until the amount of remaining voltage remaining in the pixel is less than a threshold amount. The remnant voltage of an active matrix pixel of an electro-optic display may be discharged simultaneously by placing selected pixels in the same state, characterized in that (1) the transistor of each selected pixel is active and (2) the voltages applied to the front and back electrodes of each selected pixel are approximately equal.

The term "remnant voltage" is used herein to refer to a permanent or decaying voltage (which may also be referred to as an open circuit potential and is typically measured in volts or millivolts) that may remain in the electro-optic display after the end of an addressing pulse (a voltage pulse used to change the optical state of the electro-optic medium). Such remnant voltages may cause undesirable effects on the image displayed on the electro-optic display including, but not limited to, the so-called "ghosting" phenomenon, in which traces of the previous image are still visible after the display has been overwritten.

An electro-optic display comprises a layer of electro-optic material, which term is used herein in its conventional sense in the imaging art to refer to a material having first and second display states differing in at least one optical property, the material being changed from its first display state to its second display state by application of an electric field to the material. Although the optical property may be a color perceptible to the human eye, it may be other optical properties such as light transmission, reflection, luminescence, or in the case of a display intended for machine reading, a false color in the sense of a change in reflectivity of electromagnetic wavelengths outside the visible range.

In the displays of the invention the electro-optic medium may be solid (for convenience such displays may be referred to hereinafter as "solid electro-optic displays"), in the sense that the electro-optic medium has a solid outer surface, but the medium may, and typically does, have an internal liquid or gas filled space. Thus, the term "solid state electro-optic display" includes encapsulated electrophoretic displays, encapsulated liquid crystal displays, and other types of displays discussed below.

The term "gray state" is used herein in its conventional sense in the imaging arts to refer to a state intermediate two extreme optical states of a pixel, but does not necessarily imply a black-and-white transition between the two extreme states. For example, several patents and published applications by the incorporated of lngk referred to below describe electrophoretic displays in which the extreme states are white and dark blue, so that the intermediate "gray state" is effectively pale blue. In fact, as already mentioned, the transition between the two extreme states may not be a color change at all.

The terms "bistable" and "bistability" are used herein in their conventional sense in the art to refer to displays comprising display elements having first and second display states differing in at least one optical property such that, after any given element is driven to assume its first or second display state by an addressing pulse having a finite duration, that state will persist for at least several times (e.g. at least 4 times) the minimum duration of the addressing pulse required to change the state of that display element after the addressing pulse has terminated. Some particle-based electrophoretic displays that support gray scale can be stabilized not only in their extreme black and white states, but also in their intermediate gray states, as shown in published U.S. patent application No.2002/0180687, as well as some other types of electro-optic displays. This type of display is properly referred to as "multi-stable" rather than bi-stable, but for convenience the term "bi-stable" may be used herein to cover both bi-stable and multi-stable displays.

The term "impulse" is used herein in its conventional meaning in the imaging art, i.e., the integral of voltage with respect to time. However, some bistable electro-optic media act as charge converters, and for such media an alternative definition of impulse, i.e. the integral of the current with respect to time (which is equal to the total charge applied) may be used. Depending on whether the medium is used as a voltage-time impulse converter or as a charge impulse converter, a suitable impulse definition should be used.

Several types of electro-optic displays are known. One type of electro-optic display is a rotating bichromal cell type, as described, for example, in U.S. patent nos.5,808,783; 5,777,782, respectively; 5,760,761, respectively; 6,054,071, respectively; 6,055,091; 6,097,531, respectively; 6,128,124, respectively; 6,137,467 and 6,147,791 (although this type of display is commonly referred to as a "rotating bicolor ball" display, the term "rotating bicolor member" is preferred to be more accurate because in some of the patents mentioned above the rotating elements are not spherical). Such displays use a large number of small objects (which may be, but are not limited to, spherical or cylindrical) with two or more portions having different optical properties, and an internal dipole. The objects are suspended in a liquid-filled vacuole within the matrix, which vacuole is filled with liquid so that the objects can rotate freely. The appearance of the display is changed by applying an electric field to the display to rotate the objects to various positions and to transform the portion of the objects that are viewed through the viewing surface. This type of electro-optic medium may be bistable.

Another type of electro-optic material uses an electrochromic medium, for example in the form of a nanochromium film, which includes an electrode formed at least in part from a semiconducting metal oxide and a plurality of dye molecules capable of reversible color change attached to the electrode; see, e.g., O' Regan, B, et al, Nature 1991, 353, 737; and Wood, d., Information Display,18(3), 24 (3 months 2002). See also Bach, u. et al, adv.mater, 2002,14(11), 845. Nano-chromium films of this type are also described, for example, in U.S. patent No.6,301,038, international application publication No. wo 01/27690, and in U.S. patent application 2003/0214695. This type of media may be bistable.

Another type of electro-optic display is a particle-based electrophoretic display in which a plurality of charged particles move through a suspending fluid under the influence of an electric field. Some attributes of Electrophoretic Displays are described in U.S. patent No.6,531,997 entitled "Methods for addressing Electrophoretic Displays," entitled "method for addressing Electrophoretic Displays," 3/11 2003, the entire contents of which are hereby incorporated herein.

Electrophoretic displays may have the following properties compared to liquid crystal displays: good brightness and contrast, wide viewing angle, state bistability, and low power consumption. However, there may be some problems with the long-term image quality of particle-based electrophoretic displays. For example, the particles that make up some electrophoretic displays may settle, resulting in an inadequate useful life of these displays.

As described above, the electrophoretic medium may comprise a suspending fluid. The suspending fluid may be a liquid, but the electrophoretic medium may be manufactured using a gaseous suspending fluid; see, e.g., Kitamura, T. et al, "Electrical inside movement for electronic Paper-like display", IDW Japan,2001, Paper HCS l-1, and Yamaguchi, Y. et al, "Top display using insulating substrates charged triangle, IDWJapan,2001, Paper AMD 4-4. See also european patent application 1,429,178; 1,462,847, respectively; and 1,482,354; and international application WO 2004/090626; WO 2004/079442; WO 2004/077140; WO 2004/059379; WO 2004/055586; WO 2004/008239; WO 2004/006006; WO 2004/001498; WO 03/091799; and WO 03/088495. Some gas-based electrophoretic media, when used in a direction that allows settling (e.g., in a sign in which the media is arranged in a vertical plane), may be susceptible to the same types of problems as some liquid-based electrophoretic media due to particle settling. In fact, particle settling appears to be a more serious problem in some gas-based electrophoretic media than in some liquid-based electrophoretic media, because the lower viscosity of the gaseous suspending fluid compared to the liquid allows for faster settling of the electrophoretic particles.

A number of patents and published patent applications assigned to or in the name of the Massachusetts Institute of Technology (MIT) and yingke corporation describe encapsulated electrophoretic media. Such encapsulation media comprise a plurality of microcapsules, each of which itself comprises an internal phase containing electrophoretically-mobile particles suspended in a liquid suspension medium, and a capsule wall surrounding the internal phase. These capsules may be held in a polymeric binder to form a coherent layer between two electrodes. Encapsulation media of this type are described, for example, in the following: U.S. patent nos.5,930,026; 5,961,804; 6,017,584; 6,067,185, respectively; 6,118,426, respectively; 6,120,588; 6,120,839, respectively; 6,124,851, respectively; 6,130,773, respectively; 6,130,774, respectively; 6,172,798; 6,177,921, respectively; 6,232,950, respectively; 6,249,271, respectively; 6,252,564, respectively; 6,262,706, respectively; 6,262,833; 6,300,932, respectively; 6,312,304, respectively; 6,312,971, respectively; 6,323,989, respectively; 6,327,072, respectively; 6,376,828, respectively; 6,377,387, respectively; 6,392,785, respectively; 6,392,786, respectively; 6,413,790, respectively; 6,422,687, respectively; 6,445,374, respectively; 6,445,489, respectively; 6,459,418, respectively; 6,473,072, respectively; 6,480,182, respectively; 6,498,114, respectively; 6,504,524; 6,506,438, respectively; 6,512,354, respectively; 6,515,649, respectively; 6,518,949, respectively; 6,521,489, respectively; 6,531,997, respectively; 6,535,197, respectively; 6,538,801, respectively; 6,545,291, respectively; 6,580,545, respectively; 6,639,578, respectively; 6,652,075, respectively; 6,657,772, respectively; 6,664,944, respectively; 6,680,725, respectively; 6,683,333, respectively; 6,704,133, respectively; 6,710,540, respectively; 6,721,083, respectively; 6,727,881, respectively; 6,738,050, respectively; 6,750,473, respectively; 6,753,999, respectively; 6,816,147, respectively; 6,819,471, respectively; and 6,822,782; and U.S. patent application publication Nos. 2002/0019081; 2002/0060321, respectively; 2002/0060321, respectively; 2002/0063661, respectively; 2002/0090980, respectively; 2002/0113770, respectively; 2002/0130832, respectively; 2002/0131147, respectively; 2002/0171910, respectively; 2002/0180687, respectively; 2002/0180688, respectively; 2003/0011560, respectively; 2003/0020844, respectively; 2003/0025855, respectively; 2003/0053189, respectively; 2003/0102858, respectively; 2003/0132908, respectively; 2003/0137521, respectively; 2003/0137717, respectively; 2003/0151702, respectively; 2003/0214695, respectively; 2003/0214697, respectively; 2003/0222315, respectively; 2004/0008398, respectively; 2004/0012839, respectively; 2004/0014265, respectively; 2004/0027327, respectively; 2004/0075634, respectively; 2004/0094422, respectively; 2004/0105036, respectively; 2004/0112750, respectively; and 2004/0119681; and international application publication nos. wo 99/67678; WO 00/05704; WO 00/38000; WO 00/38001; WO 00/36560; WO 00/67110; WO 00/67327; WO 01/07961; WO 01/08241; WO 03/107,315; WO 2004/023195; WO 2004/049045; WO 2004/059378; WO 2004/088002; WO 2004/088395; and WO 2004/090857.

Many of the aforementioned patents and applications recognize that the walls surrounding discrete microcapsules in an encapsulated electrophoretic medium can be replaced by a continuous phase, thereby producing a so-called polymer-dispersed electrophoretic display, wherein the electrophoretic medium comprises a plurality of discrete droplets of electrophoretic fluid and a continuous phase of polymeric material, and the discrete droplets of electrophoretic fluid within such polymer-dispersed electrophoretic display can be considered capsules or microcapsules, even if no discrete capsule film is associated with each individual droplet; see, for example, 2002/0131147, supra. Thus, for the purposes of this application, such polymer-dispersed electrophoretic media are considered to be a subclass of encapsulated electrophoretic media.

A related type of electrophoretic display is the so-called "microcell electrophoretic display". In microcell electrophoretic displays, the charged particles and suspending fluid are not encapsulated within microcapsules, but rather are held within a plurality of cavities formed within a carrier medium (typically a polymer film). See, for example, international application publication No. wo 02/01281, and published U.S. application No.2002/0075556, both assigned to Sipix Imaging, inc.

The aforementioned numerous patents and applications of imperk and MIT also contemplate microcell electrophoretic displays and polymer dispersed electrophoretic displays. The term "encapsulated electrophoretic display" may refer to all such display types, which may also be generally described as a "microcavity electrophoretic display" summarized in a cross-wall morphology.

Another type of electro-optic display is the electro-wetting display developed by Philips, which is described in Hayes, R.A. et al, "Video-Speed Electronic Paper Based on electric wetting", Nature,425,383-385 (2003). A co-pending application serial No. 10/711,802 filed on 6.10.2004 shows that such electrowetting displays can be made bistable.

Other types of electro-optic materials may also be used. Of particular interest, bistable ferroelectric liquid crystal displays (FLCs) are known in the art and have demonstrated remnant voltage performance.

Although electrophoretic media may be opaque (because, for example, in many electrophoretic media, the particles substantially block transmission of visible light through the display) and operate in a reflective mode, some electrophoretic displays may be made to operate in a so-called "shutter mode" in which one display state is substantially opaque and one display state is light-transmissive. See, e.g., U.S. patent nos.6,130,774 and 6,172,798, and U.S. patent nos.5,872,552; 6,144,361, respectively; 6,271,823, respectively; 6,225,971, respectively; and 6,184,856. A dielectrophoretic display similar to an electrophoretic display but relying on a change in electric field strength may operate in a similar mode; see U.S. patent No.4,418,346. Other types of electro-optic displays can also operate in the shutter mode.

Encapsulated or microcell electrophoretic displays may be immune to the aggregation and settling failure modes of conventional electrophoretic devices and may provide further benefits such as the ability to print or coat the display on a variety of flexible and rigid substrates. (use of the word "printing" is intended to include all forms of printing and coating including, but not limited to, premetered coating such as slot or slot die coating, slide or cascade coating, curtain coating, roll coating such as knife coating, forward and reverse roll coating, gravure coating, dip coating, spray coating, meniscus coating, spin coating, brush coating, air knife coating, screen printing processes, electrostatic printing processes, thermal printing processes, ink jet printing processes, electrophoretic deposition, and other similar techniques.) thus, the resulting display may be flexible. In addition, because the display media can be printed (using a variety of methods), the display itself can be inexpensively manufactured.

The bistable or multistable performance of particle-based electrophoretic displays, and other electro-optic displays exhibiting similar performance (which may be referred to hereinafter for convenience as "impulse-driven displays"), is in sharp contrast to the performance of Liquid Crystal Displays (LCDs). Twisted nematic liquid crystals are not bistable or multistable but act as voltage converters, and therefore the application of a given electric field to a pixel of such a display produces a particular grey scale at the pixel, irrespective of the grey scale previously present at the pixel. Furthermore, LC displays are driven in only one direction (from non-transmissive or "dark" to transmissive or "bright"), with a reverse transition from a lighter state to a darker state being achieved by reducing or eliminating the electric field. Also, the gray scale of the pixels of the LC display is insensitive to the polarity of the electric field, only to its magnitude, and in fact, commercial LC displays typically reverse the polarity of the driving electric field at frequent intervals for technical reasons. In contrast, bistable electro-optic displays generally operate as impulse transducers, and therefore the final state of a pixel depends not only on the applied electric field and the time at which it is applied, but also on the state of the pixel before the electric field is applied.

A high resolution display may include individual pixels that are addressable without interference from adjacent pixels. One way of achieving such pixels is to provide an array of non-linear elements, such as transistors or diodes, with at least one non-linear element associated with each pixel to produce an "active matrix" display. The addressing or pixel electrode for addressing a pixel is connected to a suitable voltage source via the associated non-linear element. When the non-linear element is a transistor, the pixel electrode may be connected to a drain of the transistor, and this arrangement will be presented in the following description, however, this is substantially arbitrary and the pixel electrode may be connected to a source of the transistor. In a high resolution array, pixels may be arranged in a two-dimensional array of rows and columns such that any particular pixel is uniquely defined by the intersection of a given row and a given column. The sources of all transistors in each column may be connected to a single column electrode, and the gates of all transistors in each row may be connected to a single row electrode; again, the assignment of sources to rows and gates to columns can be reversed as desired.

The display can be written in a row-by-row fashion. The row electrodes are connected to a row driver which can apply a voltage to the selected row electrode, for example to ensure that all transistors on the selected row are conductive, while applying a voltage to all other rows, for example to ensure that all transistors on these non-selected rows remain non-conductive. The column electrodes are connected to a column driver which applies selected voltages across the respective column electrodes to drive the pixels in the selected row to their desired optical states. (the foregoing voltages relate to a common front electrode, which may be disposed on the opposite side of the electro-optic medium from the non-linear array and extend across the display.

Application 2003/0137521 describes how a Direct Current (DC) imbalance waveform results in a remnant voltage that can be determined by measuring the open circuit electrochemical potential of a display pixel.

For the reasons explained finally in the aforementioned co-pending application, it is desirable when driving electro-optic displays to use a DC-balanced driving scheme, i.e. a scheme having the property that, for any sequence of optical states, the integral of the applied voltage is zero each time the final optical state matches the initial optical state. This ensures that the net DC imbalance experienced by the electro-optic layer is constrained by a known value. For example, a 15V,300ms pulse may be used to drive the electro-optic layer from the white state to the black state. After this transition, the imaging layer experiences a DC imbalance impulse of 4.5 volt-seconds (V · s). To drive the film back to white, if a-15V, 300ms pulse is used, the imaging layer is DC balanced in a series of transitions from white to black and then back to white.

It has now been found that residual voltage is a more general phenomenon in reason and effect in electrophoretic and other impulse driven electro-optic displays. It has also been found that DC imbalance may lead to a reduction in the long-term lifetime of some electrophoretic displays.

In some embodiments described in the present invention, the remnant voltage may be measured in the electrophoretic display by starting from a sample that has not been switched for a long time (e.g., hours or days). A voltmeter was applied across the open pixel circuit and a "reference voltage" reading was measured. An electric field is then applied to the pixel, for example a switching waveform. Immediately after the waveform ends, the open circuit potential is measured over a series of time periods using a voltmeter, and the difference between the measured reading and the original reference voltage may be the "residual voltage".

The residual voltage can decay in a complex manner, which can be approximated mathematically roughly as the sum of exponential functions. In some experiments, 15V was applied to the electro-optic medium for approximately 1 second. Measuring a residual voltage between +3V and-3V immediately after the end of the voltage pulse; after 1 second, the residual voltage between +1V and-1V was measured; after ten minutes, the residual voltage was close to zero (relative to the original reference voltage).

The term "remnant voltage" is sometimes used herein as a convenient term relating to an overall phenomenon. However, the basis for the switching behaviour of impulse-driven electro-optic displays is the application of a voltage impulse (integral of voltage with respect to time) across the electro-optic medium. The remnant voltage may peak immediately after the application of the drive pulse, and may then decay substantially exponentially. The remnant voltage applies a "remnant impulse" to the electro-optic medium for a long period of time, and strictly speaking, this remnant impulse, rather than the remnant voltage, may cause an effect on the optical state of the electro-optic display (which is generally considered to be caused by the remnant voltage).

Theoretically, the influence of the residual voltage should correspond directly to the residual impulse. In practice, however, the impulse switching model may lose accuracy at low voltages. Some electro-optic media have a threshold value such that a remnant voltage of about 1V may not cause a significant change in the optical state of the media after the end of the drive pulse. However, other electro-optic media, including the preferred electrophoretic media used in the experiments described herein, a remnant voltage of about 0.5V may cause a significant change in optical state. Thus, the two equivalent residual impulses may differ in practical consequences, and it may be helpful to increase the threshold of the electro-optic medium to reduce the effect of the residual voltage. Yingk produces an electrophoretic medium with a "small threshold" that is sufficient to prevent the residual voltage experienced in some cases from altering the display image immediately after the end of the drive pulse. If the threshold is insufficient or if the residual voltage is too high, the display may exhibit a jump/self-erase or self-improvement phenomenon.

Even when the remnant voltages are below a small threshold, they may have a severe impact on image switching if they persist when the next image update occurs. For example, assume that during an image update of the electrophoretic display a driving voltage of +/-15V is applied to move the electrophoretic particles. If the +1V remnant voltage persists from the previous update, the drive voltage will effectively shift from +15V/-15V to + 16V/-14V. Thus, the pixel will be biased towards a dark or white state depending on whether it has a positive or negative remnant voltage. In addition, the influence varies with the elapsed time due to the decay rate of the residual voltage. The electro-optic material in a pixel that was switched to white using a 15V,300ms drive pulse immediately after the previous image update may actually experience a waveform 300ms closer to 16V, while the material in a pixel that was switched to white using the exact same drive pulse (15V,300ms) one minute later may actually experience a waveform 300ms closer to 15.2V. Thus, the pixels may display distinctly different shades of white.

The residual voltages may also be arranged in a similar pattern on the display if the residual voltage field is generated across a plurality of pixels by a previous image, e.g. a black line on a white background. In practical terms, the most significant effect of remnant voltage on display performance may be ghosting. This problem is in addition to the previously mentioned problem, i.e. DC imbalance (e.g. 16V/14V instead of 15V/15V) may be the cause of slow lifetime degradation of the electro-optical medium.

If the remnant voltage decays slowly and approaches constant, its effect in the offset waveform does not change with image update and may actually create fewer ghosts than a rapidly decaying remnant voltage. Thus, the ghosting experienced by updating one pixel after 10 minutes and another after 11 minutes is much less than the ghosting experienced by immediately updating one pixel and another after 1 minute. Conversely, the decay is so fast that a residual voltage close to zero before the next update occurs may not actually result in a detectable ghost.

As is apparent from the above discussion, some of the impact of the residual voltage can be reduced by minimizing the residual impulse, which can be done by reducing the peak residual voltage or by increasing the decay rate. In theory, it can be predicted that if the remnant voltage can be measured immediately and preferably after the end of the drive pulse, the peak remnant voltage will be approximately equal in magnitude to the voltage of the drive pulse, but opposite in sign. In practice, a large amount of remnant voltage appears to decay so quickly (e.g., less than 20ms) that the experimentally measured "peak" remnant voltage is much smaller. Thus, the "peak" remnant voltage may actually be reduced by: (1) operating the display at a lower voltage, or (2) increasing the very fast decay that occurs in the first few milliseconds after an image update, which results in a very low residual impulse. Essentially, one of the main ways to reduce the residual impulse, other than to operate at lower voltages, is to increase the decay rate.

There are multiple potential sources of remnant voltage. It is believed (although some embodiments are in no way limited by this belief) that the primary cause of remnant voltage is ionic polarization within the materials forming the various layers of the display.

This polarization occurs in various ways. In the first (for convenience, denoted "type I") polarization, an ion bilayer is created across or adjacent to the material interface. For example, a positive potential at an indium tin oxide ("ITO") electrode may produce a corresponding polarizing layer of negative ions in the adjacent lamination adhesive. The decay rate of such a polarizing layer is associated with recombination of isolated ions in the laminating adhesive layer. The geometry of such a polarising layer is determined by the shape of the interface, but may be planar in nature.

In the second ("type II") type of polarization, nodules, crystals, or other kinds of material non-uniformities within a single material may result in regions where ions may move slower than the surrounding material. Different ion mobility rates may result in different degrees of charge polarization within the dielectric block, and polarization may thus occur within a single display element. This polarization may be substantially localized in nature or dispersed throughout the layer.

In a third ("type III") type of polarization, polarization may occur at any interface of the barrier representing charge transport for any particular type of ion. One example of such an interface in a microcavity electrophoretic display is the boundary between an electrophoretic suspension ("internal phase") comprising a suspending medium and particles, and a surrounding medium ("external phase") comprising walls, binders and binders. In many electrophoretic displays, the internal phase is a hydrophobic liquid and the external phase is a polymer, such as a gel. The ions present in the inner phase may be insoluble and non-diffusive in the outer phase and vice versa. Upon application of an electric field perpendicular to the interface, oppositely-signed polarization layers will accumulate on either side of the interface. When the applied electric field is removed, the resulting unbalanced charge distribution will result in a measurable residual voltage potential that decays with a relaxation time determined by the mobility of the ions in the two phases on either side of the interface.

The polarization may occur during the drive pulse. Each image update is an event that may affect the remnant voltage. A positive waveform voltage may create a remnant voltage across the electro-optic medium that is of the same or opposite polarity (or near zero) depending on the particular electro-optic display.

It is evident from the above discussion that polarization can occur at multiple locations within an electrophoretic or other electro-optic display, each location having its own characteristic spectrum of decay times, primarily at interfaces and at material inhomogeneities. Depending on the arrangement of the sources of these voltages (in other words, the polarized charge distributions) relative to the electroactive component (e.g. electrophoretic suspension), and the degree of electrical coupling between each charge distribution and the movement of the particles via the suspension, or other electro-optical activity, the various polarizations will have a more or less detrimental effect. Since electrophoretic displays operate by movement of charged particles, which inherently leads to polarization of the electro-optical layer, more preferred electrophoretic displays are in a sense that there is not always a remnant voltage present in the display, but rather a display where the remnant voltage does not lead to poor electro-optical behavior. Ideally, the residual impulse will be minimized and the residual voltage will be reduced to below 1V, and preferably below 0.2V, within 1 second and preferably within 50ms, so that by introducing a minimum pause between image updates, the electrophoretic display can achieve all transitions between optical states without concern for residual voltage effects. For electrophoretic displays operating at video rates or at voltages below +/-15V, these ideal values should be reduced accordingly. Similar considerations apply to other types of electro-optic displays.

In summary, the remnant voltage as a phenomenon is a result of ion polarization that occurs at least substantially within the display material components (either at the interface or within the material itself). Such polarization is particularly problematic when they last on a medium time scale of approximately 50ms to about 1 hour or more. The residual voltage may present itself in various ways as image ghosting or visual artifacts, with a severity that may vary with the time that passes between image updates. The remnant voltage may also create a DC imbalance and reduce the ultimate display lifetime. Thus, the effect of the remnant voltage can be detrimental to the quality of the electrophoretic or other electro-optic device, and it is desirable to minimize the sensitivity of the remnant voltage itself, as well as the optical state of the device, to the effect of the remnant voltage. The term lsstar may be used herein and may be denoted as "L x". L has the general CIE definition: l ═ 116(R/R0) 1/3-16, where R is reflectance and R0 is standard reflectance value.

The present inventors have recognized and appreciated that the rate of decay of the remnant voltage of an electro-optic display may become lower as the remnant voltage approaches a threshold value (e.g., a threshold value of about 200 mV). For example, the remnant voltage of the electro-optic display may remain at or near the threshold even after the electro-optic display has been dormant for a long period of time (e.g., 15 hours or more). The present inventors have further recognized and appreciated that even low remnant voltages (e.g., remnant voltages of about 200mV or less) may cause artifacts in electro-optic displays, including but not limited to shifts in the optical states associated with addressing pulses, shifts in the optical states of the display over time, and/or ghosts.

The "shift" of the optical state associated with the addressing pulse refers to the following situation: a first application of a particular addressing pulse to the electro-optic display produces a first optical state (e.g., a first gray tone), and a subsequent application of the same addressing pulse to the electro-optic display produces a second optical state (e.g., a second gray tone). The remnant voltage may cause a shift in the optical state because the voltage applied to a pixel of the electro-optic display during application of the addressing pulse comprises the sum of the remnant voltage and the voltage of the addressing pulse.

The "drift" of the optical state of the display over time refers to the following situation: the optical state of an electro-optic display changes when the display is asleep (e.g., during periods when an addressing pulse is not applied to the display). The remnant voltage may cause a drift of the optical state, since the optical state of the pixel may depend on the remnant voltage of the pixel, and the remnant voltage of the pixel may decay over time.

As described above, "ghost" refers to the following situation: after the electro-optic display has been rewritten, traces of the previous image are still visible. The residual voltage causes an "edge ghost", which is one of the following ghosts: the contours (edges) of a portion of the previous image remain visible.

Thus, discharging the remnant voltage of an electro-optic display may improve the quality of the displayed image, even when the remnant voltage is already low. The present inventors have recognized and appreciated that conventional techniques for discharging the remnant voltage of an electro-optic display may not be able to fully discharge the remnant voltage. That is, conventional techniques of discharging the remnant voltage may cause the electro-optic display to retain at least a low remnant voltage. Thus, techniques for more fully discharging the remnant voltage from an electro-optic display are needed.

The remnant voltage of a pixel of an electro-optic display may be discharged by activating the transistor of the pixel and setting the voltages of the front and back electrodes of the pixel to substantially the same value. The pixel may discharge the remnant voltage for a specified period of time, and/or until an amount of remnant voltage remaining in the pixel is less than a threshold amount. In some embodiments, rather than discharging the remnant voltages of only two or more pixels in the same row at the same time, the remnant voltages of two or more pixels in two or more rows of an active matrix of pixels of an electro-optic display may be discharged at the same time. That is, two or more pixels in different rows of the active matrix may be simultaneously in the same state, characterized by (1) the transistors of each of the two or more pixels being active, and (2) the voltages applied to the front and back electrodes of each of the two or more pixels being approximately equal. When two or more pixels are in the same state at the same time, the pixels may discharge their remaining voltages at the same time. The period in which the pixel is in this state may be referred to as a "residual voltage discharge period". In some embodiments, rather than discharging the remnant voltages of only two or more pixels in the same row at the same time, the remnant voltages of all pixels in two or more rows of the active matrix of pixels (e.g., all pixels in all rows) may be discharged at the same time.

In some embodiments, discharging the remnant voltages of all pixels in an active matrix display module simultaneously may be achieved by turning the scan mode of the active matrix "off and the non-scan mode" on ". An active matrix display generally has a circuit controlling a voltage of a gate line and a circuit controlling a source line, which scan through the gate line and the source line to display an image. These two circuits are typically included within "select or gate driver" and "source driver" integrated circuits, respectively. The select and source drivers may be separate chips mounted on the display module, may be integrated into a single chip holding circuit for driving the gate and source lines, and may even be integrated with the display controller.

A preferred embodiment for removing the remnant voltage puts all pixel transistors into conduction for an extended time. For example, all pixel transistors may be brought into conduction by: the gate line voltage relative to the source line voltage is caused to reach a value which causes the pixel transistors to reach a state in which they are relatively conductive compared to a non-conductive state which serves to isolate the pixel from the source line as part of a typical active matrix driver. For an n-type thin film pixel transistor this can be achieved by bringing the gate line to a value much higher than the source line voltage value. For a p-type thin film pixel transistor this can be achieved by bringing the gate line to a value much lower than the source line voltage value. In an alternative embodiment, all pixel transistors may be brought into conduction by bringing the gate line voltage to zero, the source line voltage to a negative (or positive for p-type transistors) voltage.

In some embodiments, a specially designed circuit may address all pixels simultaneously. In standard active matrix operation, the select line control circuit typically does not cause all gate lines to reach values that achieve the above-described on-states for all pixel transistors. A convenient way of achieving this condition is provided by a select line driver chip having input control lines that allow external signals to apply the following conditions: all select line outputs receive a voltage supplied to a select driver selected to bring the pixel transistor into conduction. By applying the appropriate voltage value to this particular input control line, all transistors can be brought into conduction. By way of example, some select drivers have an "Xon" control line input for a display having n-type pixel transistors. By selecting the value of the voltage input to the Xon pin input of the select driver, the "gate high" voltage is routed to all select lines.

The above aspects and further aspects are now described in detail below. It should be understood that these aspects may be used alone, all together, or in any combination of two or more so long as they are not mutually exclusive.

FIG. 1 shows a schematic diagram of a pixel 100 of an electro-optic display according to some embodiments. Pixel 100 may include an imaging film 110. In some embodiments, imaging film 110 may be bistable. In some embodiments, imaging film 110 may include, but is not limited to, an encapsulated electrophoretic imaging film, which may include, for example, charged pigment particles.

An imaging film 110 may be disposed between the front electrode 102 and the back electrode 104. The front electrode 102 may be formed between the imaging film and the front of the display. In some embodiments, the front electrode 102 may be transparent. In some embodiments, the front electrode 102 may be formed of any suitable transparent material including, but not limited to, Indium Tin Oxide (ITO). The back electrode 104 may be formed opposite the front electrode 102. In some embodiments, a parasitic capacitance (not shown) may be formed between the front electrode 102 and the back electrode 104.

The pixel 100 may be one of a plurality of pixels. A plurality of pixels may be arranged in a two-dimensional array of rows and columns to form a matrix such that any particular pixel is uniquely defined by the intersection of one designated row and one designated column. In some embodiments, the matrix of pixels may be an "active matrix," in which each pixel is associated with at least one non-linear circuit element 120. A non-linear circuit element 120 may be coupled between the backplane electrode 104 and the address electrode 108. In some embodiments, the non-linear element 120 may include a diode and/or a transistor, including but not limited to a MOSFET. The drain (or source) of the MOSFET may be coupled to the backplane electrode 104, the source (or drain) of the MOSFET may be coupled to the address electrode 108, and the gate of the MOSFET may be coupled to a driver electrode 106 configured to control activation and deactivation of the MOSFET. (for simplicity, the terminal of the MOSFET coupled to the backplane electrode 104 is referred to as the drain of the MOSFET, and the terminal of the MOSFET coupled to the address electrode 108 is referred to as the source of the MOSFET

In some embodiments of the active matrix, the address electrodes 108 of all pixels in each column may be connected to the same column electrode, and the driver electrodes 106 of all pixels in each row may be connected to the same row electrode. The row electrodes may be connected to a row driver which may select one or more rows of pixels by applying a voltage to the selected row electrode sufficient to activate the non-linear elements 120 of all pixels 100 in the selected row. The column electrodes may be connected to a column driver which may apply voltages on the address electrodes 106 of selected (actuated) pixels suitable for driving the pixels to a desired optical state. The voltage applied to the address electrode 108 can be related to the voltage applied to the front plate electrode 102 of the pixel (e.g., a voltage of about zero volts). In some embodiments, the front plate electrodes 102 of all pixels in the active matrix may be coupled to a common electrode.

In some embodiments, the pixels 100 of the active matrix may be written in a row-by-row manner. For example, a row of pixels may be selected by a row driver and a voltage corresponding to the desired optical state of the row of pixels may be applied to the pixels by a column driver. After a pre-selection interval known as the "line address time", the selected row may be deselected, another row may be selected, and the voltage on the column driver may be changed to cause another line of the display to be written.

FIG. 2 illustrates an electrical model of an electro-optic imaging layer 110 disposed between the front electrode 102 and the back electrode 104 according to some embodiments. Resistance 202 and capacitance 204 may represent the resistance and capacitance of electro-optic imaging layer 110, front electrode 102, and back electrode 104, including any adhesive layers. Resistor 212 and capacitor 214 may represent the resistance and capacitance of the laminating adhesive layer. The capacitance 216 may represent a capacitance that may be formed between the front electrode 102 and the back electrode 104, for example, an interfacial contact area between layers, such as an interface between an imaging layer and a laminating adhesive layer and/or between a laminating adhesive layer and a backplane electrode. The voltage Vi across the imaging film 110 of a pixel may comprise the remaining voltage of the pixel.

The discharge of the remaining voltage of the pixel may be initiated and/or controlled by applying any suitable set of signals to the pixel, including but not limited to the set of signals shown in fig. 3 or the set of signals shown in fig. 4.

Fig. 3 illustrates a residual voltage discharge pulse 350 according to some embodiments. As shown in the example of fig. 3, the residual voltage discharge pulse 350 may follow the address pulse 320 (which may include the "hold" frame 330) and the "float dwell" time period 340. In the example of FIG. 3, voltage 302 is a gate voltage (e.g., a voltage applied to the gate of a pixel transistor), voltage 304 represents a reference voltage (e.g., zero volts), voltage 306 (commonly referred to as Vcom) is a voltage applied to the front electrode 102, voltage 308 is a source voltage, and voltage 310 is a voltage seen by the electro-optic layer.

As described above, the rate at which the remnant voltage decays may be slowed as the remnant voltage approaches the threshold. The threshold may vary from display to display and may depend on the type of display, the materials in the display, the use of the display, the desired performance of the display, and the like. For example, the threshold value of the electrophoretic display of fig. 3 may be less than 1V, between about 500mV and about 1V, between about 300mV and 500mV, and/or between about 200mV and 300 mV. However, the remnant voltage threshold of different electro-optic displays may be greater than 1V or less than 200 mV.

The residual voltage discharge pulse 350 is characterized by voltages 306 and 308 being set to about the same voltage 304 and gate voltage 302 being set to a value suitable for activating the non-linear circuit element 120 of the pixel (e.g., a value suitable for activating the pixel transistor). In some embodiments, the value sufficient to activate the pixel transistor can be about 300mV or greater, about 400mV or greater, about 450mV or greater, about 700mV or greater, about 1V or greater, about 1.5V or greater, and/or any other value greater than or equal to the threshold voltage of the pixel transistor.

The period of time during which the residual voltage discharge pulse 350 is applied may be referred to as a "residual voltage discharge pulse," discharge period, "" post-update drive discharge, "or" updpd. During the discharge period, the pixel 100 can discharge charge carriers from the imaging film 110, reducing the remnant voltage. The duration of the discharge period 350 may be specified by a user, automatically determined based on the remaining level of remaining voltage, and/or determined using any other suitable technique. In some embodiments, the duration of the discharge period 350 can be specified (user and/or automatically) such that the level of the remnant voltage at the end of the discharge period is less than or equal to the threshold (e.g., 1V,500mV,250mV,100mV,50mV,25mV, or 0mV depending on the display and desired optical properties).

During the "floating dwell" time period 340, the pixel 100 may be placed in an electrically floating state. The pixel may be placed in an electrically floating state using any suitable technique, including but not limited to setting the voltage 302 (e.g., a voltage applied to the gate of the pixel transistor) to a value suitable for disabling the pixel transistor (e.g., a value below the threshold voltage of the pixel transistor), and placing the front electrode of the pixel in a high impedance state. During the "floating dwell" time period, the residual voltage may decay. In some embodiments, the remnant voltage may decay to the threshold voltage during the "floating dwell" time period.

Fig. 4 illustrates a residual voltage discharge pulse 450 according to some embodiments. As shown in the example of fig. 4, the residual voltage discharge pulse 450 may be subsequent to the address pulse 420 (which may include a "hold" frame 430) without any intervening "floating dwell" time period between the address and discharge pulses. In the example of FIG. 4, voltage 402 is a gate voltage, electrode 404 represents a reference voltage (e.g., logic ground of the controller), voltage 406 (commonly referred to as Vcom) is a voltage applied to the front electrode 102, voltage 408 is a source voltage, and voltage 410 is a voltage seen by the electro-optic layer.

The residual voltage discharge pulse 450 is characterized by voltages 406 and 408 being set to about the same voltage 404 (i.e., ground) and the gate voltage 402 (e.g., the voltage applied to the gate of the pixel transistor) being set to a value suitable for activating the non-linear circuit element 120 of the pixel (e.g., a value suitable for activating the pixel transistor). In some embodiments, the value sufficient to activate the pixel transistor can be about 300mV or greater, about 400mV or greater, about 450mV or greater, about 700mV or greater, about 1V or greater, about 1.5V or greater, and/or any other value greater than or equal to the threshold voltage of the pixel transistor.

During discharge time period 450, pixel 100 can discharge charge carriers from imaging film 110, reducing the remnant voltage. The duration of the discharge period 450 may be specified by a user, determined automatically based on a remaining level of the remaining voltage (e.g., a level of the remaining voltage at the beginning of the discharge period, or a level of the remaining voltage measured during the discharge period), and/or determined using any other suitable technique. In some embodiments, the duration of the discharge period 450 may be specified (user and/or automatically) such that the level of the remaining voltage at the end of the discharge period is less than or equal to the threshold.

In some embodiments, a method of discharging a remnant voltage from an electro-optic display may include placing one or more pixels in a remnant voltage discharge state characterized by (1) a pixel transistor of each of the one or more pixels being active, and (2) voltages applied to front and back electrodes of each of the one or more pixels being approximately equal. In response to being placed in the remnant voltage discharge state, the pixel may discharge at least a portion of its remnant voltage. In some embodiments, the one or more pixels may include two or more pixels, and the two or more pixels may discharge at least a portion of their respective remaining voltages simultaneously. In some embodiments, the two or more pixels may include two or more pixels in different rows of the active matrix. In some embodiments, the two or more pixels may include all or substantially all of the pixels of the active matrix.

Fig. 5A shows a graph of applied voltage over time, which shows a non-scanning function in an active matrix display implementing the driver circuit for fig. 5B, fig. 5B shows two transistors of an active matrix display having an n-type transistor and a dedicated driver capable of applying a positive voltage to a low-level gate line. Fig. 5A shows the applied voltages over time, with a residual voltage discharge pulse 504 running at the end of the optical update 502 to drain the residual charge. The four voltages shown are a high level gate line voltage ("VDDH")506, a low level gate line voltage ("VEE")508, a front electrode voltage ("VCOM")510, and a source drive output enable voltage ("SDOE") 512. SDOE is the source drive output enable flag. When SDOE is high, the source driver will select VPOS and VNEG voltages according to waveform data to be applied to the source line 108. When SDOE is low, the source line 108 will be grounded. Each voltage has a separate zero voltage axis, which is shown as a solid gray line. Voltages above the gray solid line represent positive voltages, and voltages below the gray solid line represent negative voltages. The method of discharging the remnant voltage shown in FIG. 5A may be accomplished by applying a positive voltage value + V514 to the low gate voltage ("VEE")508 (which will simultaneously engage the gates of all transistors) and grounding the front plane electrode ("VCOM")510 and the source line.

Fig. 5B shows a configuration of electrical connection of two transistors of an active matrix electro-optic display having an n-type transistor and a dedicated driver capable of applying a positive voltage to a low-level gate line. The electro-optic film 522 connections shown include a low level gate line voltage ("VEE")524, a source line voltage ("Vs")526, a drain line voltage ("Vd")528, and a front electrode voltage ("VCOM") 520. The non-scanning function is achieved by applying a positive voltage value to the low gate voltage ("VEE")524 and grounding the front plane electrode ("VCOM")520 and the source line (by making SDOE low).

Fig. 6A shows another method of implementing a non-scanning function in an active matrix display having n-type transistors. Fig. 6A is a graphical representation of applied voltage over time, with a residual voltage discharge pulse 604 operating to drain residual charge at the end of the optical update 602. The six voltages shown are a high level gate line voltage ("VDDH")606, a low level gate line voltage ("VEE")608, a front electrode voltage ("VCOM")610, a source drive output enable voltage ("SDOE")612, a positive voltage ("VPOS")614, and a negative voltage ("VNEG") 616. The VPOS and VNEG voltages are voltages that may be supplied to the source driver and to the source line 108 according to waveform data when SDOE is high. Negative waveform data would apply the VNEG voltage rail and positive waveform data would apply the VPOS voltage rail. As shown in FIG. 6A, by setting SDOE high during the residual voltage discharge pulse 604, setting the waveform data negative, VNEG with a value of- ν V618 will be applied to the source line.

In fig. 6A, each voltage has a separate zero voltage axis, which is shown as a solid gray line. Voltages above the gray solid line represent positive voltages, and voltages below the gray solid line represent negative voltages. The method of discharging the remnant voltage shown in fig. 6A may be accomplished by: a sufficient negative voltage value (-V) 618 is applied to the front electrode voltage ("VCOM") and substantially the same negative voltage 620 is applied to the source line, and a positive voltage from the gate to the source and drain lines is created by grounding the gate voltages 606, 608. For n-type transistors, a positive gate-to-source voltage allows electrons to flow easily, thus turning on all transistors. For p-type transistors, a negative gate-to-source voltage allows electrons to flow easily, thus turning on all transistors.

Fig. 6B shows a configuration of electrical connection of two transistors of an active matrix electro-optic display having an n-type transistor and a dedicated driver capable of applying a positive voltage from a gate to source and drain lines. The electro-optic film 632 connections are shown to include a gate line voltage ("Vg")634, a source line voltage ("Vs")636, a drain line voltage ("Vd")638, and a front electrode voltage ("VCOM") 630. The non-scanning function is achieved by applying a zero voltage value to the gate voltage ("Vg")634 and causing both the voltage of the front plane electrode ("VCOM")630 and the source line ("Vs")636 to reach a sufficiently negative value (- ν V).

Fig. 7A plots the measured remnant voltage values for the number of repetitions of 1 minute draining of residual charge at four different applied voltages for a particular electro-optic display configuration. At applied voltage values of 3 volts 702 and 5 volts 704, the measured residual voltage remained between about 0.05 volts and 0.1 volts even after more than 40 discharges. At applied gate voltage values of 10 volts 706 and 15 volts 708, the measured residual voltage dropped to less than 0.05 volts after draining approximately 15 times.

Fig. 7B is a graphical representation of the measured residual voltage after 40 repetitions of 1 minute drain of the residual charge for a high level gate line voltage ("VDDH") value. In these experiments, the residual voltage dropped to a lower value, about 10 millivolts (0.010V), only when the applied VDDH voltage was greater than 7 volts.

Discharging the remaining voltage of the pixel causes a current to flow through the imaging film 110 of the pixel, which may change the optical state of the pixel. The term "optical transition" is used herein to describe a change in the optical state of a pixel that occurs at least partially in response to a discharge of the remaining voltage of the pixel.

The frequency and/or severity of the optical jump may decrease as the rate of discharging the remnant voltage decreases. In some embodiments, the rate at which the remaining voltage of the pixel is discharged may be determined at least in part by the gate-source voltage applied to the pixel transistor of the pixel. When the gate-source voltage of the pixel transistor is high (i.e., at least twice or more the magnitude required for discharge) during the remnant voltage discharge period, the on-resistance of the pixel transistor may be relatively low, resulting in relatively rapid discharge of the remnant voltage. Conversely, when the gate-source voltage of the pixel transistor is low during the remnant voltage discharging period, the on-resistance of the pixel transistor may be relatively high, resulting in relatively slow discharging of the remnant voltage. In some embodiments, the gate-to-source voltage of the pixel transistor during the remnant voltage discharge pulse may be set to a value between the threshold voltage of the pixel transistor (e.g., about 300mV-1.5V) and the punch-through voltage of the pixel transistor (e.g., about 20V) according to a desired rate of discharge of the remnant voltage.

The amount of the residual voltage discharged by the pixel during the residual voltage discharge pulse may depend at least in part on the rate at which the pixel discharges the residual voltage and the duration of the residual voltage discharge pulse. In some embodiments, the duration of the period of time during which the residual voltage discharge pulse is applied may be at least 50ms, at least 100ms, at least 200ms, at least 300ms, or any other suitable duration. Preferably, the residual voltage discharge period is about 1 second. Optimally, the discharge period is between about 0.5 seconds and about 3 seconds, however, if time allows, the discharge period may be 5 seconds or more. In some embodiments, the gate-source voltage of the pixel transistor during the residual voltage discharge period (which affects the rate at which the residual voltage discharges) and the duration of the residual voltage discharge period may be determined such that a specified amount of the residual voltage is discharged during the residual voltage discharge pulse, such that substantially all of the residual voltage is discharged during the residual voltage discharge pulse, such that the residual voltage is discharged to a specified threshold during the residual voltage discharge pulse, or in any other suitable manner.

The residual voltage discharge pulse may be applied to one or more pixels in response to any suitable event and/or at any suitable time. In some embodiments, a residual voltage discharge pulse may be applied to the pixel after a first value is written to the pixel (e.g., after a first addressing pulse is applied to the pixel) and before successive values are written to the pixel. In some embodiments, a residual voltage discharge pulse may be applied to the pixel after the pixel is updated a specified number of times. In some embodiments, the residual voltage discharge pulse may be applied to all pixels after the value is written to any pixel in the active matrix of pixels or for a period of time after the value is written to any pixel in the active matrix of pixels and before a continuous update of any pixel in the active matrix. In some embodiments, a residual voltage discharge pulse may be applied to all pixels after the display has been updated a specified number of times or after some significant use. In some embodiments, a residual voltage discharge pulse may be applied to all pixels at the beginning of an active update or for a period of time before the beginning of an active update. In some embodiments, a residual voltage discharge pulse may be applied at any time to place the display in its initial electrical state, such as to reset the performance of the display. The residual voltage discharge pulse may be interrupted and restarted at a later time. In some embodiments, the frequency and/or severity of the optical jump may decrease as the frequency with which the remnant voltage is discharged decreases. In some embodiments, the residual voltage discharge pulses may be combined with active refresh to allow short discharge times and maintain relatively small residual charge build-up. When merging to active refresh, the residual voltage discharge pulse may not be interrupted. For example, in a particular type of waveform that requires a reset, the remnant voltage discharge process will form a first portion of an active update to discharge the remnant voltage, and the optical waveform will form a second portion of the active update to change the image being displayed.

In some embodiments, the optical state of any of the one or more pixels may change by less than a threshold amount (e.g., less than 10L, less than 5L, less than 3L, less than 2L, less than 1L, or less than 0.5L) during a period in which the remnant voltage is discharged from the one or more pixels of the active matrix.

In a segmented electro-optic display, the remnant voltage may be discharged by applying approximately the same voltage to the front and back electrodes for an amount of time set or until a defined remnant voltage value is achieved.

It is to be understood that the various embodiments shown in the figures are schematic representations and are not necessarily drawn to scale. Reference in the specification to "one embodiment" or "an embodiment" or "some embodiments" means that a particular feature, structure, material, or characteristic described in connection with the embodiments is included in at least one embodiment, but not necessarily all embodiments. Thus, appearances of the phrases "in one embodiment," "in an embodiment," or "in some embodiments" in various places throughout this specification are not necessarily referring to the same embodiment.

Unless the context clearly requires otherwise, throughout the present disclosure, the words "comprise," "comprising," and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is, it means "including but not limited to". Additionally, the words "herein," "below," "above," "below," and words of similar import apply equally to this application and do not refer to any particular portion of this application. When the word "or" is used with reference to a list of two or more items, the word covers all of the following interpretations of the word: any of the list; all items in the list; and any combination of items in the list.

Having thus described several aspects of at least one embodiment of this technology, it is to be appreciated various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to be within the spirit and scope of the technology. Accordingly, the foregoing description and drawings merely provide non-limiting examples.

Claims (43)

1. A method of reducing remnant voltage of an active matrix electro-optic display having a plurality of pixels, the method comprising:

setting a driver to simultaneously engage a plurality of pixel transistors in a plurality of rows;

applying substantially the same voltage to the front and rear electrodes; and

a voltage sufficient to activate the plurality of pixel transistors is applied to the gate voltage.

2. A method according to claim 1, further comprising n-type pixel transistors, wherein the gate voltage is about 300mV or greater.

3. A method according to claim 1, further comprising n-type pixel transistors, wherein the gate voltage is about 450mV or greater.

4. A method according to claim 1, further comprising n-type pixel transistors, wherein the gate voltage is about 700mV or greater.

5. The method of claim 1, further comprising n-type pixel transistors, wherein the gate voltage is about 1V or greater.

6. The method of claim 1, further comprising n-type pixel transistors, wherein the gate voltage is about 2V or greater.

7. A method according to claim 1, further comprising n-type pixel transistors, wherein the gate voltage is between about 2V and about 8V.

8. A method according to claim 1, further comprising n-type pixel transistors, wherein the gate voltage is between about 1V and about 25V.

9. A method according to claim 1, further comprising n-type pixel transistors, wherein the gate voltage is equal to or greater than an activation voltage of the pixel transistors.

10. A method according to claim 1, further comprising p-type pixel transistors, wherein the gate voltage is about-300 mV or less.

11. A method according to claim 1, further comprising p-type pixel transistors, wherein the gate voltage is about-450 mV or less.

12. A method according to claim 1, further comprising p-type pixel transistors, wherein the gate voltage is about-700 mV or less.

13. A method according to claim 1, further comprising p-type pixel transistors, wherein the gate voltage is about-1V or less.

14. A method according to claim 1, further comprising p-type pixel transistors, wherein the gate voltage is about-2V or less.

15. A method according to claim 1, further comprising p-type pixel transistors, wherein the gate voltage is between about-2V and about-8V.

16. A method according to claim 1, further comprising p-type pixel transistors, wherein the gate voltage is between about-1V and about-25V.

17. A method according to claim 1, further comprising p-type pixel transistors, wherein the gate voltage is equal to or less than an activation voltage of the pixel transistors.

18. The method of claim 1, wherein the voltage is applied for a set duration.

19. The method of claim 18, wherein the voltage is applied for about 50ms to about 300 ms.

20. The method of claim 18, wherein the voltage is applied for about 300ms to about 500 ms.

21. The method of claim 18, wherein the voltage is applied for about 500ms to about 1 second.

22. The method of claim 18, wherein the voltage is applied for about 500ms to about 3 seconds.

23. The method of claim 18, wherein the voltage is applied for about 3 seconds or more.

24. The method of claim 1, wherein the voltage is applied until a set residual voltage value is achieved.

25. The method of claim 24, wherein the voltage is applied until the residual voltage value is equal to or less than 1V.

26. The method of claim 24, wherein the voltage is applied until the remnant voltage value is equal to or less than about 500 mV.

27. The method of claim 24, wherein the voltage is applied until the remnant voltage value is equal to or less than about 300 mV.

28. The method of claim 24, wherein the voltage is applied until the remnant voltage value is equal to or less than about 100 mV.

29. The method of claim 24, wherein the voltage is applied until the remnant voltage value is about 0 mV.

30. A method according to claim 1, wherein substantially all of the pixel transistors are activated simultaneously.

31. The method of claim 1, wherein the voltage applied to the front and back electrodes is greater than or less than 0V.

32. The method of claim 1, wherein the electro-optic display is an electrophoretic display.

33. The method of claim 1, further comprising:

a floating dwell period, wherein the gate voltage is set to a value to disable the pixel transistor for a set duration or for a remaining voltage value until the set is achieved.

34. A method of reducing remnant voltage of an active matrix electro-optic display having a plurality of n-type pixel transistors and a controller capable of applying voltages to a low level gate line, a high level gate line, a front electrode, and a source line, the method comprising:

applying a positive voltage to the low-level gate line;

grounding the source line; and

grounding the front electrode.

35. A method according to claim 34, wherein the electro-optic display is an electrophoretic display.

36. A method of reducing remnant voltage of an active matrix electro-optic display having a plurality of p-type pixel transistors and a controller capable of applying voltages to a low level gate line, a high level gate line, a front electrode, and a source line, the method comprising:

applying a negative voltage to the low level gate line;

grounding the source line; and

grounding the front electrode.

37. A method according to claim 36, wherein the electro-optic display is an electrophoretic display.

38. A method of reducing remnant voltage of an active matrix electro-optic display having a plurality of n-type pixel transistors and a controller capable of applying voltages to a low level gate line, a high level gate line, a front electrode, a positive source line, and a negative source line, the method comprising:

applying a negative voltage to the front electrode;

applying substantially the same negative voltage as the front electrode to the source line; and

grounding the low level gate line and the high level gate line.

39. A method according to claim 38, wherein the electro-optic display is an electrophoretic display.

40. A method of reducing remnant voltage of an active matrix electro-optic display having a plurality of p-type pixel transistors and a controller capable of applying voltages to a low level gate line, a high level gate line, a front electrode, a positive source line, and a negative source line, the method comprising:

applying a positive voltage to the front electrode;

applying a positive voltage substantially the same as the front electrode to the source line; and

grounding the low level gate line or the high level gate line.

41. A method according to claim 40 wherein the electro-optic display is an electrophoretic display.

42. A method of reducing remnant voltage of a segmented electro-optic display having a plurality of pixels, the method comprising:

substantially the same voltage is applied to the front and back electrodes.

43. A method according to claim 42 wherein the electro-optic display is an electrophoretic display.