HK1204186B - Devices for identifying a leading picture - Google Patents

Description

Device for identifying leading screen

Technical Field

The present disclosure relates generally to electronic devices and more particularly to a device for identifying a leading picture.

Background Art

Electronic devices are becoming smaller and more powerful to meet consumer needs and improve portability and convenience. Consumers have become dependent on electronic devices and expect increased functionality. Some examples of electronic devices include desktop computers, laptop computers, cellular phones, smartphones, media players, integrated circuits, etc.

Some electronic devices are used to process and display digital media. For example, portable electronic devices now allow consumers to use digital media in almost any location. In addition, some electronic devices can provide downloading or streaming of digital media content for consumers to use and enjoy.

The increasing popularity of digital media presents several problems. For example, efficiently representing high-quality digital media for storage, transmission, and playback presents several challenges. As can be seen from this discussion, systems and methods for more efficiently representing digital media may be advantageous.

Summary of the Invention

Technical issues

What is needed is to provide more efficient techniques for representing digital media.

Solution

An aspect of the present invention provides an electronic device for indicating a leading picture, wherein the leading picture is a picture located after a first picture in a decoding order and before the first picture in an output order, the electronic device comprising:

processor;

a memory in electronic communication with the processor;

Instructions stored in the memory, the instructions being executable to:

(a) Encode the first picture;

(b) determining whether a leading picture exists;

(c) if a leading picture exists, generating an explicit leading picture indicator; and

(d) If a leading picture exists, sending the explicit leading picture indicator.

Another aspect of the present invention provides an electronic device for determining whether a leading picture exists, the leading picture being a picture that follows a first picture in a decoding order and precedes the first picture in an output order, the electronic device comprising:

processor;

a memory in electronic communication with the processor;

Instructions stored in the memory, the instructions being executable to:

(a) receiving a bit stream;

(b) determining whether a leading picture is present based on whether the bitstream includes an explicit leading picture indicator; and

(c) An operation is performed on the bitstream based on whether a leading picture exists.

Another aspect of the present invention provides a method for determining whether a leading screen exists by an electronic device, the method comprising:

encoding a first picture;

Determine whether there is a leading screen;

If a leading picture exists, generating an explicit leading picture indicator; and

If a leading picture exists, the explicit leading picture indicator is sent.

Another aspect of the present invention provides a method for determining whether a leading screen exists by an electronic device, the method comprising:

Receive bit stream;

determining whether a leading picture exists based on whether the bitstream includes an explicit leading picture indicator; and

Based on whether a leading picture exists, an operation on the bitstream is performed.

Advantageous Effects of the Invention

The above and other objects, features and advantages of the present invention will be more readily understood when the following detailed description of the present invention is considered in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

1 is a block diagram illustrating an example of one or more devices that may implement systems and methods for identifying a leading screen;

FIG2 is a flow chart illustrating one configuration of a method for identifying a leading screen;

FIG3 is a flowchart showing a more specific configuration of a method for identifying a leading screen;

FIG4 is a flow chart illustrating one configuration of a method for identifying a leading screen;

FIG5 is a flow chart illustrating one configuration of a method for identifying a leading screen;

FIG6 is a block diagram showing one configuration of an encoder of an electronic device;

FIG7 is a block diagram showing one configuration of a decoder of an electronic device;

FIG8 is a block diagram illustrating various components that may be used in a transmitting electronic device;

FIG9 is a block diagram illustrating various components that may be used in a receiving electronic device;

10 is a block diagram illustrating one configuration of an electronic device in which systems and methods for identifying a leading screen may be implemented;

FIG11 is a block diagram illustrating one configuration of an electronic device in which systems and methods for identifying a leading screen may be implemented; and

12 is a block diagram illustrating several devices in which the systems and methods for identifying leading pictures may be implemented.

DETAILED DESCRIPTION

An electronic device for indicating a leading screen is described. The electronic device includes a processor and a memory in electronic communication with the processor. The electronic device includes instructions stored in the memory. The electronic device encodes a first screen. The electronic device also determines whether a leading screen exists. If a leading screen exists, the electronic device generates an explicit leading screen indicator. If a leading screen exists, the electronic device also transmits the explicit leading screen indicator.

The first picture may be a clear random access (CRA) or random access picture. An explicit leading picture indicator may be associated with a CRA picture and indicate that at least one leading picture follows the CRA picture. An explicit leading picture indicator may also be associated with a leading picture. The explicit leading picture indicator may also include at least one of the group consisting of a sequence parameter set (SPS), a picture parameter set (PPS), an adaptation parameter set (APS), and a flag in a slice header of a CRA picture.

If the leading picture does not exist, the electronic device may generate an explicit leading picture absence indicator. The electronic device may also send an explicit leading picture absence indicator. Determining whether the leading picture exists may include determining whether the second picture is after the first picture in the decoding order and before the first picture in the output order.

The explicit leading picture indicator may be a network access layer (NAL) unit type. The NAL unit type may include a NAL unit type associated with a leading picture. The NAL unit type may include a NAL unit type associated with a CRA picture having a subsequent leading picture. The NAL unit type may also include a NAL unit type associated with a CRA picture without a subsequent leading picture. The NAL unit type may also include at least one of the group consisting of a slice header of a CRA picture and a slice header of a leading picture.

An electronic device for determining whether a leading picture exists is also described. The electronic device includes a processor and a memory in electronic communication with the processor. The electronic device also includes instructions stored in the memory. The electronic device receives a bitstream. The electronic device further determines whether a leading picture exists based on whether the bitstream includes an explicit leading picture indicator. The electronic device also performs an operation on the bitstream based on whether a leading picture exists. Performing the operation on the bitstream may include discarding the leading picture if the leading picture exists.

The electronic device may also be a processing device (eg, a network node). If a leading picture exists, the leading picture may also correspond to a CRA picture at a random access point.

Determining whether a leading picture exists includes determining that a leading picture exists if the bitstream includes an explicit leading picture indicator. Determining whether a leading picture exists may also include determining that a leading picture is absent if the bitstream includes an explicit leading picture absence indicator, or if the bitstream does not include an explicit leading picture indicator.

The explicit leading picture indicator may include at least one of the group consisting of a NAL unit type; a flag in a slice header of an SPS, PPS, APS, and CRA picture. The explicit leading picture indicator may also be a NAL unit type. The NAL unit type may include a NAL unit type associated with a CRA picture that has no subsequent leading picture.

A method for determining, by an electronic device, whether a leading picture exists is also described. The method includes encoding a first picture. The method also includes determining whether a leading picture exists. The method also includes generating an explicit leading picture indicator if a leading picture exists. The method also includes transmitting the explicit leading picture indicator if a leading picture exists.

A method for determining, by an electronic device, whether a leading picture is present is also described. The method includes encoding a bitstream. The method also includes determining whether a leading picture is present based on whether the bitstream includes an explicit leading picture indicator. The method also includes performing an operation on the bitstream based on whether a leading picture is present.

The systems and methods disclosed herein describe methods for identifying a leading picture. For example, some configurations described herein include devices and methods for signaling a CRA picture. In addition, some of the described devices and methods can be used to distinguish between a CRA picture with a subsequent leading picture and a CRA picture without a subsequent leading picture.

It is also often necessary to identify the leading picture in the bitstream. Currently, known systems identify the leading picture in the bitstream by performing a large number of encoding and decoding operations on various parameter sets. For example, known systems identify the leading picture by encoding and decoding the SPS and PPS. Known systems can also calculate a picture order count (POC) value and compare the calculated value with the POC value of the corresponding CRA picture. Known methods also compare the CRA picture with the corresponding calculated value to determine whether the picture is the leading picture. Performing these steps can have an adverse effect on the system and requires a large amount of processing of the data used to identify the leading picture and perform operations on the bitstream.

To address some of these difficulties, the systems and methods herein provide methods for identifying leading pictures. In some methods, one or more indicators can be implemented to indicate whether a CRA picture has a subsequent leading picture in the bitstream. For example, in one configuration, a new NAL unit can be introduced to indicate whether a CRA picture has one or more leading pictures that follow the CRA picture in the bitstream. In another configuration, a flag in the SPS, PPS, and/or APS can be used to indicate whether a leading picture follows the CRA picture. Advantages of this method can include allowing an electronic device to identify a leading picture without requiring extensive encoding or decoding by one or more electronic devices.

Where indicators associated with CRA pictures are provided, it should be noted that a CRA picture may include a coded picture containing coded slices associated with a particular type of NAL unit. In some cases, a CRA picture may include only intra-predicted slices (I-slices), where only intra-predicted slices are decoded using intra-prediction. For example, in one configuration, a CRA picture is a coded picture that includes coded slices with a NAL unit type (nal_unit_type) equal to 4. In some cases, all coded pictures that follow the CRA picture in coding order and output order may not use inter prediction from any picture that precedes the CRA picture in coding order or output order. Furthermore, in some cases, other pictures that precede the CRA picture in decoding order may also precede the CRA picture in output order.

In some configurations, the NAL unit type may specify the type of raw byte sequence payload (PBSP) data structure contained in the NAL unit. In one example, using NAL units with a NAL unit type equal to 0 or in the range of 24-63 may not affect the decoding process specified in various configurations. It should also be noted that in one example, NAL unit types 0 and 24-63 may be used as determined by various applications. In some configurations described herein, a decoder may ignore the content of a NAL unit that uses a reserved or unspecified NAL unit type value.

Examples of NAL unit type encodings and NAL unit type categories that can be implemented according to the systems and methods disclosed herein are included in Tables 1 and 11 below. It should be noted that some configurations may include similar domains and different domains to the configurations described below. In some configurations, some or all of the NAL domains in Table 1 may be examples of different NAL unit types. In some configurations, a particular NAL unit type may be associated with different domains and syntax structures, which are associated with one or more pictures. Further explanation of one or more domains is included below. It should be noted that Table 1 below includes abbreviations for video coding layer (VCL) NAL unit type categories, instantaneous decoding refresh (IDR) pictures, and temporal layer access (TLA) pictures. Other examples related to Table 1 may also be applied to Table 11 and other configurations described below.

Table 1

In this example, the syntax may include supplemental enhancement (SEI) information RBSP syntax. The SEI RBSP may contain one or more SEI messages. Each SEI message may include a variable payloadType that specifies the type of the SEI payload and a variable payloadSize that specifies the size of the SEI payload. The derived SEI payload size payloadSize may be specified in bytes and may be equal to the number of RBSP bytes in the SEI payload.

In one example, the syntax may also include an access unit delimiter RBSP syntax. The access unit delimiter may be used to indicate the type of slice present in a coded picture and to simplify detection of boundaries between access units. There may be no standardized decoding process associated with the access unit delimiter.

In one example, the syntax may also include a padding data RBSP syntax. The padding data RBSP may include a byte whose value is equal to 0xFF. In addition, a standardized decoding process may not be specified for the padding data RBSP. ff_byte is a byte equal to 0xFF.

The slice layer RBSP may include a slice header and slice data followed by rbsp_slice_trailing_bits. Table 2 below shows this example:

Table 2

Table 3 below shows an example of RBSP slice end bit syntax:

Table 3

In this example, cabac_zero_word may be a byte_aligned sequence of two bytes equal to 0x0000. Additionally, NumBytesInVcINALunits may be the sum of the values of NumBytesinNALunit for all VCL units of the coded picture. Additionally, BinCountsInNALunits may be the number of times the parsing process function DecodeBin() may be called to decode the contents of all VCL NAL units of the coded picture.

The variables RawMinCUBits and PicSizeMinCUs can be derived as follows:

RawMinCUBits=(1<<Log2MinCUSize)*(1<<Log2MinCUSize)*BitDepthY+2*(1<<Log2MinCUSize-1))*(1<<Log2MinCUSize-1))*BitDepthC; and

PicSizeMinCUs=Ceil(pic_width_in_luna_samples/(1<<Log2MinCUSize))*Ceil(pic_height_in_luma_samples/(1<<Log2MinCUSize)).

In this method, BinCountsInNALunits may not exceed:

(32/3)*NumBytesInVcINALunits+(RawMinCUBits*PicSizeInMinCUS)/32.

It should be noted that the value of NumBytesInVcINALunits can be increased by inserting multiple cabac_zero_word syntax elements to meet the constraint on the maximum number of bins resulting from decoding the content of the slice layer NAL unit. In the NAL unit, each cabac_zero_word is represented by the three-byte sequence 0x000003 (due to the constraints on the NAL unit content, it is necessary to include emulation_prevention_three_byte for each cabac_zero_word).

Table 4 below shows an example of RBSP end bit syntax:

Table 4

Table 4 provides an example of RBSP end bit semantics. In this example, rbsp_stop_bit may be equal to 1 and rbsp_alignment_zero_bit may be equal to 0.

Table 5 below shows an example of the byte alignment syntax.

Form 5

Table 5 provides an example of byte alignment semantics. In this example, bit_equal_to_one may be equal to 1.

In these examples, the sequence parameter set RBSP may include syntax elements corresponding to an SPS raw byte sequence payload. The sequence parameter set RBSP may include syntax elements corresponding to a PPS raw byte sequence payload. The sequence parameter set RBSP may include syntax elements corresponding to an APS raw byte sequence payload.

In some methods, a signal or indicator can be associated with a leading picture to indicate the leading picture following the CRA picture in the bitstream. For example, the leading picture can be indicated as a leading picture by the NAL unit type associated with the leading picture. Advantages of providing an explicit leading picture indicator in this method can include avoiding decoding or modification of the PPS, SPS, or other fields. In addition, the method can support identification of one or more leading pictures without performing specific decoding operations.

In some methods, one or more indicators can be implemented to indicate the absence of a leading picture. In one example, a NAL unit, flag, or other indicator associated with a CRA picture can be introduced to indicate the absence of one or more leading pictures in the bitstream. One advantage of this approach is that an explicit leading picture indicator can be generated without requiring extensive encoding of one or more pictures.

The system and method disclosed herein can provide one or more additional advantages when processing data bit streams. In one configuration, a bit stream can be transmitted between one or more electronic devices, and the bit stream has an explicit indicator corresponding to one or more leading pictures. Adopting this scheme can reduce the processing capacity of electronic devices, wherein knowing whether the bit stream includes a leading picture is advantageous. Under another configuration, the electronic device can discard one or more leading pictures without the need to perform a large amount of processing on the bit stream. Abandoning the leading picture without the need for a large amount of processing can include: reducing the amount of data output or transmission without causing excessive adverse effects on the quality of the signal or display (including one or more pictures). In some configurations, these and other advantages can contribute to more effectively streaming data between electronic devices.

Various configurations will now be described with reference to the accompanying drawings, in which like reference numerals may indicate functionally similar elements. The systems and methods generally described and illustrated in the drawings herein may be arranged and designed in a variety of different configurations. Therefore, the following more detailed description of several configurations illustrated in the drawings is not intended to limit the scope of the claims, but is merely representative of the described systems and methods.

FIG1 is a block diagram illustrating an example of one or more electronic devices 102a-b in which systems and methods for identifying a leading screen may be implemented. In this example, electronic device A 102a and electronic device B 102b are illustrated. However, it should be noted that in some configurations, one or more features and functions described with respect to electronic device A 102a and electronic device B 102b may be combined into a single electronic device.

Electronic device A 102a includes an encoder 104 and a leading picture indicator module 108. Each of the elements included in electronic device A 102a (eg, encoder 104 and leading picture indicator module 108) may be implemented in hardware, software, or a combination of both.

Electronic device A 102a may obtain an input screen 106. In some configurations, the input screen 106 may be captured on electronic device A 104a using an image sensor, retrieved from memory, and/or received from another electronic device.

The encoder 104 may encode the input pictures 106 to generate encoded data. For example, the encoder 104 may encode a series of input pictures 106 (e.g., a video). In one configuration, the encoder 104 may be a High Efficiency Video Coding (HEVC) encoder. The encoded data may be included in a bitstream 114. The encoder 104 may generate overhead signaling based on the input pictures 106.

The leading picture indicator module 108 can provide an indicator corresponding to the leading picture. For example, the leading picture indicator module 108 can determine whether a leading picture exists. If a leading picture exists, the leading picture indicator module 108 can also generate an explicit leading picture indicator. In some configurations, the leading picture indicator module 108 can send or otherwise share the explicit leading picture indicator with one or more electronic devices. In one example, electronic device A 102a can send one or more leading picture indicators to electronic device B 102b. One advantage of generating an explicit leading picture indicator can include reducing the operations performed on one or more pictures when processing one or more pictures in a bitstream.

One or more indicators are described in accordance with the systems and methods disclosed herein. Further details are provided herein regarding the various indicators that may be generated by electronic device A 102a. For example, encoder 104 may use one or more indicators to identify a leading picture. Further details are provided below. It should be noted that in some configurations, a leading picture indicator module 108 may be included in encoder 104. Leading picture indicator module 108 may support reduced bitstream processing by one or more electronic devices 102a-b.

The encoder 104 (and, for example, the leading picture indicator module 108) can generate a bitstream 114. The bitstream 114 can include coded data based on the input picture 106. In one example, the bitstream 114 can include coded picture data. In some configurations, the bitstream 114 can also include overhead data, such as slice header information, PSP information, SPS information, APS information, etc. In some cases, the slice header, PPS information, SPS information, or APS information can be referred to as high-level syntax. The bitstream 114 can also include other data, some examples of which are described herein. When encoding additional input pictures 106, the bitstream 114 can include one or more leading pictures. Additionally or alternatively, the bitstream 114 can include one or more leading picture indicators and other coded data.

Bitstream 114 can be provided to decoder 112. In one example, bitstream 114 can be transferred to electronic device B 102b using a wired or wireless link. In some cases, this can be accomplished by a network (for example, the Internet, local area network (LAN) or other types of networks for communicating between devices). As shown in Figure 1, decoder 112 can be implemented on electronic device B 102, separated from the decoder 104 on electronic device A 102a. It should be noted that, in some configurations, encoder 104 and decoder 112 can be implemented on the same electronic device. In the implementation scheme in which encoder 104 and decoder 102 are implemented on the same electronic device, for example, bitstream 114 can be made available to decoder in many ways. For example, bitstream 114 can be provided to decoder 112 or stored in a memory so as to be obtained by decoder 112 by bus.

The decoder 112 can be implemented as hardware, software, or a combination of both. In one configuration, the decoder 112 can be an HEVC decoder. The decoder 112 can obtain (e.g., receive) a bitstream 114. The decoder 112 can generate one or more decoded pictures 118 based on the bitstream 114. The decoded pictures 118 can be displayed, played back, stored in a memory, and/or transmitted to another device, etc.

The decoder 112 may include a leading picture determination module 120. The leading picture determination module 120 may enable the electronic device B 102b to identify whether a leading picture is present in the bitstream 114. For example, the leading picture determination module 120 may determine whether a leading picture is present based on whether the bitstream 114 includes a leading picture indicator. Additionally or alternatively, the leading picture determination module 120 may determine whether a leading picture is present based on a leading picture lacking an indicator. The leading picture determination module 120 is described in more detail below.

Electronic device B 102b may also perform one or more operations on the bitstream 114. In one example, the operations or processing performed on the bitstream 114 may be based on the presence of a leading picture or a leading picture indicator. In some configurations, a decoder 112 or other component on electronic device B 102b may perform the operations on the bitstream 114. In some configurations, the operations performed on the bitstream 114 may include discarding the leading picture or transmitting the decoded bitstream 114. In addition, other operations may be performed on the bitstream 114.

In some configurations, electronic device B 102b can output a decoded picture 118. In one example, the decoded picture 118 can be transmitted to another device or sent back to electronic device A 102a. In one configuration, the decoded picture 118 can be stored or otherwise retained on electronic device B 102b. In another example, electronic device B 102b can display the decoded picture 118. In other configurations, the decoded picture 118 can include elements of the input picture 106 having different characteristics based on the encoding and other operations performed on the bitstream 114. In some configurations, the decoded picture 118 can be included in a picture stream having a different resolution, format, size, or other attributes than the input picture 106.

It should be noted that in some configurations or instances, bitstream 114 can be provided to a processing device (e.g., a network node). For example, a processing device (e.g., a network node) can be an example of electronic device B 102b. For example, the processing device can include a decoder. Alternatively, the processing device can be a separate device between electronic device A 102a and electronic device B 102b. For example, the processing device can receive bitstream 114 and relay it to electronic device B 102b. In some cases or configurations, the processing device or electronic device 102b can include a leading picture determination module 120 to determine whether there is a leading picture in the bitstream 114. In some cases or configurations, the processing device or electronic device B 102b can discard the leading picture from the bitstream 114.

It should be noted that one or more elements or parts thereof included in the electronic device 102 can be implemented as hardware. For example, one or more of these elements or parts thereof can be implemented as chips, circuits, or hardware components. It should also be noted that one or more functions or methods described herein can be implemented as hardware and/or hardware can be used to perform the functions or methods. For example, one or more methods described herein can be implemented in and/or using a chipset, an application specific integrated circuit (ASIC), a large scale integrated circuit (LSI), or an integrated circuit.

FIG2 is a flow chart illustrating one configuration of a method 200 for identifying a leading picture. An electronic device 102 may encode 202 a first picture. The first picture may be an input picture 106 or one of a stream of input pictures 106 obtained by the electronic device 102. In some cases, the first picture may be a CRA picture. In other cases, pictures other than the first picture may be CRA pictures. For example, in one configuration, a CRA picture may be a picture that appears at a random access point. A random access point may be any point in a data stream (e.g., a bitstream) at which decoding of the bitstream may begin. One advantage of having a CRA picture appear at a random access point is that it is possible to determine whether a leading picture appears after the CRA picture in the bitstream. Regardless of whether a CRA picture is the first picture or whether a CRA picture appears at a random access point, knowing the position of the leading picture relative to the CRA picture may be advantageous. Furthermore, in some configurations, an indicator corresponding to a CRA picture may indicate whether one or more leading pictures appear after the CRA picture. In some configurations, the electronic device 102 may encode multiple input pictures 106.

Encoding 202 the first picture may include representing the input picture 106 as digital data. For example, encoding 202 the first picture may include generating a bit string representing characteristics (e.g., color, brightness, spatial position, etc.) of the input picture 106. In some cases, the input picture 106 may be encoded 202 as a CRA picture. One or more encoded pictures may be included in a bitstream 114 and may be sent to another electronic device 102 including a decoder 112.

The electronic device 102 may determine 204 whether a leading picture exists. A leading picture may be a picture that follows a CRA picture in decoding order and precedes the CRA picture in output order. For example, a leading picture may exist if the encoder 104 specifies that a picture follows a CRA picture in decoding order and precedes the CRA picture in output order (e.g., an order output from the decoder 112).

Determining 204 whether a leading picture exists can be accomplished according to one or more methods. In one method, if the first picture is a CRA picture and there is another picture that is specified (e.g., by the encoder 104) to be located after the CRA picture in decoding order and before the CRA picture in output order, the electronic device 102 determines 204 that a leading picture exists. In some configurations, the electronic device 102 can read data corresponding to the CRA picture and one or more other pictures to determine whether a leading picture exists. For example, the electronic device 102 can read data that specifies the decoding order and output order of the CRA picture and one or more other pictures.

In some configurations, the output order may be determined by the POC, while the decoding order may be determined by the order in which syntax elements appear in the bitstream 114. The output order is the order in which decoded pictures are output from the electronic device 102. In some configurations, the output order may be the order in which decoded pictures are output from a decoded picture buffer. In the case of outputting decoded pictures from a decoded picture buffer, the output order of the pictures may be specified by the POC, regardless of whether the pictures are to be output. Furthermore, the decoding order is the order in which syntax elements are processed by the decoding process. If the condition that a picture is designated as following a CRA picture in decoding order and designated as preceding the CRA picture in output order is met, the electronic device 102 may determine 204 that a leading picture exists.

If a leading picture is present, the electronic device 102 may generate 206 an explicit leading picture indicator. In some configurations, the electronic device 102 may include a leading picture indicator module 108 that generates one or more explicit leading picture indicators. In one example, the leading picture indicator module 108 may be included as part of the encoder 104 on the electronic device 102. One advantage of generating explicit leading picture indicators may include reducing unnecessary processing by a decoder.

One or more methods may be employed to generate 206 an explicit leading picture indicator. In one method, the leading picture indicator module 108 may generate the leading picture indicator by modifying or creating a NAL unit type corresponding to a CRA picture. For example, the NAL unit type may be associated with a first picture encoded by the electronic device 102. For example, the NAL unit type may correspond to a CRA picture. In some configurations, the NAL unit type may be an explicit indicator indicating a coded slice of a CRA picture with one or more subsequent leading pictures. One advantage of creating or modifying a NAL unit that explicitly indicates a leading picture is that additional decoding (e.g., by a processing device, a network node, or a decoder) may not be required to identify the leading picture. Another advantage may be that in configurations where only the NAL unit type is used to explicitly indicate a leading picture, the SPS, PPS, or other fields of the CRA picture may not need to be modified.

For example, one configuration of the electronic device 102 that generates an explicit leading picture indicator to indicate the presence of a leading picture may be explained with reference to Table 1. In one example, if the NAL unit type is equal to 4 for a NAL unit of a slice containing a particular picture, the NAL unit type of all VCL NAL units of the particular picture may be equal to 4. In this example, the NAL unit type being equal to 4 may indicate a coded slice of a CRA picture having one or more subsequent leading pictures (e.g., following a CRA picture).

In an additional or alternative method, the electronic device 102 may generate 206 an explicit leading picture indicator by generating a flag. For example, the electronic device 102 may generate a flag in one or more of the slice headers of the SPS, PPS, APS, and CRA pictures to indicate whether the one or more leading pictures follow the CRA picture. For example, if it is determined that the leading picture follows the CRA picture, the electronic device 102 may insert the flag into one or more slice headers of the CRA picture.

A more specific example of generating 206 an explicit leading picture indicator is shown below. In one example, the electronic device 102 can create or modify a flag or other indicator to accompany the syntax structure of one or more pictures (e.g., the first picture). For example, the leading picture indicator module 108 can indicate the presence of a leading picture by inserting a flag into a slice header of an SPS, PPS, APS, or CRA picture. In some cases, the flag can be encoded or sent at a random access point or a slice header of a CRA picture to indicate whether a leading picture is present after the CRA picture.

In one example, the leading picture indicator module 108 can generate a flag in the SPS. The leading picture indicator can be an explicit indicator encoded as part of the SPS. For example, Table 6 shows one configuration of flags that can be generated by the leading picture indicator module 108 and included in the SPS. In one configuration, a leading picture flag (e.g., cra_leadingpict_present_flag) equal to 1 can indicate that a leading picture is present after a CRA picture in the bitstream 114. Examples of flags in the SPS are shown in bold.

Table 6

In this example, profile_idc and level_idc may indicate the profile and level to which the coded video sequence conforms. A field of reserved_zero_8bits equal to 0 indicates that the decoder should ignore the value of reserved_zero_8bits. The field denoted by seq_parameter_set_id may identify the sequence parameter set referenced by the picture parameter set. The value of seq_parameter_set_id shall be in the range of 0 to 31, inclusive.

Furthermore, for the field rbsp_trailing_bits, an example of syntax may be as shown in Table 7 below:

Form 7

In this example, rbsp_byte[i] is the i-th byte of the RBSP. The RBSP can be defined as an ordered sequence of bytes (SODB). The SODB of the RBSP can include multiple configurations. For example, if the SODB is empty (i.e., the length is 0 bits), the RBSP can also be empty. If the SODB is not empty, the first byte of the RBSP can contain the most significant or leftmost eight bits of the SODB, the next byte of the RBSP contains the next eight bits of the SODB, and so on until less than eight bits of the SODB remain. In addition, rbsp_trailing_bits() can be present after the SODB. In this example, the first few bits of the last RBSP byte can include any remaining bits of the SODB. The next bit can include a single rbsp_stop_one_bit equal to 1. When the rbsp_stop_one_bit is not the last bit of a byte that is byte-aligned, one or more rbsp_alignment_zero_bits can be present to cause byte alignment. Additionally, there may be one or more cabac_zero_word 16-bit syntax elements equal to 0x0000 in some RBSPs, following rbsp_trailing_bits() at the end of the RBSP.

Additionally or alternatively, the leading picture indicator module 108 can generate a flag in the PPS. For example, the leading picture indicator can be an explicit indicator included as part of the PPS. For example, Table 8 shows one configuration of code including a flag that can be generated by the leading picture indicator module 108 and included in the PPS. In one example, a leading picture flag (e.g., cra_leadingpict_present_flag) equal to 1 can indicate the presence of a leading picture following a CRA picture in the bitstream 114. Examples of flags in the PPS are shown in bold.

Form 8

In this example, pic_parameter_set_id can identify the picture parameter set referenced in the slice header. In addition, the value of pic_parameter_set_id can be in the range of 0 to 255 (including 0 and 255). seq_parameter_set_id can refer to the active sequence parameter set. In addition, the value of seq_parameter_set_id can be in the range of 0 to 31 (including 0 and 31). In a bitstream that conforms to the HEVC Recommendation f international standard, pps_extension_flag can be equal to 0. The value of 1 for pps_extension_fla can be reserved for future use by ITU-T | ISO/IEC. The decoder should ignore all data after the pps_extension_flag with a value of 1 in the picture parameter set NAL unit. pps_extension_data_flag can have any value and does not affect decoders that conform to the profile specified in the HEVC Recommendation | International Standard.

Additionally or alternatively, the leading picture indicator module 108 can generate a flag in the APS. The leading picture indicator can be an explicit indicator included as part of the APS. For example, Table 9 shows a configuration of code including a flag that can be generated by the leading picture indicator module 108 and included in the APS. In one example, a leading picture flag (e.g., cra_leadingpict_present_flag) equal to 1 can indicate that there is a leading picture following a CRA picture in the bitstream 114. Examples of flags in the PPS are shown in bold. As a further illustration, the APS identification tag (aps_id) can also include data corresponding to the slice header of the picture. In some configurations, the value of aps_id can be in the range of 0 to a predetermined limit (including 0 and the predetermined limit).

Form 9

In this example, aps_id may identify the adaptation parameter set referenced in the slice header.

The value of aps_id can be in the range of 0 to TBD (inclusive).

aps_scaling_list_data_present_flag equal to 1 may indicate that scaling list parameters are present in the APS. aps_scaling_list_data_present_flag equal to 0 may indicate that scaling list parameters are not present in the APS. aps_deblocking_filter_flag equal to 1 may indicate that deblocking parameters are present in the APS. aps_deblocking_filter_flag equal to 0 may indicate that deblocking parameters are not present in the APS. aps_sao_interleaving_flag equal to 1 may indicate that SAO parameters are interleaved in the slice data of the slice referencing the current APS.

aps_sao_interleaving_flag equal to 0 indicates that the SAO parameters are in the APS of the slice that references the current APS. When no APS is active, aps_sao_interleaving_flag is inferred to be 0. aps_sample_adaptive_offset_flag equal to 1 indicates that SAO is on for the slice that references the current APS. aps_sample_adaptive_offset_flag equal to 0 indicates that SAO is off for the slice that references the current APS. When no APS is active, aps_sample_adaptive_offset_flag value is inferred to be 0.

aps_adaptive_loop_filter_flag equal to 1 may indicate that the adaptive loop filter (ALF) is on for slices referencing the current APS. aps_adaptive_loop_filter_flag equal to 0 may indicate that the ALF is off for slices referencing the current APS. When there is no active APS, the aps_adaptive_loop_filter_flag value may be inferred to be 0.

The value of aps_extension_flag equal to 0 may indicate that the aps_extension_data_flag syntax element is not present in the picture parameter set RBSP syntax structure. aps_extension_flag may be equal to 0 in bitstreams conforming to the HEVC Recommendation 1 international standard. The value of aps_extension_flag of 1 is reserved for future use by ITU-T | ISO/IEC. A decoder shall ignore all data following an aps_extension_flag value of 1 in a picture parameter set NAL unit.

aps_extension_data_flag may have any value and may not affect decoders conforming to the profile specified in the HEVC Recommendation | International Standard.

Additionally or alternatively, the leading picture indicator module 108 can generate a flag in the slice header associated with the CRA picture or the leading picture. The leading picture indicator can be an explicit indicator included as part of the slice header. For example, Table 10 shows one configuration of code including a flag that can be generated by the leading picture indicator module 108 and included as part of the slice header. In one example, a leading picture flag (e.g., cra_leadingpict_present_flag) equal to 1 can indicate that a leading picture is present in the bitstream 114 following the CRA picture or other picture associated with the flag. Examples of flags in the slice header are shown in bold.

Form 10

In this example, first_slice_in_pic_flag may indicate whether the slice is the first slice of a picture. If first_slice_in_pic_flag is equal to 1, then the variables SliceCbAddrZS and SliceCtbAddrRS may both be set to 0, and decoding may begin from the first coding tree block in the picture. slice_address may specify the address where the slice begins at slice granularity resolution. In one example, the length of the slice_address syntax element in bits may be equal to:

(Ceil(Log2(PicWidthInCtbs*PicHeightInCtbs))+SliceGranularity).

The variable SliceCtbAddrRS may specify the coding tree block where the slice starts in coding tree block raster scan order and may be derived as follows:

SliceCtbAddrRS=(slice address>>SliceGranularity).

The variable SliceCbAddrZS may specify the address of the first coded block in the slice in z-scan order at the smallest coded block granularity and may be derived as follows:

SliceCbAddrZS=slice_address; and

slice_address＜＜((log2 diff max min coding block size-SliceGranularity)＜＜1).

Slice decoding may start from the largest possible coding unit at the slice start coordinates.

It should be noted that the above table and accompanying description show one possible location where cra_leadingpict_present_flag may be included. In other configurations, one or more flags may be sent at different locations in the SPS, PPS, APS, or slice header.

Additionally or alternatively, the leading picture indicator module 108 may modify or create NAL unit types corresponding to one or more leading pictures. For example, the NAL unit type corresponding to the leading picture may indicate the leading picture. For example, the NAL unit type may indicate a coded slice of the leading picture following a CRA picture. In one configuration, the coded slice of the leading picture may also include a reference to a CRA picture.

If a leading picture is present, the electronic device 102 may transmit 208 an explicit leading picture indicator. Transmitting 208 the explicit leading picture indicator may include communicating data (e.g., a bitstream 114) between multiple components of the electronic device 102 or transmitting the bitstream 114 between one or more electronic devices 102. In one example, the encoder 104 on electronic device A 102a may transmit the bitstream 114 including one or more leading picture indicators to electronic device B 102b. In some configurations, the bitstream 114 may be transmitted to the decoder 120 on electronic device B 102b. For example, the explicit leading picture indicator may be transmitted 208 via a wired or wireless transmission.

FIG3 is a flow chart illustrating a more specific configuration of a method 300 for identifying a leading picture. The electronic device 102 may encode 302 a CRA picture. For example, the electronic device 102 may encode 302 an input picture 106 that is a CRA picture. For example, the electronic device 102 may encode 302 the CRA picture as described above in conjunction with FIG2 . It should also be noted that while some configurations may indicate a CRA picture corresponding to one or more leading picture indicators, the leading picture indicators may correspond to other types of pictures. For example, several of the proposed methods for providing leading picture indicators may be applied to Instantaneous Decoding Refresh (IDR) pictures. In one configuration, an IDR picture may be a coded picture with the variable IdrPicFlag equal to 1. An IDR picture may cause the decoding process to mark all reference pictures as "unused for reference." Furthermore, all coded pictures following the IDR picture in decoding order may be decoded without requiring inter-frame prediction based on any pictures preceding the IDR picture in decoding order. In some configurations, the first picture of each coded video sequence or picture stream may be an IDR picture.

Encoding 302 a CRA picture may include representing the input picture 106 as digital data. For example, encoding 302 a first picture may include generating a bit string representing characteristics (e.g., color, brightness, spatial position, etc.) of the input picture 106. One or more encoded pictures may be included in a bitstream 114 and may be sent to another electronic device 102 including a decoder 112.

The electronic device 102 may determine 304 whether a leading picture exists. A leading picture may be a picture that follows a CRA picture in decoding order and precedes the CRA picture in output order. For example, if the encoder 104 specifies that a picture follows a CRA picture in decoding order and precedes the CRA picture in output order (e.g., the order output from the decoder 112), then a leading picture may exist. For example, the electronic device 102 may determine 304 whether a leading picture exists as described above in conjunction with FIG. 2 .

If a leading picture exists, the electronic device 102 may generate 306 an explicit leading picture indicator. The electronic device 102 may generate 306 the explicit leading picture indicator according to one or more methods. For example, the electronic device 102 may generate 306 one or more of a NAL unit type, a flag in an SPS, a flag in a PPS, a flag in an APS, and a flag in a slice header of a CRA picture to indicate that a leading picture exists (e.g., one or more leading pictures follow the CRA picture). In other words, examples of an explicit leading picture indicator include one or more of a NAL unit type, a flag in an SPS, a flag in a PPS, a flag in an APS, and a flag in a slice header of a CRA picture.

In one method, the electronic device 102 may generate 306 a NAL unit type corresponding to a CRA picture. For example, the electronic device 102 may generate 306 a NAL unit type 4 as shown in Table 1 above. NAL unit type 4 may indicate a coded slice of a CRA picture with one or more subsequent leading pictures.

In an additional or alternative method, the electronic device 102 may generate 306 a flag in one or more of the slice headers of the SPS, PPS, APS, and CRA pictures. For example, the electronic device 102 may generate 306 one or more cra_leadingpict_present_flags with a value of 1 in one or more of the slice headers of the SPS, PPS, APS, and CRA pictures as described above. For example, a cra_leadingpict_present_flags value of 1 may indicate that one or more leading pictures are following the CRA picture. It should be noted that only one of the above methods may be implemented, or a combination of two or more of the above methods may be implemented to explicitly indicate that one or more leading pictures are following the CRA picture.

The electronic device 102 may send 308 an explicit leading picture indicator. In some configurations, sending the explicit leading picture indicator may include transferring data (e.g., a bitstream 114) between multiple components of the electronic device 102 or transmitting the bitstream 114 between one or more electronic devices 102. In one example, the encoder 104 on electronic device A 102a may send a bitstream 114 including one or more leading picture indicators to electronic device B 102b or a decoder 112 on electronic device B 102b.

If the electronic device 102 determines that a leading picture is not present, the leading picture indicator module 108 may generate 310 an explicit leading picture absence indicator. The electronic device 102 may generate 310 the explicit leading picture absence indicator according to one or more methods. For example, the electronic device 102 may generate 310 one or more of a NAL unit type, a flag in an SPS, a flag in a PPS, a flag in an APS, and a flag in a slice header of a CRA picture to indicate that a leading picture is absent (e.g., not following a CRA picture). In other words, examples of an explicit leading picture absence indicator include one or more of a NAL unit type, a flag in an SPS, a flag in a PPS, a flag in an APS, and a flag in a slice header of a CRA picture.

In one method, the electronic device 102 may generate 310 a NAL unit type corresponding to a CRA picture. For example, the electronic device 102 may generate 310 a NAL unit type 16 as shown in Table 1 above. The NAL unit type 16 may indicate a coded slice of a CRA picture without one or more subsequent leading pictures.

In an additional or alternative method, the electronic device 102 may generate 310 a flag in one or more of the slice headers of the SPS, PPS, APS, and CRA pictures. For example, the electronic device 102 may generate 310 one or more cra_leadingpict_present_flags with a value of 0 in one or more of the slice headers of the SPS, PPS, APS, and CRA pictures as described above. For example, a cra_leadingpict_present_flags value of 0 may indicate the absence of one or more leading pictures following the CRA picture. It should be noted that only one of the above methods may be implemented, or a combination of two or more of the above methods may be implemented to explicitly indicate that no leading picture follows the CRA picture.

If the leading picture is not present, the electronic device 102 may send 312 an explicit leading picture absence indicator. Sending 312 the explicit leading picture absence indicator may include transmitting data between multiple components of the electronic device 102, or transmitting the bitstream 114 between one or more electronic devices 102 or between components on multiple devices (e.g., encoder 104, decoder 112). One advantage of providing an explicit leading picture indicator or absence indicator may include reducing one or more decoding steps for determining whether a leading picture is present in the bitstream 114. Furthermore, providing the absence indicator may reduce additional operations performed on the bitstream 114 when the bitstream 114 with the absence indicator passes through the electronic device 102.

FIG4 is a flow chart illustrating one configuration of a method 400 for identifying a leading picture. The electronic device 102 may encode 402 a CRA picture. For example, the electronic device 102 may encode 402 an input picture 106 as a CRA picture. For example, the electronic device 102 may encode 402 the CRA picture as described above in conjunction with FIG2 .

The electronic device 102 may determine 404 whether a leading picture exists. A leading picture may be a picture that follows a CRA picture in decoding order and precedes the CRA picture in output order. For example, if the encoder 104 specifies that a picture follows a CRA picture in decoding order and precedes the CRA picture in output order (e.g., the order output from the decoder 112), then a leading picture may exist. For example, the electronic device 102 may determine 404 whether a leading picture exists as described above in conjunction with FIG. 2 .

If a leading picture is present, the electronic device 102 may generate 406 an explicit leading picture indicator associated with the leading picture. In some configurations, the electronic device 102 may generate 406 an explicit leading picture indicator associated with the leading picture by creating a NAL unit type corresponding to one or more leading pictures. For example, the electronic device 102 may generate 406 a NAL unit type 15 as shown in Table 11.

Form 11

For example, a NAL unit type of 15 may indicate a coded slice of a leading picture following a CRA picture. For example, if the NAL unit type for a NAL unit containing a slice of a particular picture is equal to 15, then the NAL unit type of all VCL NAL units of that particular picture may be equal to 15. In this example, a NAL unit type of 15 may indicate a coded slice of a leading picture following a CRA picture. One advantage of generating an explicit leading picture indicator in this method may include facilitating identification of the leading picture indicator without requiring modification of the CRA picture or other data associated with the CRA picture. Furthermore, the leading picture indicator may be obtained (e.g., by a decoder or a network node) without requiring decoding of an SPS, PPS, or other field associated with a CRA picture or other picture. In some configurations, a leading picture indicator corresponding to a leading picture may be included in one or more of an SPS, PPS, APS, or slice header associated with one or more leading pictures.

If a leading picture is present, the electronic device 102 may transmit 408 an explicit leading picture indicator. Transmitting the explicit leading picture indicator may include transferring data (e.g., a bitstream 114) between multiple components of the electronic device 102 or transmitting the bitstream 114 between one or more electronic devices 102. Furthermore, transmitting the explicit leading picture indicator may include other similar methods for transferring data between one or more electronic devices 102.

FIG5 is a flow chart illustrating one configuration of a method 500 for identifying a leading picture. An electronic device 102 may receive 502 a bitstream 114. Receiving the bitstream 114 may include obtaining, reading, or otherwise accessing the bitstream 114. In some configurations, the bitstream 114 may be received from an encoder 104 on the same electronic device or a different electronic device 102. In one example, electronic device B 102b may receive the bitstream 114 from an encoder 104 on electronic device A 102a. In some configurations, electronic device B 102b may also include a decoder 112 that receives the bitstream 114. The bitstream 114 may include encoded data based on one or more input pictures 106. In some configurations, the bitstream 114 may also include one or more of an explicit leading picture indicator and an explicit leading picture absence indicator.

The electronic device 102 may determine 504 whether a leading picture is present based on whether the bitstream 114 includes an explicit leading picture indicator. Additionally or alternatively, in some configurations, the electronic device 102 may determine whether a leading picture is missing based on whether the bitstream 114 includes an explicit leading picture absence indicator. Advantages of providing an explicit leading picture indicator or an explicit leading picture absence indicator may include reducing the number of decoding or other processing steps performed by the electronic device 102 in determining whether a leading picture is present. In some configurations, when the leading picture indicator module 108 can determine whether a leading picture is missing or present, unnecessary operations performed by one or more electronic devices (e.g., a decoder) on the bitstream 114 may also be reduced.

Determining 504 whether a leading picture is present or absent may include reading or otherwise accessing the bitstream 114. Additionally or alternatively, in some configurations, the electronic device 102 may partially decode the bitstream 114. In one configuration, the decoder 112 may receive and read a portion or all of the bitstream 114 to determine whether a leading picture indicator is present. In one example, the decoder 112 may include a leading picture determination module 120 for reading the bitstream 114 and identifying whether a leading picture indicator is present. In some configurations, the leading picture determination module 120 may interact with the leading picture indicator module 108 to determine whether a leading picture indicator is present in the bitstream 114. In some configurations, the leading picture determination module 120 may determine whether a leading picture indicator is present by viewing a NAL unit type, one or more flags associated with one or more pictures, a coded slice created or modified by the leading picture indicator module 108, or other explicit indicators that may indicate the presence or absence of a leading picture.

In one method, the electronic device 102 may determine 504 whether a leading picture exists based on the NAL unit type corresponding to the CRA picture. For example, if the electronic device 102 receives NAL unit type 4 as shown in Table 1 above, the electronic device 102 may determine 504 that one or more leading pictures exist (e.g., one or more leading pictures follow the CRA picture). Additionally, if the electronic device 102 receives NAL unit type 16, the electronic device 102 may determine 504 that no leading picture exists.

In an additional or alternative method, the electronic device 102 may determine 504 whether a leading picture exists based on a flag included in one or more of the slice headers of the SPS, PPS, APS, and CRA pictures. For example, if the electronic device 102 receives a cra_leadingpict_present_flag with a value of 1, the electronic device 102 may determine 504 that a leading picture exists (e.g., one or more leading pictures follow the CRA picture). Furthermore, if the electronic device 102 receives a cra_leadingpict_present_flag with a value of 0, the electronic device 102 may determine 504 that a leading picture is absent (e.g., no leading picture follows the CRA picture). Thus, examples of explicit leading picture indicators may include one or more of the following: a NAL unit type corresponding to a CRA picture; and one or more flags corresponding to one or more of the slice headers of the SPS, PPS, APS, and CRA pictures, the NAL unit type and flag indicating the presence of one or more leading pictures.

Additionally or alternatively, the electronic device 102 may determine 504 whether a leading picture exists based on a NAL unit corresponding to the leading picture. Furthermore, if the electronic device 102 receives a NAL unit type 15 as shown in Table 11 above, the electronic device 102 may determine that a leading picture exists (e.g., one or more leading pictures follow the CRA picture). However, if the electronic device 102 does not receive a NAL unit type 15 as shown in Table 11 above, the electronic device 102 may determine 504 that a leading picture is absent (e.g., no leading picture follows the CRA picture). Thus, another example of an explicit leading picture indicator is a NAL unit associated with a leading picture.

The electronic device 102 may perform 506 one or more operations on the bitstream 114 based on whether there is a leading picture. In some configurations, performing 506 operations on the bitstream 114 may include discarding one or more leading pictures. For example, a processing device (e.g., a network node) or a decoder may discard one or more leading pictures from the bitstream 114. Other examples of operations that the electronic device 102 may perform 506 on the bitstream 114 may include reading, writing, reordering, deleting, decoding, sending, or other operations performed by the electronic device 102 on the data or pictures included in the bitstream 114. Additionally or alternatively, performing 506 operations on the bitstream 114 may be based on other factors, such as the availability of bandwidth, the capabilities of the electronic device 102, the specifications of the bitstream 114, and other characteristics.

In one example, the electronic device 102 may discard one or more leading pictures based on the presence or absence of an explicit leading picture indicator, in addition to other factors associated with the electronic device 102 or the bitstream 114. Additionally or alternatively, the electronic device 102 may discard one or more leading pictures based on other systems and methods associated with prediction, compensation, estimation, or other methods for efficiently representing digital media. Other configurations may include other operations performed on the bitstream 114 by one or more electronic devices 102.

6 is a block diagram illustrating one configuration of an encoder 604 of an electronic device 602. It should be noted that one or more of the elements shown as included in the electronic device 602 may be implemented as hardware, software, or a combination of the two. For example, the electronic device 602 includes an encoder 604, which may be implemented as hardware, software, or a combination of the two. For example, the encoder 604 may be implemented as a circuit, an integrated circuit, an application specific integrated circuit (ASIC), a processor in electronic communication with a memory having executable instructions, firmware, a field programmable gate array (FPGA), or the like, or a combination thereof. In some configurations, the decoder 604 may be an HEVC encoder.

The electronic device 602 may include a source 634. The source 634 may provide picture or image data (e.g., video) to the encoder 604 as input picture 606. Examples of the source 634 may include an image sensor, a memory, a communication interface, a network interface, a wireless receiver, a port, and the like.

One or more input pictures 606 may be provided to the intra prediction module and reconstruction buffer 640. The input pictures 606 may also be provided to the motion estimation and motion compensation module 666 and the subtraction module 646.

The intra prediction module and reconstruction buffer 640 may generate intra mode information 658 and an intra signal 642 based on one or more input pictures 606 and the reconstruction data 680. The motion estimation and motion compensation module 666 may generate inter mode information 668 and an inter signal 644 based on one or more input pictures 606 and a reference picture buffer 696 signal 698. In some configurations, the reference picture buffer 696 may include data from one or more reference pictures in the reference picture buffer 696.

The encoder 604 can select between an intra-frame signal 642 and an inter-frame signal 644 depending on the mode. In the intra-frame coding mode, the intra-frame signal 642 can be used to take advantage of spatial characteristics within the picture. In the inter-frame coding mode, the inter-frame signal 644 can be used to take advantage of temporal characteristics between pictures. When in the intra-frame coding mode, the intra-frame signal 642 can be provided to the subtraction module 646, and the intra-frame mode information 658 can be provided to the entropy coding module 660. When in the inter-frame coding mode, the inter-frame signal 644 can be provided to the subtraction module 646, and the inter-frame mode information 668 can be provided to the entropy coding module 660.

At a subtraction module 642, an intra signal 642 or an inter signal 644 (depending on the mode) is subtracted from the input picture 606 to produce a prediction residual 648. The prediction residual 648 is provided to a transform module 650. The transform module 650 may compress the prediction residual 648 to produce a transformed signal 652, which is provided to a quantization module 654. The quantization module 654 quantizes the transformed signal 652 to produce transformed and quantized coefficients (TOC) 656.

The TQC 656 is provided to an entropy coding module 660 and an inverse quantization module 670. The inverse quantization module 670 performs inverse quantization on the TQC 656 to produce an inverse quantized signal 672, which is provided to an inverse transform module 674. The inverse transform module 674 decompresses the inverse quantized signal 672 to produce a decompressed signal 676, which is provided to a reconstruction module 678.

The reconstruction module 678 can generate reconstructed data 680 based on the decompressed signal 676. For example, the reconstruction module 678 can reconstruct (modify) a picture. The reconstructed data 680 can be provided to a deblocking filter 682 and an intra-frame prediction module and reconstruction buffer 640. The deblocking filter 682 can generate a filtered signal 684 based on the reconstructed data 680.

The filtered signal 684 may be provided to a sample adaptive offset (SAO) module 686. The SAO module 686 may generate SAO information 688, which is provided to the entropy coding module 660, and an SAO signal 690, which is provided to an adaptive loop filter (ALF) 692. The ALF 692 generates an ALF signal 694, which is provided to a reference picture buffer 696. The ALF signal 694 may include data from one or more pictures that may be used as reference pictures.

The entropy coding module 660 may encode the TQC 656 to generate a bitstream 614 or other signal. Furthermore, the entropy coding module 660 may encode the TQC 656 using context-adaptive variable length coding (CAVLC) or context-adaptive binary arithmetic coding (CABAC). Specifically, the entropy coding module 660 may encode the TQC 656 based on one or more of the intra-mode information 658, the inter-mode information 668, and the SAO information 688. In some configurations, the bitstream 614 may include coded picture data. In one example, the bitstream 614 may be passed through a leading picture indicator module 608 before being transmitted from the encoder 604 or to another electronic device 602.

Quantization, as used in video compression (e.g., HEVC), is a lossy compression technique that compresses a range of values into a single quantized value. A quantization parameter (QP) is a predefined scaling parameter used to perform quantization based on both the quality and compression ratio of the reconstructed video. Block types are defined in HEVC to characterize a given block based on its size and its color information. The QP, resolution information, and block type may be determined prior to entropy encoding. For example, the electronic device 602 (e.g., the encoder 604) may determine the QP, resolution information, and block type, which may be provided to the entropy encoding module 660.

The entropy coding module 660 can determine a block size based on the blocks of TQCs 656. For example, the block size can be the number of TQCs 656 along a dimension of the TQC block. In other words, the number of TQCs 656 in the TQC block can be equal to the square of the block size. For example, the block size can be determined as the square root of the number of TQCs 656 in the TQC block. The resolution can be defined as the pixel width multiplied by the pixel height. The resolution information can include the number of pixels for the picture width, the number of pixels for the picture height, or both. The block size can be defined as the number of TQCs 656 along a dimension of a 2D TQC block.

In some configurations, the entropy coding module 660 sends a bitstream 614 or other information including one or more pictures to the leading picture indicator module 608. The leading picture indicator module 608 can determine whether a leading picture is present in one or more input pictures 606 and generate a leading picture indicator associated with the leading picture or other pictures (e.g., a CRA picture). In some configurations, the leading picture indicator module can generate a new NAL unit type, flag, or other indicator to indicate the presence or absence of a leading picture. In addition, the leading picture indicator module 608 can modify or create a leading picture indicator or lack thereof to accompany or be sent with the bitstream 614 of data stored on the electronic device or transmitted to another electronic device.

The leading picture indicator module 608 may also include various modules or submodules for generating one or more leading picture indicators associated with the input picture 606. For example, the indicator module 608 may include an SPS module 624a, a PPS module 624b, an APS module 624c, a slice header module 624d, a NAL unit (NALU) module 624e, or other modules for generating an explicit leading picture indicator associated with the input picture 606 to indicate whether a leading picture is present in the data stream. In some configurations, the leading picture indicator may be generated after the picture portion is encoded or after the picture passes through components of the electronic device 602. One advantage of this method may include reducing the amount of coding required to determine and provide an indication of whether a leading picture is present.

In one configuration, the leading picture indicator module 608 can generate a flag or other indicator to indicate whether a leading picture is present. For example, the SPS module 624a can generate a flag in the SPS to correspond to the presence of one or more leading pictures. In another example, the PPS module 624b can generate a flag or other indicator in the PPS to correspond to the presence of one or more leading pictures. In another example, the APS module 624c can generate a flag in the APS to correspond to the presence of one or more leading pictures. In another example, the slice header module 624d can generate a flag or other indicator in the slice header (e.g., a CRA slice header) to correspond to the presence or absence of one or more leading pictures. In some embodiments, one or more modules described herein can generate one or more indicators corresponding to one or more leading pictures.

Additionally or alternatively, in one configuration, the leading picture indicator module 608 can generate an explicit leading picture indicator associated with one or more input pictures 606 by creating or modifying a new NAL unit type. In one example, the NALU module 624e can generate a NAL unit associated with one or more pictures to indicate the presence of one or more leading pictures. In one configuration, the NAL unit can be associated with a CRA picture, and the NALU module 624e can generate a NAL unit to indicate or indicate that one or more leading pictures follow the CRA picture. In some configurations, the NALU module 624e can generate a NAL unit associated with one or more leading pictures to indicate that the input picture 606 is a leading picture.

In another configuration, the leading picture indicator module 608 can generate an explicit leading picture absence indicator. In one example, the leading picture indicator module 608 can generate a NAL unit type associated with one or more input pictures 606 (e.g., a CRA picture) to indicate the absence of a leading picture. In one example, the NAL unit type can include a coded slice of a CRA picture, indicating the absence of a leading picture following the CRA picture.

In some configurations, the bitstream 614 can be transmitted to another electronic device. For example, the bitstream 614 can be provided to a communication interface, a network interface, a wireless transmitter, a port, etc. For example, the bitstream 614 can be transmitted to another electronic device via a LAN, the Internet, a cellular phone base station, etc. Additionally or alternatively, the bitstream 614 can be stored in a memory or other component of the electronic device 602.

FIG7 is a block diagram illustrating one configuration of a decoder 712 of an electronic device 702. The decoder 712 may be included in the electronic device 702. For example, the decoder 712 may be an HEVC decoder. The decoder 712 and one or more elements shown as included in the decoder 712 may be implemented as hardware, software, or a combination of both. The decoder 712 may receive a bitstream 714 (e.g., one or more coded pictures included in the bitstream 714) for decoding. In some configurations, the received bitstream 714 may include received overhead information, such as a received slice header, a received PPS, received buffer description information, etc. The coded pictures included in the bitstream 714 may include one or more coded reference pictures and/or one or more other coded pictures. In some configurations, the bitstream 714 may include, or be accompanied by, one or more explicit leading picture indicators or lack thereof.

In one configuration, the decoder 712 includes a leading picture determination module 720. In some configurations, the electronic device 702 receives the bitstream 714 and sends the bitstream 714 through the leading picture determination module 720. The leading picture determination module 720 can be part of the decoder 712 or other components on the electronic device 702.

The leading picture determination module 720 may include a variety of modules or submodules for determining whether a leading picture exists based on whether the bitstream 714 includes an explicit leading picture indicator. For example, the leading picture determination module 720 may include an SPS module 726a, a PPS module 726b, an APS module 726c, a slice header module 726d, a NALU module 726e, or other modules for determining whether the leading picture indicator is accompanied by or included in the bitstream 714. In some configurations, the leading picture determination module 720 may receive the bitstream 714 before the bitstream 714 passes through a specific element of the decoder 712. One advantage of this method may include identifying whether a leading picture exists without decoding a portion or all of the bitstream 714. In some configurations, this method may prevent inefficient operation, for example, decoding a leading picture when the leading picture can be scheduled to be discarded.

In some configurations, each module or submodule 726 can determine whether a leading picture exists based on multiple types of indicators. For example, the SPS module 726a can determine whether a flag or indicator associated with the SPS exists in the bitstream 714. The PPS module 726b can determine whether a flag or indicator associated with the PPS exists in the bitstream 714. The APS module 726c can determine whether a flag or indicator associated with the APS exists in the bitstream 714. The slice header module 726d can determine whether a flag or indicator associated with a slice header of a CRA picture or other picture exists in the bitstream 714. Additionally or alternatively, the NALU module 726e can determine whether a new NALU unit type indicating the presence or absence of a leading picture exists in the bitstream 714. In one configuration, a NALU unit can be associated with a CRA picture, and the NALU module 726e can determine whether one or more leading pictures follow the CRA picture. In some configurations, the NALU module 726e may determine that one or more leading pictures are present based on NAL units associated with those leading pictures.

The received symbols (in one or more encoded pictures included in the bitstream 714 ) may be entropy decoded by an entropy decoding module 768 to produce a motion information signal 770 and quantized, scaled, and/or transformed coefficients 772 .

At the motion compensation module 774, the motion information signal 770 may be combined with a portion of the reference frame signal 798 from the frame memory 778, thereby generating an inter-frame prediction signal 782. The quantized, descaled, and/or transformed coefficients 772 may be inversely quantized, scaled, and inversely transformed by the inverse module 762, thereby generating a decoded residual signal 784. The decoded residual signal 784 may be added to the prediction signal 792 to generate a merged signal 786. The prediction signal 792 may be a signal selected from the inter-frame prediction signal 782 generated by the motion compensation module 774 or, alternatively, the intra-frame prediction signal 790 generated by the intra-frame prediction module 788. In some configurations, the signal selection may be based on (e.g., controlled by) the bitstream 714.

The intra prediction signal 790 may be predicted based on previously decoded information (e.g., in the current frame) from the merged signal 786. The merged signal 786 may also be filtered by a deblocking filter 794. The resulting filtered signal 796 may be written to the frame memory 709. The resulting filtered signal 796 may include a decoded picture.

Frame memory 778 may include overhead information corresponding to the decoded picture. For example, frame memory 778 may include slice headers, PPS information, loop parameters, buffer description information, etc. One or more of these may be signaled from an encoder (e.g., encoder 604). Frame memory 778 may provide decoded picture 718 or other output signals.

In some configurations, the decoder 712 may include a leading picture determination module 720a in communication with a frame memory 778. For example, the decoder 712 may determine whether a leading picture exists based on one or more leading picture indicators before the bitstream 714 passes through the decoder 714 or is entropy decoded, or in some cases by accessing the frame memory 778 to determine whether one or more leading picture indicators, or the absence of an indicator, are included or accompanied by the bitstream 714. One advantage of including the leading picture determination module 720 with access to the frame memory may include providing the electronic device 702a with the ability to determine whether a leading picture exists without interfering with the decoding process. In this approach, the leading picture determination module 720a may simply access the frame memory 778 without having to modify or decode one or more pictures.

8 shows various components that may be used in a transmitting electronic device 802. The transmitting electronic device 802 may be implemented as one or more of the electronic devices described herein (eg, electronic devices 102, 602, 702).

The transmitting electronic device 802 includes a processor 817 that controls the operation of the transmitting electronic device 802. The processor 817 may also be referred to as a computer processing unit (CPU). The memory 811 provides instructions 813a (e.g., executable instructions) and data 815a to the processor 817. The memory 811 may include read-only memory (ROM), random access memory (RAM), or any other type of device capable of storing information. A portion of the memory 811 may also include non-volatile random access memory (NVRAM). The memory 811 may be in electronic communication with the processor 817.

The instructions 813b and data 815b may also reside in the processor 817. The instructions 813b and/or data 815b loaded into the processor 817 may also include instructions 813a and/or data 815a from the memory 811, which are loaded for execution or processing by the processor 817. The instructions 813b may be executed by the processor 817 to implement the systems and methods disclosed herein.

The transmitting electronic device 802 may include one or more communication interfaces 819 for communicating with other electronic devices (e.g., receiving electronic devices). The communication interface 819 may be based on wired communication technology, wireless communication technology, or both. Examples of the communication interface 819 include a serial port, a parallel port, a universal serial bus (USB), an Ethernet adapter, an IEEE 1394 bus interface, a small computer system interface (SCSI) bus interface, an infrared (IR) communication port, a Bluetooth wireless communication adapter, a wireless transceiver conforming to the Third Generation Partnership Project (3GPP) specification, and the like.

The transmitting electronic device 802 may include one or more output devices 823 and one or more input devices 821. Examples of output devices 823 include speakers, printers, and the like. One type of output device that may be included in the transmitting electronic device 802 is a display device 825. The display device 825 using the configuration disclosed herein may use any suitable image projection technology, such as a cathode ray tube (CRT), a liquid crystal display (LCD), a light emitting diode (LED), gas plasma, electroluminescence, and the like. A display controller 827 may be provided for converting data stored in the memory 811 into text, graphics, and/or moving images (as appropriate) displayed on the display 825. Examples of input devices 821 include a keyboard, a mouse, a microphone, a remote control device, buttons, a joystick, a trackball, a touchpad, a touch screen, a laser pointer, and the like.

The various components of the transmitting electronic device 802 are coupled together via a bus system 829, wherein in addition to a data bus, the bus system 829 may also include a power bus, a control signal bus, and a status signal bus. However, for clarity, FIG8 illustrates the various buses as the bus system 829. The transmitting electronic device 802 shown in FIG8 is a functional block diagram rather than a list of specific components.

9 is a block diagram illustrating various components that may be utilized in a receiving electronic device 902. The receiving electronic device 902 may be implemented as one or more of the electronic devices described herein (eg, electronic devices 102, 602, 702).

The receiving electronic device 902 includes a processor 917 that controls the operation of the electronic device 902. The processor 917 may also be referred to as a CPU. The memory 911 provides instructions 913a (e.g., executable instructions) and data 915a to the processor 917. The memory 911 may include read-only memory (ROM), random access memory (RAM), or any other type of device that can store information. A portion of the memory 911 may also include non-volatile random access memory (NVRAM). The memory 911 may be in electronic communication with the processor 917.

The instructions 913b and data 915b may also reside in the processor 917. The instructions 913b and/or data 915b loaded into the processor 917 may also include instructions 913a and/or data 915a from the memory 911, which are loaded for execution or processing by the processor 917. The instructions 913b may be executed by the processor 917 to implement the systems and methods described herein.

The receiving electronic device 902 may include one or more communication interfaces 919 for communicating with other electronic devices (e.g., transmitting electronic devices). The communication interface 919 may be based on wired communication technology, wireless communication technology, or both. Examples of the communication interface 919 include a serial port, a parallel port, a universal serial bus (USB), an Ethernet adapter, an IEEE 1394 bus interface, a small computer system interface (SCSI) bus interface, an infrared (IR) communication port, a Bluetooth wireless communication adapter, a wireless transceiver that complies with the Third Generation Partnership Project (3GPP) specification, and the like.

The receiving electronic device 902 may include one or more output devices 923 and one or more input devices 921. Examples of output devices 923 include speakers, printers, and the like. One type of output device that may be included in the receiving electronic device 902 is a display device 925. The display device 925 using the configuration disclosed herein may use any suitable image projection technology, such as a cathode ray tube (CRT), a liquid crystal display (LCD), a light emitting diode (LED), gas plasma, electroluminescence, and the like. A display controller 927 may be provided for converting data stored in the memory 911 into text, graphics, and/or moving images (as appropriate) displayed on the display 925. Examples of input devices 921 include a keyboard, a mouse, a microphone, a remote control device, buttons, a joystick, a trackball, a touchpad, a touch screen, a laser pointer, and the like.

The various components of the transmitting electronic device 902 are coupled together via a bus system 929, wherein in addition to a data bus, the bus system 929 may also include a power bus, a control signal bus, and a status signal bus. However, for clarity, FIG9 illustrates the various buses as the bus system 929. The receiving electronic device 902 shown in FIG9 is a functional block diagram rather than a list of specific components.

Figure 10 is a block diagram illustrating a configuration of an electronic device 1002, in which the system and method for identifying a leading screen can be implemented. Electronic device 1002 may include an encoding device 1031 and a transmission device 1033. Encoding device 1031 and transmission device 1033 may be configured to perform one or more similar functions described above in conjunction with Figures 2, 3, 6, and other figures. Figure 8 illustrates an example of a specific device structure of Figure 10. Various other structures may be implemented to implement one or more of the functions shown in Figures 1 and 6. For example, the DSP may be implemented using software.

FIG11 is a block diagram illustrating a configuration of an electronic device 1102 in which a system and method for identifying a leading picture can be implemented. Electronic device 1102 includes a bitstream 1114, a receiver 1135, and a decoder 1137. Receiver 1135 and decoder 1137 can be configured to perform one or more similar functions described in conjunction with FIG2, FIG5, FIG7, and the other figures above. FIG9 above illustrates an example of a specific device structure for FIG11. Various other configurations can be implemented to achieve one or more of the functions of FIG1 and FIG7. For example, a DSP can be implemented using software.

FIG12 is a block diagram illustrating several devices that can implement the system and method for identifying a leading picture. In one example, electronic device A 1202, electronic device B 1202b, and processing device 1239 are shown. However, it should be noted that electronic device A 1202, electronic device B 1202b, and processing device 1239 in conjunction with FIG12 can be configured similarly to electronic device A 102a and electronic device B 102b in FIG1 . For example, electronic device A 1202a can include an encoder 1204 and a leading picture indicator module 1208. Encoder 1204 can also obtain or receive an input picture 1206. Furthermore, electronic device A 1202a can generate and transmit a bitstream 1214a similar to bitstream 114 in other figures.

In one example, bitstream 1214a can be transmitted or sent from electronic device A 1202a to processing device 1239. The processing device may include a leading picture determination module 1220. Leading picture determination module 1220, as described in conjunction with FIG12 , can perform operations similar to leading picture determination module 120 of FIG1 and may or may not be included in the decoder. Furthermore, the processing device may be an example of an electronic device described in conjunction with other figures. In one example, processing device 1239 may be a network node. In one example, processing device 1239 may determine whether any leading pictures are present in bitstream 1214a. Furthermore, processing device 1239 may perform one or more operations on bitstream 1214a. Examples of operations that processing device 1239 may perform on bitstream 1214a may include discarding a leading picture, storing data associated with bitstream 1214a, converting bitstream 1214a, and/or sending bitstream 1214b to electronic device 1202.

In one example, processing device 1239 receives bitstream 1214a, performs operations on bitstream 1214a, and sends bitstream 1214b to electronic device B 1202. Electronic device B 1202b, described in conjunction with FIG. 12 , can be configured similarly to electronic device B 102b of FIG. 1 . Electronic device B 1202b can also include a decoder 1212. Furthermore, decoder 1212 may or may not include a leading picture determination module. In one configuration, electronic device B 1202b can perform operations on bitstream 1214b to generate an output, such as a decoded picture 1218. Electronic device B 1202b can also store, display, discard, or otherwise process decoded picture 1218.

The term "computer-readable medium" refers to any available medium that can be accessed by a computer or processor. As used herein, the term "computer-readable medium" may refer to a non-transitory and tangible computer and/or processor-readable medium. For example, and not limitation, a computer-readable or processor-readable medium may include: RAM, ROM, EEPROM, CD-COM or other optical storage device, magnetic disk storage device or other magnetic storage device, or any other medium that can be used to carry or store the required program code (in the form of instructions or data structures) and can be accessed by a computer or processor. As used herein, magnetic disks and optical disks include: compact disks (CDs), laser disks, optical disks, digital versatile disks (DVDs), floppy disks and Blu-ray (registered trademark) disks, where magnetic disks typically reproduce data magnetically, while optical disks reproduce data optically with lasers.

It should be noted that one or more of the methods described herein may be implemented as hardware and/or performed using hardware. For example, one or more of the methods or solutions described herein may be implemented in and/or using a chipset, an ASIC, a large-scale integrated circuit (LSI), or an integrated circuit.

Each method disclosed herein includes one or more steps or actions for implementing the method. The method steps and/or actions may be interchanged with other steps and/or actions, and/or combined into a single step, without departing from the scope of the claims. In other words, unless a specific order of steps or actions is required for the proper operation of the method described, the order and/or use of the specific steps and/or actions may be modified without departing from the scope of the claims.

It should be understood that the claims are not limited to the specific configurations and components described above. Various modifications, variations, and changes may be made to the arrangement, operation, and details of the systems, methods, and apparatus described herein without departing from the scope of the claims.

Claims (8)

1. A method for indicating a leading picture, comprising: identifying a first picture, the first picture comprising only intra-predicted slices (I-slices) decoded using only intra-prediction, wherein the first picture occurs at a random access point; generating information indicating whether the first picture has one or more associated leading pictures, wherein the information is a network access layer (NAL) unit type associated with the first picture; and The information is sent. 2 . The method of claim 1 , wherein the associated leading picture is a picture that follows the first picture in decoding order and precedes the first picture in output order. 3. The method of claim 1, wherein the NAL unit type comprises a NAL unit type associated with a random access picture having a subsequent leading picture. 4 . The method of claim 1 , wherein the NAL unit type comprises a NAL unit type associated with a random access picture without a subsequent leading picture. 5. An encoder, comprising: means for identifying a first picture comprising only intra-predicted slices (I-slices) decoded using only intra-prediction, wherein the first picture occurs at a random access point; means for generating information indicating whether there are one or more associated leading pictures, wherein the information is a network access layer NAL unit type associated with the first picture; and means for transmitting said information. 6. The encoder of claim 5, wherein the associated leading picture is a picture that follows the first picture in decoding order and precedes the first picture in output order. 7. The encoder of claim 5, wherein the NAL unit type comprises a NAL unit type associated with a random access picture having a subsequent leading picture. 8. The encoder of claim 5, wherein the NAL unit type comprises a NAL unit type associated with a random access picture without a subsequent leading picture.