HK1134869A - Methods and apparatus for transmitting a frame structure in a wireless communication system - Google Patents

Description

Method and apparatus for transmitting frame structure in wireless communication system

Technical Field

The present disclosure relates generally to wireless communications, and more particularly, to a method and apparatus for configuring and transmitting a signal frame structure used in a wireless communication system.

Background

Orthogonal Frequency Division Multiplexing (OFDM) is a technique for broadcasting high-rate digital signals. In an OFDM system, a single high rate data stream is divided into several parallel low rate substreams, each substream being used to modulate a respective subcarrier frequency. It should be noted that although the invention is described in terms of quadrature amplitude modulation, the invention is equally applicable to phase shift keying modulation systems.

The modulation technique used in OFDM systems is called Quadrature Amplitude Modulation (QAM), in which both the phase and the amplitude of the carrier frequency are modulated. In QAM modulation, complex QAM symbols are generated from a plurality of data bits, where each symbol includes a real term and an imaginary term and each symbol represents the plurality of data bits from which it was generated. Multiple QAM bits are transmitted together in a pattern that can be graphically represented by a complex plane. Typically, this pattern is referred to as a "constellation". By using QAM modulation, the OFDM system can improve its own efficiency.

When a signal is broadcast, it may travel through more than one path to the receiver. For example, a signal from a single transmitter may travel along a straight line to a receiver, and may also be reflected by a physical object to travel along a different path to the receiver. Furthermore, when the system uses so-called "cellular" broadcast techniques to increase spectral efficiency, signals intended for a receiver may be broadcast by more than one transmitter. Thus, the same signal will be transmitted to the receiver along more than one path. This parallel propagation of signals, whether artificial (i.e., caused by broadcasting the same signal from more than one transmitter) or natural (i.e., caused by echoes), is referred to as "multipath. It will be appreciated that while cellular digital broadcasting is spectrally efficient, provisions must be made to effectively handle multipath considerations.

Fortunately, OFDM systems using QAM modulation are more efficient than QAM modulation techniques that use only a single carrier frequency in the presence of multipath conditions (which, as noted above, necessarily occur when using cellular broadcast techniques). More particularly, in a single carrier QAM system, a complex equalizer must be used in order to equalize a channel having an echo as strong as a main path, and the equalization is difficult to perform. In contrast, in an OFDM system, the need for a complex equalizer can be completely eliminated simply by inserting a guard interval of appropriate length at the beginning of each symbol. Therefore, when multipath conditions are expected, OFDM systems using QAM modulation are preferred.

In a typical trellis coding scheme, a data stream is encoded with a convolutional encoder and then successive bits are combined into groups of bits that become QAM symbols. A number of bits in a group, where the number of bits per group is defined by the integer "m" (hence, each group is referred to as having an "m-ary" dimension). Typically, the value of "m" is 4, 5, 6, or 7, although the value of "m" may be greater or smaller.

After the bits are grouped into multi-bit symbols, the symbols are interleaved. By "interleaving" is meant that the symbol stream is rearranged in order so that possible errors due to channel fading can be randomized. For the sake of illustration, it is assumed that 5 codewords are to be transmitted. It is assumed that temporary channel interference occurs during the transmission of the non-interleaved signal. In these cases, the entire codeword may be lost before the channel interference is reduced, and it will be difficult or even impossible to know what information the lost codeword is to convey.

Conversely, if the letters of the 5 codewords are rearranged in order (i.e., "interleaved") prior to transmission and channel interference occurs, several letters may be lost, perhaps one letter per codeword. However, once the rearranged letters are decoded, all 5 codewords will appear although some letters are lost for some codewords. Clearly, in these cases it will be relatively easy for a digital decoder to recover the data substantially comprehensively. After interleaving the m-ary symbols, the symbols are mapped to complex symbols using the QAM principles described above, multiplexed into their respective subcarrier channels, and transmitted.

Disclosure of Invention

According to an aspect of the disclosure, a method for transmitting a wireless communication signal frame is disclosed. The method comprises the following steps: transmitting first pilot symbols in a signal frame, the first symbols being used to convey at least timing information; transmitting second pilot symbols for transmitting first information including network identification information on the first network; at least first overhead information is transmitted with respect to the first network. The method further comprises the following steps: transmitting a third pilot symbol after transmitting the second pilot symbol and overhead information on the first network, the third pilot symbol for transmitting second information including network identification information on the second network.

According to another aspect of the present disclosure, a method for transmitting a wireless communication signal frame includes: first pilot symbols are transmitted for conveying first information, the first information including network identification information regarding a first network. The disclosed method further comprises: transmitting at least first overhead information regarding the first network; transmitting a second pilot symbol after transmitting the first pilot symbol and overhead information about the first network, the second pilot symbol for transmitting second information including network identification information about a second network; and transmitting a first converted channel after transmitting the second pilot symbols, the first converted channel not containing data that needs to be processed by the receiver.

According to yet another aspect of the disclosure, a processor for use in a transmitter is disclosed. The processor is configured to: transmitting first pilot symbols in a signal frame, the first symbols being used to convey at least timing information; transmitting second pilot symbols for transmitting first information including network identification information on the first network; transmitting at least first overhead information regarding the first network; transmitting a third pilot symbol after transmitting the second pilot symbol and overhead information about the first network, the third pilot symbol for transmitting second information including network identification information about a second network.

According to yet another aspect of the disclosure, a processor for use in a transmitter is disclosed that includes means for transmitting a first pilot symbol in a signal frame, the first symbol for conveying at least timing information. The processor further includes: means for transmitting second pilot symbols for transmitting first information including network identification information about a first network; means for transmitting at least first overhead information regarding the first network; and means for transmitting a third pilot symbol after transmitting the second pilot symbol and overhead information regarding the first network, the third pilot symbol for transmitting second information including network identification information regarding a second network.

In accordance with another aspect of the disclosure, a computer-readable medium encoded with a set of instructions is disclosed. The instructions include instructions for transmitting a first pilot symbol in a signal frame, the first symbol for conveying at least timing information. Further included are instructions for transmitting second pilot symbols for communicating first information including network identification information about the first network. The instructions also include instructions for transmitting at least first overhead information regarding the first network; and instructions for transmitting a third pilot symbol after transmitting the second pilot symbol and overhead information about the first network, the third pilot symbol for transmitting second information including network identification information about a second network.

Drawings

Fig. 1a shows a channel interleaver according to one embodiment.

Fig. 1b shows a channel interleaver according to another embodiment.

Figure 2a illustrates code bits of a turbo packet placed into an interleaving buffer according to one embodiment.

Fig. 2b shows an interleaving buffer according to an embodiment, arranged in a matrix of N/m rows and m columns.

Fig. 3 illustrates an interleaving interlace table according to one embodiment.

Fig. 4 illustrates a channelization diagram in accordance with one embodiment.

Fig. 5 shows a channelization diagram with all 1 shifted sequences, where all 1 shifted sequences result in long term good and bad channel estimates for a particular slot, according to one embodiment.

Fig. 6 shows a channelization diagram with full 2-shifted sequences, where the full 2-shifted sequences result in uniformly distributed good and bad channel estimation interlaces.

Fig. 7 illustrates a wireless device for implementing interleaving according to one embodiment.

Fig. 8 shows a block diagram of an exemplary frame check sequence calculation for a physical layer packet.

Fig. 9 shows a time duration diagram of an exemplary OFDM symbol.

Fig. 10 shows the structure of an exemplary superframe and a channel structure.

Fig. 11 shows a block diagram of an exemplary TDM pilot 1 packet in a transmitter.

Fig. 12 shows an exemplary PN sequence generator for modulating TDM pilot 1 subcarriers.

Fig. 13 shows an exemplary signal constellation for QPSK modulation.

Fig. 14 shows a block diagram illustrating fixed pattern processing of unallocated slot/reserved OFDM symbols in TDM pilot 2/WIC/LIC/FDM pilot/TPC/data channels in a transmitter.

Fig. 15 is an example of time slot allocation in a wide area identification channel.

Fig. 16 shows an exemplary slot bit scrambler.

Fig. 17 shows a block diagram of an exemplary LIC time slot allocation.

Fig. 18 shows a block diagram of an exemplary TDM pilot 2 time slot assignment.

Fig. 19 shows a block diagram for explaining OIS physical layer packet processing in a transmitter.

Fig. 20 shows a block diagram of an exemplary wide/local area OIS channel encoder.

FIG. 21 shows a block diagram of an exemplary Turbo encoder architecture.

FIG. 22 shows a block diagram of a process for computing Turbo interleaver output addresses.

Fig. 23 shows a block diagram of an example bit interleaver operation example with N-20.

FIG. 24 shows a block diagram of a wide-area OIS channel Turbo coded packet mapped to a data slot buffer.

Figure 25 shows the mapping of a local OIS Turbo coded packet to a data slot buffer.

Fig. 26 shows a block diagram illustrating a process in a transmitter for processing a data channel physical layer packet.

Fig. 27 shows a block diagram of an exemplary data channel encoder.

Fig. 28 shows an example of interleaving base and enhancement component bits for filling the slot buffer for layered modulation.

FIG. 29 shows a data channel Turbo encoded packet occupying a 3 data slot buffer.

FIG. 30 shows an example of multiplexing base and enhancement component Turbo coded packets occupying a 3 data slot buffer.

FIG. 31 shows an example of a data channel Turbo encoded packet occupying a 3 data slot buffer.

Fig. 32 shows an example of slot allocation for a plurality of MLCs over 3 consecutive OFDM symbols in a frame.

Fig. 33 shows an exemplary signal constellation for 16-QAM modulation.

Fig. 34 shows an exemplary signal constellation for layered modulation.

Fig. 35 shows a interlace assignment diagram for FDM pilots.

Fig. 36 shows a staggered allocation map of slots.

Fig. 37 shows a block diagram of an exemplary OFDM common operation.

Fig. 38 shows a diagram illustrating the overlap of windowed OFDM symbols according to an example. Fig. 33 shows an exemplary signal constellation for 16-QAM modulation.

Fig. 39 shows another example of a superframe structure including symbols TDM1, TDM2, and TDM 3.

Fig. 40 is a flow diagram of an exemplary method for ordering and transmitting the superframes shown in fig. 39.

Fig. 41 is an exemplary transmitter or processor for use in a transmitter for assembling and transmitting the superframe of fig. 39.

Fig. 42 illustrates another example of a transmitter or a processor for use in a transmitter for transmitting the superframe illustrated in fig. 39 according to the present disclosure.

Detailed Description

In an embodiment, the channel interleaver comprises a bit interleaver and a symbol interleaver. Fig. 1 shows two types of channel interleaving schemes. Both schemes use bit interleaving and interleaving to achieve maximum channel diversity.

Fig. 1a shows a channel interleaver according to one embodiment. Fig. 1b shows a channel interleaver according to another embodiment. The interleaver of fig. 1b uses only a bit interleaver to achieve m-ary modulation diversity and a two-dimensional interleaving table and run-time slot-interleaving mapping to achieve frequency diversity that provides better interleaving performance without explicit symbol interleaving.

FIG. 1a shows Turbo code bits 102 input to a bit interleaving block 104. The bit interleaving block 104 outputs interleaved bits, which are input to the constellation symbol mapping block 106. The constellation symbol mapping block 106 outputs constellation symbol mapping bits, which are input to a constellation symbol interleaving block 108. The constellation symbol interleaving block 108 outputs constellation symbol interleaved bits to the channelization block 110. Channelization block 110 interleaves the constellation symbol interleaved bits using interleaving table 112 and outputs OFDM symbols 114.

FIG. 1b shows Turbo code bits 152 input to bit interleaving block 154. The bit interleaving block 154 outputs interleaved bits, which are input to the constellation symbol mapping block 156. The constellation symbol mapping block 156 outputs constellation symbol mapping bits, which are input to the channelization block 158. Channelization block 158 channelizes the constellation symbol interleaved bits using an interleaved interlace table and a dynamic slot-to-interlace mapping 160 and outputs OFDM symbols 162.

Bit interleaving for modulation diversity

The interleaver of fig. 1b uses bit interleaving 154 to achieve modulation diversity. The code bits 152 of the turbo packet are interleaved in a pattern that maps adjacent code bits into different constellation symbols. For example, for 2m-Ary modulation, the N-bit interleaving buffer is partitioned into N/m blocks. As shown in fig. 2a (top), adjacent code bits are written into adjacent blocks in sequence and subsequently read out one after the other from the beginning to the end of the buffer in sequence. This ensures that adjacent code bits are mapped to different constellation symbols. Also, as shown in FIG. 2b (bottom), the interleaver buffers are arranged in a matrix of N/m rows and m columns. The code bits are loaded into the buffer column by column and read out row by row. Since for 16QAM depending mapping some bits of the constellation symbol are more reliable than others, e.g. the first and third bits are more reliable than the second and fourth bits, to avoid mapping adjacent code bits to the same bit position of the constellation symbol, rows should be read out from left to right and alternatively from right to left.

Fig. 2a shows code bits 202 of a turbo packet being placed into an interleaving buffer 204 according to one embodiment. Fig. 2b is a diagram of a bit interleaving operation according to one embodiment. As shown in fig. 2b, code bits 250 of a Turbo packet are placed into an interleaving buffer 252. According to one embodiment, the interleave buffer 252 is transformed by swapping the second and third columns to create an interleave buffer 254, where m-4. Interleaved code bits 256 of the Turbo packet are read from the interleaving buffer 254.

For simplicity, a fixed m-4 may be used if the highest modulation level is 16 and if the code bit length is always divided by 4. In this case, to improve the separation of QPSK, the middle two columns are swapped before being read out. This process is depicted in fig. 2b (bottom). It will be apparent to those skilled in the art that any two columns may be swapped. It will also be apparent to those skilled in the art that the columns may be placed in any order. It will also be apparent to those skilled in the art that the rows may be placed in any order.

In another embodiment, as a first step, the code bits 202 of a turbo packet are distributed into a plurality of groups. Note that the embodiments of fig. 2a and 2b also both distribute the code bits in multiple groups. However, rather than simply swapping rows or columns, the code bits within each group may be shuffled according to the group bit order for each given group. Thus, after distributing 16 code bits into 4 groups, the order of the groups may be {1, 5, 9, 13}, {2, 6, 10, 14}, {3, 7, 11, 15}, {4, 8, 12, 16}, and after shuffling, the order of the four groups of 16 code bits may be {13, 9, 5, 1}, {2, 10, 6, 14}, {11, 7, 15, 3}, {12, 8, 4, 16}, using a simple linear ordering of the groups. Note that the swap row or column is a regression case for the shuffles within the group.

Interleaved interleaving for frequency diversity

According to an embodiment, the channel interleaver uses interleaving for constellation symbol interleaving in order to achieve frequency diversity. This eliminates the need for explicit constellation symbol interleaving. Interleaving is performed on two levels:

interleaving within an interlace or interleaving within an interlace: in an embodiment, interleaved 500 subcarriers are interleaved in a bit reversed fashion;

interleaving between interlaces or inter-interlace interleaving: in an embodiment, the 8 interlaces are interleaved in a bit reversed fashion.

It is apparent to those skilled in the art that the number of subcarriers may be other than 500. It will also be apparent to those skilled in the art that the number of interlaces may be other than 8.

Note that since 500 is not a power of 2, a reduced set bit inversion operation should be used according to an embodiment. The following code illustrates this operation:

vector<int>reducedSetBitRev(int n)

{

int m＝exponent(n)；

vector<int>y(n)；

for(int i＝0，j＝0；i＜n；i++，j++)

{

int k；

for(；(k＝bitRev(j，m))＞＝n；j++)；

y[i]＝k；

}

return y；

}

wherein n is 500 and m is such that 2^mThe smallest integer 8 > n, and bitRev is a conventional bit inversion operation.

According to an embodiment, a plurality of symbols of a constellation symbol sequence of a data channel are mapped into corresponding sub-carriers in a sequential linear fashion according to assigned slot indices determined by a channelizer using an interleaving table as described in fig. 3.

Fig. 3 illustrates an interleaving table according to one embodiment. A Turbo packet 302, constellation symbols 304, and an interleaved interlace table 306 are shown. Also shown are interlace 3(308), interlace 4(310), interlace 2(312), interlace 6(314), interlace 1(316), interlace 5(318), interlace 3(320), and interlace 7 (322).

In one embodiment, one of 8 interlaces is used for pilot, i.e., interlace 2 and interlace 6 are used alternately for pilot. As a result, the channelizer can use 7 interlaces for scheduling. For convenience, the channelizer uses a time slot as a scheduling unit. One slot is defined as one interlace of an OFDM symbol. The slot is mapped to a particular interlace using an interlace table. Since 8 interlaces are used, there are 8 slots. Leaving 7 slots for channelization and 1 slot for pilot. Without loss of generality, as shown in fig. 4, slot 0 is used for pilot and slots 1 through 7 are used for channelization, in fig. 4, the vertical axis is slot index 402, the horizontal axis is OFDM symbol index 404, and the bold-faced entries are interlace indices allocated to the respective slots in OFDM symbol time.

Fig. 4 illustrates a channelization diagram in accordance with one embodiment. Fig. 4 shows a slot index 406 reserved for the scheduler and a slot index 408 reserved for the pilot. The bold entries are interlace index numbers. The numbers with boxes are interlaces that are adjacent to the pilot and therefore have good channel estimates.

The number surrounded by the box is the interlace which is adjacent to the pilot and therefore has a good channel estimate. Since the scheduler always allocates a block of contiguous slots and OFDM symbols to the data channel, it is apparent that the contiguous slots allocated to the data channel will be mapped to non-contiguous interlaces due to the inter-interlace interleaving. Thus, more frequency diversity gain can be achieved.

However, such static allocation (i.e., the mapping table of slots to physical interlaces does not change over time, where the scheduler slot table does not include pilot slots) does suffer from a problem. That is, if a data channel assignment block (which is assumed to be rectangular) occupies multiple OFDM symbols, the interlaces assigned to the data channel do not change over time, which results in a loss of frequency diversity. The remedy is to simply cyclically shift the scheduler interlace table (i.e., in addition to the pilot interlaces) as the OFDM symbols change.

Fig. 5 depicts the operation of shifting the scheduler interlace table once per OFDM symbol. This scheme successfully solves the static interlace assignment problem, i.e. mapping a particular slot to different interlaces at different OFDM symbol times.

Fig. 5 illustrates a channelization diagram in accordance with one embodiment, where an all 1 shifted sequence results in long term good and bad channel estimates for a particular slot 502. Fig. 5 shows a slot index 506 reserved for the scheduler and a slot index 508 reserved for the pilot. The slot symbol index 504 is shown on the horizontal axis.

Note, however, that the slot is allocated four consecutive interlaces with good channel estimates followed by a long-term interlace with poor channel estimates, as compared to the preferred pattern of short-term interlaces with good channel estimates and short-term interlaces with poor channel estimates. In the figure, interlaces adjacent to the pilot interlace are marked with boxes. A solution to the long-term good and bad channel estimation problem is to use shifted sequences other than all 1 shifted sequences. There are many sequences that can be used to accomplish this task. The simplest sequence is a full 2-shift sequence, i.e., the scheduler interlace table is shifted twice per OFDM symbol instead of once. The result of the significant improvement of the channelizer interleaving mode is shown in fig. 6. Note that this pattern repeats every 2 x 7-14 OFDM symbols, where 2 is the pilot interlace sequence period and 7 is the channelizer interlace shift period.

To simplify operation at the transmitter and receiver, a simple formula can be used to determine the mapping from slot to interlace at a given OFDM symbol time:

wherein:

N-I-1 is the number of interlaces used for traffic data scheduling, where I is the total number of interlaces;

in addition to the pilot interlace, I ∈ {0, 1, … I-1} is the interlace index to which slot s is mapped on OFDM symbol t;

t-0, 1, T-1 is an OFDM symbol index within a superframe, where T is a frame¹Total number of OFDM symbols within;

s-1 is a slot index, where S is the total number of slots;

r is the number of shifts per OFDM symbol;

is a reduced set bit reversal operator. That is, the interlaces used for the pilots will be excluded from the bit reversal operation.

Example (c): in one embodiment, I-8 and R-2. The corresponding slot-to-interlace mapping formula becomes:

wherein the content of the first and second substances,corresponding to the following table:

or 6

The table may be generated by the following code:

int reducedSetBitRev(int x，int exclude，int n)

{

¹since in the current design the number of OFDM symbols within a frame is not evenly divisible by 14, the OFDM symbol index within a superframe (rather than a frame) provides additional diversity for the frame

int m＝exponent(n)；

int y；

for(int i＝0；j＝0；i＜＝x；i++，j++)

{

for(；(y＝bitRev(j，m))＝＝exclude；j++)；

}

return y；

}

Where m is 3 and bitRev is a conventional bit inversion operation.

For OFDM symbol t 11, the pilot uses interlace 6. The mapping between slots and interlaces becomes:

slot 1 mapping to interlace

Slot 2 mapping to interlace

Slot 3 mapping to interlace

Slot 4 mapping to interlace

Slot 5 mapping to interlace

Slot 6 mapping to interlace

Slot 7 mapping to interlace

The resulting mapping is consistent with the mapping in fig. 6. Fig. 6 shows a channelization diagram in which a full 2-shift sequence results in uniformly distributed good and bad channel estimate interlaces.

According to one embodiment, the interleaver has the following features:

the bit interleaver is designed to exploit m-Ary modulation diversity by interleaving multiple code bits into different modulation symbols;

"symbol interleaving" is designed to achieve frequency diversity by intra-and inter-interleaving;

additional frequency diversity gain and channel estimation gain are achieved by changing the slot-to-interlace mapping table as the OFDM symbols change. A simple sequence of rotations is proposed to achieve this goal.

Fig. 7 illustrates a wireless device for implementing interleaving according to one embodiment. Wireless device 702 includes antenna 704, duplexer 706, receiver 708, transmitter 710, processor 712, and memory 714. According to one embodiment, the processor 712 is capable of performing interleaving. The processor 712 uses the memory 714 for buffering or data structures in order to perform its operations.

The following description includes details of further embodiments.

The transmission unit of the physical layer is a physical layer packet. The length of one physical layer packet is 1000 bits. One physical layer packet carries one MAC layer packet.

Physical layer packet format

The physical layer packet should use the following format:

field(s)	Length (bit)
		MAC layer grouping	976
FCS	16
		Reserved	2
TAIL	6

Wherein the MAC layer packet refers to a MAC layer packet from an OIS, data or control channel MAC protocol; FCS is a frame check sequence; reserved is a Reserved bit, the FLO network sets this field to 0 and the FLO device will ignore this field; and TAIL refers to the encoder TAIL bit, which is set to all '0's.

The following table illustrates the format of the physical layer packet:

bit transmission order

Each field of the physical layer packet will be transmitted sequentially such that the Most Significant Bit (MSB) is transmitted first and the Least Significant Bit (LSB) is transmitted last. In the figures herein, the MSB is the leftmost bit.

Calculation of FCS bits

The FCS calculation described herein is used to calculate the FCS field in the physical layer packet.

FCS is the CRC calculated using the standard CRC-CCITT generator polynomial:

g(x)＝x¹⁶+x¹²+x⁵+1

FCS is equal to a value calculated according to the following steps shown in fig. 8.

All shift register elements are initialized to '1'. Note that initializing the register to 1 causes the CRC of all 0 data to become non-0.

The position of the switch is set to up.

The registers are synchronized (clocked) once for each bit of the physical layer packet, except for the FCS, reserved, and tail bits. The physical layer packet should be read from the MSB to the LSB.

The position of the switches is set to down so that the output is modulo-2 addition with one '0' and the successive shift register inputs are '0'.

The registers are additionally synchronized 16 times for 16 FCS bits.

The output bits constitute all physical layer packet fields except the reserved field and the trailer field.

FLO network requirements

This section discussed next defines requirements specific to FLO network devices and operations.

Transmitter and receiver

The following requirements apply to FLO network transmitters. The transmitter operates on one of 8 6MHz wide frequency bands, but may also support transmission bandwidths of 5, 7 and 8 MHz. Each 6MHz wide transmit band allocation is referred to as a FLO RF channel. Each FLO RF channel is denoted by an index j e {1, 2, … 8). For each FLO RF channel index, the transmit band and band center frequency are specified as in table 1 below.

FLO RF channel number j	FLO Transmission frequency band (MHz)	Center frequency f of frequency bandC(MHz)
			1	698-704	701
2	704-710	707
			3	710-716	713
4	716-722	719
			5	722-728	725
6	728-734	731
			7	734-740	737
8	740-746	743

Table 1: FLO RF channel number and Transmit band frequency

The maximum frequency difference between the actual transmit carrier frequency and the prescribed transmit frequency should be less than 2 x 10 of the band center frequency in table 1^-9。

Note that the in-band spectral characteristics and the out-of-band spectral mask will be determined.

The power output characteristics are such that the transmission ERP should be below 46.98dBW, which corresponds to 50 kW.

OFDM modulation characteristics

The modulation used on the airlink is Orthogonal Frequency Division Multiplexing (OFDM). The minimum transmission interval corresponds to one OFDM symbol period. An OFDM transmit symbol consists of many individually modulated subcarriers. The FLO system uses 4096 sub-carriers, numbered 0 to 4095. The subcarriers are divided into two independent groups.

The first group of subcarriers is guard subcarriers among the available 4096 subcarriers, 96 unused. These unused subcarriers are referred to as guard subcarriers. No energy is transmitted on the guard subcarriers. Subcarriers numbered 0 to 47, 2048, and 4049 to 4095 are used as guard subcarriers.

The second group is active subcarriers. The active subcarriers are a set of 4000 subcarriers with indices k e {48.. 2047, 2049.. 4048 }. Each active subcarrier will carry one modulation symbol.

With respect to the subcarrier spacing in the FLO system, 4096 subcarriers span a 5.55MHz bandwidth in the center of a 6MHz FLO RF channel. The following equation gives the subcarrier spacing (Δ f)_SC：

With respect to subcarrier frequency, frequency f of subcarrier indexed i in the kth FLO RF channel (see Table 1 above)_SC(k, i) is calculated according to the following equation:

f_SC(k，i)＝f_C(k)+(i-2048)×(Δf)_SC

wherein f is_C(k) Is the center frequency of the kth FLO RF channel, and (Δ f)_SCIs the subcarrier spacing.

Subcarrier interleaving

The active subcarriers are subdivided into 8 interlaces indexed from 0 to 7. Each interlace consists of 500 subcarriers. In frequency, the subcarriers in one interlace are [8 × (Δ f)_SC]Hz apart (except for interlace 0, where the two subcarriers in the middle of the interlace are 16 × (Δ f)_SCSpaced apart because the subcarrier with index 2048 is unused, where (Δ f)_SCIs the subcarrier spacing.

The subcarriers in each interlace span the FLO RF channel bandwidth of 5.55 MHz. The active sub-carrier with index I is allocated to interlace I_jWhere j ═ i mod 8. The subcarrier indexes in each interlace are sequentially arranged in ascending order. The subcarrier numbers in one interlace are in the range of 0, 1.. 499.

Frame and channel structure

The transmitted signals are grouped into superframes. Each superframe has a duration T of 1s_SFAnd consists of 1200 OFDM symbols. The OFDM symbols in a superframe are numbered 0-1199. OFDM symbol interval T_sIs 833.33. An OFDM symbol consists of a number of time-domain baseband samples called OFDM chips. At 5.55X 10 per second⁶The rate at which the chips are transmitted.

As shown in fig. 9, the total OFDM symbol interval T_s' includes four parts: a duration of T_UA useful part of duration T_FGIAnd a flat guard interval of duration T on both sides_WGISpaced apart by two windows. With T between successive OFDM symbols_WGISee fig. 9.

The effective OFDM symbol interval is T_s＝T_WGI+T_FGI+T_U，

Wherein the content of the first and second substances,

total symbol duration is T 'in FIG. 9'_s＝T_s+T_WGI。

The effective OFDM symbol duration is hereinafter referred to as an OFDM symbol interval. During one OFDM symbol interval, one modulation symbol is carried on each active subcarrier.

FLO physical layer channels are TDM pilot channels, FDM pilot channels, OIS channels and data channels. The TDM pilot channel, OIS channel and data channel are time division multiplexed over a super-frame. As shown in fig. 10, the FDM pilot channel is frequency division multiplexed with the OIS channel and the data signal over a super frame.

The TDM pilot channel is composed of a TDM pilot 1 channel, a wide area identification channel (WIC), a local area identification channel (LIC), a TDM pilot 2 channel, a Transition Pilot Channel (TPC), and a Positioning Pilot Channel (PPC). The TDM pilot-1 channel, WIC, LIC, and TDM pilot-2 channel each span one OFDM symbol and occur at the beginning of one superframe. The Transition Pilot Channel (TPC) across one OFDM symbol precedes and follows each wide and local area data or OIS channel transmission. The TPC on the side of the wide-area channel (wide-area OIS or wide-area data) is referred to as a wide-area transition pilot channel (WTPC). The TPC on the side of the local channel (local OIS or local data channel) is called the Local Transition Pilot Channel (LTPC). In a superframe, the WTPC and LTPC each occupy 10 OFDM symbols, and together occupy 20 OFDM symbols. The PPC has a variable duration and its status (presence or absence and duration) may be signaled on the OIS channel. When present, it spans 6, 10, or 14 OFDM symbols at the end of the superframe. When PPC is not present, two OFDM symbols are reserved at the end of the superframe.

The OIS channel occupies 10 OFDM symbols in one super-frame and immediately follows the first WTPC OFDM symbol in one super-frame. The OIS channel consists of a wide area OIS channel and a local area OIS channel. The wide-area OIS channel and the local-area OIS channel each have a duration of 5 OFDM symbols and are separated by two TPC OFDM symbols.

The FDM pilot channel spans 1174, 1170, 1166, or 1162 OFDM. These values correspond to 2 reserved OFDM symbols or 6, 10 and 14 PPC OFDM symbols respectively present in each superframe symbol in one superframe. It should be noted that these values correspond to 2 reserved OFDM symbols or 6, 10 and 14 PPC OFDM symbols respectively present in each superframe. The FDM pilot channel is frequency division multiplexed with the wide and local OIS and data channels.

The data channel spans 1164, 1160, 1156 or 1152 OFDM symbols. It should be noted that these values correspond to 2 reserved OFDM symbols or 6, 10 and 14 PPC OFDM symbols respectively present in each superframe. The data channel transmission plus the 16 TPC OFDM symbol transmissions immediately preceding or following each data channel transmission are divided into 4 frames.

Setting frame parameters, wherein P is the number of OFDM symbols in the PPC or the number of OFDM symbols reserved when the PPC is not present in the superframe, W is the number of OFDM symbols associated with the wide area data channel in a frame, L is the number of OFDM symbols associated with the local area data channel in a frame, and F is the number of OFDM symbols in a frame. These frame parameters are then related by the following system of equations:

F＝W+L+4

fig. 10 shows the superframe and channel structure in terms of P, W and L. When PPC is not present, each frame spans 295 OFDM symbols and has a duration T of 245.8333ms_F. Note that there are two reserved OFDM symbols at the end of each superframe. When a PPC is present at the end of a superframe, each frame spans a variable number of OFDM symbols as specified in table 3 below.

Number of PPC OFDM symbols	Frame duration (F) in OFDM symbols	Frame duration in ms
			6	294	245
10	293	244.166...
			14	292	243.333...

TABLE 3 frame duration for different PPC OFDM symbol numbers

The data channels during each frame will be time division multiplexed between the local area data channel and the wide area data channel. The portion of the frame allocated to wide area data isAnd it ranges from 0 to 100%.

The physical layer packets transmitted on the OIS channel are referred to as OIS packets and the physical layer packets transmitted on the data channel are referred to as data packets.

Stream component and layered modulation

Audio or video content associated with a stream multicast on a FLO network can be sent in two components, a base (B) component that can be widely received and an enhancement (E) component that improves the audio-visual experience provided by the base component over a more limited coverage area.

The base and enhancement component physical layer packets are mapped together to modulation symbols. This FLO characteristic is known as layered modulation.

MediaFLO logical channel

The data packets transmitted by the physical layer are associated with one or more virtual channels known as MediaFLO Logical Channels (MLCs). MLCs are decodable components of FLO services that FLO devices are interested in receiving autonomously. Services may be sent over multiple MLCs. However, the base and enhancement components of the audio or video stream associated with the service must be sent in a single MLC.

FLO transmission mode

The combination of modulation type and internal code rate is called "transmission mode". The FLO system supports the 12 transmission modes listed in table 4 below.

In a FLO network, the transmission mode is fixed when MLCs are instantiated and changes are rare. This restriction is imposed in order to maintain a constant coverage for each MLC.

Mode number	Modulation	Turbo code rate
			0	QPSK	1/3
1	QPSK	1/2
			2	16-QAM	1/3
3	16-QAM	1/2
			4	16-QAM	2/3
52	QPSK	1/5
			6	Hierarchical modulation with energy ratio of 4	1/3
7	Hierarchical modulation with energy ratio of 4	1/2
			8	Hierarchical modulation with energy ratio of 4	2/3
9	Hierarchical modulation with energy ratio of 6.25	1/3
			10	Hierarchical modulation with energy ratio of 6.25	1/2
11	Hierarchical modulation with energy ratio of 6.25	2/3

TABLE 4FLO transmission mode

FLO time slot

In a FLO network, the minimum bandwidth unit allocated to an MLC over one OFDM symbol corresponds to a group of 500 modulation symbols. The set of 500 modulation symbols is referred to as a slot. The scheduler function (in the MAC layer) allocates time slots to MLCs during the data portion of the superframe. When the scheduler function allocates transmission bandwidth to the MLC in an OFDM symbol, it allocates in units of integer number of slots.

During each OFDM symbol there are 8 time slots in addition to the TDM pilot 1 channel in the super frame. These time slots are numbered from 0 to 7. The WIC and LIC channels each occupy one time slot. The TDM pilot-2 channel occupies 4 time slots. TPC (wide area and local area) occupies all 8 slots. FDM pilot channel

²This approach is only used for OIS channels

1 slot with index 0 is occupied and the OIS/data channel may occupy up to 7 slots with indices 1 through 7. Each slot will be transmitted with one interlace. The mapping of slots to interlaces differs from OFDM symbol to OFDM symbol, as will be described in more detail below.

FLO data rate

In the FLO system, the data rate is computationally complex since different MLCs may use different approaches. The calculation of the data rate is simplified by assuming that all MLCs use the same transmission scheme. Table 5 below gives the physical layer data rates for the different transmission modes assuming all 7 slots are used.

Emission mode	Time slot of each physical layer packet	Physical layer data rate (Mbps)
			0	3	2.8
1	2	4.2
			2	3/2	5.6
3	1	8.4
			4	3/4	11.2
5	5	1.68
			6	3	5.6
7	2	8.4
			8	3/2	11.2
9	3	5.6
			10	2	8.4
11	3/2	11.2

TABLE 5FLO Transmission scheme and physical layer data Rate

Note that the overhead due to the TDM pilot channel and the outer code is not subtracted from the values in the column "physical layer data rate" in table 5 above. This is the rate at which data is transmitted during the data channel. From modes 6 through 11, the provided rate is the combined rate of the two components. The rate of each component is half of this value.

FLO physical layer channel

The FLO physical layer consists of the following subchannels: a TDM pilot channel; a wide-area OIS channel; a local OIS channel; a wide area FDM pilot channel; a local FDM pilot channel; a wide area data channel; and local data channel

TDM pilot channel

The TDM pilot channel consists of the following partial channels: a TDM pilot 1 channel; a wide area identification channel (WIC); local area identification channel (LIC); and a TDM pilot-2 channel; the Transition Pilot Channel (TPC).

TDM pilot 1 channel

The TDM pilot 1 channel spans one OFDM symbol. The channel is transmitted at OFDM symbol index 0 in the superframe. It informs of the start of a new superframe. FLO devices can use it to determine coarse OFDM symbol timing, superframe boundaries, and carrier frequency offset.

TDM pilot 1 is generated in the transmitter using the steps shown in fig. 11.

TDM pilot 1 sub-carrier

The TDM pilot 1OFDM symbol includes 124 non-0 subcarriers evenly spaced among the active subcarriers in the frequency domain. The ith TDM pilot 1 subcarrier corresponds to a subcarrier index j defined as:

note that the TDM pilot 1 channel does not use the 2048 index subcarriers.

TDM pilot 1 fixed information pattern

The TDM pilot 1 sub-carriers are modulated in a fixed information pattern. Using a generating sequence h (D) ═ D²⁰+D¹⁷+1, 20-tap Linear Feedback Shift Register (LFSR) with initial state '11110000100000000000', to generate this pattern. Each output bit will be obtained as follows: if the LFSR state is vector [ s ]₂₀s₁₉s₁₈s₁₇s₁₆s₁₅s₁₄s₁₃s₁₂s₁₁s₁₀s₉s₈s₇s₆s₅s₄s₃s₂s₁]Then the output bit will beWherein the content of the first and second substances,a modulo-2 addition is shown, which corresponds to the mask associated with slot 1 (see table 6, below). The structure of the LFSR is shown in fig. 12.

The fixed information pattern will correspond to the first 248 output bits. The first 35 bits of the fixed pattern are '11010100100110110111001100101100001', the first bit to occur is '110'.

The fixed pattern of 248 bits of TDM pilot 1 is referred to as a TDM pilot 1 information packet and is denoted as P1I.

Each group of two consecutive bits in the P1I packet is used to generate QPSK modulation symbols.

Modulation symbol mapping

In the TDM Pilot 1 information packet, respectively denoted as s₀And s₁Each group of two consecutive bits P1I (2i) and P1I (2i +1) (i ═ 0, 1.. 123) is mapped to one complex modulation symbol MS ═ m, (m, m q), as shown in table 6 below (where D ═ 4). This factor is calculated by taking advantage of the fact that only 124 carriers are used out of the 4000 available carriers.

TABLE 6QPSK modulation Table

Fig. 13 shows a signal constellation of QPSK modulation.

Mapping of modulation symbols to subcarriers

As described earlier, the ith modulation symbol ms (i), i ═ 0, 1.., 123, is mapped to the subcarrier with index j.

OFDM common operation

The modulated TDM pilot 1 sub-carriers are subjected to the usual operations as discussed later.

Wide area identification channel (WIC)

The wide area identification channel (WIC) spans one OFDM symbol. The channel is transmitted at OFDM symbol index 1 in one superframe. It immediately follows the TDM pilot 1OFDM symbol. This is an overhead channel used to convey wide-area differentiator information to the FLO receiver. All transmit waveforms in the wide domain (including the local channel but not including the TDM pilot 1 channel and PPC) are scrambled with a 4-bit wide-area differentiator corresponding to the domain.

For a WIC OFDM symbol in a superframe, only one slot is allocated. The allocated time slot uses as input a fixed pattern of 1000 bits, each bit being set to 0. The input bit pattern is processed according to the steps shown in fig. 14. For unallocated timeslots, no processing is performed.

Time slot allocation

The WIC is assigned a slot with index 3. Fig. 15 shows allocated and unallocated slots in a WIC OFDM symbol. For OFDM symbol index 1, the selected slot index is the slot index mapped to interlace 0, which will be discussed later.

Filling of time slot buffers

The buffer of the allocated slot is completely filled by a fixed pattern of 1000 bits, where each bit is set to '0'. The buffer of unallocated timeslots is reserved to be empty.

Slot scrambling

The bits of each allocated slot buffer are sequentially subjected to an exclusive or (XOR) operation with the scrambler output bits to randomize the bits prior to modulation. The scrambled slot buffer corresponding to slot index i is denoted as sb (i), where i ∈ {0, 1.., 7 }. The scrambling sequence used for any slot buffer depends on the OFDM symbol index and the slot index.

Scrambling bit sequenceIs equal to the generation sequence h (D) ═ D²⁰+D¹⁷The sequence generated by a 20-tap Linear Feedback Shift Register (LFSR) of +1, as shown in fig. 16. The transmitter uses a single LFSR for all transmissions.

At the beginning of each OFDM symbol, the LFSR is initialized to state [ d ]₃d₂d₁d₀c₃c₂c₁c₀b₀a₁₀a₉a₈a₇a₆a₅a₄a₃a₂a₁a₀]Depending on the channel type (TDM pilot or wide area or local area channel) and the OFDM symbol index in the super frame.

Bit' d₃d₂d₁d₀' is set as follows. These bits are set to a 4-bit wide-area differentiator (WID) for all wide-area channels (WIC, WTPC, wide-area OIS, and wide-area data channels), local-area channels (LIC, LTPC, local-area OIS, and local-area data channels), and TDM pilot-2 channels and two reserved OFDM symbols when PPC is not present.

Bit' c₃c₂c₁c₀' is set as follows: these bits are set to '0000' for TDM pilot-2 channel, wide-area OIS channel, wide-area data channel, WTPC and WIC; these bits are set to a 4-bit local differentiator (LID) for the local OIS channel, LTPC, LIC, local data channel, and two reserved OFDM symbols when PPC is not present. Bit b₀Is a reserved bit and is set to '1'. Bit a₁₀To a₀Corresponding to OFDM symbol indices ranging from 0 to 1199 in the superframe.

The scrambling sequence for each slot is generated by modulo-2 inner product of the sequence generator's 20-bit state vector and the 20-bit mask associated with that slot index as shown in table 7 below.

Time slot index	m19	m18	m17	m16	m15	m14	m13	m12	m11	m10	m9	m8	m7	m6	m5	m4	m3	m2	m1	m0
																					0	0	0	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	1	0
1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0	0	0
																					2	1	0	0	1	0	0	0	0	1	0	0	0	0	1	1	0	0	0	1	1
3	0	0	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0
																					4	1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0
5	1	0	0	1	0	0	0	0	1	0	0	0	0	1	0	0	0	0	1	0
																					6	0	1	1	0	0	0	1	0	0	0	0	1	0	0	0	0	1	1	0	0
7	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0

TABLE 7 masks associated with different time slots

For each slot at the start of each OFDM symbol, the shift register will be reloaded with a new state d₃d₂d₁d₀c₃c₂c₁c₀b₀a₁₀a₉a₈a₇a₆a₅a₄a₃a₂a₁a₀]。

Modulation symbol mapping

From the ith scrambled slot buffer, respectively denoted s₀And s₁Each group of two consecutive bits SB (i, 2k) and SB (i, 2k +1) (i 3, k 0, 1.. 499) is mapped to a complex modulation symbol MS ═ (mI, mQ) as shown in table 6 (where D2). It can be seen that the value of D is chosen to keep the OFDM symbol energy constant, since only 500 out of the 4000 available subcarriers are used. Fig. 13 shows a signal constellation of QPSK modulation.

Mapping of slots to interlaces

For WIC OFDM symbols, the slot to interlace mapping is as discussed later in this specification.

Mapping of slot buffer modulation symbols to interleaved subcarriers

The 500 modulation symbols in the allocated slot are sequentially allocated to the 500 interleaved subcarriers as follows: the ith complex modulation symbol (where i e {0, 1.. 499}) is mapped to the ith subcarrier of the interlace.

OFDM common operation

The modulated WIC subcarriers will undergo the usual operations as discussed later in this specification.

Local area identification channel (LIC)

The local area identification channel (LIC) spans one OFDM symbol. The channel is transmitted at OFDM symbol index 2 in one superframe. It immediately follows the WIC channel OFDM symbol. This is an overhead channel used to convey local differentiator information to the FLO receiver. All local transmit waveforms are scrambled using a 4-bit local differentiator corresponding to the domain in combination with a wide-area differentiator.

For LIC OFDM symbols in a superframe, only a single slot is allocated. The allocated time slots use a 1000-bit fixed pattern as input. These bits are set to 0. These bits are processed according to the steps shown in fig. 14. For unallocated timeslots, no processing is performed.

Time slot allocation

A slot with index 5 is allocated to the LIC. Fig. 17 shows allocated and unallocated slots in a LIC OFDM symbol. For OFDM symbol index 2, the slot index selected is the slot index mapped to interlace 0.

Filling of time slot buffers

The buffer of the allocated slot is completely filled by a fixed pattern of 1000 bits, where each bit is set to '0'. The buffer of unallocated timeslots is reserved to be empty.

Slot scrambling

The bits of the LIC slot buffer are scrambled as shown by 0. The scrambled slot buffer is denoted by SB.

Modulation symbol mapping

From the ith scrambled slot buffer, respectively denoted s₀And s₁Each group of two consecutive bits SB (i, 2k) and SB (i, 2k +1) (i ═ 5, k ═ 0, 1, … 499) is mapped to a complex modulation symbol MS ═ (mI, mQ) as shown in table 6 (where D ═ 2). The value of D is chosen to keep the OFDM symbol energy constant because only 500 out of the 4000 available subcarriers are used. Fig. 13 shows a signal constellation of QPSK modulation.

Mapping of slots to interlaces

For LIC OFDM symbols, the slot to interlace mapping is as discussed later.

Mapping of slot buffer modulation symbols to interleaved subcarriers

The 500 modulation symbols in the allocated slot are sequentially allocated to the 500 interleaved subcarriers as follows: the ith complex modulation symbol (where i e {0, 1.. 499}) is mapped to the ith subcarrier of the interlace.

OFDM common operation

The modulated LIC subcarriers are subjected to the usual operations as discussed later.

TDM pilot 2 channel

The TDM pilot 2 channel spans one OFDM symbol and is transmitted at OFDM symbol index 3 in one superframe. It immediately follows the LIC OFDM symbol. It can be used for fine OFDM symbol timing correction in a FLO receiver.

For TDM pilot 2OFDM symbols in each super frame, only 4 slots are allocated. Each allocated slot uses as input a fixed pattern of 1000 bits, each set to 0. These bits are processed according to the steps shown in fig. 14. For unallocated timeslots, no processing is performed.

In fig. 14, the slot to interlace mapping ensures that the assigned slots are mapped to interlaces 0, 2, 4 and 6. Thus, the TDM pilot 2OFDM symbol consists of 2000 non-0 subcarriers evenly spaced among the active subcarriers (see [00129 ]). The ith TDM pilot 2 subcarrier corresponds to a subcarrier index j defined as:

note that the TDM pilot 2 channel does not use the 2048 index subcarriers.

Time slot allocation

For a TDM pilot 2OFDM symbol, the indices of the allocated slots are 0, 1, 2, and 7.

Fig. 18 shows allocated and unallocated time slots in a TDM pilot 2OFDM symbol.

Filling of time slot buffers

The buffer of each allocated slot is completely filled with a fixed pattern of 1000 bits, where each bit is set to '0'. The buffer of unallocated timeslots is reserved to be empty.

Slot scrambling

As discussed above, the bits of the TDM pilot 2OFDM channel slot buffer are scrambled. The scrambled slot buffer is denoted by SB.

Modulation symbol mapping

From the ith scrambled slot buffer, respectively denoted s₀And s₁Each group of two adjacent bits SB (i, 2k) and SB (i, 2k +1) (i ═ 0, 1, 2, 7, k ═ 0, 1,. 499) is mapped to a complex modulation symbol MS ═ (mI, mQ) as shown in table 6 (D ═ 1). The value of D is chosen to keep the OFDM symbol energy constant because only 2000 of the 4000 available subcarriers are used. Fig. 13 shows a signal constellation of QPSK modulation.

Mapping of slots to interlaces

For TDM pilot 2 channel OFDM symbols, the mapping of slots to interlaces is as described herein.

Mapping of slot buffer modulation symbols to interleaved subcarriers

The 500 modulation symbols in the allocated slot are sequentially allocated to the 500 interleaved subcarriers as follows: the ith complex modulation symbol (where i e {0, 1.. 499}) is mapped to the ith subcarrier of the interlace.

OFDM common operation

The modulated TDM pilot-2 channel sub-carriers are subjected to the usual operations as described herein.

Transition Pilot Channel (TPC)

The transition pilot channel consists of two sub-channels: wide area handover pilot channel (WTPC) and local area handover pilot channel (LTPC). The TPC on the wide-area OIS and wide-area data channel sides is called a WTPC. The TPCs on the local OIS and local data channel sides are referred to as LTPCs. On either side of each wide-area channel transmission (wide-area data and wide-area OIS channels) except for WIC in one superframe, the WTPC spans one OFDM symbol. On either side of each local channel transmission (local data and local OIS channel) except the LIC in one superframe, the LTPC spans one OFDM symbol. The purpose of the TPC OFDM symbol is twofold; allows channel estimation at the boundary between local and wide-area channels, and facilitates timing synchronization of the first wide-area (or local) MLC in each frame. In one superframe, the TPC spans 20 OFDM symbols, and the 20 OFDM symbols are evenly spaced between the WTPC and LTPC, as shown in fig. 10. There are nine cases where LTPC and WTPC transmissions occur just after each other, and two cases where only one of these channels is transmitted. Only WTPCs are sent after the TDM pilot-2 channel and only LTPCs are sent before the Positioning Pilot Channel (PPC)/reserved OFDM symbol.

Let P be the number of OFDM symbols in the PPC or the number of OFDM symbols reserved when the PPC is not present in the superframe, W be the number of OFDM symbols associated with the wide area data channel in a frame, L be the number of OFDM symbols associated with the local area data channel in a frame, and F be the number of OFDM symbols in a frame.

The value of P should be 2, 6, 10 or 14. The number of data channel OFDM symbols in a frame should be F-4. The exact location of the TPC OFDM symbols in one superframe is shown in table 8 below.

Switching pilot channels	WTPC OFDM symbol index	Index of LTPC OFDM symbol
			TDM pilot 2 channel → wide area OIS channel	4	---
Wide area OIS channel → local area OIS channel	10	11
			Local area OIS channel → wide area data channel	18	17
Wide area data channel → local area data channel	19+W+F×i{i＝0，1，2，3}	20+W+F×i{i＝0，1，2，3}
			Local area data channel → wide area data channel	18+F×i{i＝0，1，2，3}	17+F×i{i＝0，1，2，3}
Local area data channel → PPC/reserved symbol	---	1199-P

TABLE 8 TPC location index in superframe

All slots in the TPC OFDM symbol use a 1000 bit fixed pattern as input, with each bit set to 0. These bits are processed according to the steps shown in fig. 14.

Time slot allocation

The TPC OFDM symbol is allocated with all 8 slots with indices of 0 to 7.

Filling of time slot buffers

The buffer of each allocated slot is completely filled with a fixed pattern of 1000 bits, where each bit is set to '0'.

Slot scrambling

The bits of each allocated TPC slot buffer are scrambled as described previously. The scrambled slot buffer is denoted by SB.

Modulation symbol mapping

From the ith scrambled slot buffer, respectively denoted s₀And s₁Each group of two consecutive bits SB (i, 2k) and SB (i, 2k +1) (i 0, 1, 2.. 7, k 0, 1.. 499) is mapped as shown in table 6Complex modulation symbol MS ═ (mI, mQ). Fig. 13 shows a signal constellation of QPSK modulation.

Mapping of slots to interlaces

For TPC OFDM symbols, the slot to interlace mapping is as described herein.

Mapping of slot buffer modulation symbols to interleaved subcarriers

The 500 modulation symbols in each allocated slot are sequentially allocated to the 500 interleaved subcarriers as follows: the ith complex modulation symbol (where i e {0, 1, … 499) is mapped to the ith subcarrier of the interlace.

OFDM common operation

The modulated TPC subcarriers are subjected to the usual operations as shown herein.

Locating pilot channel/reserved symbols

The Positioning Pilot Channel (PPC) may occur at the end of a superframe. When present, its duration varies between 6, 10 or 14 OFDM symbols. When PPC is not present, there are two reserved OFDM symbols at the end of the superframe. The presence or absence of a PPC and its duration are signaled over the OIS channel.

Positioning pilot channel

The PPC structure including the transmitted information and waveform generation is a TBD.

The FLO device can use PPC autonomously or in conjunction with GPS signals to determine its geographic location.

Reserved OFDM symbol

When PPC is not present, there are two reserved OFDM symbols at the end of the superframe.

All slots in the reserved OFDM symbol use a 1000-bit fixed pattern as input, with each bit set to 0. These bits are processed according to the steps shown in fig. 14.

Time slot allocation

The reserved OFDM symbols are allocated with all 8 slots with indices of 0 to 7.

Filling of time slot buffers

The buffer of each allocated slot is completely filled with a fixed pattern of 1000 bits, where each bit is set to '0'.

Slot scrambling

The bits of each allocated reserved OFDM symbol slot buffer are scrambled as shown by 0. The scrambled slot buffer is marked with SB.

Modulation symbol mapping

From the ith scrambled slot buffer, respectively denoted s₀And s₁Two consecutive bits of SB (i, 2k) and SB (i, 2k +1) (i 0, 1, 2.. 7, k 0, 1,.., 499) is mapped as shown in Table 6Complex modulation symbol MS ═ (mI, mQ). Fig. 13 shows a signal constellation of QPSK modulation.

Mapping of slots to interlaces

For the reserved OFDM symbols, the slot to interlace mapping is as shown herein.

Mapping of slot buffer modulation symbols to interleaved subcarriers

The 500 modulation symbols in each allocated slot are sequentially allocated to the 500 interleaved subcarriers as follows: the ith complex modulation symbol (where i e {0, 1.. 499}) is mapped to the ith subcarrier of the interlace.

OFDM common operation

The modulated reserved OFDM symbol subcarriers are subjected to the usual operations as shown herein.

Wide area OIS channel

In the current superframe, this channel is used to convey overhead information about the active MLCs associated with the wide-area data channel, such as their scheduled transmission times and slot assignments. In each superframe, the wide-area OIS channel spans 5 OFDM symbol intervals (see fig. 10).

The physical layer packet of the wide-area OIS channel, is processed according to the steps shown in fig. 19.

Encoding

The wide-area OIS channel physical layer packet is encoded with a code rate R1/5. The encoder should discard the 6-bit tail field of the incoming physical layer packet and encode the remaining bits with a parallel turbo encoder as shown here. The turbo encoder will add an internally generated 6/R (═ 30) tail of the output code bits, so that the total number of output turbo encoded bits is 1/R times the number of bits in the input physical layer packet.

Fig. 20 shows a coding scheme for a wide-area OIS channel. The parameters of the wide-area OIS channel encoder are shown in table 9 below.

Bits	Turbo encoder input bit Nturbo	Code rate	Turbo encoder output bits
				1000	994	1/5	5000

TABLE 9 parameters for Wide area/local area OIS channel encoder

Turbo encoder

The Turbo encoder uses two systematic, recursive, convolutional, parallel encoders, and an interleaver, the Turbo interleaver, precedes the second recursive convolutional encoder. These two recursive convolutional codes are called constituent codes of turbo codes. The outputs of the constituent encoders are punctured (processed) and repeated to achieve the desired number of turbo encoded output bits.

One common constituent code is used for turbo codes having code rates of 1/5, 1/3, 1/2, and 2/3. The transfer function of the constituent code is:

wherein D (D) ═ 1+ D2+ D3, n₀(D) 1+ D3 and n₁(D)＝1+D+D2+D3。

The output symbol sequence generated by the Turbo encoder should be the same as that generated by the encoder shown in fig. 20. Initially, the state of the constituent encoder registers in this figure is set to 0. The constituent encoders are then synchronized while the switches are in the indicated positions.

Synchronizing N by pair constituent encoders_TurboThe next-in-time switch is in the up position and punctures the output as shown in table 10 below to generate encoded data output bits. In an erasure pattern, '0' means that the bit is to be deleted, and '1' means that the bit is to be passed. The constituent encoder outputs for each bit period will be in the order X, Y₀，Y₁，X′，Y′₀，Y′₁By, where X is output first. No bit repetition is used in generating the encoded data output bits.

The constituent encoder output symbol puncturing for the tail period is shown in table 11 below. In an erasure pattern, '0' means that the symbol is to be deleted, and '1' means that the symbol is to be passed.

For a turbo code with code rate 1/5, tail output code bits in each of the first three tail periods are punctured and repeated to achieve sequence XXY₀Y₁Y₁The tail output code bits for each of the last three tail periods are punctured and repeated to achieve the sequence X ' X ' Y '₀Y′₁Y′₁。

TABLE 10 puncturing patterns for OIS channel data bit periods

Note that in table 10 above, the puncturing table is read from top to bottom.

TABLE 11 puncturing patterns for OIS channel tail bit periods

Note that in Table 11, for turbo code with code rate of 1/5, the puncturing table is read from top to bottom, repeating X, X', Y₁And Y₁', again read from left to right.

Turbo interleaver

the turbo interleaver is part of a turbo encoder that block interleaves the turbo encoder input data fed to the constituent encoder 2.

the turbo interleaver is functionally equivalent to writing the entire sequence of turbo interleaver input bits sequentially into an address sequence in an array, and then reading the entire sequence from the address sequence defined by the process described below.

Let the input address sequence be from 0 to N_turbo-1. The interleaver output address sequence is then equivalent to those generated by the process shown in fig. 22 and described below. Note that this process is equivalent to the following process: the counter values are written into an array of 25 rows by row, 2n columns, the rows are shuffled according to a bit inversion rule, the elements in each row are arranged according to a linear congruential sequence of the particular row, and then the tentative output addresses are read by column. The linear congruential sequence rule is x (i +1) ═ x (i) + c) mod 2n, where x (0) ═ c, and c is a particular row value from the lookup table.

With respect to the process in FIG. 22, the process includes determining a turbo interleaver parameter n, where n is the smallest integer that causes Nturbo ≦ 2n + 5. Table 12 shown below gives this parameter for a 1000 bit physical layer packet. The process also includes initializing an (n +5) -bit counter to 0 and extracting the n Most Significant Bits (MSBs) from the counter and adding 1 to form a new value. Then, all bits except the n Least Significant Bits (LSBs) of the value are discarded. The process further includes obtaining an n-bit output of a lookup table defined by table 13 shown below with a read address equal to 5 LSBs of the counter. Note that this table depends on the value of n.

The process further includes multiplying the values obtained in the previous extracting and obtaining steps and then discarding all bits except the n LSBs. The 5 LSBs of the counter are next bit-inverted. Then, a tentative output address is formed, the MSB of which is equal to the value obtained in the bit inversion step and the LSB of which is equal to the value obtained in the multiplication step.

Next, the process includes accepting the tentative output address as the output address if it is smaller than the nrturbo, and discarding it otherwise. Finally, the counter is increased by 1, and the steps after the initialization step are repeated until all Nturbo interleaver output addresses are obtained.

Physical layer packet size	Turbo interleaver block size Nturbo	Turbo interleaver parameter n
			1,000	994	5

TABLE 12Turbo interleaver parameters

Table index	n-5 item	Table index	n-5 item
				0	27	16	21
1	3	17	19
				2	1	18	1
3	15	19	3
				4	13	20	29
5	17	21	17
				6	23	22	25
7	13	23	29
				8	9	24	9
9	3	25	13
				10	15	26	23
11	3	27	13
				12	13	28	13
13	1	29	1
				14	13	30	13
15	29	31	13

TABLE 13Turbo interleaver lookup table definitions

Bit interleaving

For OIS channels and data channels, the form of bit interleaving is block interleaving. the interleaving pattern of the code bits of the turbo encoded packet is: adjacent code bits are mapped to different constellation symbols.

The bit interleaver should reorder the turbo-coded bits by:

a. for N bits to be interleaved, the bit interleaving matrix M is a block interleaver with 4 columns and N/4 rows. The N input bits will be written sequentially column by column into the interleaved array. The rows of matrix M are labeled with an index j, where j is 0-N/4-1 and row 0 is the first row.

b. For each row j with an even index (j mod 2 ═ 0), the elements of column 2 and column 3 are interchanged.

c. For each row j with an odd index (j mod 2 | ═ 0), the elements of column 1 and column 4 are interchanged.

d. The resulting matrix is denoted by M. The content of M should be read from left to right in the order of rows.

Fig. 23 illustrates the output of the bit interleaver assuming N-20.

Data time slot allocation

For the wide-area OIS channel, 7 data slots should be allocated per OFDM symbol for transmission of the OIS channel turbo encoded packet. The wide-area OIS channel should use transmit mode 5. Therefore, it requires 5 data slots to accommodate the contents of a single turbo encoded packet. Some wide-area OIS channel turbo-coded packets may span two consecutive OFDM symbols. And allocating data time slots at the MAC layer.

Filling of data slot buffers

As shown in fig. 24, the bit interleaved code bits of the wide-area OIS channel turbo encoded packet are written sequentially into 5 consecutive data slot buffers in one or two consecutive OFDM symbols. These data slot buffers correspond to slot indices 1 through 7. The data slot buffer is 1000 bits in size. Note that the size of the data slot buffer is 1000 bits for QPSK and 2000 bits for 16-QAM and layered modulation. In the wide-area OIS channel (see fig. 10), the 7 wide-area OIS channel Turbo Encoded Packets (TEPs) occupy consecutive time slots over 5 consecutive OFDM symbols.

Slot scrambling

As previously discussed, the bits of each allocated slot buffer are scrambled. The scrambled slot buffer is denoted by SB.

Mapping of bits to modulation symbols

From the ith scrambled slot buffer, respectively denoted s₀And s₁Each group of two consecutive bits SB (i, 2k) and SB (2k +1) (i 1, 2.. 7, k 0, 1.. 499) is mapped as shown in table 6Complex modulation symbol MS ═ (mI, mQ). Fig. 13 shows a signal constellation of QPSK modulation.

Mapping of slots to interlaces

For wide-area OIS channel OFDM symbols, the slot to interlace mapping is as described herein.

Mapping of slot buffer modulation symbols to interleaved subcarriers

The 500 modulation symbols in each allocated slot should be allocated to the 500 interleaved subcarriers in the following process order:

a. creating an empty subcarrier index vector (SCIV);

b. let i be an index variable in the range (i ∈ {0, 511}), initialize i to 0;

c. using a 9-bit value i of i_bTo represent i;

d. bit reversal i_bAnd the resulting value is recorded as i_br. If i_br< 500, then i will be_brAppended to the SCIV;

e. if i is less than 511, adding 1 to i, and then going to step c; and

f. the symbol with index j (j ∈ {0, 499}) in a data slot is mapped to the interleaved subcarriers with index SCIV [ j ] allocated to the data slot.

Note that SCIV only needs to be computed once and can be used for all data slots.

OFDM common operation

The modulated wide-area OIS channel subcarriers are subject to conventional operation as described herein.

Local area OIS channel

In the current super-frame, the channel is used to convey overhead information about the active MLCs associated with the local area data channel, such as their scheduled transmission times and slot assignments. In each superframe, the local OIS channel spans 5 OFDM symbol intervals (see fig. 10).

The physical layer packet of the local OIS channel is processed according to the steps shown in fig. 14.

Encoding

The local OIS channel physical layer packet is encoded with a code rate R1/5. The encoding process should be the same as described herein for the wide-area OIS channel physical layer packet.

Bit interleaving

The local OIS channel turbo encoded packet is bit interleaved as described herein.

Data time slot allocation

For local OIS channels, 7 data slots are allocated per OFDM symbol for transmission of turbo encoded packets. The local OIS channel uses transmit mode 5. Therefore, it requires 5 data slots to accommodate the contents of a single turbo encoded packet. Some local OIS turbo packets may span two consecutive OFDM symbols. And allocating data time slots at the MAC layer.

Filling of data slot buffers

As shown in fig. 25, the bit interleaved code bits of the local OIS channel turbo encoded packet are written sequentially into 5 consecutive data slot buffers in one or two consecutive OFDM symbols. These data slot buffers correspond to slot indices 1 through 7. The data slot buffer is 1000 bits in size. In the local OIS channel, the 7 local OIS channel turbo code packets (TEPs) occupy consecutive slots over 5 consecutive OFDM symbols (see fig. 25).

Slot scrambling

The bits of each allocated slot buffer are scrambled as shown at 0. The scrambled slot buffer is marked with SB.

Mapping of bits to modulation symbols

Each group of two consecutive bits SB (i, 2k) and SB (i, 2k +1) (i ═ 1, 2,. 7, k ═ 0, 1,. 499), from the ith scrambled slot buffer, labeled s0 and s1, respectively, is mapped to the table as shown in table 6Complex modulation symbol MS ═ (mI, mQ). Fig. 13 shows a signal constellation of QPSK modulation.

Mapping of slots to interlaces

For local OIS channel OFDM symbols, the slot to interlace mapping is as shown herein.

Mapping of slot buffer modulation symbols to interleaved subcarriers

This process is the same as the mapping process for the wide-area OIS channel as shown herein.

OFDM common operation

The modulated local OIS channel subcarriers are subject to the usual operations as shown herein.

Wide area FDM pilot channel

The wide area FDM pilot channel is sent in conjunction with a wide area data channel or a wide area OIS channel. The wide-area FDM pilot channel carries a fixed bit pattern that can be used for wide-area channel estimation and other functions of the FLO device.

A single slot is allocated for the wide area FDM pilot channel during each OFDM symbol that carries either the wide area data channel or the wide area OIS channel.

The allocated time slots use a 1000-bit fixed pattern as input. These bits are set to 0. These bits are processed according to the steps shown in fig. 14.

Time slot allocation

During each OFDM symbol carrying a wide area data channel or a wide area OIS channel, a slot with an index of 0 is allocated for the wide area FDM pilot channel.

Filling of time slot buffers

The buffer allocated to the slot of the wide area FDM pilot channel is completely filled with a fixed pattern of 1000 bits, where each bit is set to '0'.

Slot scrambling

As shown herein, the bits of the wide area FDM pilot channel slot buffer are scrambled. The scrambled slot buffer is marked with SB.

Modulation symbol mapping

Of the ith scrambled slot buffer, respectively denoted s₀And s₁Each group of two consecutive bits SB (i, 2k) and SB (i, 2k +1) (i 0, k 0, 1.. 499) is mapped as shown in table 6 (where) Complex modulation symbol MS ═ (mI, mQ). Fig. 13 shows a signal constellation of QPSK modulation.

Mapping of slots to interlaces

The mapping of the wide area FDM pilot channel slots to interlaces is shown herein.

Mapping of slot buffer modulation symbols to interleaved subcarriers

The 500 modulation symbols in the allocated slot are sequentially allocated to the 500 interleaved subcarriers as follows: the ith complex modulation symbol (where i e {0, 1.. 499}) is mapped to the ith subcarrier of the interlace.

OFDM common operation

The modulated wide area FDM pilot channel subcarriers are subject to the usual operations as shown herein.

Local FDM pilot channel

The local FDM pilot channel is sent in conjunction with a local data channel or a local OIS channel. The localized FDM pilot channel carries a fixed bit pattern that can be used for localized channel estimation and other functions of the FLO device.

A single slot is allocated for the local FDM pilot channel during each OFDM symbol that carries a local data channel or a local OIS channel.

The allocated time slots use a 1000-bit fixed pattern as input. These bits are set to 0. These bits are processed according to the steps shown in fig. 14.

Time slot allocation

During each OFDM symbol carrying a local data channel or a local OIS channel, a slot with an index of 0 is allocated for the local FDM pilot channel.

Filling of pilot time slot buffer

The buffer allocated to the slot of the local FDM pilot channel is completely filled with a fixed pattern of 1000 bits, where each bit is set to '0'.

Slot buffer scrambling

The bits of the local FDM pilot slot buffer are scrambled as shown by 0. The scrambled slot buffer is marked with SB.

Modulation symbol mapping

Of the ith scrambled slot buffer, respectively denoted s₀And s₁Each group of two consecutive bits SB (i, 2k) and SB (i, 2k +1) (i 0, k 0, 1.. 499) is mapped as shown in table 6 (where) Complex modulation symbol MS ═ (mI, mQ). Fig. 13 shows a signal constellation of QPSK modulation.

Mapping of slots to interlaces

The mapping of the wide area FDM pilot channel slots to interlaces is shown herein.

Mapping of slot buffer modulation symbols to interleaved subcarriers

The 500 modulation symbols in the allocated slot are sequentially allocated to the 500 interleaved subcarriers as follows: the ith complex modulation symbol (where i e {0, 1.. 499}) is mapped to the ith subcarrier of the interlace.

OFDM common operation

The modulated localized FDM pilot channel subcarriers are subject to the usual operations as shown herein.

Wide area data channel

The wide-area data channel is used to carry physical layer packets to be used for wide-area multicast. The physical layer packets of the wide-area data channel may be associated with any one of the active MLCs transmitted within the wide-area.

Wide area data channel processing of allocated time slots

The physical layer packet of the wide area data channel is processed according to the steps shown in fig. 26.

For conventional modulation (QPSK and 16-QAM), the physical layer packets are turbo encoded and bit interleaved before being stored in the data slot buffer. For layered modulation, the base component physical layer packet and the enhancement component physical layer packet are independently turbo coded and bit interleaved before being multiplexed into the data slot buffer.

Encoding

The wide area data channel physical layer packet is encoded with a code rate R1/2, 1/3, or 2/3. The encoder discards the 6-bit tail field of the incoming physical layer packet and encodes the remaining bits with a parallel turbo encoder as shown herein. the turbo encoder adds a tail of internally generated 6/R (═ 12, 18 or 9) output code bits, so that the total number of output turbo encoded bits is 1/R times the number of input physical layer packet bits.

Fig. 27 shows a coding scheme for a wide area data channel. The wide area data channel encoder parameters are shown in table 14 below.

Bits	Turbo encoder input bit Nturbo	Code rate	Turbo encoder output bits
				1000	994	1/2	2000
1000	994	1/3	3000
				1000	994	2/3	1500

Table 14 parameters of data channel encoder

Turbo encoder

A turbo encoder for wide area data channel physical layer packets is shown herein.

Synchronizing N by pair constituent encoders_turboThe next-in-time switch is in the up position and punctures the output as shown in table 15 below to generate encoded data output bits. In an erasure pattern, '0' means that the bit is to be deleted, and '1' means that the bit is to be passed. The constituent encoder outputs for each bit period will be in the order X, Y₀，Y₁，X′，Y′₀，Y′₁By, where X is output first. The bits are not reused in generating the encoded data output symbols.

The constituent encoder output symbol puncturing for the tail period is shown in table 16 below. In an erasure pattern, '0' means that the symbol is to be deleted, and '1' means that the symbol is to be passed.

For a turbo code with code rate of 1/2, the tail output code bit in each of the first three tail bit periods is XY₀And the tail output code bit of each of the last three tail bit periods is X 'Y'₀。

For turbo code with code rate of 1/3, the tail output code bit in each of the first three tail bit periods is XXY₀And the tail output code bit of each of the last three tail bit periods is XX 'Y'₀。

For turbo code with code rate of 2/3, the tail output code bits of the first three tail bit periods are XY respectively₀X and XY₀. The tail output code bits of the last three tail bit periods are X 'and X' Y 'respectively'₀And X'.

TABLE 15 puncturing patterns for data bit periods

Note that in table 15 above, the puncturing table is read from top to bottom.

Table 16 puncturing pattern for tail bit periods

Note that for table 16 above, the puncturing table is read from top to bottom and then from left to right for a turbo code with code rate 1/2. For turbo code with code rate of 1/3, the puncturing table is read from top to bottom, repeated by X and X', and read from left to right. For a turbo code with code rate 2/3, the puncturing table is read from top to bottom and then from left to right.

Turbo interleaver

A turbo interleaver for a wide area data channel is shown herein.

Bit interleaving

As shown herein, the wide area data channel turbo encoded packet is bit interleaved.

Data time slot allocation

For a wide-area data channel, up to 7 data slots may be allocated per OFDM symbol for transmitting multiple turbo encoded packets of information associated with one or more MLCs. For some approaches (2, 4, 8 and 11, see table 5 above), one turbo encoded packet occupies a portion of one slot. However, the time slots are allocated to MLCs in a manner that avoids multiple MLCs from sharing the time slot within the same OFDM symbol.

Filling of data slot buffers

The bit-interleaved code bits of the wide-area data channel turbo encoded packet are written into one or more data slot buffers. These data slot buffers correspond to slot indices 1 through 7. The size of the data slot buffer is 1000 bits for QPSK and 2000 bits for 16-QAM and layered modulation. For QPSK and 16-QAM modulation, the bit-interleaved code bits are written sequentially into the slot buffer. For layered modulation, the bit interleaved code bits corresponding to the base and enhancement components are interleaved as shown in fig. 28 before the slot buffer is filled.

Fig. 29 shows the case where a single turbo encoded packet spans a buffer of 3 data slots.

Fig. 30 shows a case where a base component turbo-encoded packet having a code rate of 1/3 and an enhancement component turbo packet (having the same code rate) are multiplexed to occupy a buffer of 3 data slots.

Fig. 31 shows a case where one data channel turbo-encoded packet occupies one portion of one data slot, and four turbo-encoded packets are required to fill an integer number of data slots.

The three slots in fig. 31 may span one OFDM symbol or a plurality of consecutive OFDM symbols. In either case, the data slot assignment for one MLC has consecutive slot indices on one OFDM symbol.

Fig. 32 shows a short description of the slot assignments for five different MLCs over three consecutive OFDM symbols in a frame. In the figure, TEPn, m denotes the nth turbo encoded packet of the mth MLC. In this figure:

mlc 1 uses transmission mode 0 and requires 3 slots for each turbo encoded packet. It transmits one turbo encoded packet with 3 consecutive OFDM symbols.

Mlc 2 uses transmission mode 1 and transmits a single turbo encoded packet with 2 slots. It transmits two turbo encoded packets with OFDM symbols n and n + 1.

Mlc 3 uses transmission mode 2 and requires 1.5 time slots to transmit one turbo encoded packet. It transmits 6 turbo encoded packets with 3 consecutive OFDM symbols.

Mlc 4 uses transmission mode 1 and requires 2 time slots to transmit one turbo encoded packet. It transmits two turbo encoded packets with 2 consecutive OFDM symbols.

Mlc 5 uses transmission mode 3 and requires 1 time slot to transmit one turbo encoded packet. It transmits one turbo encoded packet with one OFDM symbol.

Slot scrambling

The bits of each allocated slot buffer are scrambled as shown by 0. The scrambled slot buffer is denoted by SB.

Mapping of bits to modulation symbols

For the wide area data channel, any one of QPSK, 16-QAM or layered modulation may be used depending on the transmission scheme.

QPSK modulation

Of the ith scrambled slot buffer, respectively denoted s₀And s₁Each group of two consecutive bits SB (i, 2k) and SB (i, 2k +1) (i 0, k 0, 1.. 499) is mapped as shown in table 6 (where) Complex modulation symbol MS ═ (mI, mQ). Fig. 13 shows a signal constellation of QPSK modulation.

16-QAM modulation

As shown in Table 17 below (wherein) Each group of four consecutive bits SB (i, 4k), SB (i, 4k +1), SB (i, 4k +2) and SB (i, 4k +3) (i ═ 1, 2.. 7, k ═ 0, 1.. 499) from the ith scrambled data slot buffer is grouped and mapped to 16-QAM complex modulation symbols s (k) (mi (k), mq (k)), k ═ 0, 1.. 499. Fig. 33 shows a signal constellation for a 16-QAM modulator, where s0 ═ SB (i, 4k), s1 ═ SB (i, 4k +1), s2 ═ SB (i, 4k +2), and s3 ═ SB (i, 4k + 3).

TABLE 1716-QAM MODULATION TABLE

Hierarchical modulation with base and enhancement components

As shown in table 18 below, each group of four consecutive bits SB (i, 4k), SB (i, 4k +1), SB (i, 4k +2), and SB (i, 4k +3), i 1, 2.. 7, k 0, 1.. 499, from the ith scrambled data slot buffer is grouped and mapped to a hierarchical complex modulation symbol s (k) (mi (k), mq (k)), k 0, 1.. 499. If r represents the energy ratio between the base component and the enhancement component, then α and β can be given by:and(see Table 4).

Fig. 34 shows a signal constellation for hierarchical modulation, where s0 ═ SB (i, 4k), s1 ═ SB (i, 4k +1), s2 ═ SB (i, 4k +2), and s3 ═ SB (i, 4k + 3). It should be noted that the process of filling the slot buffer ensures (see fig. 28) that bits s0 and s2 correspond to the enhancement component, while bits s1 and s3 correspond to the base component.

TABLE 18 hierarchical modulation table

Note that: in the upper table 18Where r is the ratio of the energy of the base component to the energy of the enhancement component.

Hierarchical modulation with only fundamental component

From the ith scrambled slot buffer, groups of four consecutive bits are respectively marked s₀And s₁The 2 nd and 4 th bits SB (i, 4k +1) and SB (i,4k +3), i 1, 2,. 7, k 0, 1,. 499) is mapped as shown in table 6 (where) Complex modulation symbol MS ═ (mI, mQ). Fig. 13 shows a signal constellation of QPSK modulation.

Mapping of slots to interlaces

For a wide area data channel OFDM symbol, the slot to interlace mapping is as shown herein.

Mapping of slot buffer modulation symbols to interleaved subcarriers

Using the procedure described herein, 500 modulation symbols in each allocated slot are sequentially allocated to 500 interleaved subcarriers.

OFDM common operation

The modulated wide-area data channel subcarriers are subjected to the usual operations as shown herein.

Wide area data channel processing of unallocated timeslots

The unallocated timeslot in the wide area data channel uses a 1000-bit fixed pattern as input, with each bit set to 0. These bits are processed according to the steps illustrated in fig. 14.

Filling of time slot buffers

The buffer of each unallocated timeslot of the wide area data channel is completely filled with a fixed pattern of 1000 bits, where each bit is set to '0'.

Slot scrambling

The bits of each unassigned slot buffer in the wide area data channel are scrambled as shown in 0. The scrambled slot buffer is denoted by SB.

Modulation symbol mapping

From the ith scrambled slot buffer, respectively denoted s₀And s₁Each group of two consecutive bits SB (i, 2k) and SB (i, 2k +1) (i 1, 2.. 7, k 0, 1.. 499) is mapped as shown in table 6 (where) Complex modulation symbol MS ═ (mI, mQ). Fig. 13 shows a signal constellation of QPSK modulation.

Mapping of slots to interlaces

For unallocated slots in a wide area data channel OFDM symbol, the slot to interlace mapping is shown in 0.

Mapping of slot buffer modulation symbols to interleaved subcarriers

The 500 modulation symbols in the slot buffer are sequentially allocated to the 500 interleaved subcarriers as follows: the ith complex modulation symbol (where i e {0, 1.. 499}) is mapped to the ith subcarrier of the interlace.

OFDM common operation

The modulated wide area data channel OFDM symbol subcarriers are subjected to the usual operations as shown herein.

Local area data channel

The local area data channel is used to carry physical layer packets to be used for local area multicast. The physical layer packet of the local area data channel may be associated with any one of the active MLCs sent in the local area.

Local data channel processing of allocated time slots

The physical layer packet of the local data channel is processed according to the steps shown in fig. 26.

For conventional modulation (QPSK and 16-QAM), the physical layer packets are turbo encoded and bit interleaved before being stored in the data slot buffer. For layered modulation, the base component physical layer packet and the enhancement component physical layer packet are independently turbo coded and bit interleaved before multiplexing into the data slot buffer.

Encoding

The local area data channel physical layer packet is encoded with a code rate R of 1/2, 1/3, or 2/3. The encoding process is the same as the encoding for the wide area data channel as shown herein.

Bit interleaving

As shown herein, the local data channel turbo encoded packets are interleaved.

Data time slot allocation

For the local area data channel, the slot allocation is as shown herein.

Filling of data slot buffers

The slot buffer filling process for the local data channel is as described herein.

Slot scrambling

As shown herein, the bits of each allocated slot buffer are scrambled. The scrambled slot buffer is denoted by SB.

Mapping of slot bits to modulation symbols

For the local area data channel, any one of QPSK, 16-QAM, or layered modulation may be used depending on the transmission scheme.

QPSK modulation

As shown herein, each group of 2 consecutive bits from the scrambled slot buffer is mapped to one QPSK modulation symbol.

16-QAM modulation

As shown herein, each group of 4 consecutive bits from the scrambled slot buffer is mapped to a 16-QAM modulation symbol.

Hierarchical modulation with base and enhancement components

As shown herein, each group of four consecutive bits from the scrambled slot buffer is mapped to one hierarchical modulation symbol.

Hierarchical modulation with only fundamental component

As shown herein, the second and fourth bits from the group of four consecutive bits of the scrambled slot buffer are mapped to one QPSK modulation symbol.

Mapping of slots to interlaces

For a local area data channel OFDM symbol, the slot to interlace mapping is as shown herein.

Mapping of slot modulation symbols to interleaved subcarriers

Using the process shown herein, the 500 modulation symbols for each allocated slot are sequentially allocated to the 500 interleaved subcarriers.

OFDM common operation

The modulated wide-area data channel subcarriers are subjected to the usual operations as shown herein.

Local area data channel processing without time slot allocation

The unallocated timeslot in the local data channel uses a 1000-bit fixed pattern as input, with each bit set to 0. These bits are processed according to the steps shown in fig. 14.

Filling of time slot buffers

The buffer of each unallocated timeslot of the local area data channel is completely filled with a fixed pattern of 1000 bits, where each bit is set to '0'.

Slot scrambling

The bits of each unassigned slot buffer in the wide area data channel are scrambled as shown in 0. The scrambled slot buffer is denoted by SB.

Modulation symbol mapping

As shown herein, each group of two consecutive bits from the scrambled slot buffer is mapped to one QPSK modulation symbol.

Mapping of slots to interlaces

For unallocated slots in a local data channel OFDM symbol, the slot-to-interlace mapping is as shown herein.

Mapping of slot buffer modulation symbols to interleaved subcarriers

The 500 modulation symbols in the slot buffer are sequentially allocated to the 500 interleaved subcarriers as follows: the ith complex modulation symbol (where i e {0, 1.. 499}) is mapped to the ith subcarrier of the interlace.

OFDM common operation

The modulated local area data channel OFDM symbol subcarriers are subjected to the usual operations as shown herein.

Mapping of slots to interlaces

As shown herein, the slot to interlace mapping varies from OFDM symbol to OFDM symbol. There are 8 slots in each OFDM symbol. The FDM pilot channel utilizes slot 0. For an OFDM symbol index j in a superframe, slot 0 is allocated with interlace I_p[j]The following are:

if (j mod 2 ═ 0), then I_p[j]＝2。

Otherwise, I_p[j]＝6。

The interlace assignment process for slot 0 ensures that the FDM pilot channels are assigned interlaces 2 and 6 for even and odd OFDM symbol indices, respectively. The remaining 7 interlaces in each OFDM symbol are allocated to slots 1 to 7. This is illustrated in fig. 35, where P and D represent the interlaces assigned to the time slots occupied by the FDM pilot channel and data channel, respectively.

For slots 1 through 7, the slot to interlace mapping is as follows:

a. let i be a 3-bit value of the interlace index i (i ∈ {0, 7 }). Expressing the bit-reversed value of i as i_br。

b. Let I as defined herein before_jRepresenting the jth interlace. By using i_brReplacement I_iFor the interleaved sequence I (I ∈ {0, 7})₀ I₁ I₂ I₃ I₄ I₅ I₆ I₇Permuting to generate a permuted sequence, PS ═ I₀ I₄ I₂ I₆ I₁ I₅ I₃ I₇}。

c. Joint interleaving in PS I₂And I₆To generate a shortened interleaved sequence, SIS ═ I₀ I₄ I₂/I₆I₁ I₅ I₃ I₇}。

d. For an OFDM symbol with index j (j e {1, 1199}) in a superframe, a cyclic right shift is performed on the SIS in step 3 with a value equal to (2 x j) mod 7 to generate the permuted shortened interleaved sequence psis (j).

e. If (j mod 2 ═ 0), then interlace I in PSIS (j) is selected₆. Otherwise, select PSIS [ j ]]In (1) interleaving₂。

f. For the jth OFDM symbol interval in a superframe, the kth data slot (where k ∈ { 1.. 7}) will be allocated the interlace PSIS (j) [ k-1 ].

Note that in step c above, the remaining seven interlaces are used for allocation to data slots because interlace 2 and interlace 6 are used alternately for pilot. In addition, note that one superframe spans 1200 OFDM symbol intervals, and the slot-to-interlace mapping of OFDM symbol index 0 is not used. Further, with respect to step d above, note that the sequence s is circularly right-shifted 2 times by { 12345 }, resulting in the sequence s (2) } { 45123 }.

Fig. 36 illustrates the interlace allocation of all 8 slots over 15 consecutive OFDM symbol intervals. The slot-to-interlace mapping pattern repeats after 14 consecutive OFDM symbol intervals. Fig. 36 shows that all interlaces following a pilot interlace are allocated in the same time section and the channel estimation performance of all interlaces is the same.

OFDM common operation

This block will have complex modulation symbols X associated with OFDM symbol interval m, subcarrier index k_k，mConverted to an RF transmit signal. This operation is shown in fig. 37.

IFT operation

Complex modulation symbol X associated with mth OFDM symbol by Inverse Fourier Transform (IFT) equation_k，mK is 0, 1,.., 4095, and a continuous-time signal x_m(t) correlating. In particular, the amount of the solvent to be used,

for 0≤t≤T_s′.

in the above equation, (Δ f)_SCIs the subcarrier spacing, and T_WGI，T_FGIAnd T'_sIs defined in this application as discussed previously.

Window with window

Signal x_m(t) is multiplied by a window function w (t), wherein,

the windowed signal is denoted y_m(t) wherein,

y_m(t)＝x_m(t)w(t).

t mentioned above_UAnd T_sAs previously defined herein.

Overlap and add

By means of windowing continuous-time signals T from successive OFDM symbols_WGIOverlap to generate a baseband signal s_BB(t) of (d). This is illustrated in fig. 38. In particular, s_BB(t) is given by

Carrier modulation

The in-phase and quadrature baseband signals are up-converted to an RF frequency and summed to generate an RF waveform s_RF(t) of (d). In FIG. 37, f_C(k is the center frequency of the kth FLO RF channel (see Table 1).

Alternate superframe structure

In another example, note that the superframe structure shown in fig. 10 can be modified to differentially optimize processing of the superframe. It is noted that a network Identifier (ID) may be used to identify or distinguish between a wide area network and a local area network, as previously described in connection with the examples of fig. 10-18. In these examples, 4 OFDM symbols in the preamble are dedicated to TDM pilot channels, which include TDM pilot 1 channel, wide area identification channel (WIC), local area identification channel (LIC), and TDM pilot 2 channel. Because the TDM pilot-2 channel is scrambled with the wide area network ID, channel and timing estimation is performed for the wide area network, not the local area network. Thus, when wide-area channel and timing estimates are used for local channels, the performance of the local channels may be compromised.

According to the present example, the superframe structure may be modified differently from that shown in fig. 10 to improve local channel reception performance to the same level as wide area performance. The interchangeable frame structure disclosed herein utilizes a scheme that includes 3 dedicated OFDM symbols FOR timing and frequency acquisition, and NETWORK ID acquisition, as described in co-pending patent application entitled "method and apparatus FOR COMMUNICATING NETWORK IDENTIFIERS INA COMMUNICATION SYSTEM" by Michael Wang, having a case number of 040645U3B1, which is incorporated herein by reference. Specifically, the WIC and LIC symbols are removed and TDM pilot 3 is added in the superframe. TDM pilot 3 has the same structure as TDM pilot 2, except that the PN scrambling sequence is derived from a wide area operation infrastructure id (woi id) combined with a local area operation infrastructure id (loi id). Thus, TDM pilot 2 scrambled by the wide area ID is used for fine timing acquisition or reacquisition for the wide area network. For fine timing acquisition or reacquisition for the local area network, TDM pilot 3 is used instead of TDM pilot 2. Because the TDM pilot 3 channel is scrambled by including the local area ID, the timing acquired is more accurate than that acquired by the TDM pilot 2 in the frame structure shown in fig. 10.

In addition, the TDM pilot 2 and TDM pilot 3 channels disclosed in the above-incorporated publications utilize longer pilot symbols, e.g., 2048 samples. Such symbols provide enhanced detection performance by providing a more accurate baseline estimate in the detection metric than using WIC/LIC symbols of sample length 512, as also described in the above disclosure.

Fig. 39 shows a superframe structure 3900 utilizing TDM1, TDM2, and TDM3 in accordance with examples of the present disclosure. As shown, the superframe structure 3900 includes TDM pilot 1 symbols 3092 at the beginning of the preamble of the frame 3900. As previously described, the transceiver uses TDM1 for coarse timing acquisition, among other things. TDM 13902 is followed by TDM pilot 23904. The transceiver uses TDM 23904 for fine timing acquisition or reacquisition for the wide area network. Rather than including TDM pilot 3 next in the time schedule of superframe 3900, a wide area transition pilot channel (WTPC)3906 is included in frame 3900. WPTC 3906 is a transition channel that does not include data that needs to be sampled, demodulated, or decoded by a transceiver prior to transmission of the data or information about the wide area network.

After transmission of WPTC 3906, frame 3900 includes wide area information symbols (OIS)3908 and pilots 3910 for the wide area network accompanying Frequency Division Multiplexing (FDM). After symbols 3908 and 3910, another WTPC channel 3912 is transmitted. After transmitting the WTPC channel, a TDM pilot-3 channel 3914 is included in superframe 3900 and the transceiver can use TDM pilot-3 channel 3914 for fine timing acquisition or reacquisition of the local area network if the transceiver user wants local area network content.

After TDM pilot 33914 transmission, superframe 3900 includes local area network translated pilot (LTPC) 3916. Next, in frame 3900 is the simultaneous transmission of local OIS 3918 and FDM pilot symbols 3920. After the transmission of the local OIS 3918 and FDM pilot symbols 3920, another LTPC channel 3922 is transmitted to render the FDM and OIS associated with the local area network. After the LTPC channel 3922 is transmitted, data for the wide area and local area networks is transmitted, along with any post-amble information (as shown in parenthesis indicated by reference numeral 3922).

Superframe 3900 is, for example, a superframe that provides a local channel estimation/timing mechanism while using one less overhead OFDM symbol than the superframe shown in fig. 10. Further, since the TDM 33914 immediately follows the local OIS 3918, the channel and timing acquired from TDM3 are preferably updated for local area data processing. Further, it is noted that since TDM 23904 and TDM 33914 are followed by WTPCs (e.g., 3906) and LTPCs (e.g., 3916), respectively, which do not contain data that needs to be processed, this allows the processing of TDM2(3904) and TDM3(3914) for longer periods of time without affecting the processing of wide-area OIS 3908 and local OIS 3918.

Fig. 40 is a flow diagram of an exemplary method for ordering and transmitting the superframe 3900 shown in fig. 39. As shown, the method 4000 begins at block 4002, and at block 4002 the process 4000 is initialized. Next, flow proceeds to block 4004 where a first symbol (e.g., TDM 1) for conveying at least timing information is transmitted. Flow proceeds from block 4004 to block 4004 where a second pilot symbol (e.g., TDM2) for conveying timing information is transmitted. The second pilot symbols include first information including network identification information (e.g., wide area network WOIID) regarding the first network.

After performing the operations of block 4006, flow proceeds to block 4008 where the first network-switched pilot channel (e.g., WTPC 3906) may be transmitted in block 4008. In addition, block 4008 may also transmit at least overhead information regarding the network. Examples of this information include wide area OIS 3908 and FDM pilot 3910. Note that the transmission of the transaction channel, such as WTPC 3906, in block 4006 follows the transmission of the second pilot (TDM 2). As an example, when a receiver (not shown) receives the transmitted symbols, the switch channel after TDM2 provides time for the receiver processor to acquire timing information and network ID information before demodulating and decoding wide-area OIS 3908.

After block 4008, flow proceeds to block 4010 where a third pilot symbol is transmitted in block 4010. A third symbol (e.g., TDM3) is used to convey second information including network identification information (e.g., LOI ID) about the second network. The network identification information about the second network may include at least a portion of the network identification information (e.g., WOI ID) about the first network, as described IN the co-pending patent application entitled "METHOD AND APPROACATS FOR COMMUNICATION NETWORKING FIRFIERS IN A COMMUNICATION SYSTEM" filed on 28.8.2006, Michael Wang, docket No. 040645U3B1.

After transmitting the third pilot symbol (e.g., TDM3) at block 4010, flow proceeds to block 4012 for transmitting a second network transition pilot channel (e.g., LTPC 3916) and at least overhead information (e.g., local OIS 3918 and FDM pilot 3920) for the second network. Also, as an example, because the transition channel follows TDM pilot symbols (e.g., TDM3), when a receiver (not shown) receives the transmitted symbols, the transition channel following TDM3 provides time for the receiver processor to acquire timing information and network ID information before demodulating and decoding the local OIS 3918. Flow then proceeds from block 4012 to block 4014 where process 4000 terminates at block 4014.

It is noted that process 4000 may be performed by a transmitter and similar devices. An example of such a transmitter 4100 or processor 4102 for use in a transmitter is shown in fig. 41. In this example, transmitter 4100 comprises a processor 4102, processor 4102 having a modulator 4104, modulator 4104 to modulate data to be assembled into a superframe to be transmitted. Examples include TDM and FDM pilot symbols, as well as OIS data and wide area data, local area data. Which outputs modulated data to a superframe assembler 4106, the superframe assembler 4106 for assembling superframes with data from the modulator 4104 and transition pilot channels in the manner shown in the example of fig. 39 and 40. The assembled data is actually transmitted wirelessly through the transmitter circuitry 4108, e.g., an RF chip, and the antenna 4110. The processor 4102 may perform the functions of blocks 4104 and 4106 in firmware, hardware, software, or a combination thereof, the processor 4102 may also communicate with the memory 4112, and the memory 4112 stores instructions used and executed by the processor 4102.

Fig. 42 illustrates another example of a processor 4200 (or a transmitter only) for use in a transmitter for transmitting frames according to the present disclosure. As shown, a transmitter or a processor used in a transmitter 4200 includes a module 4202 for transmitting a first symbol for communicating at least timing information. The example discloses that the first symbol is preceded by an OFDM pilot symbol TDM 1. Processor 4200 further includes a module 4204 for transmitting second pilot symbols for communicating first information including network identification information regarding a first network, such as a wide area network. As described above, examples of the second pilot symbol include TDM2, TDM2 including WOI ID information about the wide area network.

Processor 4200 also includes a module 4206 for transmitting at least first overhead information regarding the first network. As an example, this may include transmitting a wide-area OIS 3908. The module may also enable transmission of the transition pilot channel before and after transmission of the OIS. Processor 4200 further includes means 4208 for transmitting a third pilot symbol after transmitting the second pilot symbol and overhead information regarding the first network, the third pilot symbol for communicating second information, the second information including network identification information regarding the second network. As an example, the third pilot symbol transmitted by module 4208 is TDM 3. Note that in this example module 4208 waits until module 4206 transmits OIS information before transmitting TDM 3.

Finally, processor 4200 also includes, by way of example, transmission circuitry or module 4210 that assembles transmissions of modules 4202, 4204, 4206, and 4208 into a frame or superframe, such as the superframe shown in fig. 39, and wirelessly transmits via antenna 4212. It is noted that modules 4202, 4204, 4206 and 4208 may operate sequentially as shown in accordance with the method of fig. 40, or simultaneously with module 4210 to ensure sequential ordering of superframes.

The examples disclosed in connection with fig. 30-42 feature the transmission of TDM2 and TDM3 before the wide-area and local-area OIS symbols, respectively, rather than simply transmitting sequentially in the order of the preamble, which can provide better utilization of processing resources and better updating of timing information at the receiver. Further, for example, the TDM pilot channels TDM2 and TDM3 are transmitted before the converted pilot channels (e.g., WTPC and LTPC) having meaningless data, so that the receiver has time to process and acquire timing information and network ID information before receiving OIS data.

The various illustrative logical blocks, modules, and circuits described in connection with the embodiments disclosed herein may be implemented or performed with a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g.: a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Those of skill in the art would understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

Claims (29)

1. A method for transmitting a wireless communication signal frame, comprising:

transmitting first pilot symbols in the signal frame, the first symbols being used to convey at least timing information;

transmitting second pilot symbols for transmitting first information including network identification information on a first network;

transmitting at least first overhead information regarding the first network; and is

Transmitting a third pilot symbol for transmitting second information including network identification information on a second network after transmitting the second pilot symbol and the overhead information on the first network.

2. The method of claim 1, further comprising:

transmitting a transition pilot channel after transmitting the third pilot symbol, wherein the transition pilot channel does not contain information that needs to be processed by a receiver.

3. The method of claim 1, further comprising:

transmitting a converted pilot channel after transmitting the second pilot symbol, wherein the converted pilot channel does not contain information that needs to be processed by a receiver.

4. The method of claim 3, further comprising:

transmitting at least second overhead information for the second network after transmitting the transition pilot channel.

5. The method of claim 1, wherein the second pilot symbols and the third pilot symbols each comprise 2048 samples.

6. The method of claim 1, wherein the first network is a wide area content network and the second network is a local area content network.

7. A method for transmitting a wireless communication signal frame, comprising:

transmitting first pilot symbols for transmitting first information, the first information including network identification information about a first network;

transmitting at least first overhead information regarding the first network;

transmitting second pilot symbols after transmitting the first pilot symbols and overhead information about the first network, the second pilot symbols for transmitting second information including network identification information about a second network; and is

Transmitting a first converted channel after transmitting the second pilot symbols, the first converted channel not containing data that needs to be processed by a receiver.

8. The method of claim 7, further comprising:

transmitting a second converted pilot channel after transmitting the first pilot symbols and before transmitting the at least first overhead information, wherein the second converted pilot channel does not contain information that needs to be processed by a receiver.

9. The method of claim 1, further comprising:

transmitting at least second overhead information for the second network after transmitting the second pilot symbols.

10. The method of claim 7, wherein the first pilot symbols and the second pilot symbols each comprise 2048 samples.

11. The method of claim 7, wherein the first network is a wide area content network and the second network is a local area content network.

12. A processor for use in a transmitter, the processor configured to:

transmitting first pilot symbols in a signal frame, the first symbols being used to convey at least timing information;

transmitting second pilot symbols for transmitting first information including network identification information on a first network;

transmitting at least first overhead information regarding the first network; and is

Transmitting a third pilot symbol for transmitting second information including network identification information on a second network after transmitting the second pilot symbol and the overhead information on the first network.

13. The processor of claim 12, wherein the processor is further configured to:

transmitting a transition pilot channel after transmitting the third pilot symbol, wherein the transition pilot channel does not contain information that needs to be processed by a receiver.

14. The processor of claim 12, wherein the processor is further configured to:

transmitting a converted pilot channel after transmitting the second pilot symbol, wherein the converted pilot channel does not contain information that needs to be processed by a receiver.

15. The processor of claim 14, wherein the processor is further configured to:

transmitting at least second overhead information for the second network after transmitting the transition pilot channel.

16. The processor of claim 12, wherein the second pilot symbols and the third pilot symbols each comprise 2048 samples.

17. The processor of claim 12, wherein the first network is a wide area content network and the second network is a local area content network.

18. A processor for use in a transmitter, comprising:

means for transmitting first pilot symbols in a signal frame, the first symbols for conveying at least timing information;

means for transmitting second pilot symbols for transmitting first information including network identification information about a first network;

means for transmitting at least first overhead information regarding the first network; and

means for transmitting third pilot symbols after transmitting the second pilot symbols and the overhead information regarding the first network, the third pilot symbols for communicating second information including network identification information regarding a second network.

19. The processor of claim 18, further comprising:

means for transmitting a converted pilot channel after transmitting the third pilot symbol, wherein the converted pilot channel does not contain information that needs to be processed by a receiver.

20. The processor of claim 18, further comprising:

means for transmitting a converted pilot channel after transmitting the second pilot symbol, wherein the converted pilot channel does not contain information that needs to be processed by a receiver.

21. The processor of claim 20, further comprising:

means for transmitting at least second overhead information for the second network after transmitting the transition pilot channel.

22. The processor of claim 18, wherein the second pilot symbols and the third pilot symbols each comprise 2048 samples.

23. The processor of claim 18, wherein the first network is a wide area content network and the second network is a local area content network.

24. A computer-readable medium encoded with a set of instructions, the instructions comprising:

instructions for transmitting first pilot symbols in a signal frame, the first symbols for conveying at least timing information;

instructions for transmitting second pilot symbols for transmitting first information including network identification information about a first network;

instructions for transmitting at least first overhead information for the first network; and

instructions for transmitting, after transmitting the second pilot symbol and the overhead information regarding the first network, a third pilot symbol for communicating second information including network identification information regarding a second network.

25. The computer-readable medium of claim 24, further comprising:

instructions for transmitting a transition pilot channel after transmitting the third pilot symbol, wherein the transition pilot channel does not contain information that needs to be processed by a receiver.

26. The computer-readable medium of claim 24, further comprising:

instructions for transmitting a transition pilot channel after transmitting the second pilot, wherein the transition pilot channel does not contain information that needs to be processed by a receiver.

27. The computer-readable medium of claim 26, further comprising:

instructions for transmitting at least second overhead information for the second network after transmitting the transition pilot channel.

28. The computer-readable medium of claim 24, wherein the second pilot symbols and the third pilot symbols each comprise 2048 samples.

29. The computer-readable medium of claim 24, wherein the first network is a wide area content network and the second network is a local area content network.