HK1130369B - Load detector for a dimmer - Google Patents

Description

Load detector for regulator

Technical Field

The present invention relates to load sensing circuits, and in particular, but not exclusively, to use in a regulator circuit (dimmercircuit).

Priority

The present application claims priority from:

australian provisional patent application No.2005906990 entitled "a Universal Dimmer" filed on 12.12.2005; and

australian provisional patent application No.2005906949 entitled "Load detector for a Dimmer" filed on 12.12.2005.

The contents of these applications are incorporated herein by reference.

Background

A regulator circuit is used to control the power supplied to a load, such as a lamp or motor, from an Alternating Current (AC) power source, such as mains. Such circuits often use a technique called phase controlled dimming. This enables the power supplied to the load to be controlled by varying the amount of time a switch connecting the load to the power supply is conducting in a given cycle.

For example, if the voltage provided by the power supply can be represented by a sine wave, the power provided to the load is at a maximum when the switch connecting the load to the power supply is always on. In this manner, all of the energy of the power source is delivered to the load. If the switch is turned off for a portion of the time in each cycle (positive and negative), the proportional amount of the sine wave is effectively isolated from the load, thus reducing the average energy provided to the load. For example, if the switch is turned on and off half way in each cycle, only half of the power will be delivered to the load. Because these types of circuits are often used with resistive loads rather than reactive loads, the effect of repeatedly switching the power on and off will not be apparent because the resistive load has an inherent inertia to it. The overall effect will be, for example in the case of a lamp, a smooth adjustment action in the brightness control of the lamp. This technique will be well understood by those skilled in the art.

Modern conditioning circuits typically operate in one of two ways-leading edge or trailing edge.

In the leading edge technique, the regulator circuit "cuts off" or blocks the conduction of the load during the leading portion of each half-cycle (hence the term "leading edge").

In trailing edge technology, the regulator circuit "cuts off" or blocks the conduction of the load during the trailing portion of each half-cycle.

Fig. 1A shows a functional representation of a leading edge regulator, while fig. 1B shows the function of a trailing edge circuit.

In fig. 1A, the shaded area representing the sine wave of the AC power applied to the load represents the portion of the cycle during which the regulator circuit allows current to reach the load. The blank area before the shaded area represents the portion of the cycle that is blocked by the regulator circuit, preventing power from being applied to the regulator circuit.

The opposite trailing edge situation is shown in fig. 1B. In this case, the shaded area at the beginning of the AC cycle represents the portion of the cycle where the regulator circuit allows current to reach the load. The blank area after the shaded area represents the portion of the cycle that is blocked by the regulator circuit, preventing power from being applied to the regulator circuit.

Which of the two techniques is used for a particular application depends on the type of load. Inductive load types (e.g., iron core low voltage lighting transformers and small fan motors) are best suited for leading edge operating modes, where the established half-cycle load current terminates at a substantially low level, thus avoiding unwanted voltage spikes. The capacitive load type is best suited for trailing edge operating modes, where the applied load voltage at the beginning of a half cycle ramps up from zero at a relatively slow rate, thus avoiding unwanted current spikes.

In practice, a suitable regulator must be selected for a suitable load. This requires multiple inventories of each type of regulator and the risk of an incorrect regulator being connected to a given load.

In one development of regulator circuits, regulators known as "adaptive" or "universal" regulators have been developed that can operate in both leading edge and trailing edge modes. This alleviates the need to prepare multiple regulators for each regulator type for different loads, and the installer does not have to be particularly concerned with the load type. In addition, from a manufacturing standpoint, only one type of installation of the regulator is required.

The universal dimmer design includes means for initially determining which operating mode is appropriate for the connected load, and a non-volatile memory element for later use in saving that operating mode.

In many existing devices, the load detection process and resulting mode transitions (if necessary) often result in lamp load flicker, which is undesirable in lighting fixtures.

It is an object of the invention to provide a circuit which is capable of detecting the presence of an inductive load.

Disclosure of Invention

According to an aspect of the present invention, there is provided a circuit for detecting the presence of an inductive load, the circuit comprising:

a voltage oscillation detector for detecting a voltage oscillation signal across the inductive load; and

a signal generator for generating a signal indicative of the presence of an inductive load when the voltage oscillation detector detects the voltage oscillation signal.

In one form the voltage oscillation detector comprises a peak detector for detecting a peak of the voltage oscillation signal and generating a dc signal corresponding to the detected peak.

In one form, the circuit further comprises a dc accumulator for accumulating the dc signal over time to provide an accumulated dc signal.

In another form the circuit further comprises a comparator for comparing the summed dc signal with a reference voltage and producing an output when the summed dc signal exceeds the reference voltage.

In another form the circuit further comprises an inductive load indicator for generating a signal indicative of the presence of an inductive load when the output of the comparator indicates that the summed dc signal exceeds the reference voltage.

In one form, the circuit further comprises a voltage spike detector for detecting the presence of a voltage spike across the load and generating a signal indicative of the presence of the voltage spike.

In one form the circuit further comprises a signal generator for generating a signal to the mode change circuit for changing the mode of operation of the regulator circuit from trailing edge to leading edge operation upon detection of the voltage oscillator signal.

In another form the circuit further comprises a signal generator for generating a signal to the mode change circuit for changing the mode of operation of the regulator circuit from trailing edge to leading edge operation upon detection of a voltage spike.

According to another aspect of the invention, there is provided a regulator circuit comprising the circuit of the first aspect of the invention.

In one form the regulator circuit is a trailing edge regulator circuit.

According to another aspect of the invention, there is provided a universal regulator circuit comprising a circuit according to the first aspect of the invention.

According to another aspect of the invention, there is provided a method for detecting the presence of an inductive load, the method comprising:

detecting a voltage oscillation signal across the load; and

upon detecting the voltage oscillation signal, a signal is generated indicating the presence of an inductive load.

In one form the method further comprises detecting a peak of the voltage oscillation signal and generating a dc signal corresponding to the detected peak.

In one form, the method further comprises detecting a peak of the voltage oscillation signal only during a short period of each half-cycle of the voltage signal applied to the load to minimise the effect of electrical noise.

In another form the method further includes accumulating the dc signal over time to provide an accumulated dc signal.

In one form the method further comprises comparing the summed dc signal to a reference voltage and producing an output when the summed dc signal exceeds the reference voltage.

In one form, the method further comprises generating a signal indicative of the presence of an inductive load when the summed dc signal exceeds the reference voltage.

In one form, the method further includes detecting the presence of a voltage spike across the load and generating a signal indicative of the presence of the voltage spike.

In one form the method further comprises generating a signal to change the mode of operation of the regulator circuit from trailing edge to leading edge operation upon detection of the voltage oscillator signal.

In another form the method further comprises generating a signal for changing the operating mode of the regulator circuit from trailing edge to leading edge operation upon detection of a voltage spike.

According to another aspect of the present invention, there is provided a voltage ringing detector for detecting a voltage ringing signal across an inductive load, the voltage ringing detector comprising:

a peak detector for detecting a peak of the voltage oscillation signal and generating a dc signal corresponding to the detected peak.

According to another aspect of the invention, there is provided a method of detecting a voltage ringing signal across an inductive load, the method comprising:

a peak value of the voltage oscillation signal is detected and a dc signal corresponding to the detected peak value is generated.

Drawings

The invention will now be described in more detail with reference to the following drawings, in which:

FIG. 1A shows a representation of the operation of a leading edge conditioner;

FIG. 1B shows a representation of the operation of the trailing edge modulator;

FIG. 2 illustrates a universal regulator in accordance with an aspect of the present invention, wherein the load type is detected each time the universal regulator is activated;

FIG. 3 illustrates a universal regulator circuit in which an inductive load detector is used to detect the load type in accordance with another aspect of the present invention;

FIG. 4 shows a block diagram of the use of an oscillation detector in one aspect of the invention;

FIG. 5 shows a voltage waveform across a regulator controlling a resistive load;

FIG. 6A shows a voltage waveform across a regulator controlling an inductive load;

FIG. 6B shows an enlarged version of the waveform of FIG. 6A;

FIG. 7 shows a block diagram of the main elements of the oscillation detector of FIG. 4;

FIG. 8 illustrates input and output waveforms of the peak detector of FIG. 7;

FIG. 9 illustrates a block diagram of the use of a voltage spike detector in one aspect of the present invention;

fig. 10 shows a circuit diagram of one form of the invention.

Detailed Description

According to one aspect of the invention, the universal dimmer of the present invention employs a method of selecting the appropriate dimmer operating mode each time the lamp load is activated. Thus, at load turn-off, there is no need to save the operating mode for the next load operation.

According to one aspect of the invention, a method of load type detection includes detecting the presence of regulator voltage oscillations in response to an inductive load connected thereto. The low voltage lighting transformer of standard construction exhibits sufficient "leakage inductance" to produce the desired regulator voltage oscillation characteristics. Detecting the dimmer voltage oscillation while initially at the lower trailing edge mode conduction angle enables switching to the leading edge mode when the lamp brightness level is relatively low, where any step change in the effectively applied load power is not apparent (with the same dimmer conduction angle setting, a lighting transformer driven in trailing edge mode will produce a higher output power level than when driven in leading edge mode.

According to another aspect of the invention, a secondary method of load type detection, in tandem cooperation with the primary method described above, enables high inductance loads, such as fan motors, to be easily detected as well, switching to leading edge mode. For this detection method, the trailing edge regulator voltage spikes due to high inductive loads are clamped to a safe acceptable level while being monitored to cause switching to the leading edge mode. In a similar manner to that described above, detecting the regulator voltage spike while initially at the lower trailing edge mode conduction angle enables switching to the leading edge mode when the motor is at a relatively lower conduction angle, i.e., before the motor even begins to rotate.

Only the relevant circuit parts for providing the discussed additional function of automatically detecting the connected inductive load will be described. The circuitry for generating the drive control signals necessary to effect the reverse or forward phase control mode of operation of the regulator is omitted as it may be standard circuitry in regulators commonly used today and is well known to those skilled in the art.

It is assumed that such a control circuit initially operates in a reverse phase, or trailing edge control mode, but can be triggered to forward phase control when required.

Referring to fig. 2, there is shown a universal regulator 1 connected to a load 30 and controlling the power applied to the load 30. Within the universal dimmer 1 is a load type detector 2 according to one aspect of the invention, the load type detector 2 detecting the type of the load 30 each time the universal dimmer 1 is activated.

In one particular form of the invention, the load type detector 2 is provided by an inductive load detector 3, as shown in figure 3. In this respect, the universal regulator 1 also has a mode control circuit 4 for changing the operating mode of the universal regulator 1. In this aspect, the universal dimmer 1 starts operating in a trailing edge mode, and upon detection of an inductive load by the inductive load detector 3 (and then generating a signal to the mode control circuit 4), the mode control circuit 4 changes the operating mode of the universal dimmer 1 from a trailing edge to a leading edge, as known to those skilled in the art.

Referring to fig. 4, a block diagram of one specific form of the inductive load detector 3 is shown. Shown is an oscillation detector 10 which receives as input a measurement of the load voltage appearing across the load 30. If the load 30 is an inductive load, using trailing edge regulation will result in a voltage ringing signal being induced across the load. When this voltage ringing signal is detected, the ringing detector 10 will generate a signal indicating the presence of an inductive load.

When used in a universal dimmer, this signal may be applied to known circuitry (not shown) to change the operating mode of the universal dimmer from trailing edge to leading edge, as will be understood by those skilled in the art.

In fact, if the oscillating circuit is used in another device that needs to detect oscillations or detect load type, this signal can be used as required by the device. For example, if the device is a non-universal regulator and can only operate in trailing edge mode, this signal can be used as a stop or other alert signal to prevent damage to the device and surrounding equipment.

In this embodiment, an indication signal is provided to the mode control circuit via latch 20.

To aid in understanding the function of the arrangement discussed above and to be discussed below, reference is now made to fig. 5, 6A and 6B, which show signal waveforms at various points in the arrangement.

Fig. 5 shows the voltage across the regulator at start-up at low conduction angle in trailing edge mode when connected to a resistive load 30. As shown, at the end of each half-cycle conduction period, the regulator voltage rises from near zero volts to the instantaneous line voltage.

Fig. 6A now shows the voltage across the regulator at start-up at low conduction angle in trailing edge mode when the regulator 1 is connected to an inductive load. In this case, at the end of the half-cycle conduction period, the regulator voltage rises from near zero volts to momentarily exceed the instantaneous line voltage.

Fig. 6B shows the amplified waveform of fig. 6A, showing the voltage across the regulator 1 at start-up at low conduction angle when connected to an inductive load.

The voltage oscillations or oscillations occur at a frequency substantially greater than the line voltage frequency, and as will be discussed further below, the oscillation amplitude is Vpk.

Turning now to fig. 7, the major elements of the oscillation detector 10 are shown. At the input of the oscillation detector 10 is a filter 11 for extracting high frequency components as described above with reference to fig. 6B. This signal component is typically an oscillating signal of about 1kHz from the mains ac voltage applied to the load (typically 50Hz-60Hz, depending on the country and application).

This extracted signal is then applied to a peak detector 12, which detects the peak in the oscillating signal. The detection of these peaks then produces a signal which is input to the comparator 13. A reference voltage is also applied to a second input of the comparator 13. When the level of the output signal from the peak detector 12 exceeds the reference voltage, the comparator 13 will generate a signal indicating that there is an oscillation, which in turn indicates that the load 30 is an inductive load.

Fig. 8 shows the waveform output from the filter 11 shown in fig. 7, the filter 11 being a high pass filter which filters out line voltage frequency components so that only an oscillating waveform component of amplitude Vpk appears at the input of the peak detector 12.

The effective response time of the peak detector is equal to several line voltage periods, so that the peak output voltage is only obtained after a corresponding number of successive ringing waveform phenomena have occurred.

When the amplitude of the peak detector output exceeds the associated reference voltage, the subsequent comparator activates a latch circuit to change the regulator operating mode to a leading edge mode. Fig. 8 shows a waveform in which the output of the peak detector rises to the value Vpk. Fig. 8 also shows the value of the reference voltage Vref in a dotted line.

When the regulator operating mode changes to the leading edge mode, the output of the peak detector slowly drops to zero because the decay time constant is relatively slow.

It will be appreciated that when this configuration is used for the universal regulating circuit, this output can be used to trigger a control circuit of known mode to change the mode of operation of the universal regulating circuit from trailing edge to leading edge, as described above.

Fig. 9 shows fig. 4 with the addition of a spike detector 40. Spike detector 40 may be used in conjunction with oscillation detector 10 to further improve the performance of the inventive arrangement.

The circuitry and operation of the preferred embodiment of the present invention will now be described in detail with reference to fig. 10.

The circuit of the invention can be divided into several functional blocks, as follows:

power transistor driving circuit

The load turn-on element in a typical inverting control regulator includes a pair of transistors, such as MOSFET devices. Appropriate gate input drive circuitry is required to provide control over the switching transition time as a means of limiting the level of EMI (electromagnetic interface) emissions (strict standards are applied in the industry to limit the level of EMI from devices such as regulators).

Transistors Q9 and Q10 as shown in fig. 10 are connected in series in a back-to-back manner to form an ac switch for controlling the connected load. In this embodiment, the transistors Q9 and Q10 are MOSFETs (metal oxide semiconductor field effect transistors) that are often used in power control applications. Resistors R23 and R24 help prevent parasitic oscillations that occur in the parallel MOSFET.

Application of the drive voltage to resistor R16 causes transistor Q6 to turn on, causing transistor Q8 to turn off and transistor Q7 to also turn on, thus causing the load control ac switch to be activated.

The values of resistors R18, R19, and R20 are selected to ensure that the on state of Q7 is the same as Q6, while Q8 is in the opposite on state. Q7 provides a level shifting function and Q8 provides an inverting function.

Resistor R21 limits the turn-on current through Q7 to the ac switch gate input, which is necessary to achieve controlled leading edge switching transition times, especially when the regulator is operating in a forward phase or leading edge control mode.

Resistor R22 limits the off current from the ac switch gate input through Q8 necessary to achieve a controlled trailing edge switching transition time, especially when the regulator is operating in reverse phase control mode.

The level shift transistor Q5 is configured to be in an opposite on state to Q6 using bias resistors R13, R14, and R15 and a blocking diode D6. This transistor provides an inverted pull-up drive for transient settling of the oscillation detector circuit, which will be described in detail below.

Oscillation detector circuit

The capacitor C1 determines, in part, the amplitude and frequency of the oscillating signal each time the mains half-cycle regulator turns off the transition. Diodes D1 and D2, along with the inherent inverting diodes associated with Q9 and Q10, form a diode bridge to provide full wave rectification of the regulator voltage waveform. Each time the mains half-cycle is switched off, a voltage appears on the dc-side of the bridge that starts to rise, followed by an oscillating voltage component centered around the instantaneous mains voltage.

At the time of the rising regulator voltage transition, the input coupling capacitor C3 becomes charged to a level equal to the peak oscillating voltage via the series element resistor R9, the diode D4 and the 15V dc bus.

During the first oscillation period, diode D4 becomes reverse biased and D5 is forward biased, after which the voltage drops. This causes local charge storage to be transferred from C3 through resistors R9, R26 and diode D5 to detector output capacitor C4, which therefore induces a negative voltage relative to the 15V bus.

The charge delivered to the detector output capacitor C4 accumulates with each mains half cycle oscillation and the capacitor voltage increases accordingly.

The filter input resistor R26 provides a high frequency "noise" rejection function. Resistor R27 represents the load on the dc side of the diode bridge circuit necessary to ensure that the bridge output voltage can drop at a similar rate as the regulator terminal voltage. Such a load element may be provided by a current source element of the 15V bus.

The detector discharge resistor R10 has sufficient resistance so that the discharge rate of the detector output capacitor C4 is relatively slow compared to the charge pulse repetition rate.

Diode D5 prevents detector output capacitor C4 from discharging during the up regulator voltage transition. This is necessary for the "detect" function.

Resistor R25, together with input coupling capacitor C3, provides a high pass filtering function to prevent the relatively slow rate of fall of the change in rail instantaneous voltage from acting on the detector output voltage. This provides the functionality of block 11 in fig. 7.

The comparator circuit 13 (see fig. 7) includes a bias current resistor R8, a reference zener diode Z2, and a transistor Q3. The emitter of Q3 forms the input of the comparator and the collector forms the output.

The latch circuit 20 includes transistors Q1 and Q2 and bias current resistors R4, R5, R6, and R7. The base of Q1 forms the latch input driven from the output of comparator 13, and the collector forms the output.

The detector disable (disable) transistor Q4 is normally biased on by a base current source resistor R11. In this case, the charge source of the detector output capacitor C4 is shunted, thus inhibiting the oscillation detector from operating. Transistor Q5, together with capacitor C5 and resistor R11, are used to temporarily remove the bias source to Q4 each time the mains half cycle switches off, thus allowing the oscillation detector to operate. This minimizes the susceptibility of the detector to ambient electrical noise as previously described.

When Q7 is not in the on state, Q5 is biased by resistors R13, R14, and R15. In the Q7 on state, diode D6 is used to remove the base current source of Q5.

Overvoltage detection circuit

As noted above, another function that may be implemented to enhance circuit functionality is the use of an over-voltage or voltage spike detection circuit.

When connected to a high inductance load such as a neon lamp based on a transformer core, operation of the regulator in reverse phase control mode will result in an excessive voltage spike across the regulator each time the mains half-cycle regulator switches off.

Turning off the switch in the presence of any appreciable level of current results in a sudden rise in the voltage across the load. As described by the well-known relationship:

V＝L＊dI/dt

where V is the voltage appearing across the inductive load;

l is the inductance value of the load; and

dI/dt is the rate of change of the current I through the load over time t

As will be appreciated by those skilled in the art.

It can be seen that the greater the rate of change of the current I through the load, the greater the voltage spikes that occur. Thus, the greater the current at which the switch is turned off, resulting in the current dropping to zero in a very short time, the greater the rate of change of the current and therefore the greater the voltage spike induced.

The over-voltage detection circuit arrangement is used firstly to safely limit the magnitude of the spike voltage and then to activate the latch circuit after the spike has been detected for a number of successive mains voltage half-cycles (e.g. 3-6 half-cycles).

Once triggered, the latch output state is used to inform the regulator control circuitry that regulator operation should change to a forward phase or leading edge control mode.

Referring again to fig. 10, diodes D1 and D2, together with the inherent inverse diodes associated with Q9 and Q10, form a diode bridge to provide full wave rectification of the regulator voltage waveform relative to the oscillation detector as described above. The series circuit of the varistor MV1 and the zener diode Z1 provides the necessary regulator terminal voltage spike clamping function.

During clamping, a voltage is induced across resistor R1, and detector output capacitor C2 can charge through resistor R2 and diode D3. The blocking diode D3 prevents the C2 from discharging through R2 and R1 for a relatively long time interval between voltage spikes.

The filter input resistor R2 provides a high frequency "noise" rejection function. The output resistor R3 is used together with the existing latch circuit input resistor R5 and transistor Q2 to form the basic comparator function to determine the required detector output voltage level to trigger the latch.

It will be appreciated that the foregoing has been described with reference to specific embodiments, but that many variations and modifications may be made within the scope of the invention.

In particular, the circuit may be used as a voltage oscillation detector for use in any suitable application. Furthermore, although the invention has been described in the context of a universal regulator such that it automatically detects the type of load connected to the regulator, it will be appreciated that the circuit may be applied to a conventional universal regulator, i.e. its mode of operation is determined from the first connection to the load and the operating information is stored in memory for subsequent use in that mode.

Alternatively, one or more of the circuits described can even be used in a non-universal regulator as a safety alarm to turn off a trailing edge regulator that is accidentally connected to an inductive load.

It will be further understood that throughout this specification, unless the context requires otherwise, the word "comprise", and variations such as "comprises" or "comprising", will be understood to imply the inclusion of a stated integer or group of integers but not the exclusion of any other integer or group of integers.

The reference to any prior art in this specification is not, and should not be taken as, an acknowledgment or any form of suggestion that such prior art forms part of the common general knowledge.

Claims (18)

1. A circuit for detecting the presence of an inductive load, the circuit comprising:

a voltage ringing detector for detecting a voltage ringing signal across an inductive load, the voltage ringing detector comprising:

a filter for extracting the voltage oscillating signal, wherein the filter filters out line voltage frequency components in the signal across the inductive load; and

a peak detector for detecting a peak in the voltage oscillation signal provided by the filter and generating a dc signal corresponding to the detected peak;

a comparator for comparing the dc signal with a reference voltage and generating a signal indicative of the presence of a voltage oscillation signal if the dc signal from the peak detector exceeds the reference voltage; and

a signal generator for generating a signal indicative of the presence of an inductive load when the voltage oscillation detector detects the voltage oscillation signal.

2. The circuit of claim 1 further comprising a dc accumulator for accumulating the dc signal over time to provide an accumulated dc signal.

3. The circuit of claim 2, said comparator comparing the summed dc signal with said reference voltage.

4. The circuit of claim 3 further comprising an inductive load indicator for generating a signal indicative of the presence of an inductive load when the output of the comparator indicates that the summed dc signal exceeds the reference voltage.

5. The circuit of claim 1, further comprising a voltage spike detector to detect the presence of a voltage spike across the load and generate a signal indicative of the presence of the voltage spike.

6. The circuit of claim 1, further comprising a signal generator for generating a signal to the mode change circuit for changing the operating mode of the regulator circuit from trailing edge to leading edge operation upon detection of the voltage oscillation signal.

7. The circuit of claim 5, further comprising a signal generator for generating a signal to the mode change circuit for changing the operating mode of the regulator circuit from trailing edge to leading edge operation upon detection of a voltage spike.

8. A regulator circuit comprising the circuit of claim 1.

9. The regulator circuit of claim 8 wherein the regulator circuit is a trailing edge regulator circuit.

10. A method for detecting the presence of an inductive load, the method comprising:

detecting a voltage oscillation signal across a load, wherein detecting the voltage oscillation signal comprises:

filtering a signal across the inductive load using a filter to filter out line voltage frequency components and extract a voltage ringing signal; and

detecting a peak in the voltage oscillation signal and generating a dc signal corresponding to the detected peak; and

comparing the dc signal to a reference voltage and generating a signal indicative of the presence of a voltage oscillation signal if the dc signal exceeds the reference voltage; and

upon detecting the voltage oscillation signal, generating a signal indicative of the presence of an inductive load.

11. The method of claim 10, further comprising detecting a peak of the voltage oscillation signal only during a short period of each half-cycle of the voltage signal applied to the load to minimize the effect of electrical noise.

12. The method of claim 10 further comprising accumulating said dc signal over time to provide an accumulated dc signal.

13. The method of claim 12 wherein the step of comparing said dc signal to a reference voltage further comprises comparing an accumulated dc signal to said reference voltage and generating a signal indicative of the presence of a voltage oscillation signal if the accumulated dc signal exceeds the reference voltage.

14. The method of claim 10, further comprising detecting the presence of a voltage spike across the load and generating a signal indicative of the presence of the voltage spike.

15. The method of claim 10, further comprising generating a signal to change the operating mode of the regulator circuit from trailing edge to leading edge operation upon detection of the voltage oscillation signal.

16. The method of claim 14, further comprising generating a signal for changing the operating mode of the regulator circuit from trailing edge to leading edge operation upon detection of a voltage spike.

17. A voltage ringing detector for detecting a voltage ringing signal across an inductive load, the voltage ringing detector comprising:

a filter for extracting the voltage oscillating signal, wherein the filter filters out line voltage frequency components in the signal across the inductive load;

a peak detector for detecting a peak in the voltage oscillation signal provided by the filter and generating a dc signal corresponding to the detected peak; and

a comparator for comparing the dc signal with a reference voltage and generating a signal indicative of the presence of a voltage oscillation signal if the dc signal from the peak detector exceeds the reference voltage.

18. A method of detecting a voltage ringing signal across an inductive load, the method comprising:

filtering a signal across the inductive load using a filter to filter out line voltage frequency components and extract a voltage ringing signal;

detecting a peak in the voltage oscillation signal and generating a dc signal corresponding to the detected peak; and

the dc signal is compared to a reference voltage and if the dc signal exceeds the reference voltage, a signal is generated indicating the presence of a voltage oscillation signal.