HK1188004A - Display system - Google Patents

Description

Display system

The present application is a divisional application of an invention patent application having an application date of 2008/12/3, application number of 200880126622.1 (international application number of PCT/US 2008/085315), entitled "data and power distribution system and method for large-scale display".

Technical Field

The present invention relates to a display system.

Background

Cross-reference to related applications: the present application is directed to co-pending U.S. serial No. 12/001,312 entitled "energy System and method a LED Display," U.S. serial No. 12/001,276 entitled "Large Scale LED Display System," and U.S. serial No. 12/001,315 entitled "Large Scale LED Display," each of which is filed concurrently with the present application.

LED displays are known which are composed of a plurality of LED modules, wherein each LED module is used for one pixel of the display. Each LED module has a plurality of different color LEDs, the brightness of which is controlled to produce a pixel having a large number of different colors. Examples of these known types of LED displays are shown in Phares 5,420,482 and Yoksza et al 5,410,328.

In both Phares 5,420,482 and Yoksza et al 5,410,328, the LED modules are connected in series in a string or daisy chain (daisy chain) configuration, wherein a data stream is input to one LED module that extracts a subset of the data for its module from the data stream and passes the remainder of the data stream or the complete data stream to the next LED module in the series. 7,253,566 to Lys et al and 6,016,038 to Mueller et al disclose systems for lighting or illumination, respectively, comprising LED lighting units or nodes connected in a bidirectional daisy chain configuration or a binary tree configuration, wherein two nodes are connected to the output of a single node. While these types of configurations may be suitable for illuminated or standard size displays, such as the size of a computer monitor or a standard television, they are not suitable for large scale displays such as video display signs (signs). This is because if one or more modules in the chain or tree fail, the downstream modules will not be able to receive their data, rendering the display inoperable.

Disclosure of Invention

In accordance with the present invention, the shortcomings of prior systems and methods for distributing data and power in an LED display are overcome. The data and power distribution system and method of the present invention enables large scale LED displays to be extremely robust, such that: if some or even many of the individual LED modules of the display fail, the display is not rendered inoperable and the display is capable of displaying recognizable video presentations or graphics. Furthermore, the power distribution flow of the present invention enables large scale LED systems to maintain uniform pixel brightness in the display.

According to one embodiment of the present invention, an LED display includes a plurality of pixel modules connected in a grid configuration. Each pixel module in the set of modules of the display comprises: a module carrier; a plurality of colored LEDs mounted in the bracket; and a controller of the module capable of receiving a data stream from at least three other pixel modules of the display. The controller extracts data for controlling the LEDs of its module from the received data stream, and the controller sends a portion or all of the received data stream to at least three other pixel modules of the display.

In accordance with another feature of the invention, an LED display includes a plurality of pixel modules connected in a grid configuration, wherein each pixel module in a set of modules of the display includes: a module carrier; a plurality of colored LEDs mounted in the bracket; at least four bi-directional data ports for allowing the pixel module to communicate with at least four other pixel modules; and a controller for the module. The controller extracts data for controlling the LEDs of its module from a data stream received via one of the data ports, and the controller sends at least a portion of the received data out of the module via the other data ports.

In accordance with another feature of the present invention, an LED display includes a plurality of master light modules, wherein each master light module is coupled to an associated group of one or more slave light modules and to at least one other master light module. Each main light emitting module includes: a module carrier; a plurality of multi-color LEDs mounted in the module carrier; a circuit for controlling the brightness of the LEDs in the module carrier; and a controller. The controller receives the data stream and extracts data for the LEDs of the master module and data for the slave modules associated with the master module from the received data stream. The controller also sends data for the LEDs in the master module to the circuitry for controlling the LEDs and sends data for the associated slave module to the corresponding slave module. The controller also sends at least a portion of the received data stream to at least one other master module. Each slave light emitting module includes: a module carrier; a plurality of multi-color LEDs mounted in the module carrier; and circuitry for controlling the brightness of the LEDs in the module carrier in response to data received from its associated main module.

In yet another embodiment of the present invention, an LED display system includes a plurality of master light modules, wherein each master light module is coupled to an associated group of one or more slave light modules. Each main light emitting module includes: a module carrier; a plurality of multi-color LEDs mounted in the module carrier; a circuit for controlling the brightness of the LEDs in the module carrier; a master module controller; and at least one switching voltage regulator. The master module controller receives a data stream comprising data for the LEDs of the master module and its associated group of slave modules and sends the slave module data to the associated group of slave modules. At least one switching voltage regulator receives an input dc voltage and steps down the input voltage to provide a regulated dc voltage at a plurality of different voltage levels, wherein the regulated stepped down voltage at least one voltage level is coupled to a bank of slave modules associated with the master module. Each slave module of this embodiment includes: a module carrier; a plurality of multi-color LEDs mounted in the carrier; a circuit for controlling the brightness of the LEDs in the module carrier; and a linear voltage regulator. A linear voltage regulator receives a regulated dc voltage from an associated master module, the linear voltage regulator providing power to one or more components of the slave module.

In still another embodiment of the present invention, a display system includes: a power hub that converts ac power to unregulated dc power; a first set of LED modules, each LED module in the first set comprising: a module carrier; a plurality of LEDs mounted in the module carrier; a circuit for controlling the brightness of the LEDs of the module; and a switching voltage regulator receiving unregulated dc power and providing regulated dc power distributed to the associated plurality of LED modules in the second set; each LED module of the second set of LED modules has: a module carrier; a plurality of LEDs mounted in the module carrier; a circuit for controlling the brightness of the LEDs of the module; and a linear voltage regulator that receives regulated dc power from the first set of modules and converts the received power to a lower regulated dc voltage.

These and other advantages and novel features of the invention, as well as details of an illustrated embodiment thereof, will be more fully understood from the following description and drawings.

Drawings

FIG. 1 is a block diagram illustrating an LED display system in accordance with the present invention;

FIG. 2 is a partial front view of the portion of the LED display shown in FIG. 1;

FIG. 3 is a block diagram of a data hub of the LED display system of FIG. 1;

FIGS. 4A and 4B are block diagrams of the FPGA of the data hub of FIG. 3;

FIG. 5 is a block diagram of a primary LED module according to the present invention;

FIGS. 6A and 6B are block diagrams of the FPGA of the main LED module of FIG. 5;

FIG. 7 is a block diagram of a slave LED module according to the present invention;

FIG. 8 is a schematic diagram of a pulse width modulation circuit for controlling the brightness of the LEDs of the master and slave modules; and

fig. 9 is a block diagram of a power hub in accordance with one embodiment of the present invention.

Detailed Description

The large-scale LED display 10 for indoor or outdoor use according to the present invention has a size of height by width on the order of 3m × 6m to 24m × 32m (or approximately 10ft × 20ft to 80ft × 105 ft). However, it should be understood that the present invention may be used with larger or smaller displays as well. A display of approximately 24m x 32m has 480 pixels x 640 pixels or a total of 307,200 pixels. Since such a display 10 is so large, only a portion of the display is shown in fig. 1. Furthermore, a robust display is desired due to its size. As described in detail below, the data and power distribution system and method of the present invention provide a robust display in which failure of a single component will not render the display, or even a row or column of the display, inoperable.

Each pixel of the display 10 is generated by a module 12, 14 having two red LEDs 16, two blue LEDs 18, and two green LEDs 20 mounted in a tray 22 as shown in fig. 2. Circuitry within module tray 22, described below, controls the brightness of the red, green, and blue LEDs to create pixels having a large number of different colors, as is well known in the art. Although each module 12, 14 is shown in fig. 2 as having pairs of red, green, and blue LEDs, the number of red, green, and blue LEDs may vary depending on the flux density (flux density) of the individual LEDs and/or the spacing between the individual modules. Details of the mechanical and/or structural features of the modules 12, 14 and support structure of the Display 10 are disclosed in co-pending patent application serial No. ______ entitled "Large Scale LED Display," filed concurrently herewith, and incorporated by reference herein in its entirety.

Two types of pixel modules are employed in the display 10: a master LED module 12 and a slave LED module 14. In a segment (segment) 24 of the display, each master module is associated with a set of slave modules. In accordance with a preferred embodiment of the present invention, each segment 24 has one master module and 15 slave modules to generate 16 pixels of the display. It is apparent, however, that the number of slave modules may vary from zero to any number depending on which aspects of the present invention are used. In a preferred embodiment, the segments 24 of the display 10 are linear, extending along columns of the display 10. However, the segments may alternatively extend along the rows of the display. Furthermore, the segments need not be linear, but may be composed of a block of modules comprising at least one master LED module. For a 480 x 640 display with linear segments of 16 pixels, there are 30 segments 24 in each column of the display. The segments 24 are preferably aligned so that each master module is in a row of master modules. Thus, for a 480 x 640 display, there are 30 rows of masters, with 640 masters in each of the rows and 15 rows of slaves between each row of masters.

Each primary LED module 12 is connected to adjacent primary LED modules in its row to allow direct communication therebetween. Each master module is also connected to the master modules of adjacent segments in its column to allow direct communication between them. In this way, a master module is able to communicate directly with up to four other master modules, and with each of the fifteen slave modules in the master module segment.

For easier deployment, the display 10 is arranged in a plurality of panels 26, 27. In accordance with a preferred embodiment of the present invention, each panel has sixteen columns of LED modules, with a full height panel having 480 rows of LED modules, but each display panel can have any height and width desired. A 480 x 640 display having display panels with sixteen columns would employ forty display panels. Each display panel 26 may receive redundant data from both the main data hub 28 and the redundant data hub 29 to control all pixels of the panel 26. Each data hub may provide data for all pixels of two adjacent display panels 26 and 27 by providing two data streams, one for panel 26 and one for panel 27. In addition, each data hub can provide redundant data to each display panel over two data cables. In this way, the data hub 28 provides all of the data for the pixels of the display panel 26 on the data cable 30 and may provide redundant data for the panel 26 on the data cable 31. The display panel 26 may receive the same data for all pixels of the panel from the data hub 29 over the data cable 32 or the data cable 33. In this way, the display panel 26 is able to receive data from both data hubs 28 and 29 over any of four data cables 30, 31, 32 and 33. The data hub 28 also provides all of the data for the pixels of the display panel 27 on a data cable 34 and may provide redundant data for the panel 27 on a data cable 35. The display panel 27 receives the same data from the data hub 29 over the data cable 36 or the data cable 37. In this way, the display panel 27 is able to receive redundant data over any of the four data cables 34, 35, 36 and 37.

The redundant data streams received by the display panel 26 over the four data cables 30-33 are input to four respective primary LED modules. However, in the preferred embodiment, only one of the four redundant inputs at a time is active for carrying pixel data. The main data hub enables redundant connections only when an existing connection fails. In addition, the redundant data hub sends data to the panel only when it detects that the main data hub is no longer driving the panel. Each master receiving the data stream extracts the data intended for the master and associated slave in its segment. Each master receiving the data stream then outputs the data stream to its neighboring master in the row and to the master in the neighboring segment as discussed in detail below. Each master module may strip data for its segments from the received data stream and send only the remainder of the data stream to the other master modules. However, in a preferred embodiment, each master module does not strip its data from the data stream, but rather acts as a forwarder that passes the entire received data stream directly to up to three other master modules after extracting a copy of the data for its segment from the data stream. Thus, the data stream for the display panel 26 is distributed throughout the panel 26 by each master module 12. Since the master module 12 can receive data streams from up to four other master modules 12, failure of one or two master modules will not render the display, or even an entire column or row of the display, inoperable as in prior art systems. Failure of one master module will affect only sixteen of the 307,200 pixels of the 480 x 640 pixel display 10. Failure of one slave module 14 will not affect any other modules in the display 10.

As shown in fig. 1, the system for controlling the display 10 includes a main controller 40. The main controller 40 includes a Central Processing Unit (CPU) 42 and associated memory to control and monitor the rest of the display system. The main controller 40 also includes a video processor 44. Video processor 44 may receive uncompressed video or compressed video in any format, such as MPEG4 or h.264, among others. Video processor 44 scales the video to the size of display 10 and provides uncompressed video in a conventional raster scan format to communication hub 46. The communication hub 46 includes a memory such as an SRAM and a microcontroller. Raster scanned video data is stored in a memory of communications hub 46. Video data from the communication hub memory is read from the memory and forwarded to the data hubs 28 and 29 column by column in reverse order so that the data for the bottom most pixel of the first column is transferred to the data hubs first. In one embodiment, each packet of data sent by the communications hub 46 to the data hubs 28 and 29 includes a column header identifying the column number of the data in the packet followed by a segment header including the segment number associated with the data. The segment header may also include a control word identifying the status request and a pixel count identifying the number of pixels in the segment. The pixel count indicates the number of bits of the subsequent pixel data for each module in the segment. The segment header is followed by segment pixel data in which three bytes of data for each pixel are sent to control the brightness of the corresponding red, green, and blue LEDs of that pixel. In an alternative embodiment, the communications hub or data hub may send different types of packets to the display panel, where the packets include a packet type identifier. Different types of packets that may be sent include: the master module enumerates (enumeration) messages; display data and/or control messages; a master module status request; and a slave module status request. The packet comprising pixel data comprises a master module address consisting of the column number and segment number of the master module and at least one slave module address, and subsequently LED data for the slave module. Note that each master module includes a slave microcontroller circuit for controlling the LEDs of the master module. The slave microcontroller in the master module has a slave address. In this way, the master module has both a master module address and an associated slave address for its LED microcontroller. The display data packet also includes commands that further identify subsequent data as display data for the respective master or slave module, or display data for a segment of the module. This alternative packet structure allows greater flexibility so that different packet types with various commands can be sent to the display panel.

The communication hub 46 transmits a redundant data stream containing data for the entire display 10 over a pair of GbE links 48 and 49 connected to the respective data hubs 28 and 29. Each data hub is responsive to the received data stream to extract the data columns for both panels controlled by the data hub, which passes the remaining portion or the entire data stream as received to the other data hub. Thus, for all data hubs in the display system, the data stream is distributed from data hub to data hub. Specifically, the data hub 28 receives a data stream containing data for the entire display 10 on the GbE link 48. Data hub 28 extracts the data for columns 1-16 of display panel 26 and the data for columns 17-32 of display panel 27 and then passes the entire data stream on GbE link 50 to data hub 51. The data hub 51 then extracts the data for the next pair of display panels in the sequence (display panels 52 and 53) and then passes the entire data stream to the data hub 56. Similarly, the data hub 29 receives a data stream containing data for the entire display 10 on the GbE link 49. The data hub 29 extracts the data for columns 1-16 of the display panel 26 and the data for columns 17-32 of the display panel 27 and then passes the entire data stream on the GbE link 54 to the data hub 55. The data hub 55 extracts the data for the display panels 52 and 53 and passes the entire data stream to the data hub 58. The distribution of the data streams continues to each pair of data hubs until all data hubs controlling the display 10 receive their data for the video frame. The data distribution then continues for all frames of the video presentation.

The structure of each data hub is shown in fig. 3. Each data hub includes a dual GbE interface 60 that connects to the communication hub 46 or an upstream data hub, and a downstream data hub, as described above. The received data stream is stored in the SRAM64 by the data hub FPGA 62. The data hub FPGA62 stores data in the SRAM64 and reads data from the SRAM64 in accordance with the software/firmware stored in the flash memory 68. The data hub includes four data ports 70-73 for connecting the data hub to LVDS cables for a pair of display panels. For example, for the data hub 28, the ports 70 and 71 would be connected to the LVDS cables 30 and 31 for the two primary LED modules of the panel 26, and the data ports 72 and 73 would be connected to the LVDS cables 34 and 35 for the two primary LED modules of the panel 27.

Each data hub performs diagnostics on its display panel in addition to passing video data to its associated pair of display panels. As shown in fig. 9, power is supplied to the data hub from the associated power hub. The data hub will monitor the status of its associated power hub and communicate the status of its associated power hub and its associated display panel to the communication hub 46 of the main controller 40. As shown in detail in fig. 4, the data hub FPGA62 includes a shared memory controller with Direct Memory Access (DMA) to pass video data and messages into and out of the SRAM64 for the display panel and the main controller 40.

The structure of each main LED module 12 is shown in fig. 5 and 6. Each main module includes a microcontroller 80, and associated drive circuitry shown in fig. 8 for controlling the brightness of the red LED82, green LED84, and blue LED86 of the main module 12. The microcontroller 80 of the master module 12 controls the LEDs in the same manner as described in detail below for the slave module 14, and as noted above, the microcontroller 80 has an associated slave module address. In addition to performing the LED control functions described below with reference to fig. 8, the microcontroller 80 of the main module 12 programs the main module FPGA controller 90 in accordance with configuration information stored in the flash memory 88. Each master LED module 12 includes four bi-directional ports coupled to the FPGA controller 90 of the module: north port 91, east port 92, south port 93, and west port 94. The master module's controller 90 communicates with each of its associated slave modules through a common I2C serial bus 92 connected to a north port 91. The controller 90 communicates with up to four other master LED modules 12 via respective LVDS cables connected to ports 91, 92, 93 and 94.

Power for the main LED module 12 is received through the data hub from a power cable coupled to the module 12 as shown in fig. 9 from the power hub. The power received by the main LED module is unregulated and is in the range of 15-36 volts DC. The switching voltage regulator 96 in block 12 drops the input voltage to a regulated 9V. A rail voltage of 9V is distributed to the slave LED modules in the segment of the master module via north port 91. A block 98 within the main module 12 includes another switching voltage regulator that steps down the 9V mains voltage to 3.3V. A pair of linear voltage regulators, also within block 98, drop 3.3V to 2.5V and 1.2V for the master LED module FPGA controller 90.

The FPGA controller 90 as shown in figure 6 includes a downstream packet multiplexer 100. The downstream packet multiplexer 100 is coupled to the respective data ports 91-94 through an asynchronous serial receiver and data decoder 100 and 104, and an input filter 105 and 108. The receiver and decoder 100 receives and recovers the data stream on the corresponding port 104. Each input filter 105 and 108 identifies the input flow as either a hub flow (i.e., data originating from the data hub for downstream distribution) or an MLM flow (i.e., data originating from the master module such as a response or reply packet to be sent back to the data hub). The input filter 105-108 forwards the packet only when the input stream is valid. The downstream packet multiplexer 100 selects one of the four input ports as an upstream port and forwards packets originating from the data hub from the selected upstream port. If the packet originating from the data hub is an enumeration packet, the packet is forwarded to a master module enumeration state machine, such as controller/processor 112.

The master module enumeration state machine 112 performs an enumeration process to determine the location and thus the address of the master LED module within the display panel 26 so that each pixel of the display may be addressed independently to pass data to it. The enumeration process performed by the state machine 112 is as follows. The master LED module address register holding the segment number and column number of the master module in the enumeration state machine 112 is zero when the display is powered on. The received first master LED module enumeration message is generated by the data hub and simply contains the segment number and column number of the hub. Enumeration messages from the data hub are sent to only one master LED module. If the master module does not correspond to a data hub, an enumeration message will be sent to another master LED module that is directly connected to the data hub. When the master LED module receives an enumeration message, it determines its own location, i.e. the address in the display, as follows. If a message is received on the master module's south port 93, the enumeration state machine 112 sets the master module's segment number equal to the segment number in the received message plus one and sets the master module's column number equal to the column number in the received message. If an enumeration message is received via the west port 94 of the module 12, the enumeration state machine 112 sets the master module's segment number equal to the segment number in the received message and sets the master module's column number equal to the column number in the received message plus one. If an enumeration message is received via the north port 91 of the module, the enumeration state machine 112 sets the module's segment number equal to the segment number in the received message minus one and sets the column number equal to the column number in the received message. Finally, if an enumeration message is received via the east port 92, the enumeration state machine 112 sets the module's segment number equal to the segment number in the received message and sets the column number equal to the column number in the received message minus one. The segment number and column number determined for the master are stored in the address register of the module. The enumeration state machine 112 overwrites the segment number and column number in the received enumeration message with the segment number and column number determined for its module. The enumeration state machine 112 then forwards the modified enumeration message out to three other master modules on three of the bidirectional ports 91-94 (i.e., all of the bidirectional ports 91-94 except the one of the ports 91-94 on which the enumeration message was first received).

As noted above, at any time one of the input ports 91-94 is selected as the source of display data and messages from the data hub, the selected input port is assigned as the upstream port. The downstream packet multiplexer 100 selects the port whose associated input filter first announces or identifies the active hub stream (i.e., the stream originating from the data hub) as the upstream port. Three remaining ports of 91-94 are designated as downstream ports. The upstream ports are used in downstream packet multiplexer 100 to determine which hub stream to forward and in upstream packet multiplexer 109 to determine which ports to monitor for upstream packets. The upstream packet multiplexer 109 forwards the MLM stream back to the data hub. If the upstream port selection is active and the hub stream received via the selected upstream port is an active hub stream, the stream is forwarded and output from the master LED module to three other master LED modules via three downstream ports. In the reverse direction, if the upstream port selection is valid and the MLM reply message received on any of the three downstream ports is a valid MLM flow, the MLM reply message is output from the module 12 on the selected upstream port.

Two conditions will trigger the downstream packet multiplexer 105 to select a different upstream port: a loss of synchronization from the data decoder associated with the initial upstream port, or a change of stream type received on the current upstream port to a valid MLM stream. When any of these conditions occurs, the downstream packet multiplexer 100 waits for 1 millisecond and performs the upstream port selection process as described above.

The master packet processor 113 processes data hub packets addressed to the master module or having fragment and column header fields that are both zero (i.e., broadcast messages such as are used for enumeration processing). After the enumeration process of the display 10 has completed such that each primary LED module has determined its location (i.e., segment number and column number in the display) and has selected the upstream port, the primary packet processor 113 of the primary LED module may extract the video data for its segment from the data stream. The main packet processor 113 of the main LED module extracts video data for its segment by detecting the address of the main module in the received data packets, and processes those data packets addressed to the main module. The extracted pixel data is written to the message FIFO108 by the packet processor 113. At the end of the message, the command bytes are written to the command FIFO 115. The command FIFO115 also holds information indicating whether the received message ended with a normal end of packet indication, and a message byte count indicating the number of bytes in the message FIFO114 for the received message. The I2C controller 116 reads and processes messages from the message FIFO114 in response to commands in the command FIFO 115. The controller sends a valid message onto the I2C bus 92 to cause the message to be broadcast to the master module microcontroller 80 and to each slave module of the segment. In addition, the controller 116 sends the slave LED module response data or status reply message to the upstream processor 117.

The upstream processor 117 of the FPGA controller 90 maintains master LED module status information including the status of all four receivers 101 and 104. The upstream processor 117 caches the slave module state information received on the I2C bus 92 in internal RAM. The upstream processor 117 generates master and slave status acknowledge messages in response to the strobe (strobe) from the packet processor 113. The processor 117 also forwards status acknowledge messages received from other master modules via the downstream port and upstream packet multiplexer 109 so that the status of each module of the display panel is ultimately communicated back to the data hub for that display panel. The status message is coupled from the upstream processor 117 to an upstream transmitter encoder 118 via an upstream FIFO119, wherein the upstream transmitter encoder 118 is coupled to the transmitter 121 and 124 of the selected upstream port 91-94. Similarly, the state machine 112 couples the hub stream received via the master module's upstream port to the three assigned downstream transmitters 121 and 124 associated with the three downstream ports 91-94 via the downstream FIFO125 and the downstream transmitter encoder 126.

It should be understood that the master LED modules 12 are connected in a grid configuration, wherein each master module 12 is connected to four other master LED modules 12 except for those along the edges of the display panel 26. Each master module 12 in the set is capable of receiving data from any of the four other master LED modules connected thereto. However, each master module 12 responds to the data flow from one master module connected to its upstream port. As described above, a given master module will respond to a data stream from the master module connected to its upstream port to extract data therefrom and send the received data stream out to three other master LED modules connected to respective ones of its three downstream ports. If the first master module fails and that master module is connected to the upstream port of a given master module, the upstream port of the given master module is changed to a different port by its downstream packet multiplexer 100 so that the given master LED module can receive a data stream from one of the other three master LED modules connected to it. The data distribution mechanism of the present invention is extremely robust, since each master LED module can receive data from up to four other master modules.

Fig. 7 illustrates the structure of the slave LED module 14. Each slave LED module 14 includes a linear voltage regulator 131 which responds to 9V from the associated master LED module to drop the rail voltage to 3.3V. Each slave module 14 also includes a microcontroller 130 that generates red, green and blue Pulse Width Modulation (PWM) control signals that are coupled to respective drive and sense circuits 132, 133 and 134. The drive and sense circuit 132 is coupled to a pair of red LEDs 136 of the slave module 14 to control the brightness of the red LEDs. The circuit 133 is coupled to a pair of green LEDs 138 of the slave module 14 and the circuit 134 is coupled to a pair of blue LEDs 140 of the slave module 14 to control the brightness of the respective green and blue LEDs. Each of the drive and sense circuits 132, 133 and 134 are shown in detail in fig. 8. As shown therein, the microcontroller 130 outputs a PWM control signal to drive the gate of the MOSFET142 through a series current limiting resistor 144. When the microcontroller 130 drives the gate of the MOSFET142 high, the MOSFET142 conducts, allowing current to flow through the LED 136. Once the voltage on the source resistor rises high enough to bias transistor 146, transistor 148, which is connected to the gate of MOSFET142, turns on, preventing the voltage from the source resistor from increasing further. The values of resistors 150 and 152 are the same. Furthermore, the frequency of the PWM control signal is preferably on the order of 10 kHz. Note that the microcontroller 80 of the master LED module controls the LEDs of the master module via the same drive and sense circuitry shown in fig. 8.

The microcontrollers 80 and 130 of the master and slave modules have analog inputs for receiving the red, green and blue sensing signals. The microcontroller monitors these sense signals to determine whether the corresponding LED is on or off. This information is included in the status information of each of the slave LED module 14 and the master LED module 12. Microcontrollers 80 and 130 each also include a built-in temperature sensor that senses the temperature of the entire master or slave module. The microcontroller may turn off the LEDs of the module if the sensed temperature of the module exceeds a predetermined limit.

Fig. 9 is a block diagram of a power hub according to the present invention. For a display 10 having a height of 480 pixels, one power hub is provided for each display panel having sixteen columns of pixels. For a panel having half full height (i.e., 240 pixels in height), two adjacent display panels each having sixteen columns of pixels are provided with one power hub to supply power. For a panel having a height of one-quarter of the full height (i.e., 120 pixels in height), one power hub may supply power to four adjacent display panels each having sixteen columns of pixels. Each power hub 160 converts the three-phase AC to a rectified and filtered DC voltage of approximately 30V. The power hub 160 does not provide regulated power. Voltage regulation for the display 10 is provided by a switching voltage regulator in the master LED module and a linear regulator in the slave LED module of the display. Each power hub includes a transformer 162 preferably having phase-shifted windings and an input voltage selection tap. The transformer 162 receives a three-phase AC input via a three-phase breaker 164 and a main relay 166. For soft start operation, the transformer 162 is also coupled to a three-phase circuit breaker 164 via a soft start resistor 168 and a soft start relay 169. The output of the transformer is coupled to a pair of three-phase bridge rectifiers 170 and 171. The output terminals of the rectifiers 170 and 171 are coupled to a respective pair of clamping filter inductors 172 and 173, the outputs of the clamping filter inductors 172 and 173 being coupled to a damped output capacitor 174. The capacitor 174 is coupled to four DC output connectors 176 via sixty-four DC circuit breakers 178. The four DC output connectors 176 provide sixteen DC power drives for each of the sixteen columns of a full-height (480 pixel) display panel.

The power hub 160 also includes an auxiliary transformer 180 coupled to one phase of the AC input via a one-phase circuit breaker 182. The supervisory and control board 184 monitors all of the sensors of the power hub, as well as the voltage from the auxiliary transformer 180. Initially, both the main relay 166 and the soft start relay 169 are open. If the supervisory and control board 184 detects any incorrect signals via the auxiliary transformer voltage 180, start-up is aborted. If the signal is correct, the control 184 initially closes the soft start relay 169, the relay for the fan 186, and the relay for the strip heater 188. At this time, the control 184 also allows 24V to be applied to the external logic circuit. At this stage, the capacitor 174 may be slowly charged. If the voltage rises too quickly, or does not reach the correct output voltage, the control 184 opens the soft start relay 169 and discontinues start. If the correct voltage is reached, the main relay 166 is closed and the soft start relay 169 is opened. At this point, the display 10 may be powered.

Note that the ribbon heater 188 is employed to drive out moisture in order to prevent unwanted conductive paths that cause short circuits or shock hazards. These heaters are controlled by the supervisory and control board 184 so that the heaters 188 are turned on only when needed. The fan 186 provides cooling to the power hub 160. In a preferred embodiment, the fan has a speed sensor, to which the supervisory and control board 184 is responsive to provide an alert of an impending fan failure. For the heat sink and magnetic devices of the power hub 160, a temperature regulating device 190 is provided. The supervisory and control board 184 includes a temperature sensor to provide an early indication of overheating. If the temperature of the power hub 160 exceeds a predetermined level, the supervisory and control board 184 will open the main relay 166 to stop overheating. The supervisory and control board 184 will also continuously monitor the DC output voltage of the power hub 160. If the control 184 detects that the output voltage is too high, the control 184 will open the main relay 166.

Many modifications and variations of the present invention are possible in light of the above teachings. It is, therefore, to be understood that within the scope of the appended claims, the invention may be practiced otherwise than as specifically described.

The protection of the patent statutes is claimed and is intended to be protected by the accompanying claims.

Claims (2)

1. A display system, comprising:

a power hub that converts ac power to unregulated dc power;

a first set of LED modules, each LED module in the first set comprising: a module carrier; a plurality of LEDs mounted in the module carrier; a circuit for controlling the brightness of the LEDs of the module; and a switching voltage regulator receiving unregulated dc power and providing regulated dc power distributed to the associated plurality of LED modules in the second set;

each LED module of the second set of LED modules has: a module carrier; a plurality of LEDs mounted in the module carrier; a circuit for controlling the brightness of the LEDs of the module; and a linear voltage regulator that receives regulated dc power from the first set of modules and converts the received power to a lower regulated dc voltage.

2. The display system of claim 1, comprising a plurality of power hubs that convert ac power to unregulated dc power.