HK1161785B - System and method for converting uplink burst mode data into continuous mode data - Google Patents

Description

System and method for converting upstream burst mode data to continuous mode data

Technical Field

The present invention relates to Ethernet Passive Optical Networks (EPONs). More particularly, the present invention relates to a burst mode to continuous mode (continuous mode) converter configured for use in an EPON.

Background

In a conventional ethernet passive optical network, an Optical Line Terminal (OLT) transmits downstream data to a plurality of Optical Network Units (ONUs) in a continuous mode. The "continuous mode" mentioned herein refers to continuous transmission of data. Data received in continuous mode is referred to herein as "continuous mode data". However, ONUs send "upstream" data to OLTs in a pulsed mode. The "burst mode" mentioned herein means that data is transmitted at a burst point of short periodicity or non-periodicity. Data received in burst mode is referred to herein as "burst mode data". The use of a burst mode in transmission to the OLT results in the constant charging and discharging of Alternating Current (AC) coupling capacitors to the OLT. The constant charging and discharging may cause a delay in the data stream. Further, having a 10GHz operating rate required for high-speed operation, e.g., 10GHz EPON, is a significant challenge due to the constant charging and discharging of the AC coupling capacitors. Currently available pulse mode SerDes designs typically operate at 1.25GHz rates.

There is a need for methods and systems to overcome the above-mentioned deficiencies.

Disclosure of Invention

According to one aspect of the present invention, a system for converting upstream burst mode data to continuous mode data in a passive optical network, comprises:

a burst mode parallel-to-serial converter configured to recover a clock and burst mode data from an optical network unit according to a start time of burst mode data transmission and a round trip time from the optical network unit to an optical line terminal, the burst mode data being transmitted by the optical network unit; and

a continuous mode parallel-to-serial converter/serial-to-parallel converter connected to the burst mode parallel-to-serial converter/serial-to-parallel converter, configured to receive the recovered clock and recovered burst mode data from the burst mode parallel-to-serial converter/serial-to-parallel converter, convert the burst mode data into continuous mode data by buffering and padding the burst mode data according to the recovered clock, and transmit the continuous mode data to the optical line terminal.

Preferably, the system further comprises:

a decryptor coupled to the continuous mode deserializer/deserializer, the optical line terminal and the burst mode deserializer/deserializer, configured to receive an encrypted message from the continuous mode deserializer/deserializer, receive a key from the optical line terminal, decrypt the encrypted message with the key to determine a start time of burst mode data transmission and send the start time to the burst mode deserializer/deserializer, the burst mode data being transmitted by the optical network unit.

Preferably, the decryptor is configured to receive the key from the optical line terminal through a serial communication channel when the system is close to the optical line terminal, and configured to receive the key from the optical line terminal through a sideband channel when the system is close to the optical network unit.

Preferably, the system further comprises:

a round trip time calculator connected to the continuous mode deserializer/deserializer, the optical line terminal, and the burst mode deserializer/deserializer, configured to determine a round trip time between the optical network unit and the optical line terminal by calculating a difference between a time the optical line terminal receives a register _ receive message and a local time of the optical network unit in the register _ receive message, and provide the round trip time to the burst mode deserializer/deserializer.

Preferably, the round trip time calculator is configured to receive a reception time at which the optical line terminal receives the register _ receive message and a local time of the optical network unit from the optical line terminal through a serial communication channel when the system is close to the optical line terminal, and to receive a reception time at which the optical line terminal receives the register _ receive message and a local time of the optical network unit from the optical line terminal through a sideband channel when the system is close to the optical network unit.

Preferably, the pulse mode parallel-to-serial converter/serial-to-parallel converter includes:

a Phase Locked Loop (PLL) configured to adjust a phase of the recovered clock and generate a phase-modulated clock, the recovered clock configured to recover the pulse mode data;

a Clock and Data Recovery (CDR) unit coupled to the phase locked loop and configured to recover the pulse mode data based on the phase modulated clock from the phase locked loop.

Preferably, the continuous mode parallel-to-serial converter/serial-to-parallel converter comprises a first-in-first-out queue configured to buffer the recovered burst mode data, wherein the first-in-first-out queue stores a predetermined bit sequence between burst points of the recovered burst mode data.

Preferably, the system further comprises a power management unit, wherein the power management unit is configured to power the system with energy from a 10 gigabit small form-factor pluggable connector (XFP) when the system is near the olt.

Preferably, the system is connected to the olt using a standard 10 gigabit small form factor pluggable connector when it is close to the olt and a fibre connector when it is close to the onu.

According to one aspect, a method of converting upstream burst mode data to continuous mode data in a passive optical network, comprising:

determining a transmission start time of burst mode data transmitted by an optical network unit;

determining the round trip time from the optical network unit to an optical line terminal;

receiving burst mode data from the optical network unit;

recovering a clock and burst mode data by using a burst mode parallel-to-serial converter/serial-to-parallel converter according to a transmission start time of the burst mode data and a round-trip time from the optical network unit to the optical line terminal, the burst mode data being transmitted by the optical network unit;

converting the recovered burst mode data into continuous mode data using a continuous mode parallel-to-serial converter/serial-to-parallel converter; and

and sending the continuous mode data to the optical line terminal.

Preferably, the step of determining the start time comprises:

receiving an encrypted message from the continuous mode deserializer/deserializer;

receiving a key from the optical line terminal;

decrypting the encrypted message using the key to determine a transmission start time of burst mode data, the burst mode data being transmitted by the optical network unit; and

sending the start time to the pulse mode parallel-to-serial converter/serial-to-parallel converter.

Preferably, the step of determining a round trip time comprises:

calculating a difference value between the time when the optical line terminal receives the register _ receive message and the local time of the optical network unit in the register _ receive message; and

providing the round trip time to the burst mode parallel to serial converter/serial to parallel converter.

Preferably, the step of recovering comprises:

adjusting a phase of the recovered clock, the recovered clock configured to recover the pulse mode data; and

recovering the pulse mode data from the phase modulated clock.

Preferably, the step of converting comprises:

and caching the recovered pulse mode data, wherein a preset bit sequence between pulse points of the recovered pulse mode data is stored.

According to one aspect, a dual rate system for converting burst mode data to continuous mode data in a passive optical network, comprising:

a first burst mode parallel-to-serial converter/serial-to-parallel converter configured to receive first burst mode data from a first optical network unit at a first data rate, and configured to recover a first clock and the first burst mode data according to a transmission start time of the first optical network unit and a round trip time between the first optical network unit and an optical line terminal;

a second burst mode parallel-to-serial converter/serial-to-parallel converter configured to receive second burst mode data from a second optical network unit at a second data rate, and configured to recover a second clock and the second burst mode data according to a transmission start time of the second optical network unit and a round trip time between the second optical network unit and the optical line terminal;

a continuous mode deserializer/deserializer coupled to the first and second burst mode deserializers configured to receive the first and second recovered clocks and first and second recovered burst mode data, and to convert the first burst mode data and the second burst mode data into continuous mode data via data buffering and data stuffing, and to send the continuous mode data to the olt at the second data rate, wherein the second data rate is greater than the first data rate.

Preferably, the continuous mode parallel-to-serial converter/serial-to-parallel converter is configured to pad and buffer the first recovered burst mode data to increase the data rate of the first recovered burst mode data to the second rate.

Preferably, the continuous mode parallel-to-serial converter/serial-to-parallel converter is configured to convert the data rate from a low data rate to a high data rate by copying bits of a data stream having the low data rate.

Preferably, the dual rate system is connected to the olt using a 10 gigabit small form factor pluggable connector when it is close to the olt and a fibre connector when it is close to the onu.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the spirit of the invention. In the drawings:

fig. 1 is a schematic diagram of an EPON in which a central office and a number of subscribers are coupled by optical fibers and a passive optical splitter;

FIG. 2 is a schematic diagram of the format of a GATE message according to IEEE Standard 802.3 ah;

FIG. 3 is a time-space diagram of a recovery process;

figure 4A is a schematic diagram of a pluggable pulse-to-continuous mode converter module near an OLT in accordance with one embodiment of the present invention;

figure 4B is a schematic diagram of a pluggable pulse-to-continuous mode converter module near the OLT in accordance with another embodiment of the present invention;

fig. 5A is a schematic diagram of an EPON architecture with a pulse-to-continuous mode converter inserted into the OLT, according to one embodiment of the present invention;

fig. 5B is a schematic diagram of an EPON architecture with a pulse-to-continuous mode converter in close proximity to ONUs, in accordance with one embodiment of the present invention;

fig. 6A is a schematic diagram of a pulse-to-continuous-mode converter module near an ONU in accordance with one embodiment of the present invention;

fig. 6B is a schematic diagram of a pulse-to-continuous-mode converter module near an ONU according to another embodiment of the present invention;

FIG. 7A is a schematic diagram of the upstream path of a dual rate pulse-to-continuous mode converter according to one embodiment of the present invention;

figure 7B is a schematic diagram of the upstream path of a dual rate pulse-to-continuous mode converter near an ONU in accordance with one embodiment of the present invention;

FIG. 8 is a schematic diagram of the input and output waveforms of a dual rate pulse-to-continuous mode converter according to one embodiment of the present invention;

FIG. 9 is a flowchart of exemplary steps for converting data from a burst mode to a continuous mode, according to one embodiment of the present invention;

the present invention will now be described with reference to the accompanying drawings. In the drawings, like reference numbers may indicate similar elements in form or function. Additionally, the left-most digit(s) of a reference number may indicate the figure in which the reference number first appears.

Detailed Description

The specific embodiments described herein, or portions thereof, may be implemented in hardware, firmware, software, and/or combinations thereof. The embodiments described herein may be applied to any communication system using a burst and/or continuous mode transmission method.

The following description is presented to enable any person skilled in the art to make and use the embodiments, and is provided in the context of a particular application and its requirements. Various modifications to the embodiments of the invention will be readily apparent to those skilled in the art, and the invention may be applied to other embodiments and applications without departing from the spirit and scope of the invention, e.g., a general Passive Optical Network (PON) architecture. Thus, the scope of the present invention is not intended to be limited to the particular embodiments disclosed herein but is to be accorded the widest scope consistent with the principles and features of the present invention.

To keep up with the increasing rate of internet traffic, network operators have widely utilized optical fibers and optical transmission equipment, greatly increasing the capacity of the backbone network. However, the corresponding increase in the capacity of the access network has not kept pace with the increase in the capacity of the backbone network. Even with broadband technologies such as Digital Subscriber Line (DSL) and Cable Modem (CM), the limited bandwidth provided by prior art access networks remains a serious bottleneck in providing high bandwidth to end users.

Among the different technologies with strong competition, Passive Optical Networks (PONs) are one of the best choices for next generation access networks. PONs can accommodate broadband voice, data, and video traffic simultaneously due to the high bandwidth of optical fibers. It is difficult to provide such integrated services using DSL or CM technology. In addition, PONs can be built with existing protocols, such as ethernet and ATM, which will facilitate compatibility of PONs with other network devices.

Typically, PONs are deployed in the "first mile" of the network, providing connectivity between the service provider's central office and the customer premises. Generally speaking, the "first mile" is a logical point-to-multipoint network, i.e., a central office serving a certain number of subscribers. For example, a PON may employ a tree topology in which trunk fibers connect a central office to a passive fiber splitter/combiner. With a certain number of branch fibers, the passive optical splitter/combiner can split and distribute downstream optical signals to subscribers and combine upstream optical signals from subscribers (see fig. 1). Note that other topologies, such as ring topology and mesh topology, may also be used.

Transmissions in a PON are typically made between an Optical Line Terminal (OLT) and Optical Network Units (ONUs). The OLT, which is typically located in a central office and connects the fiber access network with a metro backbone, may be an external network belonging to, for example, an Internet Service Provider (ISP) or a local switching operator. An ONU may be located at a customer premises and connected to a customer's home network through Customer Premises Equipment (CPE).

Fig. 1 shows a passive optical network comprising a central office, a number of clients connected by optical fibers, and a passive optical splitter (prior art). A passive fiber optic splitter 102 and optical fibers connect the customer premises to the central office 101. Multiple splitters may also be connected in series to provide a desired splitting ratio and a wider geographical coverage area. The passive optical splitter 102 may be located near the end user to minimize initial fiber usage costs. The central office 101 may be connected to an external network 103, such as a metropolitan area network operated by an Internet Service Provider (ISP). Although fig. 1 shows a tree topology, the PON can also be based on other topologies, such as a logical ring or a logical bus type. Note that although many of the examples herein are EPON based, embodiments of the present invention are not limited to EPONs, but may be configured in various PONs, such as ATM PONs (APONs) and Wavelength Division Multiplexed (WDM) PONs.

In an EPON, communications may include a downstream message flow and an upstream message flow. In the following description, "downstream" refers to the direction from the OLT to one or more ONUs, and "upstream" refers to the direction from an ONU to the OLT. In the downstream direction, packets are broadcast by the OLT to all ONUs and selectively extracted by their destination ONUs due to the broadcast nature of the 1 × N passive optical coupler. In addition, each ONU is assigned one or more Logical Link Identifications (LLIDs), and data packets sent by the OLT typically identify the destination ONU by an LLID. In the upstream direction, ONUs need to share channel capacity and resources because there is only one link connecting the passive optical coupler and the OLT.

Unlike the downstream OLT transmission process, which may be continuous data transmission, upstream ONU transmissions have a burst feature, since an ONU may not be activated for a long duration and only transmit at short bursts. In order to properly receive upstream transmissions, the OLT needs to be able to extract data and clock messages from the received upstream burst message stream. This task is typically accomplished by Clock and Data Recovery (CDR) circuitry (e.g., CDR unit 440 in fig. 4A-B and CDR unit 640 in fig. 6A-B) that may be integrated with a parallel-to-serial converter/serial-to-parallel converter (SerDes) to form a pulse-mode SerDes. The pulse mode SerDes receives electrical signals from the bi-directional optical transceiver, recovers the clock and data (by locking to the electrical pulses with preamble bits), and deserializes the data for processing by the OLT.

However, the use of a burst mode in transmission to the OLT results in the Alternating Current (AC) coupling capacitance to the OLT being continually charged and discharged. The constant charging and discharging may cause a delay in the data stream. Further, having a 10GHz operating rate required for high speed operation, e.g., 10GHz epon, pulse mode parallel-to-serial converter/serial-to-parallel converter (SerDes) is a significant challenge due to the constant charging and discharging of the AC coupling capacitors. Currently available pulse mode SerDes designs typically operate at 1.25GHz rates.

Overview

The invention provides a pulse-continuous mode converter located between an OLT and an ONU and configured to convert a pulse upstream signal from the ONU into a continuous signal for transmission to the OLT. The pulse-to-continuous mode converter includes a pulse mode SerDes and a continuous mode SerDes. In operation, the system decrypts downstream GATE messages from the OLT to extract the start time of the upcoming ONU upstream transmission message. The system then provides these start times to the burst mode SerDes, which can use these messages to predict the arrival time of the upstream message stream and quickly recover the received clock and data. The recovered clock and data are then passed to a continuous mode SerDes, which may transmit the data as a continuous bit stream to the OLT. Thus, the OLT only sees a continuous upstream signal input so that it can utilize its own standard high-speed continuous mode components for subsequent data processing.

Multipoint control protocol

According to IEEE standard 802.3ah, an EPON entity (e.g., OLT or ONU) implements a multipoint control protocol (MPCP) function in the MAC control sublayer. MPCP is used by EPONs to schedule upstream transmissions. During operation, the OLT assigns a transmission window (also called grant) to each ONU. The ONU defers (typically by data buffering) transmission until its grant arrives, at which point the ONU transmits the buffered user data to the OLT in an assigned transmission window.

In order to request a send window, the ONU sends a REPORT message to the OLT containing status information of the ONU, which may include, for example, its queue information. To grant the transmission window, the OLT needs to send a GATE message to the ONU, which indicates the start time and duration of the ONU transmission. Fig. 2 is a diagram of the format of a GATE message according to IEEE standard 802.3 ah. As can be seen from fig. 2, up to 4 different transmission windows (grants) can be allocated to an ONU in one GATE message. The GATE message may indicate a specific start time and length for each grant.

In order to schedule for proper operation, the OLT utilizes a recovery process to discover and initialize any newly added ONUs. During the recovery process, the OLT may collect information important to the transmission schedule, such as the ONU's Round Trip Time (RTT), its Media Access Control (MAC) address, its service level agreement, etc. Note that in some instances, the OLT is already aware of the service level agreement.

Fig. 3 is a time-space diagram of the recovery process. At the beginning of the recovery process, OLT302 first sets a start time ts of a time interval during which OLT302 enters the recovery mode and allows new ONUs to register (this time interval is called the recovery window). Note that from the current time to ts, the OLT302 may keep receiving general upstream data from the registered ONUs. OLT302 may also set a time interval during which each newly joined ONU is allowed to send a response message to OLT302 to request registration (called a recovery slot), where the start time of the recovery slot is the same as the start time of the recovery window, both being ts. Since there may be more than one ONU requiring registration and since the distance between the unregistered ONU and the OLT302 is unknown, the size of the recovery window should at least include the recovery time slot and the maximum allowed round trip delay between the ONU and the OLT 302.

At a point in time t₁(t₁< ts), OLT302 broadcasts a recovery request message 312 (which may be a discover GATE message according to the IEEE 802.3ah MPCP standard) to all ONUs including the newly added unregistered ONU 304. Recovery request message 312 includes t₁Time stamp of (1) and time stamp of ts, t₁Is the time the OLT302 sends the message and ts is the start time of the recovery slot. After receiving the recovery request message 312, the ONU 304 sets its local clock to t according to the timestamp carried in the recovery request message 312₁。

When the local clock of ONU 304 reaches the start time ts of the recovery slot, ONU 304 waits for an additional random delay and then sends a response message 314 (which may be a REGISTER REQUEST message according to the IEEE 802.3ah MPCP standard). This random delay is used to avoid persistent collisions when response messages from multiple uninitialized ONUs collide simultaneously. Response message 314 contains the MAC address of ONU 304 and t₂Time stamp of t₂Is the local time of ONU 304 when it sends response message 314.

When OLT302 is at time t₃When response message 314 is received from ONU 304, it gets the MAC address of ONU 304 and the local time t when ONU 304 sends response message 314₂. OLT302 may then calculate the round-trip delay of ONU 304, i.e., [ (t)₃-t₁)-(t₂-t₁)]＝(t₃-t₂)。

Pulse-continuous mode converter

Because the OLT's downstream GATE message contains the start time of the upstream transmission expected by the ONU, the present invention can utilize this message to facilitate the CDR operation of the burst-mode SerDes. In some embodiments, a pulse-to-continuous mode converter located on the OLT may be used to convert the pulsed upstream ONU transmission message stream into a continuous electrical streaming signal to be delivered to the OLT.

For flexible device upgrade, in some embodiments, the pulse-to-continuous mode converter employs a pluggable module that can be directly plugged into the OLT. The connection interface between the pluggable burst-to-continuous mode converter module and the OLT may be based on any standard or proprietary format. In one embodiment, the module is compliant with the 10 gigabit small form-factor pluggable (XFP) specification. XFP defines a 10 gigabit hot swap small size string-to-string unknown data multi-rate transceiver for supporting electronic and data communication applications. In some embodiments, the converter module may comply with other module specifications, such as the small form-factor pluggable (SFP) standard and the gigabit interface converter (GBIC) standard. Other forms may also be used within the scope of the invention.

Figure 4A is a schematic diagram of a pluggable pulse-to-continuous mode converter module 400 having the XFP format in accordance with one embodiment of the present invention. The XFP pulse-to-continuous mode converter module 400 includes a standard XFP connector 402 that provides a serial communication channel with the OLT and an optical fiber connector 404 that is used to connect with the optical fiber on the ONU side, i.e., the EPON fiber. The bi-directional optical transceiver 406 may transmit optical signals to and receive optical signals from an optical fiber through the fiber connector 404. The transceiver 406 may transmit and receive simultaneously. That is, transceiver 406 may transmit downstream signals and receive upstream signals from the same optical fiber. The two signals may be at two wavelengths and the optical fiber may be a single mode or multimode fiber.

The transceiver 406 is also connected to a burst mode SerDes408 through a Transmit (TX) link and a Receive (RX) link. In operation, the optical transceiver 406 converts the received upstream optical signals (from the ONUs) into electrical signals and sends the electrical signals to the SerDES408 via the RX link. The pulse mode SerDes408 performs clock and data recovery operations using, for example, the CDR unit 440, and sends the recovered data and clock signals to the continuous mode SerDes 410.

The continuous mode SerDes410 is connected to the OLT through the TX link and the RX link via the XFP connector 402. In operation, the continuous mode SerDes410 receives OLT downstream electrical signals that include encrypted GATE messages sent to ONUs. SerDes410 sends the encrypted GATE message to data decryptor 412 for decryption. The key 414 received from the OLT over the serial communication channel 416 is passed to the data decryptor for data decryption. In addition to obtaining the decryption key, the serial communication channel 416 also sends an RTT message to the RTT calculator 418, and the RTT calculator 418 may then calculate the corresponding RTT between the OLT and the particular ONU. In this embodiment, data, such as key 414, is sent over an in-band channel, such as serial communication channel 416, because burst-to-continuous mode converter 400 is close to the OLT. The data decryptor 412 decrypts the downstream GATE message and extracts the start time of each grant (grant) from the GATE message. According to the MPCP specification, the start time in the grant represents the start of the transmission time window allocated to the ONU. In other words, the ONU preferably starts its upstream transmission at the start time. Note that this start time is in MPCP time form, i.e. recorded as a 32-bit integer representing the value of the Time Quantum (TQ) counter. The value of the TQ counter is incremented by one every 16 ns. Since the time slots occur in sequence, the start time of the one or more ONUs extracted from the GATE message is sent to a GATE first-in-first-out (FIFO) queue 420. The start time is then obtained and sent to the pulse mode SerDes 408.

Using the start time from the GATE message and the RTT to the corresponding ONU, the SerDes408 can calculate the exact time of upstream transmission by a receiving ONU. In other words, the burst mode SerDes408 may predict the exact time it takes to receive the upstream signal from the optical transceiver 406. This knowledge can be used to facilitate fast recovery of the clock and data because the corresponding Phase Locked Loop (PLL)430 can use this time information for coarse phase adjustment. The PLL may perform additional phase fine tuning. The recovered clock and data are then sent to the continuous mode SerDes410, and the SerDes410 may convert the recovered pulse mode data to continuous mode data using data buffering and stuffing techniques. For example, the recovered data may first be sent to a buffering device, such as a first-in-first-out (FIFO) queue 409. After a period of time, the continuous mode SerDes410 may continuously read the contents of the buffer using a locally generated clock. To prevent buffer underrun, a predetermined bit sequence, such as all "0" or all "1", may be used to fill the buffer space between data burst points. Because the continuous mode SerDes410 outputs continuous mode signals, the OLT connected to it sees only continuous signal inputs, thus allowing the OLT to use its own standard high speed continuous mode elements for subsequent data processing.

Also included in the XFP pulse-to-continuous mode converter module 400 is a power management module 422, which power management module 422 can draw power from the XFP connector 402 and provide power to the remaining components of the converter module 400.

In another embodiment, integrated circuits, such as SerDes, optical transceivers, and power management modules, may be directly connected to an underlying Printed Circuit Board (PCB) without the need for separate packaging. That is, the IC die is directly connected to the PCB, and conductive wires are bonded to the IC connector and the conductive region on the PCB. The mold is typically covered with an epoxy resin.

Note that GBIC, SFP, and XFP are not the only forms of pluggable pulse-to-continuous mode converters that can be used in the present invention. The pluggable pulse-to-continuous mode converter may generally have any form. In particular, the pluggable converter may have a form substantially similar to any optical transceiver, such as XENPAK, which complies with the 10Gb ethernet standard described in IEEE standard 802.3 ae.

Figure 4B is a schematic diagram of a pluggable pulse-to-continuous mode converter module near the OLT according to another embodiment of the present invention. In the embodiment shown in fig. 4B, GATE FIFO 420 and RTT calculator 418 are located in OLT302, rather than in the burst-to-continuous mode converter as shown in fig. 4A. In this embodiment, because GATE FIFO 420 is located in OLT302, decryptor 412 and key 414 are not required, thus saving cost. In this embodiment, OLT302 stores the start time of transmission for each ONU in GATE FIFO 420. OLT302 may also calculate the RTT for each ONU 304 using RTT calculator 418 as described above. The OLT302 may send the transmit start time and RTT to the burst mode SerDes408 over the serial communication channel 416.

As described with reference to fig. 4A, the SerDes408 calculates the exact time at which an ONU upstream transmission can be received, based on the start time and the RTT. CDR unit 440 recovers the clock and burst mode data from ONU 304 based on the start time and RTT. PLL 430 may make a coarse phase adjustment to the recovered clock based on the start time and RTT. Additional fine phase adjustments are also made by PLL 430. The recovered clock and data are then sent to the continuous mode SerDes410, and the SerDes410 may convert the burst mode data to continuous mode data using data buffering and padding. For example, the recovered data may first be sent to a buffering device, such as a first-in-first-out (FIFO) queue 409. After a period of time, continuous mode SerDes410 may continuously read the contents of first-in-first-out (FIFO) queue 409 using a locally generated clock. To prevent buffer underrun, a predetermined bit sequence, such as all "0" or all "1", may be used to fill the buffer space between data burst points. Because the continuous mode SerDes410 outputs continuous mode signals, the AC coupling capacitance at the OLT302 sees only continuous signal input, thus making it possible to use standard high-speed continuous mode elements on the OLT for subsequent data processing.

Also included in the XFP pulse-to-continuous mode converter module 400 is a power management module 422, which power management module 422 can draw power from the XFP connector 402 and provide power to the remaining components of the converter module 400.

In addition to inserting the pulse-to-continuous mode converter into the OLT, in some embodiments, the mode converter may be mounted in a location near ONUs. There may be a power supply available near ONUs to power the pulse-to-continuous mode converter. Fig. 5A-B illustrate these two configurations. Fig. 5A is a schematic diagram of an EPON architecture with a pulse-to-continuous mode converter inserted into the OLT, according to one embodiment of the present invention. In fig. 5A, an XFP pulse-to-continuous mode converter module 502 is inserted into OLT 500. The XFP pulse-to-continuous mode converter module 502 is coupled to the PON 504 through a passive optical splitter 512, the PON 504 including a number of ONUs, such as ONUs 506 and 510. XFP pulse-to-continuous mode converter 502 receives upstream ONU transmissions, converts the received pulsed optical signals to continuous electrical signals, and passes the continuous electrical signals to OLT 500 for further processing.

Fig. 5B is a schematic diagram of an EPON architecture with a pulse-to-continuous mode converter in close proximity to ONUs, according to one embodiment of the present invention. In fig. 5B, the burst-to-continuous mode converter module 522 is installed in a position near the PON 524, and the PON 524 contains a number of ONUs, such as ONUs 526-530. Note that as shown in fig. 5B, pulse-to-continuous mode converter 522 is located between passive optical splitter 532, which is used to split the downstream EPON signal and synthesize the upstream EPON signal, and OLT 520. In some embodiments, converter 522 can be mounted in a physical enclosure that also contains passive optical splitter 532. It is also noted that in addition to being plugged directly into OLT 520 via an electrical interface, converter 522 may also be connected to OLT 520 via an optical fiber (i.e., an EPON fiber), thus requiring an additional electrical-to-optical (E/O) converter.

Fig. 6A is a schematic diagram of a pulse-to-continuous-mode converter module near an ONU in accordance with one embodiment of the present invention. The pulse-to-continuous-mode converter module 600 can include a fiber connector 602 for coupling the ONU-side optical fibers through a passive optical splitter and a fiber connector 612 for coupling the OLT-side optical fibers. The optical bi-directional transceiver 604 may transmit optical signals to and receive optical signals from the ONU-side optical fiber through the fiber connector 602. The transceiver 604 may transmit and receive simultaneously. That is, the transceiver 604 may transmit downstream signals and receive upstream signals from the same optical fiber. The two signals may be at two wavelengths and the optical fiber may be a single mode or multimode fiber.

The transceiver 604 is also connected to a burst mode SerDes606 via a Transmit (TX) link and a Receive (RX) link. In operation, the optical transceiver 604 converts the received upstream optical signals (from the ONUs) into electrical signals and sends the electrical signals to the SerDES606 via the RX link. The pulse mode SerDes606 performs clock and data recovery operations using, for example, the CDR unit 640, and sends the recovered data and clock signals to the continuous mode SerDes 608.

The optical bi-directional transceiver 610 may transmit optical signals to and receive optical signals from the OLT side optical fiber through the optical fiber connector 612. The transceiver 610 may also transmit and receive simultaneously. That is, the transceiver 610 may transmit downstream signals and receive upstream signals from the same optical fiber. Likewise, the two signals may be at two wavelengths, and the optical fiber may be a single mode or multimode fiber. In operation, the transceiver 610 receives downstream OLT signals, converts the received optical signals to electrical signals, and sends the converted electrical signals to the continuous mode SerDes 608, which includes encrypted GATE messages for ONUs. The SerDes 608 sends the encrypted GATE message to the data decryptor 618 for decryption. Note that to decrypt the GATE message, key 616 is also received over a separate sideband channel 614 and key 616 is passed to data decryptor 618. Because the burst-continuous mode module 600 is not close to the OLT, a separate sideband channel 614 is required. In addition to obtaining the decryption key, the sideband channel 614 may also be used to send RTT messages to the RTT calculator 622, and the RTT calculator 622 may then calculate the RTT between the OLT and a particular ONU. The data decryptor 618 may decrypt the downstream GATE message and extract the start time of each grant from the GATE message. The start time extracted from the GATE message is first sent to a GATE first-in-first-out (FIFO) queue 620 and then to the burst mode SerDes 606.

Using the start time from the GATE message and the RTT to the corresponding ONU, the SerDes606 can calculate the exact time of the upstream transmission of the receiving ONU. In other words, the burst mode SerDes606 may predict the exact time it takes to receive the upstream signal from the optical transceiver 604. The time message may be used to facilitate fast recovery operations of the clock and data. In addition, a Phase Locked Loop (PLL)630 may utilize the time information for coarse phase adjustment. The PLL may also perform additional phase fine tuning. The recovered clock and data are then sent to the continuous mode SerDes 608, and the SerDes 608 may convert the pulsed signal to a continuous signal by buffering the data in a FIFO 609 and filling in the manner described with reference to fig. 4.

Also included in the XFP pulse-to-continuous mode converter module 600 is a power management module 626, which power management module 626 can receive external energy and provide the energy to the remaining components of the converter module 600. In this embodiment, since the pulse-to-continuous mode converter 600 is not close to the OLT, it cannot use an XFP connector, such as XFP connector 402, as a power source.

Note that installing the pulse-to-continuous mode converter 600 close to ONUs may facilitate the regeneration of downstream and upstream EPON signals, thereby effectively extending the range of an EPON.

Figure 6B is a schematic diagram of a pluggable pulse-to-continuous mode converter module near an ONU in accordance with another embodiment of the present invention. In the embodiment shown in fig. 6B, GATE FIFO 620 and RTT calculator 622 are located in OLT302, rather than in the burst-to-continuous mode converter as shown in fig. 6A. In this embodiment, because GATE FIFO 620 is located in OLT302, decryptor 618 and key 616 are not required, thus saving cost. In this embodiment, OLT302 stores the start time of transmission for each ONU in GATE FIFO 620. OLT302 may also calculate the RTT for each ONU 304 using RTT calculator 622 as described above. OLT302 may send a transmission start time and RTT to burst mode SerDes606 over sideband channel 614.

As described above, using the start time stored in GATE FIFO 620 and the RTT to the corresponding ONU, pulse mode SerDes606 can calculate the exact time to receive the ONU upstream transmission. In other words, the burst mode SerDes606 may predict the exact time it takes to receive the upstream signal from the optical transceiver 604. This time information may be used to facilitate fast recovery operations of the clock and data. In addition, a Phase Locked Loop (PLL)630 may utilize the time information for coarse phase adjustment. The PLL may also perform additional phase fine tuning. The recovered clock and data are then sent to the continuous mode SerDes 608, and the SerDes 608 may convert the pulsed signal to a continuous signal by buffering the data in a FIFO 609 and filling in the manner described with reference to fig. 4A.

Dual rate pulse-to-continuous mode converter

The inventive pulse-to-continuous mode converter may operate in a symmetric (e.g., 10GHz downstream transmission and 10GHz upstream transmission) EPON configuration and/or an asymmetric (e.g., 10GHz downstream transmission and 1.25GHz upstream transmission) EPON configuration. In other words, the pulse-to-continuous mode converter can operate at 10GHz rate and 1.25GHz rate. To operate at dual rates, the burst-to-continuous mode converter may utilize buffering and transmit techniques to upconvert a received 1.25GHz upstream EPON signal to 10GHz transmission. In the working process, the received 1.25GHz ONU upstream data packets are buffered in a data packet FIFO queue in a pulse-continuous mode converter, and then are sent to the upstream OLT at the speed of 10 GHz. To maintain a constant delay, the packet FIFO queue may provide a fixed delay for each packet. Fig. 7A is a schematic diagram of the upstream path of a dual rate pulse-to-continuous mode converter according to one embodiment of the present invention. The dual rate pulse-to-continuous mode converter 700 includes an XFP connector 702, an optical fiber connector 704, a high speed optical receiver 706, a low speed optical receiver 708, a pulse mode SERDES 710 coupled to the high speed optical receiver 706, a pulse mode SERDES 712 coupled to the low speed optical receiver 708, and a continuous mode SERDES 714.

In operation, the high speed receiver 706 receives high speed upstream transmission signals from the downstream ONUs through the fiber optic connector 704. In one embodiment, the high speed receiver 706 receives optical signals at a rate of 10.3125 GHz. Likewise, the low speed receivers 708 receive low speed upstream transmit signals from the downstream ONUs through the fiber optic connectors 704. In one embodiment, low speed receiver 708 receives optical signals at a rate of 1.25 GHz. In another embodiment, Time Division Multiplexing (TDM) techniques may be used to mix high speed and low speed optical signals in the same fiber.

The outputs of receivers 706 and 708 are sent to burst mode SERDES 710 and 712, respectively. Note that the operation of the burst mode SERDES 710 and 712 is similar to that shown in fig. 4A-B and 6A-B. To convert the burst mode signal to a continuous output, appropriate buffering and padding techniques may be used. The output of the continuous mode SERDES 712 is sent to the OLT through XFP connector 702.

In one embodiment, a dual rate pulse-to-continuous mode converter is located near the ONU and is fiber-connected to the OLT. In this embodiment, the output of the continuous mode SERDES 712 is transmitted to the optical transmitter, which communicates with the OLT through an optical fiber connector. Figure 7B is a schematic diagram of the upstream path of the dual-rate pulse-to-continuous-mode converter near an ONU in accordance with one embodiment of the present invention. In FIG. 7B, dual rate pulse-to-continuous mode converter 720 includes fiber connectors 722 and 724, high speed optical receiver 726, low speed optical receiver 728, pulse mode SERDES730 coupled to high speed optical receiver 726, pulse mode SERDES 732 coupled to low speed optical receiver 728, continuous mode SERDES734, and high speed optical transmitter 736.

In operation, the outputs of the receivers 726 and 728 are sent to the burst modes SERDES730 and 732, respectively. The outputs of the burst mode SERDES730 and 732 are sent to the continuous mode SERDES734 and the output of the continuous mode SERDES734 is used to drive the high speed optical transmitter 736. In one embodiment, transmitter 736 operates at 10.3125 GHz. The high speed transmitter 736 communicates with the remote OLT through the fiber optic connector 722.

Note that the continuous mode SERDES uses a higher data rate to send data to the OLT through either the SFP connector or the fiber optic connector. Thus, a plurality of high speed data bits are used to represent one low speed data bit. For example, a bit "1" in a 1.25GHz data stream may be represented by 8 or 9 consecutive "1" in a 10.3125GHz data stream by copying the bit "1".

Fig. 8 is a schematic diagram of the input and output waveforms of a dual rate pulse-to-continuous mode converter in accordance with one embodiment of the present invention. Data streams 802 and 804 represent burst mode upstream transmission data streams at 10.3125GHz and 1.25GHz, respectively. Note that the two data pulse streams do not overlap in the time domain. Note also that each data pulse stream includes a certain number of preamble bits for clock recovery. Data stream 806 represents the continuous output of a dual rate pulse-to-continuous mode converter operating at 10.3125 GHz. In the example shown in fig. 8, the preamble in the continuous mode output is deleted, since the continuous data stream is sufficient for clock recovery by itself. In addition, stuffing bits are embedded between data pulse streams to ensure continuous output. To transmit the 1.25GHz data stream at a rate of 10.3125GHz, each data bit in the 1.25GHz data stream (data stream 804) is transmitted 8 or 9 times in data stream 806, data stream 806 being the output of the 10.3125GHz transmitter. Fig. 8 shows an enlarged view of the bit group 808 corresponding to one 1025GHz bit. It can be seen that the group of bits 808 comprises the same bit for 8 consecutive clock cycles. To achieve a bit rate between 10.3125GHz and 1.25GHz, the system typically transmits 9 times a 1.25GHz bit using a 10.3125GHz transmitter in one embodiment. Fig. 8 also shows an enlarged view of the bit group 810 corresponding to one 1.25GHz bit. The group of bits 810 includes the same bit for 9 consecutive clock cycles. In one embodiment, after transmitting every 3 1.25GHz bits, the system transmits the next 1.25GHz bit 9 times using the 10.3125GHz transmitter.

FIG. 9 is a flowchart of exemplary steps for converting data from a burst mode to a continuous mode, according to one embodiment of the present invention. Flowchart 900 will be described with continued reference to the operating environment shown in fig. 1-8. However, the flow chart is not limited to these embodiments. Note that some of the steps illustrated in flowchart 900 need not be performed in the order illustrated. The steps illustrated by flowchart 900 may be partially or fully performed by, for example, pulse-to-continuous mode converters 400, 450, 600, 650, 700, and 720.

In step 902, a start time for burst mode transmission of an ONU is determined. For example, decryptor 412 decrypts a downstream GATE message to an ONU based on key 414 to determine the start time of the burst mode transmission for the ONU.

In step 904, the round trip time between the ONU and the OLT is determined. For example, the RTT calculator 418 determines the round trip time between the ONU and the OLT.

At step 906, burst mode data is received from the ONU. For example, pulse mode data is received from ONU 304.

At step 908, the pulse mode data and clock are recovered. For example, the pulse mode SerDes408 recovers clock and pulse mode data using the PLL 430 and CDR 440.

At step 910, the burst mode data is converted to continuous mode data. For example, the continuous mode SerDes410 converts the recovered burst mode data into continuous mode data using, for example, FIFO 409.

At step 912, the continuous mode data is sent to the OLT. For example, continuous mode data is sent by the continuous mode SerDes410 to the OLT 302.

The various embodiments described above are for purposes of illustration and description only and are not intended to be exhaustive or limiting of the invention. Accordingly, various modifications and changes will be apparent to those skilled in the art. In addition, the above description is not intended to limit the present invention.

The representative functions described herein (e.g., the functions performed by decryptor 412, decryptor 618, RTT calculator 418 and RTT calculator 622) may be implemented in hardware, software or a combination thereof. For example, those skilled in the art will appreciate from the description herein that these functions may be implemented using a computer processor, computer logic, an Application Specific Integrated Circuit (ASIC), a digital signal processor, or a combination thereof. Accordingly, any processor capable of performing the above-described functions is within the spirit and scope of the present invention.

Additionally, the processing functions described above may be embodied in computer program instructions executed by a computer processor. The computer program instructions cause the processor to perform the functions described above. The computer program instructions (e.g., software) may be stored in a computer usable medium, a computer program medium, or any storage medium that can be accessed by a computer or processor. Such media include memory devices, RAM or ROM or other types of computer storage media such as computer disks or CD ROMs or other equivalent. Thus, any computer storage medium having computer program code means for causing a processor to perform the functions described above is encompassed within the spirit and scope of the present invention.

Conclusion

Although some embodiments are provided herein, this is by way of illustration only and not by way of limitation. Various modifications and alterations to this invention will become apparent to those skilled in the art without departing from the spirit and scope of this invention.

The description of the invention proceeds with reference to functional modules and method steps for describing particular functions performed and their interrelationships. The boundaries and sequence of these functional blocks and method steps have been specifically defined herein for the convenience of the description. The boundaries and sequence of these functions and relationships may be redefined so that they function properly. These redefinitions of boundaries and order are intended to fall within the spirit and scope of the claimed invention. Those skilled in the art will appreciate that the functional blocks of the present invention may be implemented by discrete components, application specific integrated circuits, processors executing suitable software, and the like, as well as combinations thereof. Thus, the scope of the invention is not to be limited by any of the above-described embodiments, but by the claims and their equivalents.

It is noted that the detailed description section, and not the descriptive section, is intended to be used to interpret the claims. The description section is directed to one or more, but not all embodiments contemplated by the inventors and, thus, is not intended to limit the invention and the claims.

The foregoing description of the embodiments may reveal general features of the invention so that others skilled in the art, without undue experimentation, can readily modify and/or adapt for various embodiments such specific features without departing from the scope of the present invention. Therefore, these applications and modifications are intended to be included within the spirit and scope of the disclosed embodiments as equivalent substitutes for the teachings of the present invention. It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation, as such phraseology or terminology employed herein is for the purpose of description and should not be regarded as limiting.

The scope of the invention is not limited by any of the above-described embodiments, but is defined by the claims of the invention and their equivalents.

Claims (10)

1. A system for converting upstream burst mode data to continuous mode data in a passive optical network, comprising:

a burst mode parallel-to-serial converter configured to recover a clock and burst mode data from an optical network unit according to a start time of burst mode data transmission and a round trip time from the optical network unit to an optical line terminal, the burst mode data being transmitted by the optical network unit; and

a continuous mode parallel-to-serial converter/serial-to-parallel converter connected to the burst mode parallel-to-serial converter/serial-to-parallel converter, configured to receive the recovered clock and the recovered burst mode data from the burst mode parallel-to-serial converter/serial-to-parallel converter, convert the recovered burst mode data into continuous mode data by buffering and filling the recovered burst mode data according to the recovered clock, and transmit the continuous mode data to the optical line terminal.

2. The system of claim 1, further comprising:

a decryptor coupled to the continuous mode deserializer/deserializer, the optical line terminal and the burst mode deserializer/deserializer, configured to receive an encrypted message from the continuous mode deserializer/deserializer, receive a key from the optical line terminal, decrypt the encrypted message with the key to determine a start time of burst mode data transmission and send the start time to the burst mode deserializer/deserializer, the burst mode data being transmitted by the optical network unit.

3. The system of claim 2, wherein the decryptor is configured to receive the key from the optical line terminal through a serial communication channel when the system is near the optical line terminal and configured to receive the key from the optical line terminal through a sideband channel when the system is near the optical network unit.

4. The system of claim 1, further comprising:

a round trip time calculator connected to the continuous mode deserializer/deserializer, the optical line terminal, and the burst mode deserializer/deserializer, configured to determine a round trip time between the optical network unit and the optical line terminal by calculating a difference between a time the optical line terminal receives a register _ receive message and a local time of the optical network unit in the register _ receive message, and provide the round trip time to the burst mode deserializer/deserializer.

5. The system according to claim 4, wherein the round trip time calculator is configured to receive a reception time at which the optical line terminal receives the register _ receive message and a local time of the optical network unit from the optical line terminal through a serial communication channel when the system is close to the optical line terminal, and to receive a reception time at which the optical line terminal receives the register _ receive message and a local time of the optical network unit from the optical line terminal through a sideband channel when the system is close to the optical network unit.

6. The system of claim 1, wherein the pulse mode parallel-to-serial converter/serial-to-parallel converter comprises:

a phase locked loop configured to adjust a phase of the recovered clock and generate a phase modulated clock, the recovered clock configured to recover the pulse mode data;

a clock and data recovery unit coupled to the phase locked loop and configured to recover the pulse mode data based on the phase modulated clock from the phase locked loop.

7. The system of claim 1, wherein the continuous mode parallel-to-serial converter/serial-to-parallel converter comprises a first-in-first-out queue configured to buffer the recovered burst mode data, wherein the first-in-first-out queue stores a predetermined sequence of bits between burst points of the recovered burst mode data.

8. The system of claim 1, further comprising a power management unit, wherein the power management unit is configured to utilize energy from a 10 gigabit small form-factor pluggable connector to power the system when the system is proximate to the olt.

9. A method for converting upstream burst mode data to continuous mode data in a passive optical network, comprising:

determining a transmission start time for transmitting burst mode data by an optical network unit;

determining the round trip time from the optical network unit to an optical line terminal;

receiving burst mode data from the optical network unit;

recovering a clock and burst mode data by using a burst mode parallel-to-serial converter/serial-to-parallel converter according to a transmission start time of the burst mode data and a round-trip time from the optical network unit to the optical line terminal, the burst mode data being transmitted by the optical network unit;

converting the recovered pulse mode data into continuous mode data by buffering and filling the recovered pulse mode data according to the recovered clock using a continuous mode parallel-to-serial converter/serial-to-parallel converter; and

and sending the continuous mode data to the optical line terminal.

10. A dual rate system for converting burst mode data to continuous mode data in a passive optical network, comprising:

a first burst mode parallel-to-serial converter/serial-to-parallel converter configured to receive first burst mode data from a first optical network unit at a first data rate, and configured to recover a first clock and the first burst mode data according to a transmission start time of the first optical network unit and a round trip time between the first optical network unit and an optical line terminal;

a second burst mode parallel-to-serial converter/serial-to-parallel converter configured to receive second burst mode data from a second optical network unit at a second data rate, and configured to recover a second clock and the second burst mode data according to a transmission start time of the second optical network unit and a round trip time between the second optical network unit and the optical line terminal;

a continuous mode deserializer/deserializer coupled to the first and second burst mode deserializers configured to receive the first and second recovered clocks and first and second recovered burst mode data, and to convert the first burst mode data and the second burst mode data into continuous mode data via data buffering and data stuffing, and to send the continuous mode data to the olt at the second data rate, wherein the second data rate is greater than the first data rate.