HK1157949B - Method and system for eliminating emi interference in ethernet system - Google Patents
Method and system for eliminating emi interference in ethernet system Download PDFInfo
- Publication number
- HK1157949B HK1157949B HK11111917.4A HK11111917A HK1157949B HK 1157949 B HK1157949 B HK 1157949B HK 11111917 A HK11111917 A HK 11111917A HK 1157949 B HK1157949 B HK 1157949B
- Authority
- HK
- Hong Kong
- Prior art keywords
- emi
- frequency
- signal
- link partner
- coefficients
- Prior art date
Links
Description
Technical Field
The present invention relates to the field of communications, and in particular, to a method and system for detecting and eliminating interference effects in a communication system.
Background
Interfering signals, such as electromagnetic interference (EMI), typically include narrow frequency signals centered at one or more frequencies. This frequency can be as low as several MHz and also as high as several GHz. Amateur radios, radiotelephones and emergency vehicles are examples of equipment that generate EMI that impedes communications, such signals being transient and may cause link drop or Bit Error Rate (BER) to be unacceptable in a communications system. For example, a 10GBASE-T system is sensitive to EMI signals at frequencies in its operating band (near DC to 400 MHz). 10GBASE-T systems are more susceptible to EMI because in 10GBASE-T systems, the communication channel between the link and the link partner is typically operated very close to the channel capacity to achieve high data rates. These sensitive channels are known to degrade the communication link between the link and the link partner if EMI occurs suddenly.
There is therefore a need for a method and system that overcomes the above-mentioned deficiencies.
Disclosure of Invention
According to one aspect of the present invention, there is provided a method of substantially eliminating the effects of EMI in an ethernet system, comprising:
calculating and storing filter coefficients corresponding to the EMI frequency range;
receiving a signal;
detecting EMI in the received signal;
determining a frequency of the detected EMI;
selecting filter coefficients corresponding to the determined EMI frequency; and
the selected filter coefficients are used to adjust the frequency response of one or more filters to substantially eliminate the effects of EMI in the received signal.
Preferably, the method further comprises signaling the presence of EMI to a link partner.
Preferably, the step of transmitting a signal comprises: a predetermined bit sequence is sent in a plurality of consecutive frames to indicate to the link partner that EMI is present.
Preferably, the method further comprises: the predetermined bit sequence is transmitted using an auxiliary bit (auxiary bit).
Preferably, the method further comprises: the presence of EMI is signaled to the link partner by sending a sine wave at a frequency equal to the detected EMI frequency.
Preferably, the method further comprises: the presence of EMI is signaled to the link partner by sending a sine wave based on the frequency of the detected EMI.
Preferably, the method further comprises: the decision feedback equalizer filter coefficients corresponding to the frequency of the EMI are sent to the link partner.
Preferably, the method further comprises: the decision feedback equalizer coefficients are transmitted by encoding them in high level data link control (HDLC) data packets.
Preferably, the method further comprises: the frequency of the detected EMI is sent to the link partner by encoding the frequency in a high-level data link control (HDLC) data packet.
Preferably, the detecting step comprises: EMI is distinguished from the received signal by using the Power Spectral Density (PSD) of the received signal.
Preferably, the detecting step comprises: EMI is detected from the output of the analog-to-digital converter.
Preferably, the detecting step comprises: EMI is detected based on the input of a Feed Forward Equalizer (FFE).
Preferably, the detecting step comprises: EMI is detected based on the difference between the slicer (slicer) output and the slicer input.
Preferably, the determining step comprises: the frequency of the EMI is determined from one or more of an output of an analog-to-digital converter, an input of a feed-forward equalizer (FFE), and an output of a slicer.
Preferably, the method further comprises: the detecting, determining, selecting and adjusting steps are performed in less than a preset time.
Preferably, the preset time is 10 ms.
Preferably, the filter coefficients are those of a feedforward equalizer and a Decision Feedback Equalizer (DFE).
Preferably, the filter coefficients are filter coefficients of a notch filter.
According to one aspect of the present invention, there is provided a system for substantially eliminating the effects of EMI impulse noise in an ethernet system, comprising:
at least one of a Least Mean Square (LMS) module and a processor for calculating and storing filter coefficients corresponding to a predetermined EMI frequency range;
a tone detector for detecting EMI in the received signal and determining the frequency of the detected EMI;
a Feed Forward Equalizer (FFE) for adjusting its frequency response with filter coefficients corresponding to the detected EMI frequencies to substantially eliminate EMI effects in the received signal; and
a Decision Feedback Equalizer (DFE) for adjusting its frequency response with filter coefficients corresponding to the detected EMI frequency to substantially eliminate the EMI effects in the received signal.
Preferably, the system further includes a processor for signaling the presence of EMI to the link partner by transmitting a predetermined auxiliary bit sequence in a plurality of LDPC code blocks (LDPC blocks).
Preferably, the system further comprises: a Direct Digital Frequency Synthesizer (DDFS) is also included for signaling the presence of EMI to the link partner by sending a sine wave to the link partner having an amplitude and frequency equal to the amplitude and frequency of the detected EMI.
Preferably, the system further comprises a processor for transmitting the filter coefficients corresponding to the EMI frequency to the link partner by encoding the filter coefficients in a high-level data link control (HDLC) data packet.
Preferably, the system further comprises a processor for transmitting the frequency of the detected EMI to a link partner by encoding the frequency in a high-level data link control (HDLC) data packet.
Preferably, the tone detector is configured to detect EMI and the frequency of the EMI from the output of the analog to digital converter.
Preferably, the tone detector is configured to detect EMI and the frequency of the EMI from an input of a Feed Forward Equalizer (FFE).
Preferably, the sound detector is configured to detect EMI and the frequency of the EMI from the output of the slicer.
Preferably, the feed forward equalizer comprises a configurable notch filter enabling removal of EMI at the detected frequencies.
Preferably, the processor is operable to select filter coefficients corresponding to a determined frequency of the detected EMI.
According to one aspect of the present invention, there is provided a method of reducing the effects of EMI impulse noise in an ethernet system, comprising:
receiving a signal from a link partner indicating the presence of EMI;
receiving filter coefficients from the link partner corresponding to the frequency of the detected EMI signal for a programmable precoder; and
the frequency response of the precoder is adjusted using the received filter coefficients to substantially cancel the effects of EMI in the received signal.
Preferably, the programmable precoder is a thomlinson-prima island (Tomlinson-Harashima) precoder.
According to one aspect of the present invention, there is provided a machine-readable medium having stored thereon computer-executable instructions, which when executed by a computing device, cause the computing device to perform a method comprising:
calculating and storing filter coefficients corresponding to the EMI frequency range;
receiving a signal indicative of the presence of EMI and the frequency of the EMI;
selecting filter coefficients corresponding to the determined EMI frequency; and
the selected filter coefficients are used to adjust the frequency response of one or more filters to substantially eliminate the effects of EMI in the received signal.
Drawings
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The accompanying drawings and description thereof illustrate embodiments of the invention to explain the nature of the invention, and in which:
FIG. 1A illustrates a typical two-way communication system;
FIG. 1B further illustrates the two-way communication system of FIG. 1A;
FIG. 2 illustrates a physical layer (PHY) transceiver;
FIG. 3 illustrates a physical layer transceiver detecting and substantially eliminating EMI interference effects to allow uninterrupted communications, according to an exemplary embodiment;
FIG. 4A shows a graph of the frequency response of a Feed Forward Equalizer (FFE);
FIG. 4B shows a plot of the Power Spectral Density (PSD) of EMI;
FIG. 4C illustrates a graph of a modified frequency response of a feed-forward equalizer, the modification of the frequency response substantially eliminating EMI effects in a received signal, in accordance with an exemplary embodiment;
FIGS. 5A, 5B, and 5C illustrate exemplary bit sequence patterns transmitted to a link partner to indicate the presence or absence of EMI;
FIG. 6 shows a flowchart of exemplary steps performed by the PHY layer receiver to substantially eliminate EMI effects, in accordance with a typical embodiment;
FIG. 7 shows a flowchart of exemplary steps performed by the PHY layer in receiving an indication of EMI from a link partner, in accordance with a typical implementation;
FIG. 8 shows a flowchart of exemplary steps performed by a PHY layer transceiver to substantially eliminate the effects of EMI in a received signal, in accordance with a typical implementation;
the present invention will be described in detail below with reference to the accompanying drawings. In the drawings, like reference numbers may indicate identical or functionally similar elements.
Detailed Description
Fig. 1A illustrates a typical two-way communication system 100. Communication system 100 includes a link 102 and a link partner 104 connected by a wire pair 160 a-n.
In one example, link 102 and link 104 are both part of an Ethernet system, such as a 10GBase-T Ethernet system. Each of the conductor pairs 106 may be a balanced twisted pair of conductors. It should be appreciated that the embodiments provided herein are not limited to ethernet or twisted pair conductors and may be applied to any communication system. The link 102 and the link partner 104 may be computing devices, such as personal computers, notebook computers, mobile communication devices, or servers, such as internet servers. The term "link partner" refers to a device at the other end of the communication link. For example, link 102 is a "link partner" of link partner 104, and link partner 104 is a "link partner" of link 102. Link 102 and link partner 104 are further described below with reference to fig. 1B.
FIG. 1B further illustrates the two-way communication system of FIG. 1A. Both link 102 and link partner 104 include an interface 114, PHY108, mixing module (hybrid)110, and computing device 116, computing device 116 including a processor 118 and memory 120.
In link 102, computing device 116a is connected with interface 114 a. The PHYs 108a-d are coupled to the interface 114 a. The PHYs 108a-d are coupled to respective mixing modules 110 a-d. The mixing modules 110a-d are connected with the mixing modules 110e-h in the link partner 104 by wire pairs 106 a-d. The mixing modules 110e-h are connected to respective PHYs 108 e-f. The PHYs 108e-f are connected to the interface 114 b. The interface 114b is coupled to a computing device 116b, wherein the computing device 116b includes a processor 118b coupled to a memory 120 b.
The high-level application layer runs on, for example, a processor 118 of the computing device 116. The interface 114 connects the physical layer 108 to higher-level layers, such as a Media Access Control (MAC) layer and an application layer running in the computing device. The PHY108 (also referred to herein as a "PHY transceiver") connects a link layer (e.g., a MAC layer) to a physical media layer (e.g., a pair of wires). In one example, the embodiments provided herein are implemented in PHY 108. The PHY108 will be described in further detail below with reference to fig. 2-3. The mixing module 110 ensures that the receiver 212 (see fig. 2) in the PHY108 is not aware of what the transmitter 200 (see fig. 2) is transmitting over each wire pair 106 simultaneously in the full duplex mode. In other words, each mixing module 110 separates the transmit signal and the receive signal for each PHY 108.
Communication between the link 102 and the link partner 104 may be impeded by electromagnetic interference (EMI) 112. In earlier versions of the physical layer ethernet systems using copper cabling, such as the 10/100/1000BASE-T system, the channel capacity was much higher than the system data rate. These systems have relative robustness (robust) in the presence of EMI. EMI is, however, extremely detrimental to communications in 10GBASE-T ethernet systems. The data rate of a typical 10GBASE-T system is very close to the available channel capacity, and therefore, the signal-to-noise ratio (SNR) limit is significantly reduced compared to the signal-to-noise ratio limit of the 10/100/1000BASE-T system. Current 10GBASE-T systems are very susceptible to link down even in the presence of moderate EMI signals (e.g., generated by wireless telephones).
Network providers typically impose a block error rate on the communication system. For example, for an Ethernet system, a network provider typically tolerates 10 in the presence of EMI-2Such that the communication link between the link 102 and the link partner 104 is not broken. The block error rate is calculated using a moving window of 1 second by counting the number of erroneous code blocks during the moving window of 1 s. In this example, the proportion of erroneous code blocks should not be higher than 1%. With this convention, there is a 1% error rate for the first 1 second window after EMI occurs, and if none of the remaining 99% of the code blocks are in error, the block error rate of the communication system can be kept well within 1% and still within the standards of the ethernet system. Thus, the first 10ms after the occurrence of EMI can be used to detect and take error correction measures to suppress EMI. The error generated in the first 10ms does not violate the above convention for acceptable system performance in the presence of EMI.
The effects of steady state narrow band EMI can be eliminated by using sufficiently long, properly tuned feed-forward and feedback equalizers. However, these equalizers cannot suppress transient interference, such as EMI peaks (see, e.g., EMI peak 414 in fig. 4B). In particular, an EMI peak, such as peak 414, may be observed in the transition of EMI from absent to present, or in the transition of EMI from one frequency to another different frequency. The interference of EMI peaks is typically not suppressed until the equalizer in the PHY transceiver has time to adjust. However, it is possible that the receiver receives an unacceptable number of errors in the time required to adjust to the EMI peaks, thus causing the communication link, e.g., between link 102 and link 104, to be broken. Adaptive decision control can result in high error rates, resulting in convergence failure of the equalizer. Further, higher level layers may also disconnect the communication link if the high error condition persists for an extended period of time. There is therefore a need for a scheme that enables it to quickly detect EMI and the occurrence of EMI peaks in the presence of EMI and robustly determine a suitable equalization response to prevent the high-energy layer from breaking the communication link. The embodiments presented herein detect EMI peaks and adjust the system to eliminate the effects of the EMI peaks for a predetermined period of time (e.g., a 10ms period) that is acceptable for the communication standard being used. It should be appreciated that the block error rate and the time window for detecting EMI and making adjustments is a design requirement and will vary based on the implementation and nature of the communication system. It should be noted that the embodiments presented herein are applicable to any communication system.
To meet the long-felt need for a robust communication system capable of detecting and eliminating the effects of EMI, the present invention provides embodiments herein for detecting and eliminating the effects of EMI impulse noise. According to one embodiment, optimal filter coefficients and equalization responses are determined for a range of assumed EMI frequencies before EMI of a given frequency (or range of frequencies) occurs. The frequency response of the equalizer is based on filter coefficients, which may be pre-calculated for a range of frequencies and stored in a table (e.g., table 1 below) that equalizes the frequency response. In one embodiment, the frequency range of EMI used to calculate the filter coefficients is within a selected bandwidth of the communication system, such as 0MHz-400MHz for 10GBASE-T Ethernet. This is because EMI outside the operating bandwidth range is unlikely to significantly affect the performance of the communication system. Each entry may include filter coefficients or other equalizer parameters for the physical channel for a plurality of EMI frequencies. In another alternative embodiment, the equalizer response and filter coefficients are calculated on the fly or in real time. The time required to compute the equalizer can be significantly reduced using a method based on inverse channel analysis. The coefficients and equalizer table may be updated in real time based on changes in the physical channel (e.g., changes in the wire pair 106).
Once EMI and its frequency are detected, the frequency response of one or more filters can be altered using coefficients in the table corresponding to the frequency closest to the detected EMI frequency. If part of the channel equalization is in the link partner's transmitter (in the case of 10 GBASE-T), then a robust signaling scheme is used to communicate the detected EMI frequency and/or filter coefficients to the link partner in the presence of non-suppressible EMI. The embodiments presented herein may be fully implemented in the physical layer 108, as will be further described below in conjunction with fig. 2 and 3.
Fig. 2 shows a typical physical layer (PHY) 108. The physical layer 108 includes a transmitter 200 and a receiver 212.
The transmitter 200 has its input connected to the interface 114 and its output connected to the mixing module 110. An input of the receiver 212 is connected to an output of the mixing module 110 and an output of the receiver 212 is connected to an input of the interface 114. The transmitter 200 includes a framing and scrambler (frame and scrambler)202, a Low Density Parity Check (LDPC) encoder 204, a precoder 206, a digital-to-analog converter (DAC)208, and a line driver 210. The input of LDPC encoder 204 is connected to framing and scrambler 202. An input of precoder 206 is connected to an output of LDPC encoder 204. An input of the digital-to-analog converter 208 is connected to an output of the pre-coder 206, and an input of the line driver 210 is connected to an output of the digital-to-analog converter 208. An input of the mixing module 110 is connected to an output of the line driver 210. In one example, the transmitter 200 receives data from an application layer running in the computing device 116 to transmit.
In operation, an application layer program running on processor 118 sends transmit data to interface 114 via link 274. The interface 114 sends data 272 to the framing and scrambler 202. The framing and scrambler 202 scrambles the signal 272 and adds frames to the data 272 in accordance with the communication protocol being used to produce frame data 236. LDPC encoder 204 generates parity bits and adds the parity bits to frame data 236 to generate encoded data 238. The pre-coder 206 performs pre-shaping (pre-shape) on the encoded data 238 to solve the Inter-symbol Interference (ISI) problem during transmission, so that the receiver on the link partner side is not affected by ISI on the channel. In one example, the precoder 206 is a thomlinson-harashima precoder. The pre-encoder 206 performs pre-shaping processing on the encoded data 238 to produce pre-shaped data 240. The digital-to-analog converter 208 converts the pre-shaped data 240 into an analog signal 242. The line driver 210 amplifies the analog signal 242 to generate a transmit signal 244. The mixing module 110 separates the transmit signal from the receive signal 246.
Receiver 212 includes a de-framing and de-scrambling 214, an LDPC decoder 216, a Decision Feedback Equalizer (DFE)220, a slicer (slicer)218, a Feed Forward Equalizer (FFE)222, an echo canceller 230, a 3-fold near-end crosstalk (NEXT) canceller 232, an analog-to-digital converter 224, a receive filter 226, and a Variable Gain Amplifier (VGA) 228. Variable gain amplifier 228 receives data on conductor pair 106 through mixing module 110. The input of the receive filter 226 is connected to the output of the variable gain amplifier 228. An input of the analog-to-digital converter 224 is connected to receive an output of the filter 226. The input of the feed forward equalizer 222 is connected to the outputs of the echo canceller 230, the 3 x NEXT canceller 232, and the analog to digital converter 224. An input of slicer 218 is connected to an output of decision feedback equalizer 220 and an output of feedforward equalizer 222. An input of LDPC decoder 216 is connected to an output of slicer 218. An input of de-framing and descrambler 214 is connected to an output of LDPC decoder 216. An input of the interface 114 is connected to an output of the deframer and descrambler 214. The receiver 212 sends the received data from the link partner to the computing device 116 for processing. Receiver 212 also includes a Least Mean Square (LMS) unit 234 coupled to slicer 218, analog-to-digital converter 224, feedforward equalizer 222, decision feedback equalizer 220, echo canceller 230, and 3-fold NEXT canceller 232.
In operation, receiver 212 receives signal 246 from conductor pair 106 through hybrid module 110. Variable gain amplifier 228 amplifies received signal 246 to produce amplified signal 248. Receive filter 226 filters amplified signal 248 to remove noise and produce filtered signal 250. The analog-to-digital converter 224 converts the filtered signal 250 to a digital signal 252. The echo canceller 230 generates an echo cancellation signal 254 based on the pre-formed signal 240 to remove interference introduced by the transmit signal 244 of the transmitter 200. The 3 x NEXT canceller 232 generates a 3 x NEXT cancellation signal 256 to cancel the effects of interference transmitted and received on adjacent pairs, e.g., transmission and reception on pairs 106b-d will affect any signal received on pair 106a, which are cancelled by the 3 x NEXT cancellation signal 256. The echo cancellation signal 254 and the 3 x NEXT cancellation signal 256 are combined to form a cancellation signal 258. The cancellation signal 258 is combined with the digital signal 252 to form an adjustment signal 260, and the adjustment signal 260 is input to the feed-forward equalizer 222. The feed forward equalizer 222 removes precursor (pre-cursor) ISI from the adjustment signal 260 to produce a shaped signal 262.
During start-up, decision feedback equalizer 220 outputs feedback signal 266 based on either sliced signal 264 or training sequence 292. Decision feedback equalizer 220 removes post-cursor ISI from sliced signal 264. DFE coefficients 280 are generated by a Least Mean Square (LMS) unit 234. In one embodiment, decision feedback equalizer 220 only runs at startup and is disabled after startup. Precoder 206 on the link partner side then uses DFE coefficients 280 to remove the postcursor ISI. DFE coefficients 280 are available to precoder 206 because DFE 220 and precoder 206 are mathematically equivalent.
Feedback signal 266 is combined with shaped signal 262 to produce slicer input signal 263, slicer input signal 263 is sliced by slicer (slicer)218, signal 263 is split into a plurality of digital levels to produce sliced signal (sliced signal) 264. LDPC decoder 216 uses the parity bits in slice signal 264 to correct errors and removes the parity bits from slice signal 264 to form decoded signal 268. The de-framer and descrambler 214 descrambles the decoded signal 268 and extracts data from the frames of the decoded signal 268 to produce a data signal 270. The data signal 270 is sent through the interface 114 to the processor 118 of the computing device 116 for processing.
The receiver 212 also includes an LMS unit 234. The LMS unit 234 receives as inputs the error signal 246, the pre-shaped signal 240, and the digital signal 252. In one embodiment, the data signal 252 may be used instead of a digital signal. In one example, error signal 246 is the difference between slicer signal 264 and slicer input signal 263. In another embodiment, the error signal may be another signal. LMS unit 234 generates Feed Forward Equalizer (FFE) coefficients 278, Decision Feedback Equalizer (DFE) coefficients 280, echo canceller coefficients 282, and 3-fold NEXT canceller coefficients 284. The feedforward equalizer coefficients 278, decision feedback equalizer coefficients 280, echo canceller coefficients 282, and 3-fold NEXT canceller coefficients 284 determine the frequency response of the feedforward equalizer 222, decision feedback equalizer 220, echo canceller 230, and 3-fold NEXT canceller, respectively. As described further below in conjunction with fig. 3, embodiments presented herein may: (1) pre-calculating and storing feed-forward equalizer coefficients 278 and decision feedback equalizer coefficients 280 for a plurality of potential EMI frequencies before actual EMI occurs; (2) detecting EMI and adjusting FFE and DFE (e.g., adjusting FFE and DFE coefficients); (3) sending information of existence of EMI to a link partner; (4) the DFE coefficients and/or EMI frequencies are sent to the link partner.
Fig. 3 shows an example PHY 108' according to an exemplary embodiment. The PHY 108' includes, in addition to the components described above with respect to the PHY108 in fig. 2, a tone detector 302 and a Direct Digital Frequency Synthesizer (DDFS) 310.
1. Precomputing filter coefficients
In one embodiment, during start-up before the occurrence of EMI in the frequency range, LSM unit 234 calculates FFE coefficients 278 and DFE coefficients 280 and stores FFE coefficients 278 and DFE coefficients 280 in a memory (not shown) of LMS unit 234 or memory 120. In another embodiment, during startup prior to the occurrence of EMI in the frequency range, processor 118 calculates FFE coefficients and DFE coefficients and stores FFE coefficients 278 and DFE coefficients 280 in memory 120 or other available memory. In another embodiment, LSM unit 234 or processor 118 calculates FFE coefficients 278 and DFE coefficients 280 in real-time corresponding to the determined EMI frequency.
In one example, FFE coefficients 278 and DFE coefficients 280 are calculated for a plurality of Frequency bins (Frequency bins). If F is the frequency bandwidth of the communication system and N is the number of expected EMI frequency bins, then the bandwidth (W) of each frequency bin is: w is F/N. For example, in a 10GBase-T system with a 400MHz bandwidth, if 128 slots are desired, the bandwidth of each frequency slot may be given by 400/128-3.125 MHz. In this case, the bandwidth W of each frequency bin is much wider than the bandwidth of any potential EMI signal. In the embodiment presented herein, to curtail (notch out) any detected EMI and substantially eliminate the EMI effects from the received signal, the frequency response of FFE222 and DFE 280 is modified to include a notch (notch) with a bandwidth of single or multiple frequency bins once EMI is detected. The DFE and FFE coefficients may be selected based on the frequency of the detected EMI. For example, if EMI is detected at 151MHz, the FFE and DFE coefficients can be selected to notch in frequency bins in the range of 150MHz and 153.125MHz to clip EMI.
In one embodiment, during system start-up and prior to the occurrence of EMI, the calculation of FFE and DFE coefficients is premised on the assumption that the EMI signal is centered in the first frequency bin, from which FFE and DFE coefficients are calculated (e.g., using channel inversion method) and stored in a memory, such as memory 120. Then, assuming that the EMI is located at the center of the second frequency bin, FFE coefficients and DFE coefficients are calculated and stored. This process is repeated for each frequency bin. The calculated FFE coefficients and DFE coefficients may be stored in a table indexed by EMI frequency bins as shown in table 1 below.
| EMI frequency slot | DFE coefficients | FFE coefficient |
| 0 to 3MHz | A | B |
| 3 to 6MHz | C | D |
| .. | .. | .. |
| 150 to 153.125MHz | L | M |
| .. | .. | .. |
| 396.875 to 400MHz | X | Y |
TABLE 1
In table 1 above, the bandwidths of the frequency bins are the same. It should be noted that the embodiments presented herein are alternatively applicable when the bandwidths of the frequency bins are not the same.
In table 1 above, each entry represents a coefficient of the filter, e.g., a may represent 16 coefficients, which are required to adjust DFE 220 to clip (notch out) EMI in the 0 to 3MHz range. The number of coefficients is the same as the number of filter ports (tap). Similarly, B may represent, for example, 128 coefficients, which are required to adjust FFE222 to clip EMI in the 0 to 3MHz range. In one example, if the number of frequency bins is 128 and the number of coefficients per frequency bin is 144 (128 for FFE222 and 16 for DFE 220), at most 4 x 128 (128+6) 73728 words are required for coefficient storage for N-128. To reduce the amount of memory required, one possible approach is: only the DFE coefficients are saved and FFE coefficients are calculated/adjusted when the frequency of the EMI signal 112 is detected, based on known DFE coefficients corresponding to the detected EMI frequency. In one example, the memory required is reduced to accommodate 4 x 128 x 16 to 8192 words. FFE coefficients and/or DFE coefficients may be periodically recalculated to account for time drift or other variations in the channel between link 102 and link partner 104.
EMI detection, FFE and DFE adjustment
Based on one or more of the digital signal 252, the adjustment signal 260, and the slice signal 264, the tone detector 302 detects the electromagnetic interference 112 and the frequency of the electromagnetic interference 112. The tone detector generates a signal 304 indicative of the frequency of the detected EMI 112. In one embodiment, one LDPC code block lasts 320ns, so 3125 LDPC code blocks occur within 1ms, allowing enough time to detect EMI and determine the frequency of EMI within the 10ms time window described above.
If the EMI112 is very strong, the sound detector 302 uses the Power Spectral Density (PSD) of the digital signal 252 to estimate the PSD of the detected EMI and its approximate frequency. To determine the PSD of the digital signal 252, a Fast Fourier Transform (FFT) of the digital signal 252 is calculated, the FFT is averaged to overcome noise, and the magnitude of the FFT is the PSD of the digital signal 252. The instantaneous EMI signal is typically detected as a peak in the PSD. For example, as shown in FIG. 4B, the instantaneous EMI may generate a peak 414, which peak 414 may stand out from the PSD of the digital signal 252.
If the strength of the EMI112 is moderate, then the adjustment signal 260 generated after echo cancellation and 3 times NEXT cancellation may be used. The tone detector 302 examines the PSD of the adjusted signal 260 to determine the presence of EMI and its approximate frequency.
If the strength of the EMI112 is relatively weak, the sound detector 302 may use the PSD of the difference between the sliced signal 264 and the sliced input signal 263 to detect the presence of EMI and determine its frequency.
In one embodiment, upon detection of EMI, the tone detector 302 generates a signal 304 indicative of the frequency of the detected EMI 112. FFE coefficients 278 and DFE coefficients 280 corresponding to the detected frequency are selected from the pre-calculated FFE and DFE coefficients stored in memory 120 according to the frequency of the detected EMI. The selected FFE coefficients are used in a feed forward equalizer 222. The selected DFE coefficients 280 are sent to the link partner 104, as described below. Precoder 206 of link partner 104 uses these DFE coefficients 280 for reliable communication, e.g., in a double Quadrature amplitude squared (DSQ 128) mode.
Consider an example where the feed forward equalizer 222 has a frequency response 400 as shown in fig. 4A. The X-axis in fig. 4A is frequency and the Y-axis is the magnitude of the frequency response 400. Fig. 4B shows a graph of electromagnetic interference 408. The X-axis of fig. 4B is frequency 412 and the Y-axis is the Power Spectral Density (PSD) of EMI. In this example, an EMI peak 414 is detected at frequency 406. In fig. 4C, the adjusted frequency response 400' of the feed forward equalizer 222 includes a notch 416 at frequency 406 to attenuate the effects of the EMI signal 414 in the received signal. In one embodiment, notch 416 is the result of the modification of FEE coefficients 278. In an alternative embodiment, notch 416 is the result of a notch filter (not shown) applied to shaped signal 262. In the frequency response 400' of the feed-forward equalizer 222, the bandwidth 418 of the notch 416 corresponds to the bandwidth W of the frequency bin covering the frequency 416. In the above example, if the frequency 416 is 151MHz, the bandwidth of the notch 416 is approximately 3.125MHz, which ranges between 150MHz and 153.125 MHz. Because the 10GBASE-T is wideband, notch clipping one or even a few frequency bins across the frequency response of the FFE222 does not significantly reduce the power of the received signal.
Notches 416 in frequency response 400 may create ISI, and to address the ISI problem, DFE coefficients 280 corresponding to frequency bins of frequency 406 are sent to link partner 104, as described further below. For example, the link 102 can send DFE coefficients corresponding to the frequency bins covering the EMI frequencies 406 to the link partner 104, which DFE coefficients 280 are applied by the link partner 104 to the precoder 206 since the DFE 220 and precoder 206 are mathematically equivalent as described above. The modified precoder 206 response removes ISI due to the presence of notch 416.
In one example, if the EMI source changes location (e.g., a person with a wireless telephone is walking), the EMI frequency remains unchanged because notch 416 is still available. If the EMI frequency is changed by the doppler effect (e.g., in the case where the EMI is from an alarm on an emergency vehicle), this change is very small compared to the bandwidth W of the frequency bin for notch 416. For example, if the frequency of EMI varies from 151MHz to 150MHz or 152MHz, a notch 416 with a bandwidth of 3.125MHz can still remove EMI. Thus, a system tuned for a particular EMI location can suppress EMI even if the EMI source changes location.
In one embodiment, the magnitude of the notch 416 may be adjusted based on the EMI peak 414, e.g., if the EMI peak is relatively high, a notch 416 of a suitable depth may be used, and vice versa.
In one embodiment, if the previously detected EMI is not observed again at the same frequency 406 for a predetermined period of time, the notch 416 corresponding to frequency 406 may be removed to prevent unnecessary degradation of the channel SNR.
3. Notifying link partners of the presence of EMI
In one embodiment, a predetermined bit sequence may be used to inform a link partner that EMI is present. For example, the standard for 10GBASE-T defines unused 3.125Mbps side channel (side channel) to 10Gbps data channel. This side channel includes the "auxiliary bits" in each LDPC code block, the auxiliary bits in consecutive LDPC code blocks may be used to send information to the link partner to indicate the presence or absence of EMI. For example, in the auxiliary bits of four consecutive LDPC code blocks, the interleaving sequence "1010" may indicate that EMI is not present. Four LDPC code blocks can be considered to constitute a "frame". To indicate the presence of EMI to the link partner, the link changes the auxiliary bits so that the interleaved sequence "1010" does not appear in 2 (2 out of 3 consecutive frames) of the 3 consecutive frames. 2 out of 3 frames (e.g., 12 consecutive LDPC code blocks) are used because most of the bits including the auxiliary bits are estimated to be in error in the presence of EMI. The use of 2 out of 3 frames provides additional robustness in case of auxiliary bit errors in the signaling mechanism. For example, in fig. 5A, the presence of alternating patterns in all 3 frames indicates that link partner EMI is not present. In fig. 5B, no alternate pattern is present in frame 3, however, this is not an indication of the presence of EMI, as only 1 out of 3 frames lacks such an alternate pattern. A pattern of corruption (broken pattern) may be an error because the helper bit is itself a very rare case. However, in 2 of the 3 consecutive frames, the probability of 2 or more overhead bit errors in the absence of EMI is quite low, e.g., in fig. 5C, frame 2 and frame 3 may indicate the presence of EMI due to the absence of the alternating pattern, the alternating overhead bit being used because it is not necessary to synchronize the two ends of the link according to the value of the overhead bit. It should be noted that other modes and other comparatives besides the auxiliary bit may be used to indicate the presence of EMI to the link partner.
In further embodiments, the direct digital frequency synthesizer 310 generates a signal 312 that informs the link partner of the presence of EMI. For example, the direct digital frequency synthesizer 310 may generate and transmit a sine wave of predetermined amplitude and frequency to indicate to the link partner that EMI is present.
4. Sending newly calculated, adjusted or pre-stored coefficients to the link partner
In addition to indicating the presence of EMI, the link 102 may also send DFE coefficients to the link partner. The precoder 206 of the link partner 104 uses DFE coefficients to cancel the EMI112 and to adjust the frequency response of the FFE222 of the link 102.
When EMI is acting on the system, the DFE coefficients to be sent to the link partner may not reliably reach the link partner if the DSQ128 mode is used, and therefore, in one embodiment, both link 102 and link partner 104 transition to the pulse amplitude modulation 2(PAM2) signaling mode when EMI is present, which is more robust in the presence of EMI. Because the size of the DFE coefficients that need to be changed is relatively small, the link partner may use a low complexity code, such as a repetition code. For example, assuming 16 DFE coefficients are sent to the link partner, each code being 8 bits wide, the total data sent is 128 bits. Each LDPC code block comprises 256 samples sampled at 800 MHz. If each sample represents a PAM2 signal, 256 bits may be transmitted in each LDPC frame. If a reception code repeated 10 times is used, 5 LDPC frames are required to transmit the DFC coefficients, which takes 1.6 μ s. This time to transmit DFE coefficients is very good for detecting and correcting the EMI effects of the system 100 within the 10ms time window described above. In another embodiment, LDPC codes may be used to further improve the reliability of the transmission in addition to the repetition codes.
In another embodiment, the processor 118 in the link 102 can send DFE coefficients corresponding to the determined frequency of detected EMI to the link partner 104 by encoding the DFE coefficients 260 in a high-level data link control (HDLC) data packet. In another embodiment, only the frequency of the detected EMI is forwarded to the link partner 104 by encoding in HDLC data packets. The link partner 104 uses the EMI encoding frequency to generate DFE coefficients corresponding to the EMI frequency. In another embodiment, link partner 104 uses the frequency received from link 102 to index a pre-computed table, such as table 1, to determine the DFE coefficients corresponding to the received frequency. The link partner 104 applies the DFE coefficients to the precoder 206 to adjust its response to address the EMI112 problem, and to adjust the response of the FFE222 and DFE 220 of the link 102.
In another embodiment, the frequency of the signal 312 generated by the direct digital frequency synthesizer 310 is the same as the frequency of the detected EMI, and thus the EMI frequency may be indicated to the link partner. In another embodiment, the amplitude of the sine wave signal 312 may represent the amplitude of the EMI112, and the link partner 104 may use the frequency of the sine wave signal 312 to select and/or calculate the corresponding DFE coefficients. Link partner 104 may use the magnitude of signal 312 to adjust the magnitude of the DFE coefficients applied to precoder 206 accordingly.
After changing the DFE coefficients, the link partner may use the adjusted/calculated FFE coefficients 278 and the received DFE coefficients 280. It is desirable at this stage to use only 1-2ms of the packet error rate within a 10ms window that allows it to be below 1%. The remaining portion of the 10ms time window is available for: the 3-fold NEXT canceller coefficients 284 are adjusted/fine tuned, the echo canceller coefficients 282 are adjusted/fine tuned, and other components of the physical layer 108' are fine tuned before returning to the DSQ128 transmit mode. In one example, all adaptive filters (e.g., echo canceller 230 and 3-fold NEXT canceller 232) can be delayed or locked as well as the timing recovery integrator loop once EMI is detected to be present, and unlocked after the DFE coefficients are changed, which can speed up the convergence of the adaptive filters.
The higher layers can also complete the sending of DFE coefficients to the link partner 104. For example, in the absence of EMI, Link Layer Discovery Protocol (LLDP) may be used to send and maintain table 1 of the calculated DFE coefficients in real time to the Link partner 104. The benefit of this method of updating coefficients is that the transmission mode need not be converted from DSQ128 to PAM2 and back to DSQ128 in order to transmit DFE coefficients in the presence of EMI. In this example, it is sufficient to transmit to the link partner 104 an EMI frequency or index into a table that includes DFE coefficients corresponding to different EMI frequencies.
Fig. 6 shows a flow chart 600 of steps performed by a PHY layer transceiver to substantially eliminate EMI, according to an exemplary embodiment. Flowchart 600 will continue to be described with reference to the example operating environment illustrated in fig. 1-5. However, the flow chart is not limited to these embodiments. It should also be noted that some of the steps in flowchart 600 do not necessarily have to occur in the order shown.
In step 602, filter coefficients are pre-computed and stored before EMI occurs. For example, processor 118 or LSM unit 234 calculates feedforward equalizer coefficients 278 and decision feedback equalizer coefficients 280 and stores the calculated coefficients in a memory, such as memory 120. In one example, feedforward equalizer coefficients 278 and decision feedback equalizer coefficients 280 for a plurality of EMI frequency bins, after being calculated, may be stored in table 1 shown above. In an alternative embodiment, step 602 is an optional step and processor 118 or LSM unit 234 may generate feed-forward equalizer coefficients 278 and decision feedback equalizer coefficients 280 in real-time.
In step 604, electromagnetic interference is detected in the received signal, e.g., the peak 414 of the power spectral density shown in fig. 4B may be detected by the tone detector 302. In an alternative embodiment, errors in the decoded output 268 of LDPC decoder 216 or errors in a Cyclic Redundancy Check (CRC) can be used to detect EMI. In another example, Signal to noise ratio (SNR) and/or a sudden drop in SNR can be used to detect EMI.
In step 605, all adaptive filters may be delayed or locked as well as the timing recovery integrator loop and unlocked or restarted after the DFE coefficients have changed, which speeds up the convergence of the adaptive filters.
In step 606, the frequency of the EMI detected in step 604 is determined, e.g., the frequency 406 at which the tone detector 302 can detect the EMI peak 414.
In step 608, feedforward and decision feedback equalizer coefficients corresponding to the determined EMI frequency of step 606 are selected or calculated, e.g., the LMS unit 234 calculates feedforward equalizer coefficients and selects decision feedback equalizer coefficients from the table determined in step 602. In an alternative embodiment, processor 118 determines the feedforward equalizer coefficients and decision feedback equalizer coefficients based on the frequency selection step 602 detected in step 606. In another embodiment, the processor 118 and the LMS unit 234 calculate the feedforward equalizer coefficients and the decision feedback equalizer coefficients in real time.
In step 610, the feedforward equalizer coefficients selected in step 608 are applied to the feedforward equalizer to substantially eliminate the effects of EMI in the received signal, e.g., feedforward equalizer coefficients 278 are applied to feedforward equalizer 222 to change the frequency response of feedforward equalizer 222 by creating a notch, e.g., notch 416 at frequency 406 of the detected EMI in fig. 4C.
In step 612, a signal is signaled to the link partner that EMI is present, e.g., as described above, direct digital frequency synthesizer 310 may generate signal 312 to indicate to the link partner that EMI is present. In an alternative embodiment, a bit sequence of multiple LDPC frames may be sent to the link partner to indicate the presence of EMI.
In step 614, the DFC coefficients and/or EMI frequencies corresponding to the detected EMI frequencies are sent to the link partner. For example, processor 118 of link 102 may send the DFE coefficients calculated at step 602 to the link partner in an HDLC frame. In another embodiment, the direct digital frequency synthesizer 310 may generate a sine wave signal 312 at a frequency equal to the frequency of the EMI and send the signal 312 to the link partner 104 to indicate the frequency of the EMI signal. Upon receiving the DFE coefficients, link partner 104 may apply the received filter coefficients to precoder 206 to compensate for the notch that link 102 produces in the frequency response of feed forward equalizer 222. In another example, upon receiving the signal 312 indicating the frequency of the detected EMI, the link partner 104 can select DFE coefficients from pre-stored DFE coefficients that correspond to the frequency indicated by the signal 312.
Fig. 7 shows a flow chart 700 in which the PHY layer performs steps to substantially eliminate EMI upon receiving an indication of EMI from a link partner, according to an exemplary embodiment. Flowchart 700 will continue to be described with reference to an example of an operating environment shown in fig. 1-5. However, the flow chart is not limited to these embodiments. It should be noted that some of the steps in flowchart 700 do not necessarily have to occur in the order shown.
In step 702, a signal indicating the presence of EMI is received from a link partner, e.g., a bit sequence indicating the presence of EMI in a plurality of consecutive LDPC code blocks is received from the link partner as described above. In another example, a sine wave indicating the presence of EMI is received from the direct digital frequency synthesizer 310.
In step 704, DFE coefficients and/or frequencies of detected EMI are received. For example, DFE coefficients are received for precoder 206 from an HDLC frame or LLDP frame of the link partner. In an alternative embodiment, the frequency of the sine wave from the link partner's direct digital frequency synthesizer 310 may represent the frequency of the electromagnetic interference detected by the link partner.
In step 705, FFE coefficients are calculated or looked up from the frequency of DFE coefficients and/or EMI received in step 704. The FFE coefficients are applied to FFE. For example, the FFE coefficient is applied to FFE 278.
In step 706, the DFE coefficients are applied to the precoder to compensate for the effects of notching in the feedforward equalizer of the link partner that sent the DFE coefficients in step 704. For example, the DFE coefficients received at step 704 are applied to precoder 206. In one embodiment, processor 118 calculates DFE coefficients 280 and applies them to precoder 206 based on the frequencies received at step 704. In an alternative embodiment, LMS unit 234 calculates DFE coefficients 280 in real time and applies the DFE coefficients to precoder 206 based on the frequency received at step 704. In an alternative embodiment, processor 118 calculates real-time DFE coefficients and applies the DFE coefficients to precoder 206.
In an alternative embodiment, link 102 may adjust the frequency response of its FFE222 upon detection of EMI, but does not send DFE coefficients to link partner 104, instead link 102 may activate its own DFE 220 and apply DFE coefficients corresponding to the frequency of the detected EMI into DFE 220 to obtain the FFE222 adjusted frequency response. Where the link partner 104 is manufactured by a different vendor than the link 102, an alternative embodiment is used, and therefore the steps performed for this embodiment are described with reference to fig. 8 without implementing the EMI cancellation method described herein.
Fig. 8 shows a flowchart 800 of the steps performed by a PHY transceiver to substantially eliminate EMI from a received signal, according to an exemplary embodiment. Flowchart 800 will be described with continued reference to the example operating environment illustrated in fig. 1-5. However, the flow chart is not limited to these embodiments. It should be noted that some of the steps in flowchart 800 do not necessarily occur in the order shown.
In step 802, filter coefficients corresponding to a plurality of frequency bins for EMI are pre-computed and stored prior to the occurrence of EMI. For example, processor 118 or LSM unit 234 calculates feed-forward equalizer coefficients 278 and decision feedback equalizer coefficients 280 for the plurality of EMI frequencies and stores the calculated coefficients in a memory, such as memory 120. In one example, feedforward equalizer coefficients 278 and decision feedback equalizer coefficients 280 for a plurality of EMI frequency bins, after being calculated, may be stored in table 1 shown above. In an alternative embodiment, step 802 is an optional step and processor 118 or LSM unit 234 may generate feed-forward equalizer coefficients 278 and decision feedback equalizer coefficients 280 in real-time.
In step 804, electromagnetic interference is detected in the received signal, e.g., the peak 414 of the power spectral density shown in fig. 4B may be detected by the tone detector 302. For strong EMI signals, the tone detector 302 may use the digital signal 252 for detection. For moderate strength EMI signals, the tone detector 302 may use the adjustment signal 260 for detection. For weak EMI signals, the sound detector 302 may detect by the difference of the sliced signal 264 and the sliced input signal 263.
In step 806, the frequency of the EMI detected in step 804 is determined, e.g., the frequency 406 at which the tone detector 302 can detect the EMI peak 414.
In step 808, the feedforward equalizer coefficients and the decision feedback equalizer coefficients corresponding to the determined EMI frequency of step 806 are selected. For example, the LMS unit 234 selects the feedforward equalizer coefficients and the decision feedback equalizer coefficients determined in step 602 for the feedforward equalizer 222 and the decision feedback equalizer 220 based on the frequency detected in step 806. In an alternative embodiment, processor 118 calculates the feedforward equalizer coefficients and decision feedback equalizer coefficients determined in step 802 based on the frequency detected in step 806. The feedforward equalizer coefficients and the decision feedback equalizer coefficients may also be selected from table 1 above.
In step 810, the feedforward equalizer coefficients and decision feedback equalizer coefficients selected in step 808 are applied to feedforward equalizer 222 and decision feedback equalizer 220. For example, FFE coefficients 278 and DFE coefficients 280 selected/determined at step 808 are applied to feedforward equalizer 222 and decision feedback equalizer 220, respectively. Typically, decision feedback equalizer 220 will be turned off after the start-up sequence. However, in this particular embodiment, DFE 220 is on and no signal is sent to the link partner to indicate the presence of EMI.
Embodiments of the invention, or portions thereof, may be implemented in hardware, firmware, software, and/or combinations thereof.
The embodiments provided by the present invention can be used in any communication system that can suffer from the deleterious effects of EMI, or in any communication system where the channel conditions are known or can be estimated at the time of transmission and reception.
Typical signal processing functions described herein (e.g., portions of PHY 108') may be implemented in hardware, software, or a combination. For example, the signal processing functions may be implemented using a computer processor (e.g., processor 118), computer logic, an Application Specific Integrated Circuit (ASIC), a digital signal processor, etc., as will be appreciated by those skilled in the art in light of the present discussion. Accordingly, any processor that performs signal processing functions is within the scope and spirit of embodiments of the present invention.
Additionally, the signal processing functions of the present invention may be embodied by computer program code that is executable by a computer processor, such as processor 118 or any of the hardware devices listed above. The computer program code causes the processor to perform the signal processing functions described, the computer program code (e.g. software) may be stored on a computer usable medium, a computer program medium, or any storage medium readable by a computer or a processor, including a memory device (e.g. memory 120), a RAM or ROM, other types of computer storage media (e.g. a computer hard disk or CDROM), or an equivalent. Accordingly, any storage medium with computer program code to cause a processor to perform signal processing functions is within the scope and spirit of embodiments of the present invention.
Conclusion
While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example only, and not limitation. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention.
The invention has been described above with the aid of method steps illustrating specified functions and relationships. For convenience of description, the boundaries and sequence of these functional building blocks and method steps have been defined herein specifically. However, given the appropriate implementation of functions and relationships, changes in the limits and sequences are allowed. Any such boundaries or sequence of changes should be considered to be within the scope of the claims. The invention has also been described above with the aid of functional blocks illustrating some important functions. For convenience of description, the boundaries of these functional building blocks have been defined specifically herein. When these important functions are implemented properly, varying their boundaries is permissible. Similarly, flow diagram blocks may be specifically defined herein to illustrate certain important functions, and the boundaries and sequence of the flow diagram blocks may be otherwise defined for general application so long as the important functions are still achieved. Variations in the boundaries and sequence of the above described functional blocks, flowchart functional blocks, and steps may be considered within the scope of the following claims.
Those skilled in the art will also appreciate that the functional blocks described herein may be implemented as discrete components, special purpose integrated circuits, processors with appropriate software, and the like. Thus, the scope of the present invention should not be limited by any of the above-described embodiments, but should be defined only in accordance with the following claims and their equivalents.
Claims (8)
1. A method for eliminating EMI effects in an ethernet system, comprising:
calculating and storing filter coefficients corresponding to the EMI frequency range;
receiving a signal;
detecting EMI in the received signal;
determining a frequency of the detected EMI;
selecting filter coefficients corresponding to the determined EMI frequency; and
adjusting the frequency response of one or more filters with the selected filter coefficients to cancel the effects of EMI in the received signal,
wherein the method further comprises signaling the presence of EMI to a link partner.
2. The method of claim 1, wherein the step of transmitting a signal comprises: a predetermined bit sequence is sent in a plurality of consecutive frames to indicate to the link partner that EMI is present.
3. The method of claim 2, further comprising: the predetermined bit sequence is transmitted using the auxiliary bits.
4. The method of claim 1, further comprising: the presence of EMI is signaled to the link partner by sending a sine wave at a frequency equal to the detected EMI frequency.
5. The method of claim 1, further comprising: the presence of EMI is signaled to the link partner by sending a sine wave at a frequency based on the frequency of the detected EMI.
6. A system for canceling the effects of EMI impulse noise in an ethernet system, comprising:
at least one of a least mean square module and a processor for calculating and storing filter coefficients corresponding to a predetermined EMI frequency range;
a tone detector for detecting EMI in the received signal and determining the frequency of the detected EMI;
a feed forward equalizer for adjusting its frequency response with filter coefficients corresponding to the detected EMI frequency to cancel EMI effects in the received signal; and
a decision feedback equalizer for adjusting its frequency response with filter coefficients corresponding to the detected EMI frequencies to cancel EMI effects in the received signal,
the system also includes a processor for signaling the presence of EMI to a link partner by transmitting a predetermined sequence of auxiliary bits in a plurality of LDPC code blocks.
7. The system of claim 6, further comprising:
a direct digital frequency synthesizer for signaling the presence of EMI to the link partner by sending a sine wave to the link partner having an amplitude and frequency equal to the amplitude and frequency of the detected EMI.
8. A method of reducing the effects of EMI impulse noise in an ethernet system, comprising:
receiving a signal from a link partner indicating the presence of EMI;
receiving filter coefficients from the link partner corresponding to the frequency of the detected EMI signal for a programmable precoder; and adjusting the frequency response of the precoder with the received filter coefficients to cancel the effects of EMI in the received signal, wherein the method further comprises signaling to the link partner that EMI is present.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US25798209P | 2009-11-04 | 2009-11-04 | |
| US61/257,982 | 2009-11-04 | ||
| US12/771,722 | 2010-04-30 | ||
| US12/771,722 US8842767B2 (en) | 2009-11-04 | 2010-04-30 | System and method for un-interrupted operation of communications during interference |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| HK1157949A1 HK1157949A1 (en) | 2012-07-06 |
| HK1157949B true HK1157949B (en) | 2014-10-10 |
Family
ID=
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI493934B (en) | System and method for un-interrupted operation of communications during interference | |
| US9515843B2 (en) | Method and system for link adaptive Ethernet communications | |
| US8320411B1 (en) | Fast retraining for transceivers in communication systems | |
| US8442099B1 (en) | Crosstalk cancellation for a common-mode channel | |
| US8107573B2 (en) | Method and apparatus for baseline wander compensation in Ethernet application | |
| US7200180B2 (en) | Data transceiver with filtering and precoding | |
| US8014442B2 (en) | Communicating data using wideband communications | |
| EP3340552B1 (en) | Phy transceiver with adaptive tx driver and method of operating thereof | |
| US8792597B2 (en) | Reducing electromagnetic interference in a receive signal with an analog correction signal | |
| US20030026334A1 (en) | Adaptive equalizer | |
| EP2120412A1 (en) | System and transceiver for DSL communications based on single carrier modulation, with efficient vectoring, capacity approaching channel coding structure and preamble insertion for agile channel adaption | |
| KR20040015038A (en) | Apparatus and method for providing optimal adaptive forward error correction in data communications | |
| EP1805927A1 (en) | Periodic impulse noise mitigation in a dsl system | |
| US7729464B2 (en) | Aiding synchronization between master and slave transceivers | |
| US20080069052A1 (en) | Techniques for decoding information from signals received over multiple channels | |
| US8804793B2 (en) | Method and apparatus for fast link recovery | |
| US7720015B2 (en) | Receiver ADC clock delay base on echo signals | |
| US8787844B2 (en) | Signal transceiving method, signal transceiver utilizing the signal transceiving method, network connection method and network device utilizing the network connection method | |
| JP2019526176A (en) | Interference mitigation | |
| HK1157949B (en) | Method and system for eliminating emi interference in ethernet system | |
| US8130939B2 (en) | Maintaining convergence of a receiver during changing conditions | |
| US8611451B1 (en) | Precoder coefficient optimization method and apparatus for communications systems | |
| US20250373343A1 (en) | Dynamic rfi suppression for communication protocols | |
| US20050232308A1 (en) | Frame alignment and cyclic extension partitioning | |
| Sarhan et al. | Optimization of the rate adaptation procedures in xDSL systems |