HK1146864A - Power supply for a load control device - Google Patents

Description

Power supply for load control device

RELATED APPLICATIONS

This application claims priority from U.S. provisional patent application No. 61/015,965 entitled POWER supply support a LOAD CONTROL DEVICE, filed on 21/12/2007, the entire contents of which are incorporated herein by reference.

Technical Field

The present invention relates to power supplies for load control devices, and more particularly, to power supplies for load control devices of multi-location load control systems that draw substantially symmetric current while powering electrical loads that draw asymmetric current.

Background

Existing two-wire dimmers have two wires: a "hot" line to an Alternating Current (AC) power source and a "dimmed hot" line to a lighting load. Standard dimmers use one or more semiconductor switches, such as triacs or field-controlled transistors (FETs), to control the current delivered to the lighting load and, thus, the intensity of the light. The semiconductor switch is typically coupled between the hot line connection of the dimmer and the dimmed hot line.

The smart wall-mounted dimmer may include a user interface, typically having a plurality of buttons to receive user inputs and a plurality of status indicators to provide feedback to the user. These smart dimmers typically include a microprocessor or other processing device for making advanced settings for control features and for end user feedback options. An example of a smart dimmer is disclosed in commonly assigned U.S. patent No. 5,248,919 entitled LIGHTING CONTROL DEVICE, entitled 9/28 1993, which is incorporated herein by reference in its entirety.

To provide a Direct Current (DC) voltage V_CCTo power a microprocessor or other low voltage circuit, and smart dimmers typically include a cat-ear power supply. The cat-ear power supply draws current only near the zero crossing of the AC supply voltage and is named according to the shape of the power waveform it draws from the AC voltage supply. Because a smart dimmer has only two terminals, the power supply must draw current through the connected lighting load. In order for the power supply to be able to draw sufficient current, the semiconductor switch must be non-conductive so as to be electrically cross-connectedThe source can obtain sufficient voltage. Thus, even when a maximum voltage is desired across the lighting load, the semiconductor cannot be turned on for the entire half-cycle length.

Sometimes, the power supply of the smart dimmer is required to power an electrical load that draws an asymmetric current, e.g., an electrical load that draws a greater amount of current during the positive half-cycle than during the negative half-cycle. Depending on the load producing the asymmetric current, the prior art power supply causes a corresponding asymmetric current to flow through the electrical load. If the electrical load is sensitive to an asymmetric current, such as a Magnetic Low Voltage (MLV) lighting load, the lighting load may generate acoustic noise, which is undesirable. For example, if the current through the MLV lighting load has a DC component of approximately 0.3-0.4A, acoustic noise may be generated.

Accordingly, there is a need for a power supply for a load control device that is operable to draw a symmetric current while powering an electrical load that draws an asymmetric current.

Disclosure of Invention

According to an embodiment of the invention, a power supply is operable to generate a DC voltage and includes an energy storage element, a controllably conductive switching circuit, and a latch circuit coupled to the controllably conductive switching circuit. The power supply is used in a load control device that controls the amount of power delivered from an AC power source to an electrical load. A controllably conductive switching circuit of the power supply is coupled in series with the energy storage element for selectively charging the energy storage element to generate the DC voltage. The controllably conductive switching circuit is operable to conduct after the amplitude of the AC voltage waveform substantially exceeds the amplitude of the DC voltage waveform during a half-cycle of the AC voltage waveform. The latch circuit is adapted to render the controllably conductive switching circuit non-conductive in response to the magnitude of the DC voltage and the amount of time that the energy storage element has been charging during the half-cycle.

According to another embodiment of the invention, the power supply is operable to generate a DC voltage and is characterized by an asymmetric output current. The power supply comprises an output end, an energy storage element and a controllable conduction switch circuit. The output is adapted to conduct an asymmetric output current and provide a DC voltage, which is generated across the energy storage element. And the controllable conduction switch circuit is connected with the energy storage element in series and used for selectively charging the energy storage element to generate the DC voltage so that the power supply draws input current from the AC power supply. The controllably conductive switching circuit is controlled so that the input current is substantially symmetrical.

As described herein, a multiple location load control system that controls power delivered to an electrical load from an AC power source includes a primary load control device and a remote load control device, both of which include a power source. The power supply of the main load control device is operable to draw input current from the AC power source and to generate a link voltage. The main load control device and the remote load control device are adapted to be connected in series between the AC power source and the electrical load such that both the main load control device and the remote load control device are operable to conduct load current from the AC power source to the electrical load without being connected to a neutral line on a neutral side of the AC power source. The remote load control device is adapted to be further connected to the main load control device by an accessory wire. The main load control device is operable to provide line voltage on the accessory power line to allow the power source of the remote device to charge such that the output current of the power source of the main load control device is asymmetric and the input current of the power source of the main load control device is substantially symmetric.

Also described herein is a method of generating a DC supply voltage for a load control device that controls the amount of power delivered to an electrical load from an AC power source. The method comprises the following steps: (1) starting charging an energy storage element during a half-cycle of the AC power source for generating a DC supply voltage; (2) generating a first control signal representative of a magnitude of the DC supply voltage; (3) generating a second control signal representing an amount of time that the energy storage element has been charged during the half-cycle; and (4) stopping charging of the energy storage element in response to the first and second control signals.

Other features and advantages of the present invention will become apparent from the following detailed description, which proceeds with reference to the accompanying drawings.

Drawings

For the purpose of illustrating the invention, there is shown in the drawings embodiments which are presently preferred, it being understood, however, that the invention is not limited to the precise arrangements and instrumentalities shown. The features and advantages of the present invention will become more apparent from the following description of the invention with reference to the accompanying drawings, in which:

fig. 1 is a simplified block diagram of a multiple location dimming system having a main dimmer and two remote dimmers;

fig. 2 is a perspective view of a user interface of a main dimmer and a remote dimmer of the system of fig. 1;

FIG. 3 is a simplified block diagram of the main dimmer of the system of FIG. 1;

fig. 4 is a simplified schematic diagram of a current limiting circuit of the main dimmer of fig. 3;

FIG. 5 is a simplified schematic diagram of a transceiver of the main dimmer of FIG. 3;

FIG. 6 is a simplified schematic diagram of the switching circuit of the main dimmer of FIG. 3

FIG. 7 is a simplified block diagram of a remote dimmer of the system of FIG. 1; and

FIG. 8 is a timing diagram of a complete line cycle of an AC voltage waveform refined to the operation of the system of FIG. 1;

fig. 9A and 9B are simplified flow charts of a load-side multiple position control routine and a line-side multiple position control routine, respectively, executed by the controller of the main dimmer of fig. 3;

fig. 10A is a simplified block diagram of the power supply of the main dimmer of fig. 3;

FIG. 10B is a simplified block diagram of a multiple location dimming system having two remote dimmers coupled to the line side of a main dimmer;

FIG. 11 is a simplified block diagram of a power supply for the AD supply voltage of the power supply of FIG. 10A;

FIG. 12 is a simplified block diagram of a power supply for the AD supply voltage of FIG. 11; and

fig. 13 is a schematic diagram illustrating an example waveform illustrating the operation of the power supply of fig. 11.

Detailed Description

The foregoing summary, as well as the following description of preferred embodiments, is better understood when read in conjunction with the appended drawings. For the purpose of illustrating the invention, there is shown in the drawings embodiments which are presently preferred, in which like numerals represent similar parts throughout the several views. It should be understood, however, that the invention is not limited to the particular methods and instrumentalities disclosed.

Fig. 1 is a simplified block diagram of a multiple location dimming system 100. As shown in fig. 1, a main dimmer 102 and two remote dimmers 104 (i.e., accessory dimmers) are connected in series between an AC power source 106 and a lighting load 108. The main dimmer 102 includes a hot terminal H (i.e., a line-side load terminal) adapted to be connected to the line side of the system 100, and a dimmed hot terminal DH (i.e., a load-side terminal) adapted to be connected to the load side of the system 100. The main dimmer further includes a load control circuit connected between the hot and dimmed hot terminals for controlling the amount of power delivered to the lighting load 108 (described in detail with reference to fig. 3). The remote dimmer 104 includes two fire terminals H1, H2, the fire terminals H1, H2 conducting load current from the AC power source 106 to the lighting load 108. Both the main dimmer 102 and the remote dimmers 104 include accessory dimmer terminals AD that are coupled together via an Accessory Dimmer (AD) line 109 (i.e., an accessory cord). The main dimmer 102 and the remote dimmers 104 are operable to communicate, i.e., send and receive digital information, via the AD lines 109. The main dimmer 102 and the remote dimmers 104 do not require wiring to the neutral side of the AC power source 106.

The main dimmer 102 may be wired to any location of the multiple location dimming system 100. For example, the main dimmer 102 may be wired in the middle of two remote dimmers 104, i.e., a first remote dimmer may be wired to the line side of the system 100 and a second remote dimmer may be wired to the load side of the system 100 (as shown in fig. 1). Alternatively, the main dimmer 102 may be wired to either the line side or the load side of the system 100. Also, more than two remote dimmers 104 (e.g., up to four remote dimmers) may be provided in the multiple location dimming system 100.

Both the main dimmer 102 and the remote dimmers 104 include actuators and video displays so that the lighting load 108 can be controlled based on feedback from the lighting load, and feedback from the lighting load can be provided at both the main dimmer 102 and the remote dimmers 104. To provide a video display at the remote dimmers 104, each remote dimmer includes a controller (e.g., a microprocessor) and a power supply to power the microprocessor. The main dimmer 102 provides an AD supply voltage V on AD line 109_AD(e.g., about 80V)_DC) To enable the power supply of the remote dimmer 104 to be on the first portion of each half-cycle of the AC power source 106 (i.e., the remote dimmer power supply charging time period T)_CHRG) And (6) charging. During the second part of each half cycle (i.e. communication time period T)_COMM) The main dimmer 102 and the remote dimmers 104 are operable to send and receive digital information via the AD lines 109.

Fig. 2 is a perspective view of a user interface 200 of the main dimmer 102 and the remote dimmers 104. The user interface 200 includes a thin touch sensitive actuator 210. the touch sensitive actuator 210 includes an actuating member 212. the actuating member 212 has a first portion 212A and a second portion 212B. The actuating member 212 extends through the bezel 214 to contact a touch sensing device (not shown) disposed in the main dimmer 102 (as well as the remote dimmers 104). The main dimmer 102 is operable to control the intensity of the connected lighting load 108 in response to actuation of the actuating member 212 of the main dimmer 102 or the remote dimmer 104.

The user interface 200 further includes a faceplate 216, the faceplate 216 having a non-standard opening 218 and being mounted to an adapter 220. Bezel 214 is received behind panel 216 and extends through opening 218. The adapter 220 is connected to a yoke (not shown) that is adapted to mount the main dimmer 102 and the remote dimmers 104 to a standard electrical wall box. The air gap actuator 222 allows for actuation of an internal air gap switch 322 (fig. 3) by pulling the air gap actuator downward.

Bezel 214 includes a break 224, break 224 separating lower portion 212A and upper portion 212B of actuation member 212. When the lower portion 212B of the actuating member 212 is actuated, the main dimmer 102 causes the connected lighting load 108 to switch from on to off (or vice versa). Activation of the upper portion 212A of the actuating member 212 (i.e., above the break 224) causes the intensity of the lighting load 108 to change to a level that is based on the position of the activation along the length of the driving member 212.

A plurality of visual indicators, such as a plurality of Light Emitting Diodes (LEDs), are disposed behind the actuating member 212 in a linear array. The actuating member 212 is substantially transparent so that the LEDs are operable to illuminate portions of the actuating member. Two different colored LEDs may be disposed behind the lower portion 212B to illuminate the lower portion, for example, with blue light when the lighting load 108 is on and orange light when the lighting load is off. The LEDs behind the upper portion 212A are, for example, blue and illuminate in the form of a bar graph to show the intensity of the lighting load 108 when the lighting load is on.

The touch sensitive actuator 210 of the user interface 200 is described in detail in co-pending commonly assigned U.S. patent application No. 11/471,908 entitled touch high touch module FOR A LIGHTING CONTROL, filed on 2006, 6, 20, and No. 60/925,821 entitled LOAD CONTROL DEVICE HAVING A modular module, filed on 2007, 4, 23. The entire disclosures of both patent applications are incorporated herein by reference.

Fig. 3 is a simplified block diagram of the main dimmer 102 of the multiple location dimming system 100. The main dimmer 102 controls the current through the lighting load 108, and thus the intensity of the lighting load 108, using a bidirectional semiconductor switch 310, such as a triac, connected between the hot terminal H and the dimmed hot terminal DH. The semiconductor switch 310 may alternatively be any suitable bidirectional semiconductor switch, for example, a FET in a full-wave rectifier bridge, two FETs in anti-series connection, or one or more insulated gate bipolar junction transistors (IGBTs). The semiconductor switch 310 has a control input (or control gate) connected to a gate drive circuit 312. The input to the gate selectively renders the semiconductor switch 310 conductive or non-conductive, the semiconductor switch 310 in turn controlling the power supplied to the lighting load 108.

The controller 314 is operable to control the semiconductor switch 310 by providing a control signal to the gate drive circuit 312. The controller 314 may be any suitable controller, such as a microcontroller, microprocessor, Programmable Logic Device (PLD), or Application Specific Integrated Circuit (ASIC). The controller is connected to a zero crossing detection circuit 316, the zero crossing detection circuit 316 determining a zero crossing of the AC line voltage from the AC power source 106. The controller 314 generates the gate control signal to operate the semiconductor switch 210 to provide the voltage from the AC power source 106 to the lighting load 108 a predetermined number of times relative to the zero crossing of the AC line voltage.

The user interface 600 is coupled to the controller 314 such that the controller is operable to receive input from the touch sensitive actuator 210 and is operable to control the LEDs to provide feedback on the amount of power currently being delivered to the lighting load 108. A more detailed description of the circuitry of user interface 600 is provided in co-pending, commonly assigned, U.S. patent application No. 11/471,914 entitled "FORCE altering TOUCH SCREEN" (constant FORCE TOUCH SCREEN), filed on 2006, month 6 and 20, the entire disclosure of which is incorporated herein by reference.

The main dimmer 102 further includes an audible sound generator 318 coupled to the controller 314. The controller 314 is operable to cause the audio generator 318 to produce an audible sound in response to actuation of the tactile actuator 210. The memory 320 is connected to the controller 314 and is operable to store control information for the main dimmer 102.

An air-gap switch 322 is connected in series between hot terminal H and semiconductor switch 310. The air-gap switch 322 is normally closed, and the semiconductor switch 310 is connected in series between the AC power source 106 and the lighting load 108 when the air-gap switch 322 is in the normally closed state. When the air-gap switch 322 is activated (i.e., in an open state), the air-gap switch provides a virtual air-gap disconnect between the AC power source 106 and the lighting load 108. The air-gap switch 322 allows a user to use the lighting load 108 without the risk of electrocution. The main dimmer 102 further includes an inductor 324, i.e., a choke, for filtering electromagnetic interference (EMI).

The main dimmer 102 includes a power supply 330, the power supply 330 being operable to provide two DC output voltages, isolated and non-isolated. The power supply 330 draws current only at the beginning of each half-cycle while the bidirectional semiconductor switch 310 is non-conductive. When the bidirectional semiconductor switch 310 is turned on, the power supply 330 stops drawing current. The power supply 330 provides a first isolated DC output voltage V_CC1(e.g., 3.4V)_DC) For powering the controller 314 and other low voltage circuits of the main dimmer 102. The power supply 330 also generates a second non-isolated DC output voltage V_CC2(e.g., 80V)_DC) For powering the AD line 109, as will be described in detail below. The power supply 330 may also provide a third non-isolated DC output voltage V_CC3(e.g., 12V)_DC) And a fourth non-isolated DC output voltage V_CC4(e.g., 5V)_DC) (not shown in fig. 3). Second, third and fourth non-isolated voltages V_CC2，V_CC3，V_CC4Are referenced to the non-isolated circuit common.

The current limiting circuit 332 is connected (via output connection CL _ OUT) to the second DC output voltage V of the power supply 330_CC2And accessory dimmer terminal AD to provide AD supply voltage V to remote dimmer 104_AD. Current limiting circuit 332 pair supplyThe magnitude of the current to the remote dimmer 104 is limited to charge the internal power source. Remote dimmer power supply charging time period T each half cycle_CHRGDuring this time, the controller 314 is operable to adjust the current limit value of the current limit circuit 332 to a first current limit level (e.g., about 150mA) to limit the current that the remote dimmer 104 can draw to charge the remote dimmer 104 internal power supply. Communication time period T in each half period_COMMDuring this time, the controller 314 is further operable to adjust the current limit to a second current limit level (e.g., 10 mA). The controller 314 provides a control signal I _ limit to the current limit circuit 332 to regulate the current limit between the first current limit level and the second current limit level.

The transceiver 334 allows for the communication of digital information between the main dimmer 103 and the remote dimmers 104. The transceiver 334 is connected (via connection TX/RX) to the accessory dimmer terminal AD. The transceiver 334 includes: a transmitter 500 (fig. 5) for transmitting a digital signal on the AD line 109; and a receiver 520 (fig. 5), the receiver 520 for receiving the digital signal from the remote dimmer 104 connected to the AD line. The controller 314 processes the digital signal RX SIG received from the receiver 510 and provides digital information TX SIG to be transmitted to the transmitter 500.

The main dimmer 330 further includes a first switching circuit 336 and a second switching circuit 338. Switching circuits 336, 338 are connected to dimmed hot terminal DH and hot terminal H, respectively (via air-gap switch 322). The controller 314 provides the first control signal SW1_ CTL to the first switch circuit 336 and provides the second control signal SW2_ CTL to the second switch circuit 338. The controller 314 controls the switching circuits 336, 338 to be complementarily conductive and non-conductive. During the positive half-cycles, the controller 314 controls the first switching circuit 336 to conduct, connecting the power supply 330, the current limiting circuit 332, and the transceiver 334 between the accessory dimmer terminal AD and the dimmed hot terminal DH. This allows the remote dimmer 104 on the load side of the system 100 to charge the internal power supply during the positive half-cycles and transmit and receive digital information. During the negative half-cycle, the controller 314 controls the second switching circuit 338 to conduct, connecting the power supply 330, the current limiting circuit 332, and the transceiver 334 between the accessory dimmer terminal AD and the hot terminal H to allow the remote dimmer 104 on the line side of the system 100 to charge its power supply and communicate over the AD line 109. Thus, the first and second switching circuits may be caused by the controller 314 to provide first and second charging paths for the internal power supplies of the load-side and line-side remote dimmers 104, respectively.

The main dimmer 102 may also include another communication circuit 325 (in addition to the transceiver 334) for transmitting and receiving digital information via a communication link, such as a wired serial control link, a Power Line Carrier (PLC) communication link, or a wireless communication link, such as an Infrared (IR) or Radio Frequency (RF) communication link. An example OF an RF communication link is described in commonly assigned U.S. Pat. No. 5,905,442 entitled "METHOD AND APPARATUS FOR CONTROLLING AND DETERMINING THESTATUS OF ELECTRICAL DEVICES FROM REMOTE LOCATIONS", granted 5/18/1999, the entire disclosure OF which is incorporated herein by reference.

Fig. 4 is a schematic diagram of the current limiting circuit 332. The current limiting circuit 332 limits the current that is conducted through the accessory dimmer terminal AD. Current connected CL _ OUT through the output of current limiting circuit 332 is derived from the second non-isolated DC voltage V_CC2Conducting through FET Q410 and diode D412. The current limiting circuit 332 is operable to limit the current to two discrete current limit levels, namely about 150mA and 10mA, which is controlled in response to a control signal I _ limit from the controller 314. During normal operation (i.e., when the current through the output connection CL _ OUT does not exceed any current limiting level), the gate of FET Q410 is connected to a third non-isolated DC voltage V via two resistors R414, R416 (e.g., having resistances of about 10k Ω and 470k Ω, respectively)_CC3. Accordingly, the gate voltage of the FET Q410 is set to a suitable level, thereby turning on the FET. For example, FET Q440 is part number BSP317P, manufactured by England Technologies.

When the control signal I _ is limited to high (i.e., about the first isolated DC voltage V)_CC1Amplitude of) is passedThe current of the output connection CL _ OUT of flow circuit 332 is limited to about 10 mA. At this time, the current through the output connection CL _ OUT is driven from the second non-isolated DC voltage V_CC2Through a first current limiting resistor R418 (e.g., having a resistance of 220 Ω) to FET Q410. When the current increases to about 10mA, the voltage applied to resistor R418 substantially exceeds the sum of the base-emitter voltage of PNP Bipolar Junction Transistor (BJT) Q420 and the forward voltage of diode D422. Thus, transistor 420 is turned on, pulling the gate of FET Q410 up toward the second non-isolated DC voltage V_CC2. This causes FET Q410 to be non-conductive, limiting the current through the output connection CL _ OUT to about 10 mA. For example, the transistor Q420 is part No. MBT3906DW, manufactured by On Semiconductor.

When the control signal I _ limit is pulled down to circuit common (i.e., about 0V), the current limit is optionally set to 150 mA. Specifically, the NPN bipolar junction transistor Q424 is turned on to connect the second current limiting resistor R426, wherein the resistor R426 is connected in parallel with the first current limiting resistor R. The second current limiting resistor R426 has a resistance of, for example, 3.01k omega, so that the second non-isolated DC voltage V is_CC2The resulting equivalent resistance in series with FET Q410 increases the current limit level to about 150 mA. For example, the transistor Q424 is part No. MPSA06 manufactured by on semiconductor corporation.

At the first isolated DC output voltage V_CC1And the control signal I _ limit, the input photodiode of the optocoupler U428 is connected in series with a resistor R430 (e.g., having a resistance of 2.2k omega). The output photodiode of optocoupler U428 is connected to the base of PNP bipolar junction transistor Q432 (e.g., part BC856BW manufactured by philips semiconductors) through resistor R434. When the control signal I _ is asserted high, the base of the transistor Q432 is pulled down toward the third non-isolated DC voltage V via the resistor R434 and the resistor R436 (e.g., having resistances of 4.7k Ω and 220k Ω, respectively)_CC3. For example, optocoupler U428 is part PS2811, manufactured by NEC electronics corporation.

When the control signal I _ limit is pulled low, the base voltage of the transistor Q432 is pulled up towardsSecond non-isolated DC voltage V_CC2Causing transistor Q432 to be non-conductive. Thus, the base voltage of the PNP bipolar junction transistor Q438 is pulled down toward the third non-isolated DC voltage V via two resistors R440, R442 (e.g., having values of 4.7k Ω and 470k Ω, respectively)_CC3. Thus, transistor Q438 turns on and pulls the base of transistor Q424 upward toward the second non-isolated DC voltage V_CC2So that the transistor Q424 is turned on and the second current limiting resistor R426 is connected in parallel with the second current limiting resistor R418.

Fig. 5 is a simplified schematic diagram of a transceiver 334 that includes a transmitter 500 and a receiver 520. The transmitter 500 and the receiver 420 are connected to the connection RX/TX through two diodes D510, D530, so that current is only operable to flow from the accessory dimmer terminal AD into the transmitter 500 and the receiver 520. The transmitter 500 includes an NPN bipolar junction transistor Q512, the transistor Q512 being connected to the accessory dimmer terminal AD through a diode D510. For example, the transistor Q512 is part No. MMBT6517 manufactured by on semiconductor.

The controller 314 is operable to transmit digital information on the AD line 109 by controlling the conduction and non-conduction of the transistor Q512. The digital information TX _ SIG to be transmitted is supplied from the controller 314 via a resistor R514 (for example having a resistance of 10k Ω) to the base of a transistor Q512. The base of transistor Q512 is also connected to non-isolated circuit common through a resistor R516 (e.g., having a resistance of 56k Ω). The emitter of transistor Q512 is connected to the non-isolated circuit common through a resistor R518 (e.g., having a resistance of 220 Ω). When the digital information TX _ SIG provided by the controller 314 is low, the transistor Q512 remains non-conductive. When the digital information TX _ SIG provided by the controller 314 is high (i.e., approximately the fourth non-isolated DC voltage V)_CC4) When this occurs, transistor Q512 is turned on, thereby "shorting" AD line 109, i.e., reducing the voltage on the AD line to substantially 0V. When the transistor 512 is turned on, the resistor R518 limits the magnitude of the current flowing through the accessory dimmer terminal AD.

The controller 314 is operable to receive digital information from the AD line 109 via the receiver 520. The receiver 520 includes a comparator U532, and the output of the comparator U532 provides the received digital information RX _ SIGTo the controller 314. For example, the comparator U532 may be part No. LM2903 manufactured by National Semiconductor. For example, two resistors R534, R536 having respective resistances of 68.1k Ω and 110k Ω are connected in series at the DC voltage V_CC4And circuit common. Reference voltage V_REFGenerated at the junction of resistors R534, R536 and provided to the non-inverting input of comparator U532. The inverting input of the comparator U532 is connected to the accessory dimmer terminal AD through a network of resistors R538, R540, R542, R544, R546, R548. For example, the resistors R538, R540, R542, R544, R546, R548 have resistances of 220k Ω, 68.1k Ω, 220k Ω, 47.5k Ω, 20k Ω, and 220k Ω, respectively. The output of the comparator U532 is connected via a resistor R550 (e.g., having a resistance of 4.7k Ω) to a DC voltage V_CC4。

The output of comparator U532 is also connected to the non-inverting input via resistor R552 to provide a delay. For example, resistor R552 has a resistance of 820k Ω such that when the output of comparator U532 is pulled up to DC voltage V_CC4Reference voltage V at the non-inverting input of comparator U532_REFWith an amplitude of about 3.1V. When the output of the comparator U532 drops, the reference voltage V_REFWith an amplitude of about 2.9V.

If neither the main dimmer 102 nor the remote dimmer 104 shorts the AD line 109, a second non-isolated DC output voltage V is present at the accessory dimmer terminal AD of the main dimmer 102_CC2(i.e., 80V)_DC). Thus, the inverting input of comparator U532 is pulled up to about 5V. Since the voltage at the inverting input of comparator U532 is greater than the reference voltage V at the non-inverting input_REFAnd therefore the output of the comparator drops to circuit common (i.e., about 0V). When the main dimmer 102 or one of the remote dimmers 104 shorts the AD line 109, the voltage at the non-inverting input of the comparator U532 is pulled down to the reference voltage V_REFThereafter, e.g. about 2.2V, so that the output of the comparator is pulled up to about the DC voltage V_CC4。

Fig. 6 is a simplified schematic diagram of the switching circuits 336, 338. A first switching circuit 336 is connected between the dimmed hot terminal DH and the non-isolated circuit common. A second switching circuit 338 is connected between hot terminal H and the non-isolated circuit common. During the positive half-cycles, the controller 314 controls the first switch circuit 336 to be conductive and non-conductive via the first control signal SW1_ CTL. During the negative half-cycles, the controller 314 controls the conduction and non-conduction of the second switch circuit 339 via the second control signal SW2_ CTL.

The first switching circuit 336 includes a FET 610, the FET 610 conducting current from the non-isolated circuit common to the dimmed hot terminal. For example, FET 610 may be part number STN1NK60, manufactured by Italian semiconductors (STMicroelectronics), and has a maximum voltage rating of 600V. The first control signal SW1_ CTL is connected to the base of the NPN bipolar transistor Q612 via a resistor R614 (e.g., having a resistance of 1k Ω). For example, the transistor Q612 may be part number MBT3904DW, manufactured by on semiconductor. When the first control signal SW1_ CTL is low (i.e., about 0V), the transistor Q612 is non-conductive, which allows the gate of the FET 610 to be pulled up to about the second non-isolated DC voltage V via the two resistors R616, R618_CC2Thereby turning on FET 610. For example, the resistors R614, R616 have resistances of 22k Ω, 470k Ω, respectively. When the first control signal SW1_ CTL is high, the base of the transistor Q612 is pulled up to about the fourth isolated DC voltage V via the resistor R620 (e.g., having a resistance of 100k Ω)_CC4. Thus, transistor Q612 is conductive and the gate of FET 610 is pulled down towards circuit common, thereby rendering FET 610 non-conductive.

The second switching circuit 338 includes a FET 630 operable to conduct current from the non-isolated circuit common to the hot terminal. The second switching circuit 338 includes a driving circuit similar to the first switching circuit 336 for rendering the FET 630 conductive and non-conductive.

When the FET 610 of the first switching circuit 336 is conductive, the FET 630 of the second switching circuit is non-conductive. Specifically, the first switch circuit 336 includes an NPN bipolar transistor Q662, the base of the transistor Q662 being connected to the non-isolated circuit common through a resistor R624 (e.g., having a resistance of 10k Ω). When the FET 610 is used to conduct current from a non-isolated circuitWhen the common terminal is conducted to the dimmed hot terminal DH, a voltage is generated across the resistor R626, causing the transistor R622 to turn on. Thus, the gate of FET 630 of the second switching circuit 338 is pulled away from the second non-isolated DC voltage V_CC2To prevent FET Q630 from turning on when FET 610 turns on. Similarly, the second switching circuit 338 includes an NPN bipolar transistor Q642, the transistor Q642 rendering the FET 610 non-conductive when the FET 630 is conductive and generating a suitable voltage across a resistor R646.

Fig. 7 is a schematic block diagram of a remote dimmer 104. The remote dimmer 104 includes a number of functional blocks that are identical to the main dimmer 102. The remote dimmer 104 includes the controller 714 but does not include any load control circuitry (i.e., the bidirectional semiconductor switch 310 and the gate drive circuit 312). The remote dimmer 104 includes first and second fire terminals H1, H2, the first and second fire terminals H1, H2 being connected in series with the bidirectional semiconductor switch 310 of the main dimmer 102 and adapted to conduct load current from the AC power source 106 to the lighting load 108.

The power supply 730 is connected between the accessory dimmer terminal AD and the second hot wire terminal H2 for a remote dimmer power supply charging time period T each half-cycle_CHRGDuring which power is drawn from the main dimmer 102. The power supply 730 generates only one isolated DC output voltage V_CC1(e.g., 3.4V)_DC) For powering the controller 714 and other low voltage circuitry of the remote dimmer 104.

The zero-crossing detector 716 and the transceiver 734 are connected between the accessory dimmer terminal AD and the second hot terminal H2. The zero-crossing detector 716 detects a zero-crossing point when the first or second switching circuit 336, 338 changes from non-conductive to conductive, thereby supplying the AD power supply voltage V_ADApplied to the zero crossing detector. The controller 714 begins timing at each zero-crossing point and charges the remote dimmer power supply for a time period T_CHRGOperable to send and receive digital information via transceiver 734. The transceiver 734 of the remote dimmer 104 is connected in parallel with the transceiver 334 of the main dimmer 102 for the communication time period T in the positive or negative half-cycle_COMMDuring which a communication path is formed, depending onWhich side of the system 100 is connected to which remote dimmer. Thus, the communication path between the main dimmer 102 and the remote dimmers 104 does not pass through the AC power source 106 or the lighting load 108.

Fig. 8 is a simplified timing diagram of a complete line cycle of an AC voltage waveform 800 provided by the AC power source 106. The timing diagram illustrates the operation of the main dimmer 102 during each half-cycle of the AC voltage waveform 800. The main dimmer 102 is operable to allow the remote dimmer 104 to charge the remote dimmer power supply for a time period T each half-cycle_CHRGDuring which the internal power supply 730 of the remote dimmer 104 is charged. During each half-cycle of the communication time period, the main dimmer 102 and the remote dimmers 104 are operable to transmit and receive information over the AD lines 109. The controller 314 of the main dimmer 102 is on for the switching time period T_swDuring which the first 336 and second 338 switching circuits are activated for a switching time period T_swEqual to the charging time period T of the remote dimmer power supply_CHRGAnd communication time period T_COMMAnd (4) summing.

Fig. 9A is a simplified flow diagram of a load-side multi-position control routine 900 executed by the controller 314 of the main dimmer 102 during the positive half-cycle of the AC power source 106. Fig. 9B is a simplified flow diagram of a line-side multi-position control routine 900' executed by the controller 314 of the primary dimmer 102 during the negative half-cycle of the AC power source 106. At step 910, the load side multi-position control routine 900 begins at the beginning of each positive half-cycle when the zero-crossing detector 318 of the main dimmer 102 signals a positive zero-crossing to the controller 314. At step 912, the controller 314 starts a timer that determines the remote dimmer power supply charging time period T_CHRGAnd a communication time period T_COMMWhen to start and end. The controller 314 then waits for a wait period T at step 914_w(e.g., about 10% of the positive half cycle or 833 musec).

At step 916, the time period T is charged by charging the power supply at the remote dimmer_CHRGPulls the first control signal SW1_ CTL low and the controller 314 turns on the load-side switch circuit (i.e., the first switch circuit 336). Then in step 918, by pulling the control signal I _ Limit low, the controller 314 controls the current limit circuit 332 to have a current limit of 150 mA. Thus, the second DC output voltage V_CC2(i.e., AD supply voltage V_AD) Is provided to the remote dimmer 104 on the load side of the system 100 and during the remote dimmer power supply charging time period T_CHRGDuring which the power supply 730 of the remote dimmer 104 charges. Charging time period T at remote dimmer power supply_CHRGThe zero-crossing detector 716 of each load-side remote dimmer 104 detects zero-crossing points. For example, remote power source charging time period T_CHRGLasting about 2 milliseconds.

Remote dimmer power supply charging time period T at step 920_CHRGThereafter, in step 922, for a communication time period T_COMMAt the beginning, the controller 314 controls the current limit of the current limit circuit 332 to about 10 mA. During a communication time period T_COMMDuring this time, the first switching circuit 336 remains on so that the AD line 109 remains at the AD supply voltage V if the main dimmer 102 and the remote dimmer 104 are not currently communicating on the AD line 109_AD(i.e., 80V relative to dimmed hot terminal DH).

The main dimmer 102 and the remote dimmers 104 communicate for a time period T_COMMDuring which time it is operable to send and receive digital information. In particular, the controller 314 executes a LOAD-side communication routine 924 described in greater detail in commonly assigned U.S. provisional application entitled "multiple location LOAD CONTROL SYSTEM," filed on even date herewith, having attorney docket number 07-13036-P2 PR2, the entire contents of which are incorporated herein by reference. The main dimmer 102 and the remote dimmers 104 may encode the transmitted digital information using manchester encoding. However, other encoding techniques known to those skilled in the art may also be employed. With the manchester encoding method, a bit of digital information (i.e., a logic 0 value or a logic 1 value) is encoded as a transition (i.e., an edge) of a signal on a communication link. When no information is transmitted on the AD line 109, the AD line floats high in an idle state. To transmit a logic 0 value, transceiver 334 is operableActs to "short" the AD line 109 to the dimmed Hot terminal DH so as to bring the AD line from an idle state (i.e., 80V)_DC) To a shorted state (i.e., a "high-to-low" transition). Conversely, to transmit a logic 1 value, transceiver 334 is operable to transition the AD line from a shorted state to an idle state (i.e., a "low-to-high" transition). During the positive half-cycle, when the first switching circuit 336 is conductive, the controller 314 turns on the FET Q912 to short the AD line 109 to the dimmed hot terminal DH.

For example, communication time period T_COMMLasting about 3.75 milliseconds. Communication time period T in each half period_COMMDuring which five bits of the transmitted information may be transmitted. In step 925, during communication time period T_COMMAt the end, the first switching circuit is rendered non-conductive at step 926 such that the power source 330 and the transceiver 334 of the main dimmer 104 are no longer connected between the accessory dimmer terminal AD and the dimmed hot terminal DH.

During the negative half-cycle, a similar timing cycle occurs. Referring to FIG. 9B, in step 910 ', the line-side multi-position control routine 900' begins at the beginning of each negative half-cycle when the zero-crossing detector 318 of the main dimmer 102 signals the controller 314 of a negative zero-crossing. In step 916', the controller 314 of the main dimmer 102 renders the line-side switching circuit (i.e., the second switching circuit 338) conductive to provide the second DC output voltage V to the remote dimmer 104 on the line side of the system 100_CC2. Thus, during the remote dimmer power supply charging time period T_CHRGDuring this time, the line-side remote dimmer 104 is operable to provide the voltage V from the AD source_ADCharges its power supply 730 and communicates for a time period T_COMMDuring which digital information is transmitted and received using line-side communication routines 924'. During the negative half-cycle, when the second switching circuit 338 is conductive, the controller 314 renders fet q912 conductive to short the AD line 109 to the hot terminal H. Communication time period T in step 925_COMMAt the end of (c), the controller 314 renders the second switch circuit 338 non-conductive in step 926'.

The digital information transmitted between the main dimmer 102 and the remote dimmers 104 includes, for example, four fields: a 3-bit sync (start) symbol, a 5-bit information description, a 7-bit information data segment, and a 10-bit checksum. The synchronization (start) symbol is used to synchronize the transmission across the multiple line periods required to transmit the entire packet. Typically, the information description includes a "light level" instruction or a "delayed off" instruction. The 7-bit information data segment of each digital information includes specific data related to the information description of the present information. For example, if the information description is a light level instruction, the information data may include actual light level information. Up to 128 different light levels may be transmitted between the main dimmer 102 and the remote dimmers 104.

Because only 5 bits are transmitted per half cycle, the controller 314 uses multiple buffers to store digital information to be transmitted and received. Specifically, the controller 314 of the main dimmer 102 uses load-side and line-side TX buffers, respectively, for the digital information being transmitted during the positive and negative half-cycles. Also, the controller 314 of the main dimmer also uses the load-side RX buffer and the line-side RX buffer, respectively, for the received digital information during the positive and negative half-cycles.

Thus, the main dimmer 102 and the remote dimmers 104 are operable to communicate light level information to each other in response to actuation of the touch sensitive actuator 150. The main dimmer 102 and the remote dimmers 104 are all operable to illuminate the LEDs behind the actuating member 212 at the same level to indicate the intensity of the lighting load 108.

When the system 100 is wired to the main dimmer 104 located elsewhere than on the system line side or load side, the bidirectional semiconductor switch 310 disables the digital information transmitted on the AD line 109 from passing from the load side of the system to the line side of the system (and vice versa). Thus, if a user touches the actuator 210 of the remote dimmer 104 on the load side of the main dimmer 102, the remote dimmer 104 on the load side will not receive information. To provide the capability of the overall system, the main dimmer 102 has the additional responsibility of delaying information from one side of the system to the other. In the next half-cycle, the main dimmer 102 broadcasts all communication signals received in the previous half-cycle to the opposite side of the system 100. A more detailed description of the above-described operation of the MULTIPLE LOCATION dimming SYSTEM 100 is provided in co-pending, commonly assigned U.S. patent application No. 12/106,614 entitled MULTIPLE LOCATION LOAD SYSTEM, filed on 23.4.2008, which is hereby incorporated by reference in its entirety.

Fig. 10A is a simplified block diagram of power supply 330. The power supply 330 includes a full wave rectifier bridge 1000, the full wave rectifier bridge 1000 having four diodes D1010, D1012, D1014, D1016. For example, diodes D1014, D1016 may comprise body diodes of FETs Q610, Q630 of the first and second switching circuits 336, 338. The full-wave rectifier 1000 includes: an AC input terminal connected to the hot terminal H and the dimmed hot terminal DH; and a DC output terminal connected to, for example, an AD power supply voltage (V) at a first stage of the power supply 330_AD) Power supply 1100. power supply 1100 generates a second non-isolated DC output voltage V at the output_CC2. The power supply 330 further includes an isolated buck converter power supply 1020, the power supply 1020 receiving a second non-isolated DC output voltage V_CC2And generates a first isolated DC output voltage V_CC1A third non-isolated DC output voltage V_CC3And a fourth non-isolated DC output voltage V_CC4。

As described above, the second non-isolated DC output voltage V is provided on the AD line 109_CC2As the AD supply voltage V for supplying power to the remote dimmer 104_AD. If multiple remote dimmers 104 are located on the load side of the multiple location dimming system 100 (as shown in fig. 10B) or on the line side of the system 100, the current drawn from the AD supply voltage power supply 1100 (i.e., the output current I of the power supply)_OUT) May be asymmetric (i.e. for a number of consecutive line periods the total amount of current drawn in one half period is greater than the total amount of current in the subsequent half period). Even if the current I is output_OUTMay be asymmetric, the power supply 1100 is also operable to draw a substantially symmetric input current I from the AC power source_IN(i.e., the total current generated in each half-cycleApproximately the same amount).

Fig. 11 is a schematic block diagram of an AD supply voltage power supply 1100 of the power supply 330 of the main dimmer 100. Output voltage V_CC2Generated on the energy storage element 1110, such as the energy storage capacitor C1210 (fig. 12). The power supply 1100 includes a controllably conductive switching circuit 1112 for conducting a charging current uncharged through two diodes D1114, D1116 and the energy storage element 1110 at the beginning of each half-cycle of the AC power supply. Charging time period T of the main dimmer power supply for each half-cycle of the energy storage element 1110_PS. When the voltage across the main dimmer 102, and thus the power supply 1100, exceeds a predetermined voltage (e.g., 120V), the latch circuit 1118 is turned off to render the controllably conductive switch circuit 1112 non-conductive for the time remaining for the current half-cycle. Overcurrent protection circuit 1120 protects controllably conductive switching circuit 1112 in the event of an overcurrent condition through the controllably conductive switching circuit. Output voltage V_CC2With a small amount of ripple so that the output voltage is typically at about 78-80V, but can drop to about 70V.

The power supply 1100 is further operable to control the controllably conductive switching circuit 1112 to charge the energy storage element 1110 in response to and output the voltage V_CC2And the amount of time the power supply has charged the energy storage element during the current half-cycle. Specifically, power supply 1100 attempts to charge the main dimmer power supply for a time period T of each half-cycle_PSIs substantially constant, rather than dependent on the output voltage V_CC2The instantaneous amplitude of (d). To achieve this degree of control, the power supply 1100 includes a first voltage responsive current source 1122 and a second time responsive current source 1124. First voltage responsive current source 1122 conducts a first current I₁First current I₁Is dependent on the output voltage V_CC2I.e. the voltage responsive current source generates a first control signal representing the output voltage V_CC2Amplitude of (d). Second time-responsive current source 1124 conducts a second current I₂Second current I₂Is dependent on the amount of time that the energy storage element 1110 has been charged during the current half-cycle (i.e., the time-responsive current source generates a second control signal that is representative of the amount of time that the energy storage element 1110 has been charged during the current half-cycleThe total amount of time during which the energy storage element 110 has been charged). Specifically, when diodes D1114, D1116 begin to conduct at the beginning of each half-cycle, time-responsive current source 1122 begins to conduct a second current I in response to the conduction of switching circuit 1126₂。

A first current I₁And a second current I₂Conducted through a current threshold detection circuit 1128, the current threshold detection circuit 1128 determining when the total current I_{General assembly}(i.e. the sum of the first current and the second current) exceeds a predetermined current threshold I_TH. When the total current I_{General assembly}Exceeding a predetermined current threshold I_THThe current threshold detection circuit 1128 triggers the deadbolt circuit 1118, which causes the controllably conductive switch circuit 1112 and the switch circuit 1126 to be non-conductive for the remainder of the current half-cycle. Thus, energy storage element 1110 stops charging after controllably conductive switching circuit 1112 is non-conductive. The first and second voltage-responsive current sources 1122, 1124 work together to charge the main dimmer power supply for a time period T each half-cycle_PSRemains substantially constant.

Fig. 12 is a simplified schematic diagram of a power supply 1100 of the power supply 330 of the main dimmer 100. As described above, the energy storage element 1100 includes a capacitor, i.e., the energy storage capacitor C1210 (e.g., having a capacitance of 27 μ F). The controllably conductive switching circuit 1112 includes a semiconductor switch, such as an FET Q1212 (e.g., part STN1NK60Z, manufactured by Italian semiconductor corporation) connected in series with a capacitor C1210 for controlling the charging current I through the capacitor_{Charging of electricity}. The gate of the FET Q1212 is connected to the positive DC output terminal of the rectifier bridge 1000 through resistors R1214, R1216, R1218 (e.g., having 10 Ω, 15k Ω, and 162k Ω, respectively). Since the voltage at the positive DC output terminal of the rectifier bridge 1000 increases at the beginning of each half-cycle, the FET Q1212 conducts when the gate of the FET Q1212 is provided with a suitable voltage (e.g., about 15V), which typically occurs about 1 millisecond after each zero-crossing of the AC voltage waveform 800.

The shutdown latch circuit 1118 includes two resistors R1220 and R1222, and the resistors R1220 and R1222 are connected in seriesAt the positive DC output terminal of the rectifier bridge 1000 and the output voltage V_CC2And have resistances of, for example, 470k omega and 22k omega, respectively. When the voltage at the junction of resistors R1220, R1222 exceeds the breakdown voltage of zener diode Z1224, the voltage developed across resistor 1226 turns on NPN bipolar junction transistor Q1228. Transistor Q1228 is connected to the gate of FET Q1212 through resistor R1230, so that when transistor Q1228 is conductive, the FET is non-conductive. The voltage developed across resistor R1230 when transistor Q1228 is turned on turns on the second NPN bipolar junction transistor Q1232, locking FET Q1212 non-conductive until the end of the current cycle.

The over-current protection circuit 1120 includes an NPN bipolar junction transistor Q1234, a base resistor R1236, and an inductive resistor 1238. The sense resistor R1238 is connected in series with the capacitor C1210 and in parallel with the series combination of the base emitter junctions of the base resistors R1236 and Q1234. When the magnitude of the charging current exceeds a predetermined threshold, the voltage across sense resistor R1238 has a suitable magnitude, thereby turning on transistor Q1234. Thus, the gate of FET Q1212 is pulled down and FET Q1212 is turned non-conductive. For example, the base resistor R1236 and the sense resistor R1238 have resistances of 1k Ω and 1 Ω, respectively, so as to operate when the charging current I is applied_{Charging of electricity}Above about 700mA, transistor Q1234 is turned on.

Voltage-responsive current source 1122 includes an NPN bipolar junction transistor Q1240, transistor Q1240 operable in response to output voltage V_CC2To conduct a first current I₁. The emitter of transistor Q1240 is connected to non-isolated circuit common through resistor R1242 (e.g., having a resistance of 100k Ω). The voltage-responsive current source 1122 further includes a zener diode Z1244 (e.g., having a breakdown voltage of about 48V) and two resistors R1246, R1248 (e.g., having respective resistances of 215k Ω and 100k Ω). The series combination of zener diode Z1244 and resistors R1246, R1248 is connected across the storage capacitor C1210 (i.e., across the output voltage V_CC2). When the output voltage V is_CC2Beyond the breakdown voltage of zener diode Z1244, the zener diode conducts a current through resistors R1246, R1248, the magnitude of which depends on the output voltage V_CC2The instantaneous amplitude of (d). Transistor Q1240 to the junction of two resistors R1246, R1248, so that the magnitude of the current through resistor R1242 depends on the output voltage V_CC2And thus the first current I through transistor Q1240₁Is dependent on the output voltage V_CC2The instantaneous amplitude of (d). For example, when the output voltage V_CC2Having an amplitude of 70V, the first current I₁Has an amplitude of about 63 μ A when outputting a voltage V_CC2Having an amplitude of 80V, the first current I₁Having an amplitude of about 93 μ A, i.e. the first current I changes by 1V each time the output voltage changes₁The amplitude of (d) changed by about 3 μ a.

When diodes D1114, D1116 conduct, switch circuit 1126 conducts, and time-responsive current source 1124 conducts a second current I₂. The switching circuit 1126 includes a PNP bipolar junction transistor Q1250 and a resistor R1252 (e.g., having a resistance of 1k Ω). The transistor Q1250 and the resistor R1252 are connected such that the series combination of the resistor R1252 and the junction of the emitter bases of the transistor Q1250 is connected in parallel with the two diodes D1114, D1116 connected in series. When the diodes D1114, D1116 conduct the charging current I_{Charging of electricity}At this time, the transistor Q1250 is turned on, thereby making the output voltage V_CC2Is applied to time-responsive current source 1124.

NPN bipolar junction transistor Q1254 of time-responsive current source 1124 is operable to conduct a second current I through emitter resistor R1256 (e.g., having a resistance of 470k Ω)₂. When the switching circuit 1126 is turned on, the magnitude of the second current (from about 0A) increases with respect to time. When the capacitor C1210 begins to charge (turns on the switching circuit 1126) at the beginning of each half-cycle, the output voltage V_CC2Is applied to a timing circuit comprising a capacitor C1258 (for example having a capacitance of 0.01 muf) and two resistors R1260, R1262 (for example having resistances of 200k omega and 56k omega respectively). The base of the transistor Q1254 is connected to the junction of the capacitor C1258 and the two resistors R1260, R1262, such that the magnitude of the voltage at the base of the transistor and the second current I through the transistor occur after the switching circuit 1126 is turned on₂The amplitude increases with respect to time. For example, the capacitor C1210 is charged each half cycleDuring a time period, the second current I₂Is substantially linear with respect to time (i.e., proportional to the amount of time that the capacitor C1210 has been charged during the current half-cycle). For example, the second current I₂Can range from about 0A to 30 μ a.

When the latch circuit 1118 controls the controllably conductive switch circuit 1112 to be non-conductive (causing switch circuit 1126 to be non-conductive), capacitor C1258 of time-responsive current source 1124 discharges through resistor R1262. At the end of each half cycle, the voltage across capacitor C1258 is reset to about 0V, causing a second current I₂Is about 0A at the beginning of the next half cycle.

Current threshold detection circuit 1128 first and second currents I₁、I₂Total current I of_{General assembly}And when the total current exceeds a predetermined current threshold I_THAt this time, for example, about 100-. The current threshold detection circuit 1128 includes an NPN bipolar junction transistor Q1264, a zener diode Z1266 (e.g., having a breakdown voltage of about 5.1V), and a resistor R1268 (e.g., having a resistance of 100k Ω). Resistor R1268 is connected across the series combination of the base-emitter junction of transistor Q1264 and zener diode Z1266 such that transistor Q1264 is conductive when the current through resistor R1268 is approximately 50-55 ua. Transistor Q1264 is connected to the shutdown latch circuit 1118 such that when transistor Q1264 conducts current through resistor R1230, which is approximately 50-55 ua, transistor Q1232 conducts, thereby rendering FET Q1212 non-conductive.

Fig. 13 is a diagram illustrating exemplary waveforms illustrating the operation of the power supply 1100 when the remote dimmer 504 is located on the load side of the system 500 as illustrated in fig. 10B. As shown in fig. 13, power supply 1100 charges the main dimmer power supply for a time period T each half-cycle_PSMaintained substantially constant and the input current I of the power supply 1100_INIs substantially symmetrical. Main dimmer power supply charging time period T_PSIs about 1 ms +/-0.2 ms (i.e., each half-cycle varies by only 20% or less), such that the output current I is output_OUTHas a DC component of less than about 0.3V, toAnd for example between 0.2V and 0.3V. Main dimmer power supply charging time period T_PSThe time of start and the remote dimmer power supply charging time period T for the internal power supply 730 of the remote dimmer 104_CHRGAre substantially identical.

Because the remote device 104 is connected to the load side of the main dimmer 102, only the positive half-cycle of the remote dimmer power supply charging time period T in the AC voltage waveform 800_CHRGDuring the period, the output current I of the power source 1100_OUTThe amplitude increases, i.e. the output current is asymmetric. During the positive half-cycle, more current is drawn from the power supply 1100, and during the positive half-cycle, the output voltage V_CC2Is reduced more. Because each half-cycle main dimmer power supply charging time period T_PSAre all maintained substantially constant, but the output current I_OUTIs asymmetric, so that the output voltage V is in the positive half cycle_CC2Is greater than the output voltage V in the negative half-cycle_CC2Peak value of (a). However, the output voltage V per line cycle_CC2The average value of (d) remains substantially constant.

While the invention has been described with respect to specific embodiments thereof, many different modifications, changes and other uses will become apparent to those skilled in the art. Therefore, the specific embodiments disclosed herein do not limit the invention.

The component values and part numbers provided in fig. 4, 5, 6 and 12 are merely exemplary of preferred embodiments of the present invention and do not limit the scope of the invention. For example, one skilled in the art could vary the values of the components in fig. 4, 5, 6, and 12 and obtain the load control device of the present invention as well.

Claims (33)

1. A power supply for a load control device that controls the amount of power delivered to an electrical load from an AC power source, the load control device operable to receive an AC voltage waveform of the AC power source, the power supply operable to generate a DC voltage, the power supply comprising:

an energy storage element;

a controllably conductive switching circuit in series with the energy storage element for selectively charging the energy storage element to generate the DC voltage, the controllably conductive switching circuit operable to conduct after the amplitude of the AC voltage waveform substantially exceeds the amplitude of the DC voltage waveform during a half-cycle of the AC voltage waveform; and

a latch circuit connected to the controllably conductive switching circuit, the latch circuit adapted to render the controllably conductive switching circuit non-conductive in response to the magnitude of the DC voltage and the amount of time that the energy storage element has been charging during the half-cycle.

2. The power supply of claim 1, further comprising:

a first voltage responsive current source operable to conduct a first current, a magnitude of the first current being representative of a magnitude of the DC voltage; and

a second time-responsive current source operable to conduct a second current having a magnitude representative of an amount of time that the energy storage element has been charged during the half-cycle.

3. The power supply of claim 2, wherein the energy storage device charges for the length of the charging time period during the half-cycle, and the first and second current sources operate to maintain the length of the charging time period substantially the same for each half-cycle.

4. The power supply of claim 3, wherein the length of the charging time period changes by about 20% or less per half-cycle.

5. The power supply of claim 3, wherein the length of the charging time period is approximately 1 millisecond +/-0.2 milliseconds.

6. The power supply of claim 2, further comprising:

a current threshold detection circuit operable to sum the first and second currents to produce a total current.

7. The power supply of claim 6 wherein the latch circuit is responsive to the current threshold detection circuit to render the controllably conductive switching circuit non-conductive when the total current exceeds a predetermined current threshold.

8. The power supply of claim 1, wherein the controllably conductive switching circuit comprises a semiconductor switch.

9. The power supply of claim 8, wherein the semiconductor switch comprises a field effect transistor.

10. The power supply of claim 1, wherein the energy storage element comprises a capacitor.

11. A power supply for a load control device that controls the amount of power delivered to an electrical load from an AC power source, the load control device operable to receive an AC voltage waveform from the AC power source, the power supply comprising:

an output for providing a DC voltage and adapted to conduct an asymmetric output current;

an energy storage element on which the DC voltage is generated; and

a controllably conductive switching circuit in series with the energy storage element for selectively charging the energy storage element to generate the DC voltage to cause the power supply to draw an input current from the AC power source;

wherein the controllably conductive switching circuit is controlled such that the input current is substantially symmetrical.

12. The power supply of claim 11, wherein the energy storage device charges for the length of the charging time period during the half-cycle, and the length of the charging time period remains substantially the same each time the half-cycle.

13. The power supply of claim 12, wherein the length of the charging time period changes by about 20% or less per half-cycle.

14. The power supply of claim 12, wherein the length of the charging time period is approximately 1 millisecond +/-0.2 milliseconds.

15. The power supply of claim 12, wherein a DC component in the input current is less than about 0.3V.

16. The power supply of claim 11, further comprising:

a latch circuit connected to the controllably conductive switching circuit;

wherein the controllably conductive switching circuit is operable to conduct after the amplitude of the AC voltage waveform substantially exceeds the amplitude of the DC voltage, and the latch circuit is operable to render the controllably conductive switching circuit non-conductive to cause the energy storage element to stop charging after the energy storage element has been charged for a switching time.

17. The power supply of claim 16, wherein the latch circuit is adapted to render the controllably conductive switching circuit non-conductive in response to the magnitude of the DC voltage and the amount of time the energy storage element has been charging during the half-cycle.

18. The power supply of claim 11, wherein the energy storage element comprises a capacitor.

19. A multiple location load control system for controlling power delivered to an electrical load from an AC power source, the system comprising:

a main load control device comprising a power supply operable to draw input current from an AC power source and to generate a link voltage; and

a remote load control device including a power source, the main load control device and the remote load control device being adapted to be connected in series between the AC power source and the electrical load such that both the main load control device and the remote load control device are operable to conduct load current from the AC power source to the electrical load without being connected to a zero line on a zero line side of the AC power source, the remote load control device being further connected to the main load control device by an accessory wire, the main load control device being operable to provide a link voltage on the accessory wire to allow the power source of the remote device to charge such that an output current of the power source of the main load control device is asymmetric;

wherein the input current of the power supply of the main load control device is substantially symmetrical.

20. The load control system of claim 19, wherein the power supply of the main load control device draws current from the AC power supply for a length of a main power supply charging time during each half-cycle of the AC power supply, and the length of the main power supply charging time is substantially the same each half-cycle.

21. The load control system of claim 20, wherein the length of the main power supply charging time varies by about 20% or less each half-cycle.

22. The load control system of claim 20, wherein the length of the charging time period is approximately 1 millisecond +/-0.2 milliseconds.

23. The load control system of claim 20, wherein the DC component of the input current of the power supply of the primary load control device is less than about 0.3V.

24. The load control system of claim 20, wherein the power supply of the remote load control device draws current from the power supply of the main load control device during a remote power supply charging time during every other half-cycle of the AC power supply.

25. The load control system of claim 19, wherein the power supply of the main load control device includes an energy storage element, the power supply operable to stop charging the energy storage element in response to the magnitude of the DC voltage and the amount of time that the energy storage element has been charged during the half-cycle in each half-cycle of the AC power supply.

26. The load control system of claim 19, wherein the electrical load comprises a Magnetic Low Voltage (MLV) lighting load.

27. A method of generating a DC supply voltage for a load control device that controls the amount of power delivered to an electrical load from an AC power source, the method comprising the steps of:

starting charging an energy storage element during a half-cycle of the AC power source for generating a DC supply voltage;

generating a first control signal representative of a magnitude of the DC supply voltage;

generating a second control signal representing an amount of time that the energy storage element has been charged during the half-cycle; and

stopping charging of the energy storage element in response to the first and second control signals.

28. The method of claim 27, wherein the step of generating a first control signal comprises conducting a first current having a magnitude that is representative of a magnitude of the DC supply voltage, and the step of generating a second control signal comprises conducting a second current having a magnitude that is representative of an amount of time that the energy storage element has been charged during the half-cycle.

29. The method of claim 28, further comprising the steps of:

summing the first and second currents to produce a total current; and

determining whether the total current exceeds a predetermined current threshold.

30. The method of claim 29, wherein the step of stopping charging the energy storage element further comprises:

stopping charging of the energy storage element if the total current exceeds the predetermined current threshold.

31. The method of claim 29, wherein the energy storage device is charged for a length of a charging time period during the half-cycle, and the length of the charging time period is substantially the same each time half-cycle.

32. The method of claim 31, wherein the length of the charging time period changes by about 20% or less in each half-cycle.

33. The method of claim 31, wherein the length of the charging time period is approximately 1 millisecond +/-0.2 milliseconds.