HK1142461B - Light emitting diode - Google Patents

Abstract

An LED chip (1) grown on an electrically insulating substrate (4) comprises a lower current-distributing layer (5) of a first conductivity type, a first electrode (2), a vertical layer structure (5, 6, 7), the last two being formed on the lower current- distributing layer horizontally separated from each other, the vertical layer structure comprising an active layer (6) and an upper current-distributing layer (8) of a second conductivity type above the active layer, and a second electrode (3) formed on the upper current-distributing layer, the geometry of the electrodes being adjusted to provide a horizontal distance between the electrodes lower than the current spreading length of the chip. According to the present invention, a vertical trench (9) is formed between the electrodes (2, 3), the trench extending through the chip (1), including the lower current-distributing layer (5), for controlling the horizontal current flow in order to achieve a uniform current density over the active layer (6).

Description

Light emitting diode

Technical Field

The present invention relates to Light Emitting Diode (LED) chip designs, the LEDs being produced on an insulating substrate.

Background

In an LED produced as a layered structure on an insulating substrate, an n-contact electrode and a p-contact electrode are made of the top surface of a chip. They are typically positioned near opposite edges of the chip's light-generating region. One of them is formed on a lower current-distributing layer exposed by selectively etching away the layers grown thereon, and the other one is located on an upper current-distributing layer on top of the LED layer structure.

In a typical case, the horizontal distance between the electrodes is much higher than the total thickness of the vertical (vertical) layer structure of the LED. In that case, in order to provide a high current uniformity over the light-generating layers, the sheet resistance of the current-distributing layers should be as low as possible in order to minimize the voltage drop along those layers. In particular, the sheet resistance should be significantly less than the average vertical resistance through the layered structure (including, for example, resistance resulting from voltage drops in the p-n junction). However, in most practical cases, the sheet resistance causes a large voltage drop along the current-distributing layer. This results in non-uniform current densities that may cause local overheating at the location of high current densities. Such local overheating may also cause a reduction in the efficiency of the device, as well as a reduction in the reliability of the device.

The characteristic parameter relating to the uniformity of the current is the current spreading length (current spreading length):

where ρ is_{Is vertical}Is the average vertical resistance through the LED structure, and p_{Thin layer, top}And ρ_{Thin layer, bottom}The sheet resistance of the top and bottom current-distributing layers. To avoid the above described voltage drop along the current spreading layer, the horizontal distance between the electrodes should be lower than the current spreading length. The problem is that, in most practical cases,the horizontal chip size is clearly higher than the current spreading length. Therefore, with a conventional simple contact pad, the condition regarding the distance between the electrodes cannot be satisfied. One known solution to this problem is to use a finger-like, i.e. interdigitated, electrode geometry. With this geometry, the horizontal distance between the electrodes can be adjusted to be smaller than the current spreading length. However, this method also has its drawbacks: the current density near the electrode, particularly at the outer end of the electrode "finger", is always highest, causing a significantly non-uniform current density.

Object of the Invention

It is an object of the present invention to provide an LED chip design that improves the performance and reliability of the element by improved current uniformity over the light-generating area of the chip.

Summary of The Invention

The features of the present invention are set forth below.

The LED chip of the present invention is produced on an electrically insulating substrate. The LED structure includes a lower current-distributing layer of a first conductivity type, a first electrode, and a vertical layered structure, which are formed on the lower current-distributing layer horizontally separated from each other. The vertical layer structure includes an active layer, preferably sandwiched between n-type and p-type semiconductor cladding layers (cladding layers), and an upper current-distributing layer of a second conductivity type located above the active layer. The second electrode is formed on the upper current-distributing layer. The geometry of the electrodes is adjusted to provide a horizontal distance between the electrodes that is lower than the current spreading length of the chip. The term "horizontal" herein means a direction in the plane of the substrate and, naturally, "vertical" means a direction perpendicular to this plane.

According to the invention, a vertical trench is formed between the electrodes, the trench extending through the chip including the lower current-distributing layer to control the horizontal current flow in the current-distributing layer in order to achieve a uniform current density over the active layer. In other words, the lower current distribution is also selectively switched off in the present invention, in contrast to the prior art solutions where the current flow is only controlled by the geometry of the electrodes and the vertical layer structure above the lower current distribution layer. Thus, instead of the two-level approach of the prior art solution, the chip topology is based on three levels. By controlling the current flow by removing all layers from selected locations of the chip geometry, a very uniform density can be achieved across the light-generating layer.

In addition to the current guiding effect, the trenches described above increase the total perimeter of the vertical layer structure. This creates an increased probability for light generated in the active layer to escape from the structure through the sidewalls of the vertical layer structure. In order to further provide for the extraction of light from the chip, in a preferred embodiment of the invention additional vertical trenches are formed between the electrodes, which additional trenches extend through the chip including the active layer along the horizontal direction of the current flow in the current-distributing layer, to further increase the total perimeter of the vertical layer structure. The additional trenches positioned along the current flow direction do not interfere with the current flow.

One problem with chips having interdigitated or similar geometries is that light extracted from the chip through the side walls of the vertical layer structure may be blocked by the opposite side wall or by the first electrode on the lower current-distributing layer. To avoid this, the sidewalls of the vertical layer structure are preferably slanted, at least in the active layer generating light, away from the vertical direction to facilitate light extraction from the chip.

Brief Description of Drawings

In the following, the invention will be described in more detail with reference to the accompanying drawings, in which

Figure 1 shows an example of current density in a conventional LED chip,

figure 2 shows an example of current density in a prior art LED chip using interdigitated electrode geometry,

FIG. 3 is a schematic and simplified illustration of an embodiment in accordance with the present invention, an

Fig. 4 illustrates the effect of the inclined side walls of the vertical layer structure according to a preferred embodiment of the present invention.

Detailed Description

Fig. 1 shows the calculated current densities in linear LED chips with lengths of 200 μm (upper graph) and 400 μm (lower graph). The current spreading length was 200 μm in both cases. As can be seen, the current density is not uniform in both cases due to the large horizontal dimension relative to the current spreading length, the uniformity becoming higher as the chip length increases. In the second case, it can be seen that the current density is far from uniform.

The interdigitated electrodes 2, 3 of the LED design of figure 2 are arranged to provide a distance between the electrodes that is less than the current spreading length. Nevertheless, as seen in the graph of fig. 2, the current density over the chip area is very non-uniform, with very strong local maxima at the ends of the finger-like projections of the electrodes.

In the LED chip 1 of fig. 3, the first electrode 2 and the second electrode 3 establish a modified interdigitated geometry extending over the entire chip area. Therefore, the LED employs a basic concept of dividing a chip into a number of sections (sections) in such a manner that the distance between electrodes is not more than a current spreading length. This segmentation is shown in cross-sectional views a-a and B-B, which also show the layered structure of the chip. The LEDs are produced on an electrically insulating substrate 4. The lowermost layer on the substrate is a lower current-distributing layer 5. Above this is a light-generating active layer (6), which active layer 6 is sandwiched between two sandwich stop layers 7 having different types of conductivity. On top of the layer stack is an upper current-distributing layer 8. After the generation of these layers, the layer stack above the lower current-distributing layer has been selectively etched away to expose the lower current-distributing layer for forming the first electrode 2 thereon. The resulting cross-section comprises an adjacent mesa-like (mesa-like) layer stack located on the lower current-distributing layer and having the second electrode as the uppermost element.

A third chip level, in addition to the two levels determined by the current-distributing layers, has been formed by etching trenches 9 between the electrodes, through all the layers described above, at the tip regions of the finger-like protrusions 10 of the electrodes. Thus, current is prevented from flowing through the tip, which would cause a local current density maximum as shown in fig. 2. Instead, the current may flow primarily only in the direction of the parallel "fingers" perpendicular to the electrodes. This provides a very uniform current density over the entire chip area.

The grooves between the mesa-like layer stacks and the trenches 9 through the chip not only electrically isolate different segments of the chip but also improve the extraction of light from the chip, due to the increased total length of the perimeter of the vertical layer structure and thus the increased probability of light escaping from the chip through the side walls of the vertical layer structure. To further improve the light extraction there are also additional vertical trenches 11 extending from the top of the chip under the active layer. To avoid disturbing the current flow, these additional trenches are located in the current distribution layer in the direction of the horizontal current flow.

As seen in fig. 3, some of the sidewalls 12 of the vertical layer structure are sloped away from the vertical to form an upwardly open trench profile. The reason for supporting this is shown in fig. 4, which shows a trench with vertical sidewalls on the left and a trench with inclined sidewalls on the right. In the former case, when escaping horizontally sideways from the layered structure, the light continues to spread horizontally and may be blocked by the opposite edges of the first electrode or the trench. Instead, in the case of inclined sidewalls, light escaping the structure is refracted upwards from the original horizontal direction and blocking is avoided.

As is clear to a person skilled in the art, the invention is not limited to the examples described above, but the embodiments may be varied freely within the scope of the claims.

Claims (3)

1. An LED chip (1) generated on an electrically insulating substrate (4), said LED chip comprising a lower current-distributing layer (5) of a first conductivity type, a first electrode (2), a vertical layer structure (5, 6, 7), said first electrode (2) and said vertical layer structure (5, 6, 7) being formed on said lower current-distributing layer horizontally separated from each other, said vertical layer structure comprising an active layer (6) and an upper current-distributing layer (8) of a second conductivity type located above said active layer, and a second electrode (3) generated on said upper current-distributing layer, the geometry of said first electrode (2) and said second electrode (3) being an interdigitated geometry, and the geometry of said first electrode (2) and said second electrode (3) being adapted to provide a current spreading length between said first electrode (2) and said second electrode (3) lower than that of said LED chip Said LED chip being characterized by

-a vertical trench (9) formed between the first electrode (2) and the second electrode (3) at the tip region of the finger-like protrusion of the first electrode (2) or the second electrode (3), the trench extending through the LED chip (1) comprising a lower current distribution layer (5) to control horizontal current flow in order to achieve a uniform current density over the active layer (6).

2. An LED chip (1) according to claim 1, characterized in that an additional vertical trench (11) is formed between the first electrode (2) and the second electrode (3), which additional vertical trench extends through the LED chip (1) comprising the active layer (6) along a horizontal current flow direction in the lower current-distributing layer (5) and the upper current-distributing layer (8) to increase the total perimeter of the vertical layer structure (5, 6, 7) and thus the extraction of light from the LED chip.

3. An LED chip (1) as claimed in claim 1 or 2, characterized in that the side walls (12) of the vertical layer structure (5, 6, 7) are inclined away from the vertical direction to promote the extraction of light from the LED chip (1).